Target and algorithm for measuring overlay by modeling backscattered electrons on a repeating structure

Abstract

The overlay target has a grating-over-grating structure, where a lower grating structure is disposed on the sample and an upper grating structure is disposed on the lower grating structure, and the overlay target further has a calibration scan location where the lower grating structure is present but not the upper grating structure, and an overlay scan location where the upper grating structure and the lower grating structure are present.

Description

Technical Field

[0001] The present disclosure generally relates to semiconductor targets and metrology.

Background Art

[0002] As the semiconductor manufacturing industry develops, there is an increasing demand for yield management, particularly for metrology and inspection systems. While the critical dimensions continue to shrink, the industry is required to achieve high-yield and high-value-added production in a shorter time. Reducing the total time from detecting a yield problem to correcting it has become a determining factor in the return on investment for semiconductor manufacturers.

[0003] The inspection process is used in various processes during semiconductor manufacturing, and by detecting defects on the wafer side, it can promote the improvement of the manufacturing process yield and thus the increase in profits. Inspection has always been an important part of the manufacturing of semiconductor devices such as integrated circuits (ICs). However, as the dimensions of semiconductor devices shrink, even smaller defects can lead to device malfunctions. Therefore, inspection has become more important than ever for the successful manufacturing of acceptable semiconductor devices. For example, as the dimensions of semiconductor devices shrink, even relatively small defects can cause unwanted misalignments in those semiconductor devices, so the detection of smaller-sized defects is becoming necessary.

[0004] Standard marks used in electron beam overlay metrology have a separated pattern, so signals from different layers can be separated in a non-overlapping manner. For example, there are the horizontal marks shown in Figure 1 and the inserted marks shown in Figure 2. In these examples, a simple algorithm can be used to extract the positions of each layer.

[0005] Figures 3 and 4 depict a multilayer pattern 1 including an upper layer 2 and an embedded layer 3. When there are multiple layers, it may be impossible to distinguish whether the secondary electron signal corresponds to the secondary electrons 4 from the upper layer 2, i.e., those that can be denoted as SE, or the secondary electrons 5 from the embedded layer 3, i.e., those that can be denoted as SE2. As depicted in Figure 3, SE2 can be associated with the secondary electrons 5 generated from the backscattered electrons due to scattering in the embedded layer 3. Similarly, as depicted in Figure 4, it may be impossible to determine whether the backscattered electron (BSE) signals 6 or 7 correspond to the upper layer 2 or the embedded layer 3.

[0006] There may be difficulties in measuring a spatially separated target. One such difficulty may be the expansion of the blank area. Since the blank area increases costs, it is not compatible with the fabrication of microelectronic circuits. Another difficulty may be that when imaging an asymmetric field using an electron beam, beam placement distortion may occur due to non-uniform charging of the surface. In addition, in a separated area, the device, such as that with a stack layer (a laminate of layers), cannot be appropriately represented.

[0007] One of the conventional measures to avoid these difficulties (i.e., to measure a stack layer when spatial separation of signals from each layer is not possible) is to model the electron beam-to-stack interaction. However, comprehensive modeling requires knowledge of the design, process steps, and tool-to-material interaction. This type of measure is implemented using optical measurement, such as an optical critical dimension (OCD) application. There is no accurate and fast measurement method for electron beam overlay metrology.

[0008] Another conventional measure is to construct a dedicated grating-over-grating target with a specified shift. An algorithm using a differential signal can be incorporated into its construction. Since the signal-to-noise ratio (SNR) is significantly lower and the required measurement time is longer compared to spatially separated features (outer shape features), such targets cannot be made compatible with in-line production control.

Prior Art Documents

Patent Documents

[0009]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0010] Therefore, an improved overlay target and its measurement method are required.

Means for Solving the Problems

[0011] In one embodiment, the overlay target can be provided with a grid - over - grid structure, a calibration scan location, and an overlay scan location.

[0012] In another embodiment, the method can be to capture the overlay target with an electron - beam - type output capture subsystem, thereby forming a captured image, and measuring the overlay of the grid - over - grid structure using the captured image. The overlay target can be provided with a grid - over - grid structure, a calibration scan location, and an overlay scan location. When measuring the overlay of the grid - over - grid structure using the captured image, the overlay may be decomposed and extracted from the captured image.

[0013] In one example, a non-transitory computer-readable storage medium can be provided with one or more programs for performing method steps. For example, the method can include capturing an overlay target with an electron beam type output capture subsystem, thereby forming a captured image, and measuring an overlay of a grid-over-grid structure using the captured image. These steps can further include decomposing and extracting the overlay from the captured image.

[0014] In one example, a system can include a stage, an electron beam type output capture subsystem, and a processor that communicates electronically with the electron beam type output capture subsystem. The stage can be configured to hold a sample having an overlay target. The overlay target can include a grid-over-grid structure, a calibration scan location, and an overlay scan location. The processor can be configured to measure an overlay of a grid-over-grid structure using the captured image. The processor can also be configured to measure an overlay of a grid-over-grid structure using the captured image by decomposing and extracting the overlay from the captured image.

[0015] The grid-over-grid structure can include a lower grid structure and an upper grid structure. The lower grid structure can be disposed on the sample, which can be on the stage. The upper grid structure can be disposed on the lower grid structure. Both the upper grid structure and the lower grid structure can be part of a sample, such as a semiconductor wafer or other types of samples. The calibration scan location can be where there is a lower grid structure but no upper grid structure. According to certain embodiments, the calibration scan location can consist essentially of only the lower grid structure. The overlay scan location can be where there are both an upper grid structure and a lower grid structure.

[0016] The lattice-over-lattice structure may have a blank area. The blank area may be a place where neither the lower lattice structure nor the upper lattice structure exists.

[0017] During decomposition and extraction, an extraction signal may be extracted from a single layer. Further, in this method, the signal-to-noise ratio of the extraction signal may be improved. When improving it, a design-based filter may be applied to the extraction signal. During decomposition and extraction, the scattering of the extraction signal may be further decomposed.

[0018] During the scattering decomposition, a backscattered electron profile may be applied to the extraction signal, a transfer function may be determined for the extraction signal, and a model related to the scattering and having the transfer function may be generated.

[0019] The parameters of the model may be optimized using local asymmetry or the symmetry center of the secondary electron signal. The parameters of the model may be optimized by aligning the calibration scan location with a second calibration scan location where the backscattered electron-secondary electron interaction of a specific layer can be found.

[0020] To more fully understand the nature and purpose of the present disclosure, please refer to the following accompanying drawings in conjunction with the detailed description below.

Brief Description of the Drawings

[0021]

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Best Mode for Carrying Out the Invention

[0022] Certain embodiments are described that claim the subject matter of the claims, but within the technical scope of the present disclosure, other embodiments are also included, including embodiments that do not provide all of the benefits and features described herein. Various structural, logical, processing step, and electronic modifications can be made without departing from the technical scope of the present disclosure. Accordingly, the technical scope of the present disclosure is defined only by reference to the claims in a separate section.

[0023] In various embodiments, improvements can be made to overlay measurement (i.e., misregistration (position shift) measurement) using an electron beam (e-beam) metrology tool. Examples of electron beam metrology tools that can be included herein are critical dimension scanning electron microscopes (CD-SEM) tools, defect / defect review tools, inspection tools, etc. By applying dedicated targets and algorithms to complex semiconductor stacks, accuracy errors caused by the mixing of signals from multiple layers can be overcome.

[0024] In electron beam metrology, an image can be constructed by scanning a focused electron beam over a target (e.g., using a scanning electron microscope (SEM)). Two types of electrons can be captured from each scan point using one or more detectors to generate an image. The two types of electrons are backscattered electrons (BSE) and secondary electrons (SE). When constructing an image based on a multilayer structure, such as those used for misregistration or overlay measurement, these two sets of electrons can occur in any of the layers that the beam touches.

[0025] According to one example, the target of the embodiment can be optimized with respect to metrology performance represented by total measurement uncertainty (TMU) and inaccuracy caused by target-to-device bias. Even when the target is optimized for short measurement times and lower TMU, the overlay measurement values can vary from semiconductor device to semiconductor device. This bias can be referred to as target inaccuracy or non-zero overlay (NZO). To overcome this bias, the target of the embodiment can be provided with features (e.g., stack layers or small pitches) similar to those of the device.

[0026] Among the challenges posed by having a target similar to the device is, for example, overcoming signal contamination without spatial separation. It would not be practical to analytically model such complex interactions as has been done for optical interactions. According to the embodiments of the claims of the present application, such challenges can be overcome.

[0027] According to the algorithm according to an example, the SE - SE interaction can be defined as described by Equation 1. SE(x)=SE1(x)+SE2(x + x2) [1]

[0028] In Equation 1, x represents the position along the target, x2 is the offset (e.g., overlay) of the second grid, and SE represents the detected secondary electrons (SE1) from the upper layer and those (SE2) from the lower layer. If the position of the second layer can be measured with sufficient accuracy, it can be used as an input. Sufficient accuracy means, for example, when a sufficiently clear signal is captured, in which case the noise can be overcome and the position of the grid can be measured. However, it is not necessary to use the position of the second layer as an input, and it can also be calculated according to the embodiments of the present disclosure. For example, the position of the second layer can be calculated whether the position of one grid is known or unknown.

[0029] According to the embodiments in the present application, by using the knowledge of secondary electrons (SE2) and backscattered electrons (BSE2) from the embedded layer to model the secondary electron signal, signal contamination can be overcome. α, γ, and the function f are scattering coefficients when the signal is transmitted from layer to layer using electrons. SE(x)=SE1(x)+αBSE2(x + x2) [2] SE(x)=SE1(x)+γSE1(x)BSE2(x + x2) [3] SE(x)=SE1(x)+f(SE1(x),BSE(x + x2)) [4]

[0030] However, the complexity of the interactions expressed by each of Equations 2 - 4 is increasing, the number of variables is increasing, and the sensitivity is increasing. All of them are based on the ability to clearly measure the profiles of both BSE2 and SE2 by utilizing a dedicated area within the target.

[0031] To enable solving this set of equations, the target is set such that at least one of the two layers has an area that is not contaminated or is composed thereof. Examples of such target designs can be found in FIGS. 5 to 7.

[0032] In one example, the overlay target can be provided with a grid - over - grid structure, a calibration scan location, and an overlay scan location.

[0033] FIG. 5 is an exemplary embodiment of an overlay target 10 of that kind. The overlay target 10 can be provided with a lower grid structure 12, an upper grid structure 11, and a region of interest 13, and can capture both the position and the signal profile of the lower grid structure 12 using the region of interest 13. What is captured can be used as SE2 or BSE2 in Equation 1. In a target design for capturing device effects and process steps, the pitch range can be from a fine pitch of 40 nm to a coarse pitch of 200 and 400 nm. The total target size can be 1 μm to several μm (e.g., 2 - 4 μm).

[0034] FIG. 6 is an exemplary embodiment of an overlay target 20 of that kind. The overlay target 20 can be provided with a lower grid structure 22, an upper grid structure 21, and a region of interest 23. The pitch and target size in the embodiment of FIG. 6 can be the same as those in FIG. 5. The calibration area can be 200 nm or less.

[0035] FIG. 7 is an exemplary embodiment of an overlay target 30 of that kind. The overlay target 30 can be provided with a lower grid structure 32, an upper grid structure 31, and a region of interest 33. The pitch and target size in the embodiment of FIG. 7 can be the same as those in FIG. 5. The calibration area can be 200 nm or less.

[0036] In certain embodiments, a transparent resist can be used, or a BSE channel can be used as a seed for the method. When using a transparent resist, the overlay target may or may not have a blank area. One example with a transparent resist is to provide two blank areas in the overlay target, for example, the two rectangles in FIG. 5 surrounding the region of interest 13.

[0037] The grid-over-grid structure can be assumed to have a lower grid structure and an upper grid structure. The lower grid structure may be disposed on the sample. The sample may be on the stage. The upper grid structure may be disposed on the lower grid structure. An example of a calibration scan location is where there is a lower grid structure but no upper grid structure. In certain embodiments, the calibration scan location can be made to be essentially only the lower grid structure. An example of an overlay scan location is where there are both a lower grid structure and an upper grid structure.

[0038] The grid-over-grid structure can be assumed to have a blank area. An example of a blank area is where there is neither a lower grid structure nor an upper grid structure. In that case, the blank area can be used for calibration. In one example, the blank area can be made to be the location where a single grid signature useful for solving the equations disclosed in the present application is captured.

[0039] In one example, as shown in FIG. 8, method 100 can be such that at 101, an overlay target is captured by an electron beam type output capture subsystem, thereby forming a captured image at 102, and then at 103, the overlay of the grid-over-grid structure is measured using the captured image. The overlay target can be made to include a grid-over-grid structure, a calibration scan location, and an overlay scan location. When measuring the overlay of the grid-over-grid structure using the captured image at 103, the overlay may be decomposed and extracted from the captured image.

[0040] During the decomposition and extraction, for example, by modeling the profile, the extraction of the extraction signal from a single layer may be performed. What the profile can be includes the projection of the 2D region of interest marked as the frame area in FIGS. 5 to 7.

[0041] Furthermore, in this method, the signal-to-noise ratio of the extraction signal may be improved. In one example, design-based filtering is applied. This is a filtering algorithm that incorporates information about the design criteria. Since the improvement of the signal-to-noise ratio is described in Patent Documents 1 and 2, their entire contents will be incorporated by reference.

[0042] During the improvement, a design-based filter may be applied to the extraction signal. This can be useful when the non-contaminated area is small. In one example, 1D or 2D and known fine and coarse pitches are used. The target designer can provide those design parameters. During profile extraction, everything that does not conform to the design is regarded as noise and removed, so the signal-to-noise ratio is improved.

[0043] During the decomposition and extraction, furthermore, the scattering of the extraction signal may be decomposed. By applying the BSE profile to Equation 2 or Equation 3, the scattering can be decomposed.

[0044] During the scattering decomposition, a backscattered electron profile may be applied to the extraction signal, a transfer function may be determined for the extraction signal, and a model for the scattering having the transfer function may be generated. The transfer function can be the one exemplified in Equation 4.

[0045] The parameters of the model may be optimized using local asymmetry or the symmetry center of the secondary electron signal. The parameters of the model may be optimized by aligning the calibration scan location with a second calibration scan location where the interaction between backscattered electrons and secondary electrons in a specific layer can be found.

[0046] Physical properties may be used to optimize the parameters of the scattering model. For example, the center of symmetry of the full SE signal can be used. The center of symmetry is an assumption that the designer of the target must follow. This assumption can be used when solving the scattering problem. This symmetry may be broken when the lattice over lattice is arranged. Therefore, it is better to impose constraints on the algorithm so that each lattice in the equations is symmetric.

[0047] Local asymmetry (e.g., qMerit function) may be used. Local asymmetry can be generated during periodic signal extraction. Nevertheless, as disclosed in Patent Document 3 etc. where the whole content is incorporated by reference, each period can be made asymmetric. qMerit can be used when solving the equations disclosed in the present application. By using constraint conditions, it is possible to ensure that the local asymmetry (qMerit) is minimized for each lattice that is an input for the equations.

[0048] The alignment of the blank area (calibration area) where the BSE·SE interaction of a specific layer can be found can be used as represented by the function f(SE1(x), BSE(x + x1)) in Equation 4. After the equations disclosed in the present application are solved, the signal found according to the constraint conditions can be aligned with the blank area.

[0049] The signal contamination cleaning steps are depicted in FIGS. 9A - 9F, which illustrate the process of solving the scattering problem. FIGS. 9A and 9B are a profile and an image respectively. A profile is a 1D projection extracted from an image. Since this is an image of a grid over a grid, both grids are visible. The two grids are misaligned and affected by process overlay and design. Due to this misalignment, the profile becomes asymmetric, even when they are processed symmetrically. According to the procedures described in the embodiments of the present disclosure, the profile and image of each layer are extracted. This is shown in FIGS. 9C and 9D, FIGS. 9E and 9F for the upper grid and lower grid respectively. The profiles are shown both as projections and images and are reconstructed to appear symmetric.

[0050] FIG. 10 is a block diagram of a system 200 in an embodiment. This system 200 has a wafer inspection tool (having an electron column 201) configured to generate an image of a wafer 204.

[0051] The wafer inspection tool can be one having an output capture subsystem (e.g., an electron beam type output capture subsystem) equipped with at least an energy source and a detector. The output capture subsystem can be an electron beam type output capture subsystem. For example, in one embodiment, the energy directed at the wafer 204 is electron-based, and the energy detected from the wafer 204 is electron-based. Note that the wafer 204 can be used as a sample. In this configuration, the energy source can be an electron beam source. In the embodiment of that kind shown in FIG. 10, the output capture subsystem can be one having an electron column 201 that can be coupled to a computer subsystem 202. The wafer 204 can be held by a stage 210.

[0052] The wafer 204 can have an overlay target. The overlay target can include a grid-over-grid structure, alignment scan locations, and overlay scan locations.

[0053] As also shown in FIG. 10, the electron column 201 can have an electron beam source 203 configured to generate electrons, and those electrons can be focused onto the wafer 204 by one or more elements 205. Examples of what the electron beam source 203 can be include, for example, a cathode-type electron source or an emitter chip. Examples of what can be included in the one or more elements 205 include, for example, a gun lens, an anode, a beam limiting aperture, a gate valve, a beam current selection aperture, an objective lens, and a scanning subsystem, and any of these can include any known and suitable type of element in the art of this technology.

[0054] Electrons (e.g., secondary electrons) returning from the wafer 204 can be focused onto the detector 207 by one or more elements 206. Examples of what can be included in the one or more elements 206 include, for example, a scanning subsystem, and it can be the same as the scanning subsystem included in the element(s) 205.

[0055] The electron column 201 can also have any other suitable type of element known in the art of this technology.

[0056] In FIG. 10, the electron column 201 is shown configured such that electrons are directed at the wafer 204 at a certain oblique incident angle and scattered from that wafer 204 at another oblique angle, but the angle at which the electron beam is directed at the wafer 204 and scattered from it can be any suitable angle. Additionally, the electron beam output capture subsystem can be configured to generate an image of the wafer 204 using multiple modes (e.g., different illumination angles, collection angles, etc.). The difference between the multiple modes provided in the electron beam output capture subsystem can be considered as a difference in some image generation parameter of that output capture subsystem.

[0057] As described above, the computer subsystem 202 may be coupled to the detector 207. The detector 207 may detect electrons returning from the surface of the wafer 204 to form an electron beam image of the wafer 204. The electron beam image may include any suitable electron beam image. The computer subsystem 202 may be configured to perform any of the functions described herein using the output of the detector 207 and / or the electron beam image. The computer subsystem 202 may be configured to perform any of the additional step(s) described herein. The system 200 having the output capture subsystem shown in FIG. 10 may be further configured as disclosed herein.

[0058] Note that the purpose of presenting FIG. 10 in this application is to outline schematically the configuration of an electron beam type output capture subsystem that can be used in the embodiments described herein. The configuration of the electron beam type output capture subsystem described herein can be modified to optimize the performance of the output capture subsystem as is usually done when designing a commercial output capture system.

[0059] In addition, when implementing the systems described herein, an existing system may be utilized (e.g., by adding the functions described herein to an existing system). In such a system, the methods described herein may be provided as an optional function of the system (e.g., in addition to other functions of the system). Alternatively, the systems described herein may be designed as a completely new system.

[0060] The output capture subsystem is described above as an electron beam type output capture subsystem, but the output capture subsystem may also be an ion beam type output capture subsystem. Such an output capture subsystem may be configured as shown in FIG. 10, and as an exception, its electron beam source may be replaced with any ion beam source known and suitable in the technical field of the present invention. In addition, the output capture subsystem may be any other suitable ion beam type output capture subsystem, for example, those incorporated in a commercially available focused ion beam (FIB) system, a helium ion microscope (HIM) system, and a secondary ion mass spectrometry (SIMS) system.

[0061] The computer subsystem 202 has a processor 208 and an electronic data storage unit 209. Examples of what the processor 208 can be include a microprocessor, a microcontroller, and other devices.

[0062] The computer subsystem 202 may be coupled to the components of the system 200 in any suitable manner (e.g., through one or more transmission media, including wired and / or wireless transmission media) so that the processor 208 can receive the output. The processor 208 may be configured to perform a number of functions using its output. In the wafer inspection tool, the processor 208 can receive instructions and other information. Optionally, the processor 208 and / or the electronic data storage unit 209 may be capable of receiving additional information or sending instructions through electronic communication with another wafer inspection tool, wafer metrology tool, or wafer review tool (not shown).

[0063] The processor 208 communicates electronically with a wafer inspection tool, such as the detector 207. The processor 208 may be configured to process an image generated using the measurement results provided by the detector 207. For example, the method 100 of various embodiments may be executed by the processor.

[0064] The computer subsystem 202, one or more other systems, or one or more other subsystems, and the things described in this application may be part of various systems, such as a personal computer system, an image computer, a mainframe computer system, a workstation, network equipment, Internet equipment, and other devices. The subsystem or subsystems or systems thereof may be any processor known and suitable in the technical field of the present case, for example, one having a parallel processor. In addition, the subsystem or subsystems or systems thereof may have a high-speed processing platform and software, whether it is a stand-alone or network-connected tool.

[0065] The processor 208 and the electronic data storage unit 209 may be part of the system 200 or other devices, such as being arranged inside the system 200 or other devices. According to an example, the processor 208 and the electronic data storage unit 209 can be part of a stand-alone control unit or provided inside a centralized quality control unit. A plurality of processors 208 or electronic data storage units 209 may be used.

[0066] In fact, the processor 208 may be implemented by any combination of hardware, software, and firmware. Also, the functions described in this application may be executed by a single unit, or divided among different components, and each of those components may also be implemented by any combination of hardware, software, and firmware. The program code or instructions for causing the processor 208 to execute and implement various methods and functions may be stored in a readable storage medium, for example, the medium may be the memory of the electronic data storage unit 209 or other memories.

[0067] If the system 200 has a plurality of computer subsystems 202, different ones of these subsystems may be coupled together so that images, data, information, instructions, etc. can be sent between the subsystems. For example, a certain subsystem may be coupled to one or more additional subsystems by any suitable transmission medium, and it may be any wired and / or wireless transmission medium known and suitable in the technical field of the present case. Two or more of such subsystems may be substantially coupled by a shared computer-readable storage medium (not shown).

[0068] The processor 208 may be configured to perform a number of functions using the output of the system 200 and other outputs. For example, the processor 208 may be configured to send the output to the electronic data storage unit 209 and other storage media. The processor 208 may further be configured as described in the present application.

[0069] The processor 208 or the computer subsystem 202 may be part of a defect review system, an inspection system, a metrology system, or some other type of system. That is, some of the configurations described in the embodiments disclosed in the present application can be tailored in various ways to be suitable for systems with various capabilities, large or small, for various applications.

[0070] If the system has a plurality of subsystems, different ones of these subsystems may be coupled together so that images, data, information, instructions, etc. can be sent between the subsystems. For example, a certain subsystem may be coupled to one or more additional subsystems by any suitable transmission medium, and it may be any wired and / or wireless transmission medium known and suitable in the technical field of the present case. Two or more of such subsystems may be substantially coupled by a shared computer-readable storage medium (not shown).

[0071] The processor 208 may be configured according to any of the embodiments described in the present application. The processor 208 may be configured to implement or execute other functions or additional steps using the output of the system 200 or using images or data from other sources.

[0072] According to an example, the processor 208 can be made to communicate with the system 200. The processor 208 may be configured to measure an overlay of a grid - over - grid structure using the captured image. The processor 208 may further be configured to measure the overlay of the grid - over - grid structure using the captured image by decomposing and extracting the overlay based on the captured image.

[0073] The processor 208 may be communicatively coupled to any of the various components or subsystems provided in the system 200, and in any manner known in the relevant technical field. Further, the processor 208 may be configured to receive and / or capture data or information from other systems (e.g., inspection results from an inspection system such as a review tool, design data in a remote database, etc.) via a transmission medium, for example, one having wired and / or wireless segments. In that manner, the transmission medium may be made to function as a data link between the processor 208 and other subsystems of the system 200 or systems outside the system 200.

[0074] According to an example, a non - transitory computer - readable storage medium can be provided with one or more programs for executing method steps, and the method can be, for example, a method 100 of capturing an overlay target with an electron - beam - type output capture subsystem, thereby forming a captured image, and measuring an overlay of a grid - over - grid structure using the captured image. Among those steps, further, decomposition and extraction of the overlay from the captured image may be included.

[0075] The various steps, functions, and / or operations of the system 200 and the various methods disclosed in the present application are executed by one or more of an electronic circuit, a logic gate, a multiplexer, a programmable logic device, an ASIC, an analog or digital controller / switch, a microcontroller, or an information processing system. For example, program instructions for implementing the methods described in the present application may be transmitted on a carrier medium or stored on a carrier medium. Examples of the carrier medium may include a storage medium such as a read-only memory, a random access memory, a magnetic or optical disk, a non-volatile memory, a solid-state memory, a magnetic tape, etc. Examples of the carrier medium may also include a transmission medium such as a wire, a cable, or a wireless transmission link. For example, the various steps described throughout the present disclosure may be executed by a single processor 208 (or computer subsystem 202), or alternatively, by a plurality of processors 208 (or a plurality of computer subsystems 208). Further, the various subsystems of the system 200 may be regarded as having one or more information processing or logic systems. Therefore, the above description should be understood as illustrative rather than limiting to the present disclosure.

[0076] The various steps of the methods described in accordance with the various embodiments and examples of the present disclosure are sufficient to implement the method of the present invention. That is, in one embodiment, the method is essentially composed of a combination of the steps of the methods disclosed in the present application. In another embodiment, the method is composed of only those steps.

[0077] Although the present disclosure has been described with reference to one or more specific embodiments and / or examples, it will be appreciated that other embodiments of the present disclosure may be constructed without departing from the technical scope of the present disclosure.

Claims

1. A method comprising: forming a captured image by capturing an overlay target with an electron beam type output capture subsystem, wherein the overlay target comprises: a lower grid structure, and an upper grid structure disposed on the lower grid structure, forming a grid over grid structure, a calibration scan location having the lower grid structure but no upper grid structure, an overlay scan location having both the upper grid structure and the lower grid structure, and being an overlay target comprising, and measuring an overlay of the grid over grid structure using the captured image.

2. The method according to claim 1, wherein when measuring the overlay of the grid over grid structure, decomposing and extracting the overlay from the captured image.

3. The method according to claim 2, wherein when decomposing and extracting, extracting an extraction signal from a single layer.

4. The method according to claim 3, further comprising improving a signal-to-noise ratio of the extraction signal.

5. The method according to claim 4, wherein when improving, applying a design-based filter to the extraction signal.

6. The method according to claim 3, further decomposing scattering of the extraction signal when decomposing and extracting.

7. The method according to claim 6, wherein when decomposing the scattering, applying a backscattered electron profile to the extraction signal, determining a transfer function for the extraction signal, and generating a model related to the scattering and having the transfer function. A method.

8. The method according to claim 7, optimizing parameters of the model by aligning the calibration scan location with a second calibration scan location where a backscattered electron-secondary electron interaction of a specific layer is found, or by using local asymmetry or a symmetry center of a secondary electron signal.

9. A non-transitory computer-readable storage medium comprising one or more programs for executing the method according to claim 1 on one or more information processing devices.

10. A non-transitory computer-readable storage medium comprising one or more programs for executing the method according to claim 2 on one or more information processing devices.

11. A system comprising: a stage configured to hold a sample having an overlay target, wherein the overlay target comprises: a lower grid structure disposed on the sample, and The upper grid structure arranged on the lower grid structure, A grid over-grid structure having, A calibration scan location where the lower grid structure exists but the upper grid structure does not, An overlay scan location where the upper grid structure and the lower grid structure exist, An overlay target comprising, An electron beam type output capture subsystem configured to measure the overlay target on the stage, and A system comprising a processor configured to measure the overlay of the grid over-grid structure using the captured image and in electronic communication with the electron beam type output capture subsystem.

12. The system according to claim 11, wherein the processor is configured to measure the overlay of the grid over-grid structure using the captured image by decomposing and extracting the overlay from the captured image.

13. The system according to claim 12, wherein an extraction signal is extracted from a single layer during the decomposition and extraction.

14. The system according to claim 13, further comprising a system for improving the signal-to-noise ratio of the extraction signal using the processor.

15. The system according to claim 14, wherein a design-based filter is applied to the extraction signal during the improvement.

16. The system according to claim 13, further comprising a system for decomposing the scattering of the extraction signal during the decomposition and extraction.

17. The system according to claim 16, wherein during the decomposition of the scattering, Applying a backscattered electron profile to the extraction signal, Determining a transfer function for the extraction signal, Generating a model related to the scattering and having the transfer function, System.

18. The system according to claim 17, wherein the parameters of the model are optimized by aligning the calibration scan location with a second calibration scan location where the interaction between backscattered electrons and secondary electrons of a specific layer is found, or by using local asymmetry or the symmetry center of the secondary electron signal.

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