Circuit board

Abstract

To provide a technique for suitably removing a release layer formed on a copper plate after bonding in the case of making a bonded substrate by the pressure and heat bonding method.SOLUTION: A circuit board has a ceramic substrate, a copper plate bonded to each of the two main surfaces of the ceramic substrate, and a silver plating film formed on the surface of the copper plate, and the number of facets on the surface of the copper plate at the interface between the copper plate and the silver plating film is less than 3000 per 1 mm2.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to the production of a ceramic bonding substrate, and particularly to the post-bonding treatment.

Background Art

[0002] As a ceramic insulating heat dissipation circuit board on which electronic components such as semiconductor chips are mounted, a silicon nitride insulating heat dissipation circuit board, an alumina-based insulating heat dissipation circuit board, etc. are widely known. The ceramic insulating heat dissipation circuit board has a role of releasing the heat generated by the mounted electronic components to the outside, and also bears the electrical connection between the electronic components and the outside.

[0003] The ceramic insulating heat dissipation circuit board is a bonding substrate formed by bonding copper plates (sometimes referred to as copper foils, copper circuit boards, copper heat sinks, etc.) mainly composed of metallic copper to both surfaces of a ceramic substrate using a brazing material containing an active metal. As a bonding method, a pressure heating bonding method is exemplified. Usually, a semiconductor chip is bonded (mounted) to one copper plate by silver sintering bonding, and for example, a metallic heat sink is soldered to the other copper plate.

[0004] Among them, the silicon nitride insulating heat dissipation circuit board is often applied to in-vehicle applications because it is superior in heat dissipation and reliability compared to the alumina-based insulating heat dissipation circuit board using an alumina-based ceramic substrate. In that case, silver plating is often applied to the surface of the copper foil forming the silicon nitride insulating heat dissipation circuit board for the purpose of improving the bonding reliability of the silver sintering bonding between the semiconductor chip and the silicon nitride insulating heat dissipation circuit board. For example, a mode of applying silver plating by electroless plating to the surface of the copper circuit board provided on one surface of the silicon nitride insulating heat dissipation circuit board is already known (see, for example, Patent Document 1).

[0005] Also, a method is already known in which a copper plate and a silicon nitride ceramic substrate are bonded together by pressure and heat using a brazing material, and which allows multiple bonded substrates to be obtained simultaneously (see, for example, Patent Document 2). In essence, this method involves preparing multiple intermediate bodies (a silicon nitride ceramic substrate having brazing material layers formed on the front and back surfaces and a copper plate disposed on the brazing material layers), applying a coating (release layer) containing a release agent to the surface of each copper plate, stacking these multiple intermediate bodies, bonding the entire stack thus obtained by heating while applying pressure, and finally removing the release layer to obtain multiple bonded substrates. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] International Publication No. 2020 / 218193 [Patent Document 2] International Publication No. 2020 / 105160 Summary of the Invention [Problem to be solved by the invention]

[0007] When a plurality of bonded substrates are obtained by the method disclosed in Patent Document 2, it is required to ensure that no release layer remains on the surfaces of the copper plates of the obtained bonded substrates.

[0008] However, when the release agent is ceramic particles, depending on the joining temperature, the copper particles of the softened copper plate may enter the gaps between the release agent particles, forming a coating that is a mixture of the two, and this coating may remain on the copper plate.

[0009] Conventionally, the coating has been removed by mechanical polishing processes such as brush polishing (brush cleaning) and buff polishing, but it has been difficult to completely remove the coating because the release agent particles sink into the copper plate or are caught in the copper plate due to its ductility.

[0010] Residual mold release agents and the like become factors causing variations in the reaction state when performing various processes in subsequent steps, such as copper etching for patterning or surface treatment, or silver plating treatment as disclosed in Patent Document 1 on a circuit board obtained by separating a patterned bonding substrate into individual pieces. In particular, the latter becomes a factor reducing the soldering strength to the silver plating film.

[0011] The present invention has been made in view of the above problems, and an object thereof is to provide a technique for suitably removing a release layer formed on a copper plate after bonding when manufacturing a bonding substrate by a pressure heating bonding method.

Means for Solving the Problems

[0012] To solve the above problems, a first aspect of the present invention is a circuit board, comprising: a ceramic substrate; copper plates bonded to each of two main surfaces of the ceramic substrate; and a silver plating film formed on the surface of the copper plates, wherein the number of facets present on the surface of the copper plates at the interface between the copper plates and the silver plating film is 3000 or less per 1 mm. 2 This is characterized by that.

[0013] A second aspect of the present invention is the circuit board according to the first aspect, wherein the number of facets having a diameter of 2.5 μm or more is 1200 or less per 1 mm, and the number of facets having a diameter of less than 2.5 μm is 1800 or less per 1 mm. 2 This is characterized by that. 2 This is characterized by that.

[0014] A third aspect of the present invention is the circuit board according to the second aspect, wherein the number of facets having a diameter of less than 1.5 μm is 1200 or less per 1 mm. 2 This is characterized by that.

[0015] A fourth aspect of the present invention is the circuit board according to any one of the first to third aspects, wherein the diameter of the facets is less than 9.5 μm.

Effects of the Invention

[0016] According to the first to fourth aspects of the present invention, since the number of facets generated on the surface of the copper plate at the interface with the silver plating film is reduced compared to the conventional case, sufficient bonding strength for soldering to the copper plate provided with the silver plating film is ensured.

Brief Description of Drawings

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Embodiments for Carrying Out the Invention

[0018] <Bonding Substrate> FIG. 1 is a cross-sectional view schematically showing a bonding substrate 100 according to the present embodiment.

[0019] The bonding substrate 100 according to the present embodiment includes a ceramic substrate 110, a copper plate 111, a bonding layer 112, a copper plate 113, and a bonding layer 114. The bonding substrate 100 may include elements other than these elements.

[0020] The use of the bonding substrate 100 is not particularly limited. In the following, an explanation will be given assuming that the bonding substrate 100 is used as an insulating heat dissipation substrate on which a power semiconductor element is mounted in a power semiconductor module. In such a case, one exposed main surface 111B of the copper plate 111 is used as a bonding surface of the power semiconductor element, and one exposed main surface 113B of the copper plate 113 is used as a bonding surface of a metal heat dissipation plate (heat sink). Hereinafter, the main surface 111B and the main surface 113B may be collectively referred to as the copper plate surface.

[0021] The other main surface (bonding surface) 111A of the copper plate 111 is bonded to substantially the entire surface of the first main surface 1101 of the ceramic substrate 110 by the bonding layer 112. On the other hand, the other main surface (bonding surface) 113A of the copper plate 113 is bonded to substantially the entire surface of the second main surface 1102 of the ceramic substrate 110 by the bonding layer 114. The first main surface 1101 and the second main surface 1102 face each other.

[0022] The ceramic substrate 110 can widely apply a ceramic substrate capable of pressure heating bonding described later. Specifically, a silicon nitride (Si3N4) substrate, an aluminum nitride (AlN) substrate, an alumina substrate, a substrate in which zirconia particles are dispersed in alumina, etc. are exemplified as the ceramic substrate 110. Among them, the silicon nitride ceramic substrate is advantageous in that it has high thermal conductivity and high insulation properties, and has high mechanical strength, so it is difficult to crack during pressure heating bonding. There is no particular limitation on the planar shape and size of the ceramic substrate 110, but from the viewpoint of miniaturizing the power semiconductor module, a ceramic substrate 110 having a rectangular shape in plan view with a side length of about 100 mm to 250 mm and a thickness of 0.20 mm to 0.40 mm is exemplified.

[0023] The thicknesses of the copper plates 111 and 113 are preferably about 300 μm to 2500 μm. However, it is not necessary for both to have the same value.

[0024] The bonding of the ceramic substrate 110 to the copper plates 111 and 113 by the bonding layers 112 and 114 is realized by the active metal method described later. As the active metal, at least one metal selected from the group consisting of titanium (Ti) and zirconium (Zr) is used. When the ceramic substrate 110 is a silicon nitride ceramic substrate, the bonding layers 112 and 114 mainly contain at least one nitride of titanium and zirconium used as the active metal. The thicknesses of the bonding layers 112 and 114 may be about 0.1 μm or more and 5 μm or less. However, it is not necessary for the thicknesses of both layers to be the same.

[0025] The copper plate 111, together with the bonding layer 112, is patterned into a predetermined shape (circuit pattern) according to the power semiconductor element to be bonded. Therefore, the first main surface 1101 of the ceramic substrate 110 is partially exposed in the bonding range of the copper plate 111. In addition to this, a mode in which the copper plate 113 and the bonding layer 114 are patterned may be adopted. However, in the following description, for convenience, it is referred to as a bonding substrate 100 including those without patterning.

[0026] Although detailed illustration is omitted in FIG. 1, more specifically, the bonding substrate 100 is a mother substrate that is divided into a plurality of substrates (circuit boards) by singulation. On the first main surface 1101, a large number of circuit patterns having the same shape are two-dimensionally and repeatedly provided on the copper plate 111 and the bonding layer 112. Each circuit board is used for mounting a power semiconductor element.

[0027] <Fabrication of Bonding Substrate> FIG. 2 is a diagram showing the manufacturing procedure of the bonding substrate 100 including subsequent processes. In the present embodiment, the bonding of the ceramic substrate 110, the copper plates 111 and 113 to obtain the bonding substrate 100 is performed by an active metal method using an active metal brazing material. FIG. 3 is a diagram schematically showing the state of pressure and heat bonding to an intermediate product (bonding target product) 150 performed in the process of manufacturing the bonding substrate 100 by such an active metal method.

[0028] (Intermediate Product) In manufacturing the bonding substrate 100, first, a plurality of intermediate products 150 are prepared (step S1). In the present embodiment, the bonding substrate 100 is obtained by subjecting the prepared intermediate products 150 to pressure and heat bonding and other processes.

[0029] As shown in FIG. 3, the intermediate product 150 has a structure in which a brazing material layer 162 and a copper plate 111 are laminated in this order on the first main surface 1101 of the ceramic substrate 110, and a brazing material layer 164 and a copper plate 113 are laminated in this order on the second main surface 1102. In the state of the intermediate product 150, the copper plate 111 (or further the copper plate 113) is not patterned.

[0030] The brazing material layers 162 and 164 are formed by applying a paste (brazing material paste) containing an active metal brazing material and a solvent. The brazing material paste may further contain a binder, a dispersant, an antifoaming agent, etc.

[0031] The active metal brazing filler metal is composed of powder. The active metal brazing filler metal contains at least one metal element selected from the group consisting of, for example, silver (Ag) and copper (Cu), and at least one active metal element selected from the group consisting of titanium (Ti) and zirconium (Zr). The active metal brazing filler metal preferably consists of a metal powder containing silver and at least one selected from the group consisting of titanium hydride (TiH2) powder and zirconium hydride (ZrH2) powder. In such a case, since the active metal brazing filler metal does not contain alloy powders that are difficult to atomize at low cost, it becomes easy to atomize the active metal brazing filler metal at low cost.

[0032] The active metal brazing filler metal preferably consists of powder having an average particle diameter of 0.1 μm or more and 10 μm or less. The average particle diameter can be obtained by measuring the particle size distribution with a commercially available laser diffraction type particle size distribution measuring device and calculating D50 from the measured particle size distribution. When the active metal brazing filler metal has such a small average particle diameter, the brazing filler metal layers 162 and 164 can be made thinner.

[0033] The brazing filler metal layers 162 and 164 are formed by applying a brazing filler metal paste to the first main surface 1101 and the second main surface 1102 of the ceramic substrate 110. More specifically, the brazing filler metal layers 162 and 164 are formed by the volatilization of the solvent from the coating film formed in such a manner. Then, the copper plates 111 and 113 are laminated on these brazing filler metal layers 162 and 164, respectively, to form the intermediate product 150. More specifically, the copper plate 111 is in contact with the brazing filler metal layer 162 on the main surface 111A, and the copper plate 113 is in contact with the brazing filler metal layer 164 on the main surface 113A.

[0034] (Release layer) Next, a release layer 165 is formed on the main surface 111B of the copper plate 111 provided in all the prepared intermediate products 150, or on the main surface 113B of the copper plate 113 provided in all the prepared intermediate products 150 (step S2).

[0035] However, for the intermediate product 150 located at the uppermost part and the intermediate product 150 located at the lowermost part in the laminate 140 described below, the release layers 165 are formed on both the main surface 111B and the main surface 113B. Alternatively, the release layers 165 may be formed on each of the main surface 111B and the main surface 113B of all the intermediate products 150.

[0036] The release layer 165 is formed by spray-applying a coating liquid containing a release agent and a solvent to one or both of the main surface 111B and the main surface 113B which are the surfaces to be formed. More specifically, the release layer 165 is formed by volatilization of the solvent from the coating film formed by such spray application. The coating liquid may further contain a binder, a dispersant, an antifoaming agent, etc. The solvent contains isopropyl alcohol or the like.

[0037] Desirably, the coating liquid is electrostatically applied to the surface to be formed. Thereby, since the coating liquid is suppressed from overflowing to other than the surface to be formed, the loss of the coating liquid is reduced.

[0038] The release layer 165 may be formed by a method different from the above-described method. For example, the release layer 165 may be provided by screen-printing a paste containing a release agent on the surface to be formed.

[0039] The thickness of the release layer 165 is arbitrary, but desirably it is 5 μm or more and 30 μm or less. When the thickness of the release layer 165 is less than 5 μm, the coverage of the surface to be formed by the release layer 165 becomes insufficient, and the copper plate 111 or the copper plate 113 tends to be easily exposed. When pressure heating bonding is performed on the intermediate product 150 with insufficient coverage of the surface to be formed by the release layer 165 in this way, subsequent separation of the intermediate products 150 from each other, and separation of the upper punch 180 and the lower punch 181, which are a pair of clamping members for clamping the intermediate product 150, from the intermediate product 150 may become difficult. On the other hand, when the thickness of the release layer 165 is more than 30 μm, the time required to remove the release layer 165 from the intermediate product 150 after pressure heating bonding tends to become long.

[0040] The release agent is composed of powder. The release agent preferably contains at least one selected from the group consisting of boron nitride (BN) powder, graphite powder, molybdenum disulfide (MoS2) powder, and molybdenum dioxide (MoO2) powder, and particularly preferably consists of boron nitride powder having high heat resistance. The release agent may contain alumina.

[0041] The release agent preferably has an average particle diameter of 0.1 μm or more and 10 μm or less. The average particle diameter can be obtained by measuring the particle size distribution with a commercially available laser diffraction type particle size distribution measuring device and calculating D50 from the measured particle size distribution. When the average particle diameter is larger than this range, when the copper plates 111 and 113 are joined to the ceramic substrate 110 by pressure heating bonding, the shape of the powder of the release agent is transferred to the copper plate surfaces (main surfaces 111B and 113B) in contact with the release layer 165, and the surface roughness of the copper plate surfaces tends to deteriorate, which is not preferable.

[0042] (Pressure heating bonding) A plurality of intermediate products 150 each having a release layer 165 formed thereon are stacked and arranged at a predetermined position in a pressure heating bonding device 170, and pressure heating bonding is performed on the obtained laminate 140 (step S3). FIG. 3 shows a state in which pressure heating bonding is performed on a laminate 140 in which three intermediate products 150 (150a to 150c) are stacked.

[0043] As shown in FIG. 3, in pressure heating bonding, the laminate 140 is disposed between the upper punch 180 and the lower punch 181 of the pressure heating bonding device 170. Then, each intermediate product 150 is pressurized by sandwiching the laminate 140 from above and below by the upper punch 180 and the lower punch 181. Further, in parallel with such pressurization, the laminate 140 is heated by a heater 182 provided in the pressure heating bonding device 170 as well.

[0044] Preferably, the pressing in the lamination direction of the laminate 140 by the upper punch 180 and the lower punch 181 during pressure heating bonding is performed according to a surface pressure profile in which the maximum surface pressure is 5 MPa or more and 25 MPa or less. Further, the heating of the intermediate product 150 by the heater 182 is performed according to a temperature profile in which the maximum temperature is 800°C or more and 1000°C or less. Preferably, it is performed according to a temperature profile in which the maximum temperature is 800°C or more and 900°C or less.

[0045] By performing pressure heating bonding in the above manner, the bonded substrate 100 is obtained. In the present embodiment, since pressure heating is performed on a plurality of intermediate products 150 constituting the laminate 140 at once, a plurality of bonded substrates 100 can be obtained simultaneously.

[0046] For example, when the ceramic substrate 110 is made of silicon nitride ceramics, in each intermediate product 150 constituting the laminate 140, the active metal (e.g., titanium) present in the brazing material layers 162 and 164 reacts with the nitrogen of the ceramic substrate 110, while the silver also present in the brazing material layers 162 and 164 diffuses into the copper plates 111 and 113. At that time, diffusion of other metal components contained in the active metal paste into the copper plates 111 and 113, and diffusion of silicon contained in the ceramic substrate 110 into the brazing material layers 162 and 164 may also occur.

[0047] As a result, the brazing material layers 162 and 164 are respectively changed into bonding layers 112 and 114 mainly composed of nitrides of the active metal, and the copper plates 111 and 113 are bonded to the ceramic substrate 110 at the bonding layers 112 and 114. Thereby, the bonded substrate 100 is obtained.

[0048] Also, when an oxide substrate such as an alumina substrate or a substrate in which zirconia particles are dispersed in alumina is used as the ceramic substrate 110, similarly, as a result of pressure heating bonding, the brazing material layers 162 and 164 are changed into the bonding layers 112 and 114, and the bonded substrate 100 is obtained.

[0049] (Release layer removal) However, at the stage when the pressure-heat bonding is completed, the plurality of bonding substrates 100, the upper punch 180, and the lower punch 181 are laminated via the release layer 165. They can be separated by being peeled from each other at the release layer 165, but the release layer 165 remains on the copper plate surface of each separated bonding substrate 100. The remaining of such a release layer 165 becomes a factor causing problems during patterning, plating, and other post-processes. Therefore, a process for removing the release layer 165 remaining on the bonding substrate 100 after separation is performed (step S4).

[0050] In the present embodiment, the removal of such a release layer 165 is performed by wet etching. However, such wet etching does not directly dissolve and remove the remaining release layer 165 itself, but etches the portions in contact with the release layer 165 on the copper plate surface, that is, the main surfaces 111B and 113B. By etching copper at the locations where the release layer 165 remains, the release layer 165 can be removed more reliably.

[0051] As the etching solution, it is desirable to have a penetrability that can etch copper and can penetrate into the release layer 165 covering the copper plate surface and reach the copper plate surface preferably. The penetrability can be evaluated by the magnitude of the surface tension of the etching solution, and it can be said that the smaller the magnitude of the surface tension, the better the penetrability.

[0052] Specifically, as the etching solution for removing the release layer 165, those with a surface tension of 70 mN / m or less are preferable. Examples of such an etching solution include an aqueous solution (sulfuric acid-hydrogen peroxide-based etching solution) containing 1.5% to 30% hydrogen peroxide water (H2O2) and 1% to 20% sulfuric acid (H2SO4). Examples of such an etching solution include an aqueous solution in which hydrogen peroxide (H2O2) and sulfuric acid (H2SO4) are dissolved in water, and the mass ratio of hydrogen peroxide to the mass of the aqueous solution is 1.5% to 30%, and the mass ratio of sulfuric acid is 1% to 20%. The surface tension of such a sulfuric acid-hydrogen peroxide-based etching solution is about 60 mN / m. Note that etching solutions such as copper chloride-based and iron chloride-based etching solutions and DI water with a surface tension exceeding 70 mN / m and high viscosity are not suitable for removing the release layer 165.

[0053] Regarding the etching time, if it is set to 45 seconds or more, it is possible to generally remove the release layer 165 suitably. There is no particular limitation on the upper limit from the viewpoint of complete removal of the release layer 165, but excessive etching will excessively thin the copper plates 111 and 113, so practically, 1000 seconds or less is sufficient. Also, the temperature of the etching solution may be about 20°C to 60°C.

[0054] When the wet etching process is completed, subsequently, buff polishing is performed on the exposed copper plate (step S5). The buff polishing is performed to roughen the copper plate surface in order to adjust the state of the copper plate surface and enhance the adhesion of the DFR (dry film resist) during the subsequent DFR lamination process.

[0055] Preferably, the buff polishing is performed in two stages: mechanical buffing and chemical buffing. The former is mainly performed for the purpose of adjusting the state of the copper plate surface, and the latter is mainly performed for the purpose of roughening the copper plate surface. For example, an aqueous hydrogen peroxide solution is used for the chemical buffing.

[0056] In the conventional technology as disclosed in Patent Document 2, the wet etching for removing the release layer described above was not performed. After pressure heating bonding, brush polishing (brush cleaning) was performed on each of the bonded substrates separated from each other, and then buff polishing was performed. This was intended to completely remove the release layer at the buff polishing stage. However, in reality, the release layer was not always completely removed by buff polishing and tended to remain on the surface of the copper plate in the form of a mixture with copper or the like.

[0057] However, in the present embodiment, as described above, after pressure heating bonding, wet etching is performed on each of the bonded substrates 100 separated from each other. At this point, after completely removing the release layer 165, buff polishing is performed. Since this processing procedure is adopted, the remaining release layer 165 does not cause problems in subsequent processes. In addition, since the release layer 165 is preferably removed prior to buff polishing, the buff polishing can be specifically performed for the purpose of enhancing the adhesion of the DFR.

[0058] By performing buff polishing, the bonded substrate 100 in the state before patterning can be obtained.

[0059] (Patterning) The bonded substrate 100 that has undergone buff polishing is usually subjected to a process for patterning the copper plate 111 (and the bonding layer 112) in a predetermined circuit pattern. As described above, since the bonded substrate 100 is manufactured as a mother substrate that is divided into a large number of substrates by singulation, when patterning, a large number of circuit patterns having the same shape are repeatedly provided two-dimensionally.

[0060] First, a DFR lamination process (step S6) of attaching a DFR (dry film resist) to substantially the entire main surface 111B roughened by buff polishing is performed. Subsequently, patterning (step S7) is performed by a known photolithography process.

[0061] Patterning is achieved by partially dissolving and removing the DFR through known exposure and development processes, thereby partially exposing the main surface 111B of the copper plate 111 according to the desired circuit pattern to be formed, and then performing etching (copper etching) on the exposed portion. An iron chloride-based etching solution is exemplified as the etching solution for copper etching.

[0062] Subsequent to the copper etching, removal (residue removal) of the bonding layer 112 existing directly below the position where copper has been removed by the copper etching is performed (step S8). Such removal of the bonding layer 112 can be carried out by etching or the like.

[0063] When patterning is completed, the DFR is peeled off (step S9). For such peeling, for example, an aqueous NaOH solution is used. The bonded substrate 100 in the state where the DFR has been peeled off corresponds to the bonded substrate 100 shown in FIG. 1.

[0064] When the copper plate 113 is patterned, a series of processes including DFR lamination, patterning, residue removal, and DFR peeling are similarly performed on its main surface 113B.

[0065] (Grooving) Subsequently, the post-processes performed on the bonded substrate 100 will be described. First, a grooving process is performed (step S10) to individualize the bonded substrate 100, which is a mother substrate on which a large number of circuit patterns having the same shape are two-dimensionally repeatedly provided, into a large number of circuit boards each having a unit circuit pattern in the subsequent process. The grooving is performed, for example, with a laser. An N2 laser is exemplified as the laser light source.

[0066] (Silver plating) Subsequently, a process of forming a silver plating film is performed on the copper plate surfaces (main surface 111B and main surface 113B) of the bonding substrate 100, which is the mother substrate after groove processing. The silver plating film is mainly formed for the purpose of enhancing the bonding strength when bonding a power semiconductor element and a heat sink to the circuit board. In particular, it is performed for the purpose of enhancing the bonding strength when soldering a metal heat sink to the main surface 113B.

[0067] First, prior to the formation of silver plating, a process of adjusting the state of the copper plate surface is performed (step S11). Specifically, a degreasing process for removing organic residues remaining on the copper plate surface and a soft etching for slightly etching the copper plate surface are performed. For the degreasing process, for example, an ethylene glycol aqueous solution is used. For the soft etching, an aqueous hydrogen peroxide solution is used as the etching solution.

[0068] Then, electroless plating by substitution silver plating is performed on the copper plate surface whose surface state has been adjusted by the above processes (step S12). As the plating bath, one containing about 10% aluminocarboxylate and about 1.0 g / L of silver can be preferably used.

[0069] The bonding substrate 100 with silver plating on the copper plate surface is broken at the positions of the previously formed grooves to be fragmented. Thereby, a large number of circuit boards each provided with a unit circuit pattern are obtained from the bonding substrate 100, which is the mother substrate in which a large number of circuit patterns having the same shape are two-dimensionally repeatedly provided (step S13).

[0070] <Effect of Release Layer Removal> As described above, in the present embodiment, after separating a plurality of bonded substrates 100 obtained in a laminated state by pressure heating bonding from each other at the release layer 165, wet etching is performed to reliably remove the release layer 165 remaining on the surface of the copper plate of the bonded substrate 100. Such a process has the effect of reducing the variation in copper etching during patterning. Further, it also has the effect of improving the state of the interface between the copper plate surface and the silver plating film when forming a silver plating film on the patterned bonded substrate 100 in a subsequent process by displacement silver plating.

[0071] More specifically regarding the latter, as in the prior art, when wet etching is not performed as a process for removing the release layer and only mechanical polishing processes such as brush polishing (brush cleaning) and buff polishing are performed, the release layer is not necessarily sufficiently removed, and the release agent particles tend to remain on the copper plate surface in the form of a mixture with copper or the like until the stage of forming the silver plating film.

[0072] When displacement silver plating is performed with the release agent particles remaining in this way, the balance between the copper dissolution rate and the silver deposition rate is disrupted, a large number of facets are formed on the copper plate surface directly under the silver plating film, and a large number of voids are generated between the copper plate surface and the silver plating film. In this specification, the term "facet" which originally means a plane (crystal plane) is used in the sense of a "hole portion" that is recessed from the surrounding formed on the copper plate surface due to the formation of facets. And the number of such hole portions is referred to as the number of facets or the facet number. The presence of a large number of facets and voids is particularly a factor that reduces the bonding strength of soldering to the copper plate on which the silver plating film is applied. If the circuit board is used in a power semiconductor module, it becomes a factor that reduces the soldering bonding strength of the heat sink to the main surface 113B.

[0073] In contrast, in the present embodiment, since the release layer 165 is preferably removed in wet etching and then the subsequent steps are performed, when forming the silver plating film, the occurrence of voids between the silver plating and the copper plate surface due to the formation of facets on the copper plate surface is preferably suppressed. Therefore, the bonding strength of the solder joint to the copper plate with the silver plating film is sufficiently ensured. When the circuit board is used for a power semiconductor module, the solder joint strength of the heat sink to the main surface 113B is sufficiently ensured.

[0074] Specifically, in a bonding substrate or a circuit board manufactured by a conventional procedure without performing wet etching, the number of facets per 1 mm 2 on the copper plate surface reaches tens of thousands, while on the copper plate surface of the bonding substrate or the circuit board manufactured by the procedure according to the present embodiment, which is manufactured by the above-described procedure, the number of facets per 1 mm 2 is reduced to 3000 or less. Thereby, the bonding strength of the solder joint is favorably ensured.

[0075] Preferably, the number of facets with a diameter (facet diameter) of 2.5 μm or more is 1200 or less per 1 mm 2 and the number of facets with a facet diameter of less than 2.5 μm is 1800 or less per 1 mm 2 . More preferably, the number of facets with a facet diameter of less than 1.5 μm is 1200 or less per 1 mm 2 . In such a case, the bonding strength of the solder joint is more preferably ensured.

[0076] As described above, according to the present embodiment, a plurality of intermediate products each formed by laminating a brazing material layer and a copper plate on both main surfaces of a ceramic substrate are laminated with an intervening release layer, and pressure heating bonding is performed on the laminate thus obtained to obtain a plurality of bonded substrates at once. In this case, the release layer remaining on the bonded substrate after pressure heating bonding is removed by wet etching that dissolves the surface of the copper plate, so that the release layer can be surely removed. As a result, variations in copper etching during subsequent patterning are reduced. Also, the state of the interface between the copper plate surface and the silver plating film when a silver plating film is formed by substitution silver plating on the copper plate surface of the bonded substrate in a subsequent process is improved.

[0077] Particularly, in the latter case, since the occurrence of voids between the silver plating due to the formation of facets on the copper plate surface is preferably suppressed, the bonding strength of the solder joint to the copper plate provided with the silver plating film is sufficiently ensured.

[0078] <Modification Example> In the above-described embodiment, the laminate of a plurality of intermediate products was the object of pressure heating bonding. However, only one intermediate product may be the object of pressure heating bonding, and the release layer attached to the copper plate in one bonded substrate thus obtained may be removed by wet etching.

[0079] The steps of groove processing (step S10) and singulation (step S13) in the above-described embodiment may be omitted. When the size of the circuit board used for the power semiconductor module is large, such steps may be taken. That is, one bonded substrate 100 may be used as a whole for the power semiconductor module as it is.

Example

[0080] (Confirmation of Release Layer Removal Effect) An experiment was conducted to confirm the effect of removing the release layer 165 remaining on the bonding substrate 100 by wet etching. Boron nitride (BN) powder was used as the release agent, and a sulfuric acid-hydrogen peroxide-based etching solution was used as the etching solution.

[0081] FIG. 4 shows the state of removal of the release layer 165 when the hydrogen peroxide concentration in the etching solution is changed, by means of an actual captured image (part) by a camera, a binarized image of the captured image, and the area ratios of the white part and the black part in the binarized image identified by image analysis.

[0082] The binarization process for specifying the white part and the black part is based on the captured image. A density histogram diagram is created with the vertical axis being the number of pixels that appear and the horizontal axis being the 256 gray levels (density values) from 0 to 255. The threshold of the gray level is set to 100, and pixels with a gray level less than 100 are determined to be black, and pixels with a gray level of 100 or more are determined to be white. The reason for setting the threshold of the gray level to 100 is that when the surface of the copper plate is completely covered by the release layer 165 and not exposed at all, the number of pixels that appear in the range of gray levels from 0 to 100 is almost 0, while a peak in the number of pixels that appear is seen in the range of gray levels from 100 to 255. On the other hand, when all of the release layer 165 is removed and the entire surface of the copper plate is exposed, the number of pixels that appear in the range of gray levels from 100 to 255 is almost 0, and a peak in the number of pixels that appear is seen in the range of gray levels from 0 to 100.

[0083] More specifically, the hydrogen peroxide concentrations of the sulfuric acid-hydrogen peroxide-based etching solution were changed to four levels of 1%, 1.5%, 2%, and 3%, the sulfuric acid concentration was 10%, the temperature was 40°C, and the etching time was 160 seconds.

[0084] Also, FIG. 5 shows the state of removal of the release layer 165 when the etching time is changed, by means of a captured image, a binarized image, and the area ratios of the white part and the black part in the binarized image, which are the same as those in FIG. 4.

[0085] More specifically, the hydrogen peroxide concentration of the etching solution was set at 3%, the sulfuric acid concentration at 10%, the temperature at 40°C, and the etching time was varied at five levels: 0 seconds (i.e., untreated), 15 seconds, 30 seconds, 45 seconds, and 160 seconds.

[0086] From FIGS. 4 and 5, it is confirmed that when the hydrogen peroxide is 1.5% or more and the etching time is 45 seconds or more, the release layer is almost entirely removed.

[0087] On the other hand, FIG. 6 is a diagram showing, in an imaging image similar to FIG. 4, the difference in the state of the release layer 165 depending on the etching time when an iron chloride-based etching solution is used as the etching solution. The etching time was varied at four levels: 30 seconds, 60 seconds, 90 seconds, and 600 seconds.

[0088] From FIG. 6, it is confirmed that there is almost no change in the release layer 165 until the 90-second mark. Furthermore, it is confirmed that even at the 600-second mark, a large amount of the release layer 165 visually recognized as white remains. Such results indicate that the iron chloride-based etching solution is not suitable for removing the release layer 165.

[0089] (Surface Tension Evaluation) The surface tension, which is an index of permeability, was measured for a sulfuric acid-hydrogen peroxide-based etching solution, an iron chloride-based etching solution, and DI water.

[0090] As the sulfuric acid-hydrogen peroxide-based etching solution, an aqueous solution with a hydrogen peroxide concentration of 3% and a sulfuric acid concentration of 10% was measured. As the iron chloride-based etching solution, an aqueous solution with an iron chloride concentration of 40% and a hydrochloric acid concentration of 10% was measured.

[0091] As the measuring instrument, CBVP-Z manufactured by Kyowa Interface Science was used. As the measuring method, the plate method was adopted, and the measuring temperature was 20°C.

[0092] The measurement results were as follows: Sulfuric acid-hydrogen peroxide-based: 60.6 mN / m; Iron chloride-based: 77.8 mN / m; DI water: 73.1 mN / m.

[0093] Considering the above results together with the results shown in FIGS. 4 to 6, it is suggested that the sulfuric acid-hydrogen peroxide-based etching solution, which has a low surface tension and is excellent in terms of permeability, is suitable for removing the release layer 165.

[0094] (Facet number evaluation) Next, in order to confirm the usefulness of applying wet etching to the removal of the release layer 165, the number of facets present on the circuit board on which the silver plating film was formed was evaluated. As an example, after removing the release layer 165 by wet etching with a sulfuric acid-hydrogen peroxide-based etching solution having a hydrogen peroxide concentration of 3% and a sulfuric acid concentration of 10%, a circuit board manufactured by the procedure shown in FIG. 2 was prepared. Further, as a comparative example, a circuit board (5 cm × 5 cm) manufactured by the procedure shown in FIG. 2 was prepared, except that brush cleaning was performed instead of wet etching.

[0095] When counting the number of facets, first, the silver plating film formed on the circuit board was removed using an aqueous solution containing potassium permanganate and sodium hydroxide, and then SEM (S-3000N manufactured by HITACHI) was used to image the ranges of 180 μm × 240 μm at three arbitrary locations on the copper plate surface. FIG. 7 is an image of the circuit board of the comparative example, and FIG. 8 is an image of the circuit board of the example. Subsequently, the obtained captured images (magnification: 500 times) were printed out, and all the facets in the printed captured images were counted for each section defined by the diameter (facet diameter). Specifically, the maximum diameter of the facets in a certain direction of the captured image (for example, the long side direction of the rectangular captured image) was taken as the diameter of the facets, and the diameter of each facet was measured with a ruler. The facet diameter was expressed in μm units, rounded to the second decimal place, and counted for each of the following 11 sections. Note that similar measurements may be performed by image analysis.

[0096] Section 1: 0.5 μm or more and 1.4 μm or less (less than 1.5 μm); Interval 2: 1.5 μm or more and 2.4 μm or less (less than 2.5 μm); Interval 3: 2.5 μm or more and 3.4 μm or less (less than 3.5 μm); Interval 4: 3.5 μm or more and 4.4 μm or less (less than 4.5 μm); Interval 5: 4.5 μm or more and 5.4 μm or less (less than 5.5 μm); Interval 6: 5.5 μm or more and 6.4 μm or less (less than 6.5 μm); Interval 7: 6.5 μm or more and 7.4 μm or less (less than 7.5 μm); Interval 8: 7.5 μm or more and 8.4 μm or less (less than 8.5 μm); Interval 9: 8.5 μm or more and 9.4 μm or less (less than 9.5 μm); Interval 10: 9.5 μm or more and 10.4 μm or less (less than 10.5 μm); Interval 11: 10.5 μm or more.

[0097] Note that facets with a diameter of less than 0.5 μm were excluded because they were difficult to identify.

[0098] Table 1 shows, for each of the comparative examples and the examples, the count value of the facets for each interval in each of the three counting target ranges, the total number of facets in the three counting target ranges for each interval (the "Total" column in Table 1), and the number of facets per 1 mm (the "per 1 mm" column in Table 1) obtained by dividing the total number of facets by the total area of the counting target ranges (180 μm × 240 μm × 3 = 0.1296 mm 2 ) and the integrated value obtained by integrating the number of facets per 1 mm from the interval with the smaller facet diameter, presented in a list. 2

Table 1

[0099]

Table 1

[0100] Also, FIG. 9 shows 1 mm in the comparative example. 2A graph showing a histogram of the number of facets per unit area and the change in the integrated value for each interval. On the other hand, FIG. 10 shows the case of 1 mm in the embodiment. 2 A graph showing a histogram of the number of facets per unit area and the change in the integrated value for each interval.

[0101] As can be seen from Table 1, FIG. 9, and FIG. 10, in the case of the comparative example, the total number of facets is 26,736 per 1 mm, 2 whereas in the case of the embodiment, the total number of facets remains at 2,707, which is less than 3,000 per 1 mm. That is, in the embodiment, the number of facets was reduced to approximately 1 / 10 of that of the comparative example. This indicates that performing wet etching for removing the release layer is effective for reducing facets. 2 More specifically, in the case of the comparative example, the number of facets with a facet diameter of 2.5 μm or more is 26,736 - 25,031 = 1,705 per 1 mm,

[0102] while in the case of the embodiment, the number of facets with a facet diameter of 2.5 μm or more is 2,707 - 1,566 = 1,141 per 1 mm. Although it is less than 1,200, it can be said that the difference from the comparative example is relatively small. 2 However, in the case of the comparative example, the number of facets with a facet diameter of less than 1.5 μm is very large, 22,099 per 1 mm, 2 and the number of facets with a facet diameter of less than 2.5 μm also reaches 25,031 per 1 mm. In contrast, in the case of the embodiment, the number of facets with a facet diameter of less than 1.5 μm remains at 1,080 per 1 mm,

[0103] and the number of facets with a facet diameter of less than 2.5 μm also remains at 1,566 per 1 mm. 2 and for the number of facets with a facet diameter of less than 2.5 μm, it also reaches 25,031 per 1 mm. In contrast, in the case of the embodiment, the number of facets with a facet diameter of less than 1.5 μm remains at 1,080 per 1 mm, 2 and for the number of facets with a facet diameter of less than 2.5 μm, it also remains at 1,566 per 1 mm. 2 stays at 1,080 per 1 mm, and for the number of facets with a facet diameter of less than 2.5 μm, it also 2 stays at 1,566 per 1 mm.

[0104] In the case of the examples, such differences more effectively suppress the formation of small-diameter facets, suggesting that this is effective in ensuring the soldering strength to the copper plate coated with the silver plating film.

Explanation of symbols

[0105] 100 Bonding substrate 110 Silicon nitride ceramic substrate 111, 113 Copper plate 111A, 113A Main surface (bonding surface) of the copper plate 111B, 113B Main surface (copper plate surface) of the copper plate 112, 114 Bonding layer 140 Laminate 150 Intermediate product 162, 164 Brazing material layer 165 Release layer 170 Apparatus for pressure and heat bonding 180 Upper punch 181 Lower punch 182 Heater 1101 First main surface of the silicon nitride ceramic substrate 1102 Second main surface of the silicon nitride ceramic substrate

Claims

1. 1. A circuit board comprising: A ceramic substrate; a copper plate bonded to each of the two main surfaces of the ceramic substrate; A silver plating film formed on the surface of the copper plate; Equipped with The number of facets present on the surface of the copper plate at the interface between the copper plate and the silver plating film is 1 mm ２ 3,000 or less per A circuit board comprising:

2. 2. The circuit board according to claim 1, The number of facets having a diameter of 2.5 μm or more is 1 mm ２ The number of facets having a diameter of less than 2.5 μm is 1200 or less per mm ２ There are 1,800 or less per A circuit board comprising:

3. 3. The circuit board according to claim 2, The number of facets having a diameter of less than 1.5 μm is ２ 1,200 or less per A circuit board comprising:

4. 4. The circuit board according to claim 1, The diameter of the facet is less than 9.5 μm. A circuit board comprising:

Images