Induced displacement for improved overlay error measurement

Abstract

The method for semiconductor metrology includes depositing a first membrane layer 38 on a semiconductor substrate 12 and depositing a second membrane layer 40 overlying the first membrane layer 38. Patterning the first membrane layer 38 and the second membrane layer 40 to define a plurality of overlay targets, the overlay targets comprising first target features formed in the first membrane layer 38 having respective first positions spaced at a first nominal distance and second target features formed in the second membrane layer 40 having respective second positions spaced at a second nominal distance different from the first nominal distance. Images of the semiconductor substrate are processed to measure respective displacements between the first and second target positions for each of the overlay targets to estimate both the actual overlay error between the patterning of the first membrane layer 38 and the patterning of the second membrane layer 40 and the measurement error of the imaging assembly 14.

Description

Technical Field

[0001] The present invention generally relates to the manufacture of semiconductor devices, and more particularly to methods and target features for semiconductor circuit measurement.

Background Art

[0002] Semiconductor circuits are generally manufactured using photolithography. In photolithography, a thin layer of photosensitive polymer (photoresist) is deposited on a semiconductor substrate, patterned using light radiation or other radiation, and a portion of the substrate covered by the photoresist remains. The photoresist is patterned by a scanner projecting an image of a reticle onto the photoresist, typically using ultraviolet light. After patterning, the substrate is modified by methods such as etching and ion bombardment to change the material properties and / or topography of the substrate, and the portions of the substrate covered by the photoresist are not affected.

[0003] Semiconductor circuit measurement is used to measure the characteristics of the patterned photoresist, such as the topography and position of the patterned features. The accurate position of the patterned features of the photoresist relative to the previous process layer is essential for achieving a high yield in the photolithography process. Any error (misalignment) in the alignment of the patterned photoresist relative to the underlying process layer is referred to as an "overlay error". As an example, in a typical semiconductor circuit with a minimum line width of 10 - 14 nm (so-called 10 nm design rule), the maximum allowable overlay error is 2 - 3 nm. In state-of-the-art semiconductor circuits, the line width has been reduced to 5 nm, and accordingly, the maximum allowable overlay error has also decreased.

[0004] Since light radiation at visible and infrared wavelengths can penetrate the photoresist layer and further penetrate the dielectric layer under the photoresist, overlay errors are generally measured using an optical overlay measurement device (commonly referred to as an optical overlay measurement tool). Moreover, infrared wavelengths can penetrate semiconductor substrates such as silicon, enabling measurements through the substrate.

[0005] Optical overlay measurement tools such as the Archer (trademark) series tools by KLA Corporation (Milpitas, California, USA) image overlay targets (such as AIM (trademark) overlay targets by KLA) located in the scribe lines (lines separating adjacent dies) of semiconductor substrates and / or inside the dies. An image analysis algorithm is applied to the acquired image to detect the center of symmetry of the target feature in the process layer and the center of symmetry of the target feature in the patterned photoresist layer. The overlay error is calculated based on the displacement between the centers of symmetry of the target features in the two layers.

[0006] Alternatively, the overlay error may be measured in a scatterometry mode. In this measurement mode, a scatterometry image of the periodic target features of the overlay target is captured from the exit pupil of the objective lens of the measurement tool. To measure the overlay error, the scatterometry image indicating the angular distribution of the light radiation scattered from the target features is processed. The terms "light ray", "light radiation", "light", and "radiation beam" as used in this specification and the claims generally refer to all of visible light, infrared light, and ultraviolet light.

Prior Art Documents

Patent Documents

[0007]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0008] The embodiments of the present invention described below provide an improved method and target characteristics for semiconductor circuit measurement.

Means for Solving the Problems

[0009] Accordingly, according to one embodiment of the present invention, a method for semiconductor measurement is provided. The method includes depositing a first film layer on a semiconductor substrate and depositing a second film layer on top of the first film layer. The first and second film layers are patterned to define a plurality of overlay targets, and each overlay target includes a first target feature formed at intervals of a first nominal distance in the first film layer having respective first positions, and a second target feature formed at intervals of a second nominal distance different from the first nominal distance in the second film layer having respective second positions. Each second target feature overlaps on top of each first target feature to define each one of the overlay targets. The method further includes capturing at least one image of the semiconductor substrate on which the overlay targets are formed using an imaging assembly, and processing the at least one image to measure respective displacements between the first target position and the second target position in each of the overlay targets. Based on the measured displacements and the first and second nominal distances, both the actual overlay error between the patterning of the first film layer and the patterning of the second film layer and the measurement error of the imaging assembly are estimated.

[0010] In some embodiments, the step of patterning the first and second film layers includes patterning a matrix of fields to define a plurality of overlay targets in each of the fields, and the step of capturing an image includes capturing at least one image of at least one of the plurality of overlay targets in at least one of the fields.

[0011] In further embodiments, the first nominal distance and the second nominal distance are selected such that for each overlay target, the respective displacement between the first position and the second position corresponds to the respective nominal displacement. Additionally, or alternatively, the step of estimating both the actual overlay error and the measurement error includes comparing the measured displacements to the respective modeled displacements for a set of overlay targets, where each modeled displacement includes the sum of the displacement calculated from the scanner model and the respective nominal displacement for a given overlay target.

[0012] In further embodiments, the scanner model includes coefficients that define the displacement between the pattern formed in the first film layer and the pattern formed in the second film layer by a photolithography process.

[0013] In some embodiments, the step of estimating the measurement error includes finding a linearity coefficient between each nominal displacement and the measured displacements across the set of overlay targets. Additionally, or alternatively, the step of finding the linearity coefficient includes applying a regression method between each measured displacement and the modeled displacement to estimate the coefficients of the scanner model and the linearity coefficient.

[0014] In further embodiments, the step of estimating the actual overlay error includes applying the linearity coefficient to the measured displacements.

[0015] In a further embodiment, the step of estimating the actual overlay error and measurement error includes the step of finding the coefficients of the scanner model, and the step of patterning the first and second film layers includes the step of selecting respective nominal displacements of the overlay targets that are at least partially perpendicular to the scanner model. Additionally, or alternatively, the step of selecting the respective nominal displacements includes the step of calculating the projection of the nominal displacements onto the scanner model and the step of selecting the respective nominal displacements such that the projection does not exceed a defined limit.

[0016] In some embodiments, the step of selecting the respective nominal displacements includes the step of calculating the perpendicular nominal displacements at the respective positions of the overlay targets, which are used in the step of selecting the respective nominal displacements of the overlay targets.

[0017] According to one embodiment of the present invention, an optical measurement device is also provided. The optical measurement device includes a semiconductor substrate, a first film layer deposited on the semiconductor substrate, and a second film layer overlapping the first film layer. The first film layer and the second film layer are patterned to define a plurality of overlay targets, and each overlay target includes a first target feature formed at intervals of a first nominal distance in the first film layer having respective first positions, and a second target feature formed at intervals of a second nominal distance different from the first nominal distance in the second film layer having respective second positions. Each second target feature overlaps each first target feature to define each one of the overlay targets. The device further includes an imaging assembly configured to capture at least one image of the semiconductor substrate on which the overlay targets are formed. The controller is configured to process the at least one image to measure respective displacements between the first target positions and the second target positions in each of the overlay targets, and based on the measured displacements and the first and second nominal distances, estimate both the actual overlay error between the patterning of the first film layer and the patterning of the second film layer and the measurement error of the imaging assembly.

[0018] The present invention will be more fully understood when the following detailed description of the embodiments is interpreted in conjunction with the drawings.

Brief Description of the Drawings

[0019]

Figure 1

Figure 2

Figure 3A

Figure 3B

Figure 4

Figure 5

Figure 6

Mode for Carrying Out the Invention

[0020] Overview Overlay targets for overlay measurement are generally used for precise and accurate measurement of overlay errors between successive pattern layers on a semiconductor substrate. These layers may include, for example, a processing layer and a resist layer (photoresist), may include two processing layers in post-etch applications, or may include one processing layer as in some multiple-die applications. Thus, some exemplary embodiments will be described below with reference to a processing layer and a resist layer, but the principles of these embodiments can be applied by making changes to the first processing layer and the second processing layer as appropriate. In some multiple-die applications, the first processing layer and the second processing layer may include the same material.

[0021] In a semiconductor circuit manufacturing process, the measured overlay error is generally used to calculate and provide feedback to the scanner used to print circuit features in a photolithography process. As will be described in more detail below, the feedback is given in the form of coefficients of a given scanner model (referred to as "correctable terms"). This model describes errors in the positioning and orientation of the semiconductor substrate in the scanner (wafer model), in addition to optical and mechanical pattern placement errors between the reticle and the substrate of the scanner (field model). Alternatively or additionally, the measured overlay error can be used to "dispose" of the semiconductor substrate, i.e., to determine whether the displacement of the photoresist pattern across the semiconductor substrate is within a predetermined limit with respect to a previous processing layer and whether the processing of the substrate can continue to the next step or whether the patterned substrate needs to be returned for repeated processing.

[0022] However, the accuracy of the correctable terms may be affected by the inaccuracy of the measuring device used to measure overlay errors, such as measurement errors in the imaging assembly of the measuring device. For example, the measured displacement between the centers of symmetry of the target features in the processing layer, represented by Meas_Displ and measured by the measuring device, may have a linear relationship with the actual displacement represented by Actual_Displ, but may have a linearity coefficient that deviates from the ideal value of 1. The linear relationship can be described by the equation Meas_Displ = α * Actual_Displ + β. In this equation, α is the linearity coefficient and β is an offset that can generally be ignored for practical purposes. If the linearity coefficient α is different from 1, it can significantly distort the measured value of the overlay error. These distortions can, as a result, send incorrect feedback to the scanner in the form of inaccurate correctable terms and even lead to misjudgments regarding the treatment of the patterned semiconductor substrate. In the embodiments described below, a linear error model is used to estimate the error introduced by the measuring device, but alternatively, a higher-order error model such as a second-order or other functional model may be used.

[0023] The embodiments of the invention described herein address the aforementioned problems of overlay error measurement by estimating both the actual overlay error between the patterning of the first film layer and the patterning of the second film layer and the measurement error of the imaging assembly. For this purpose, for example, the disclosed embodiments provide a method for extracting the linearity coefficient between the measured overlay error and the actual overlay error.

[0024] In the following description, each overlay target in a pair of consecutive film layers on a semiconductor substrate is composed of one or more first target features formed in a first film layer having a first position and second target features formed in a second film layer having a second position (the term "consecutive" refers to the order of deposition of the first and second film layers on the substrate, but does not mean direct continuity, i.e., there may be one or more additional layers between the first and second layers referred to herein). In a measurement system known in the art, the nominal displacement, also referred to as an "offset", between the first position and the second position is zero. For such a target with zero displacement or zero offset, the overlay error measured by an ideal measurement system is zero. This nominal displacement is implemented in the design of the reticle used in the photolithography process. However, in practice, the actual displacement between the positions is not zero due to misalignments and other manufacturing errors.

[0025] However, in an embodiment of the present invention, the nominal displacement between the respective positions of the target features in at least some of the overlay targets is intentionally set to a known non-zero value. Therefore, even under ideal measurement conditions, the actual displacement should vary from target to target, and the actual displacement between the first and second sets of target features is given by adding the intentional (nominal) displacement between the positions to the overlay error introduced by the process. Thus, the measured displacement, i.e., the displacement between the first and second sets of target features of the overlay target measured by a metrology apparatus, is equal to the sum of the actual displacement between these features and any error introduced by the metrology apparatus. In this embodiment, an intentional, varying displacement between the positions of the target features is used to estimate the measurement error and derive a more accurate measurement of the actual overlay error.

[0026] Thus, to generate a set of overlay targets that can be used, a first film layer and a second film layer overlapping thereon are deposited on a semiconductor surface. In some multiple-use applications, such as "lithography-free lithoetch" (LFLE), the first layer and the second layer contain the same film material. The first and second film layers are patterned to define a plurality of overlay targets including first and second target features respectively present in the first and second film layers, each having respective first and second positions. There is a first nominal distance between the first target features and a second nominal distance different from the first nominal distance between the second positions. Each second target feature overlaps on top of a first target feature to define one of the overlay targets, but due to the different nominal distances between the positions, the overlay targets have different nominal displacements. (The term "overlapping thereon" as used in the context of this specification and the claims is used in its plain meaning, where one of the target features is disposed on top of another feature, but there is no limitation on the exact alignment or overlap of the features.)

[0027] The imaging assembly in the metrology tool captures one or more images of the semiconductor substrate on which the overlay targets are formed. The one or more images are processed to measure the respective displacements between the first target position and the second target position in each of the overlay targets. As described above, these displacements reflect both the actual displacement between the patterns in the film layer due to process errors and the measurement error of the imaging assembly. Based on these measured displacements and the known variations of the nominal displacements (as a result of the different nominal distances in the first and second layers), both the measurement error of the imaging assembly and the actual overlay error between the patterning of the first film layer and the patterning of the second film layer can be estimated. By modeling the measurement error, for example, by finding a linearity coefficient, the actual overlay error can be derived with improved accuracy.

[0028] In the embodiments described below, the positions of the target features are determined by predetermined geometric characteristics of these features, such as the respective centers of symmetry. Alternatively, other characteristics of the target features may be used to determine the positions of the target features.

[0029] The described embodiments refer to imaging overlay error measurements, but the principles of the present invention can be similarly applied to further overlay error measurement methods. Further, the described embodiments refer to patterning by a scanner, but the principles of the present invention can be similarly applied to alternative forms of patterning or patterns generated by more complex methods.

[0030] System Description FIG. 1 is a schematic side view of an optical measurement device 10 for measuring the displacement between two patterned film layers on a semiconductor substrate 12 according to an embodiment of the present invention. This device is shown as an example for the sake of concreteness and clarity, and the principles of the present invention can be similarly applied using other types of measurement tools known in the art.

[0031] The optical measurement device 10 includes an imaging assembly 14, an illumination assembly 16, a controller 18, and a table 20 on which the substrate 12 is placed. The imaging assembly 14 includes an objective lens 22, a cube beam splitter 24, and an imaging lens 26. The imaging assembly 14 further includes a sensor 28 that includes, for example, a complementary metal oxide semiconductor (CMOS) image sensor having a two-dimensional array of pixels 30.

[0032] The illumination assembly 16 includes a light source 32 that emits optical radiation and a lens 34. The table 20 is disposed in the vicinity of the objective lens 22 and includes actuators controlled by the controller 18, which enable the table to perform linear motion in the x, y, and z directions (with reference to the Cartesian coordinates 36) and rotational motion about the z axis. In FIG. 1 and subsequent figures, the Cartesian coordinates 36 are shown to clarify the orientation of these figures with respect to the apparatus 10.

[0033] In the described embodiment, the first film layer 38 and the second film layer 40 are deposited on the semiconductor substrate 12 and are patterned by a lithography process as shown in subsequent figures. In the current example, the first layer 38 is a processing layer and the second layer 40 is a resist layer deposited on the processing layer. Alternatively, both the layer 38 and the layer 40 may be processing layers and may include layers of the same material.

[0034] To measure the displacement between the pattern in the layer 38 on the substrate 12 and the pattern in the layer 40 thereon, an overlay target including target features as shown in FIGS. 2 and 3A - 3B below is formed in the layers 38 and 40 by a photolithography process. The substrate 12 is disposed on the table 20 such that an optical component combining the lenses 22 and 26 forms an image of the substrate on the sensor 28, i.e., the substrate and the sensor are disposed on optically conjugate planes.

[0035] Controller 18 receives an image from sensor 28 and adjusts the position and orientation of table 20. The programmable processor typically included in controller 18 is programmed in software and / or firmware to perform the functions described herein, along with appropriate digital and / or analog interfaces for connecting to other elements of apparatus 10. Alternatively or additionally, controller 18 includes wired-connected hardware logic circuits and / or programmable hardware logic circuits that perform at least some of the functions of the controller. In FIG. 1, controller 18 is shown as a single unitary functional block for simplicity, but in reality may include a plurality of control units interconnected using appropriate interfaces for input and output of the signals shown in the figure and described in text. Program instructions implementing methods such as those described herein may be transmitted or may be stored on a carrier medium. The carrier medium may include storage media such as read-only memory, random access memory, magnetic disk or optical disk, non-volatile memory, solid state memory, magnetic tape, and the like.

[0036] To capture an image of the overlay target on semiconductor substrate 12, light source 32 projects a beam of light radiation onto lens 34, and lens 34 further projects the beam onto cube beam splitter 24. Beam splitter 24 reflects the beam to objective lens 22, and objective lens 22 projects the beam onto substrate 12. The radiation hitting substrate 12 is scattered back to objective lens 22, passed through beam splitter 24, transmitted to lens 26, and focused onto sensor 28. Controller 18 reads and processes the image captured by sensor 28 to identify the positions of the features of the respective overlay targets in layer 38 and layer 40 thereon of substrate 12. Controller 18 measures the displacement between these two pattern layers based on the displacement between the respective positions of the target features.

[0037] Alternatively, the apparatus 10 may be configured to measure displacement in a scatterometry mode. For this mode, the lens 26 is changed and / or moved so as to image an exit pupil (not shown) of the objective lens 22 onto the sensor array 28. This scatterometry image indicates the angular distribution of the light radiation scattered from the target feature, and in this case, the controller 18 is configured to process the angular distribution to measure displacement.

[0038] FIG. 2 is a schematic top view (from the z - direction) showing overlay targets 112, 114 on a semiconductor substrate 12 according to an embodiment of the present invention.

[0039] In a photolithography process, a matrix 100 of M fields 103 is exposed on the substrate 12 (the number of fields M is 32 in the illustrated embodiment, but may be less than or more than 32 in alternative embodiments). In successive exposure steps of the photolithography process, the scanner projects an image of a reticle onto the field 103 to expose the die 102 together with a plurality of overlay targets 112 and 114, which will be described in more detail below (in alternative embodiments, a plurality of dies 102 may be exposed within one field 103). To clarify the difference between the field 103 and the die 102 in FIG. 2, the field 103a is shown with cross - hatching, and the die 102a (not within the field 103a) is shown with reverse cross - hatching. The die 102 is separated by scribe lines 104 and includes an active region 106 (surrounded by the scribe lines) that comprises electrical circuit elements 108.

[0040] In an exemplary embodiment, the semiconductor substrate 12 is generally also referred to as a wafer or a semiconductor wafer and typically has a diameter of 300 mm. Each die 102 is typically, for example, a square with dimensions of 20 mm×20 mm, but other sizes and shapes may alternatively be used. The scribe lines 104 typically have a width of about 100 μm.

[0041] The film layers on the semiconductor substrate 12 (such as layers 38 and 40 shown in FIG. 1) are patterned to define N (N≧2) offset overlay targets 112 within each field 103, as will be described in more detail below, and there is a non-zero nominal displacement between the center of symmetry of the target features of layer 38 and the center of symmetry of the target features of layer 40. Alternatively, nominal displacements as well as measured displacements can be defined between other geometric features of the target features. The film layer may be patterned to define additional default overlay targets 114 within each field 103 with zero nominal displacement. In FIG. 2, the offset targets 112 are shown within die 102 and the default overlay targets 114 are shown in scribe line 104, but alternatively, each type of overlay target may be placed at any location within field 103.

[0042] To define scanner-correctable terms, as will be described in more detail below, each point within each field 103 is defined using two two-dimensional orthogonal coordinate systems, namely, wafer coordinate axes 120 and field coordinate axes 122, with the respective x-axes and y-axes aligned with the x-axis and y-axis of rectangular coordinates 36. The wafer coordinate axes 120 are referenced to the wafer (i.e., semiconductor substrate 12), and its coordinate axes are x W and y W and are labeled, where W refers to "wafer". Each field 103 has its respective field coordinate axes 122, which are located at the same position within each respective field, and the coordinate axes are x F and y F and are labeled, where F refers to "field" (for clarity, only one set of field coordinate axes 122 is shown). Thus, the position of a given point within field 103 can be described by four coordinates (x W , y W , x F , y F ), and (for the particular field in which the point is located) x W and y W refer to the wafer coordinate axes 120, and x Fand y F refers to the field coordinate axis 122.

[0043] When the field 103 is labeled with j (j = 1, 2,..., M) and the offset target 112 is labeled with i (i = 1, 2,..., N), the coordinates of the nominal displacement target in the semiconductor substrate 12 can be described as (x W i,j , y W i,j , x F i , y F i ). Since the field coordinate axes repeat in each field 103, the field coordinates (x F i , y F i ) related to the field coordinate axis 122 have only one index (i).

[0044] FIG. 3A is a schematic top view of a single field 103 of the semiconductor substrate 12 showing an offset overlay target 112 according to an embodiment of the present invention.

[0045] Each offset overlay target 112 comprises a first set of target features formed in a first film layer 38 and a second set of target features formed in a second film layer 40. These two sets of target features are formed by the scanner exposing each photoresist layer through a first reticle to form the first set of target features in layer 38 (in each photolithography process step), and similarly exposing layer 40 through a second reticle to form the second set of target features. The first reticle is designed and fabricated to form first target features spaced by a first nominal distance using a highly accurate fabrication method such as electron beam writing. Similarly, the second reticle is designed and fabricated to form second target features spaced by a second nominal distance different from the first predetermined nominal distance. Each second target feature overlaps on top of each first target feature to define a corresponding offset target 112.

[0046] The first and second nominal distances are selected such that each offset overlay target 112 having first and second target features has a nominal displacement of ΔX and ΔY in the x- and y-directions, respectively, between the centers of symmetry of the sets of first and second target features. In the depicted embodiment, the nominal displacements ΔX and ΔY are equal and are indicated by the numerical labels within each target 112 in FIG. 3A (alternatively, different nominal displacements ΔX and ΔY may be selected, in which case each target 112 will be characterized by two displacement maps). Thus, with respect to the offset overlay target 112a, the second set of target features is nominally displaced from the first set of target features by ΔX = +8 nm and ΔY = +8 nm, i.e., 8 nm in both positive axial directions, and with respect to the offset target 112b, the nominal displacements are ΔX = -5 nm and ΔY = -5 nm, i.e., 5 nm in the negative axial directions.

[0047] In the present embodiment, the offset overlay target 112 has nominal displacements in both the x- and y-directions, but the same principle can be applied to a one-directional overlay target having an offset in only one direction by modifying the points to be modified.

[0048] Generally, each nominal displacement ΔX i and ΔY i N offset overlay targets i (i = 1, 2,..., N) having are formed in the field 103. In the following description, N = 15 is employed, but more or fewer than 15 targets may be formed. It is advantageous for the nominal displacements of the targets 112 to be on the order of the overlay errors expected in a test photolithography process.

[0049] The N offset overlay targets may be similar or dissimilar. An example of similar targets is a box-in-box target, where the outer box of the target is formed in the processing layer and the inner box is formed in the resist layer. An example of dissimilar targets is a box-in-box target, where for some of the targets, the outer box is in the processing layer and the inner box is in the resist layer, and for other targets, the inner box is in the processing layer and the outer box is in the resist layer. This type of scheme can also be applied to other target designs such as, for example, AIM targets.

[0050] FIG. 3B is a schematic top view of the components of two overlay targets 162 and 164 according to an embodiment of the present invention. These targets are composed of first target features 142 and 144 in layer 38 and second target features 152 and 154 in layer 40, and form two box-in-box overlay targets 162 and 164 on semiconductor substrate 12. The target features of the box-in-box overlay targets are used for overlay error measurement and are used in this embodiment to illustrate the displacement of the overlay targets, and comprise two nominally concentric squares (one inside the other) aligned along the x and y axes. The outer square typically has dimensions of 20 μm×20 μm, and the inner square has dimensions of 10 μm×10 μm, although other dimensions may alternatively be used. The center of each square in both the x and y directions is the center of symmetry of the square and is used here to define the position of the target feature. For clarity, the depicted embodiment shows only the displacement of the target feature (square) in the x direction, and in the y direction, the centers of the target features are aligned with each other.

[0051] On the first film layer 38, two first target features 142 and 144 each having two squares are formed. Center lines 146 and 148 respectively indicate the centers of the first target features 142 and 144 in the x direction. The x-direction interval between the first target features 142 and 144 is the first nominal distance of 1.000010 mm, which is shown as the distance between the center lines 146 and 148. On the second film layer 40, two second target features 152 and 154 (two squares) are formed. Center lines 156 and 158 respectively indicate the centers of the second target features 152 and 154 in the x direction. The x-direction interval between the second target features 152 and 154 is the second nominal distance of 1.000000 mm, which is shown as the distance between the center lines 156 and 158 (for clarity, the difference between the two nominal distances is greatly emphasized).

[0052] Assuming no error in the photolithography process for forming the target features 142, 144, 152, and 154 on each film layer on the semiconductor substrate 12, the target features are aligned in the x direction. Thus, the center line 148 of the target feature 144 and the center line 158 of the target feature 154 overlap and align to form the overlay target 164. Therefore, the nominal displacement of the overlay target 164 is zero (similar to the target 114 in FIG. 2, for example), as indicated by the overlap of the center lines 148 and 158 of the two target features on the semiconductor substrate 12. Due to this zero alignment between the target features 144 and 154, the 1.000010-mm first nominal distance between the pair of center lines 146 and 148, and the 1.000000-mm second nominal distance between the pair of center lines 156 and 158, the overlay target 162 formed by the target features 142 and 152 has a nominal displacement of 10 nm (0.000010 mm) in the x direction, as indicated by the separation of the respective center lines 146 and 156 on the semiconductor substrate 12. Thus, the overlay target 162 is similar to the offset overlay target 112.

[0053] In the described embodiment, the target feature is aligned such that the nominal displacement is zero with respect to the overlay target 164. However, different alignment methods may be implemented, and thus the nominal displacement between the overlay targets 162 and 164 also changes. When an overlay error occurs, the actual displacement should be different from the nominal displacement.

[0054] The nominal displacement in the y direction (or the nominal displacements in both the x and y directions) can be implemented in a similar manner for box-and-box overlay targets and other types of overlay targets such as AIM, AIMid (die-internal AIM), rAIM (robust AIM moiré), and SCOL (scatterometry overlay) targets provided by KLA.

[0055] Measurement and Analysis 1. Scanner Model The scanner model is used to describe overlay errors induced by misplacement of the semiconductor substrate 12 in the scanner, errors generated inside the scanner when projecting the reticle image onto the substrate, and other errors due to similar systematic behaviors. For example, the scanner model represents the x-direction overlay error Model_OVLX(x W ,y W ,x F ,y F ) and the y-direction overlay error Model_OVLY(x W ,y W ,x F ,y F ) induced in the scanner at a point (x W ,y W ,x F ,y F ) on the wafer, i.e., the semiconductor substrate 12, as Model_OVLX(x W ,y W ,x F ,y F ) = OffX + ScalX * x W + WRotX * y W+MagX * x F +FRotX * y F and Model_OVLY(x W , y W , x F , y F ) = OffY + WrotY * x W +ScalY * y W +FRotY * x F +MagY * y F , can be described by two equations such as the above. OVL refers to the overlay error. The scanner correction terms multiplied by appropriate coordinates indicate the pattern placement errors due to various errors inside the scanner as follows. OffX = Pattern placement error in the x - direction due to a constant misalignment of the wafer (semiconductor substrate 12), OffY = Pattern placement error in the y - direction due to a constant misalignment of the wafer, ScalX = Pattern placement error in the x - direction due to the scaling error of the wafer movement, that is, the error due to the wafer moving a different distance than the intended distance by a constant coefficient inside the scanner, ScalY = Pattern placement error in the y - direction due to the scaling error of the wafer movement, WRotX = Pattern placement error in the x - direction due to the rotation of the wafer, that is, the angular error in the placement of the wafer inside the scanner, WRotY = Pattern placement error in the y - direction due to the rotation of the wafer, MagX = Pattern placement error in the x - direction due to the optical magnification error of the scanner, MagY = Pattern placement error in the y - direction due to the optical magnification error of the scanner, FRotX = Pattern placement error in the x - direction due to the unintended rotation of the scanner field, and FRotY = Pattern placement error in the y - direction due to the unintended rotation of the scanner field are as follows.

[0056] These scanner-correctable terms are generally estimated from the measured overlay error by fitting procedures such as linear regression to fit the measured overlay error to the overlay error by the scanner model. The correctable terms are then fed back to the scanner for correction of the linear positioning error and rotational positioning error of the wafer within the scanner for the next exposure, as well as for correction of the error in the projection of the scanner reticle onto field 103.

[0057] In an alternative embodiment, a scanner model with higher order terms in wafer and / or field coordinates may be used.

[0058] 2. Linearity Error in Overlay Error Measurement As described above, there is a linear relationship between the measured displacement Meas_Displ and the actual displacement Actual_Displ, but the linearity coefficient may deviate from the ideal value of 1. This relationship can be described by the equation Meas_Displ = α * Actual_Displ + β using a non-unity linearity coefficient α. The offset β is assumed to be negligible and will be omitted from subsequent calculations.

[0059] Linearity error in overlay error measurement can lead to inaccurate scanner-correctable terms and consequently inappropriate scanner correction, or even an increase in pattern placement error by the scanner if not characterized and corrected. Moreover, this linearity error can also lead to inaccurate handling of the patterned substrate 12.

[0060] 3. Use of Offset Overlay Targets to Eliminate Linearity Error FIG. 4 is a flowchart 200 schematically showing a method for estimating the correctable terms of a scanner model and the linearity coefficient of overlay error measurement according to an embodiment of the present invention. This method is presented below in relation to displacement in the x direction. The same method can also be applied to displacement in the y direction.

[0061] This method starts from the start step 202. In the displacement selection step 204, N nominal displacements ΔX i (x F i ,y F i ) are selected (a specific method for displacement selection is detailed in FIGS. 5 and 6). In the target formation step 206, an offset overlay target 112 is formed inside each field 103 of the semiconductor substrate 12 (FIG. 3A). In the displacement measurement step 208, the displacement between the respective centers of symmetry of the target features in layers 38 and 40 is measured for each target 112 in each field 103 using the optical measurement device 10. The M×N displacements measured in the x direction are represented by Meas_DisplX(x W i,j ,y W i,j ,x F i ,y F i ), where i = 1, 2,..., N and j = 1, 2,..., M.

[0062] In the scanner model selection step 210, a scanner model used for calculation, such as the model described above, is selected. In the modeled displacement error step 212, the modeled overlay error of the original scanner model is corrected to reveal the various nominal displacements of the target 112. The modeled displacement is thus the sum of the overlay error by the scanner and the nominal displacement of the target 112, taking into account the linearity coefficient α x as well. Using the notation introduced above, the modeled displacement of the i-th offset target 112 in the j-th field 103 is Model_DisplX(x W i,j ,y W i,j ,x F i ,y F i ) = α x *[OffX + ScalX * x W i,j + WRotX * y W i,j + MagX * x F i + FRotX * y F i + ΔX i (x F i 、y F i )] is described as follows.

[0063] Since the position of the offset target 112 is defined by the reticle used in the scanner of the photolithography process, ΔX i depends only on the field coordinates (x F , y F ).

[0064] In calculation step 214, the scanner-correctable terms OffX, ScalX, WRotX, MagX, FRotX and the linearity coefficient α x are estimated by applying a regression method between all M×N values of the modeled displacement Model_DisplX(x W i,j , y W i,j , x F i , y F i ) and the respective measured values Meas_DisplX(x W i,j , y W i,j , x F i , y F i ). Since the model contains products of variables, it is necessary to apply a higher-order regression rather than a linear regression. The purpose of the regression method is to minimize the effect of possible random or higher-order measurement errors on the estimated scanner-correctable terms and the linearity coefficient. When the regression is performed, a set of values of the correctable terms and the linearity coefficient that minimizes the total Sx given by the following equation is found.

Number

[0065] Alternatively, instead of including all fields 103 to estimate a single linear coefficient α x the calculation of α x may be performed based on one or more subsets of the fields 103, each subset including one or more fields (not shown in the flowchart 200). Further alternatively, the displacements may be averaged across all fields, and terms related to the wafer model may be omitted. By estimating α x for multiple subsets of the fields 103 across the semiconductor substrate 12, multiple respective values of α x across the substrate are obtained, which reflect potential measurement errors across the substrate and the attendant variations in the linear coefficient α x of the overlay error measurement. To estimate α x for a subset of the fields 103, the above sum Sx is calculated separately for each subset, and accordingly the limits of the sum in S x are changed. This method ends at the end step 216.

[0066] As an alternative to non-linear regression, other calculation methods known in the art may be used to fit the measured values to the model. These methods may include non-linear transformations of the variables, for example, which may enable the application of linear regression.

[0067] 4. Selection of Offset Overlay Targets Flowcharts 300 of FIG. 5 and 400 of FIG. 6 schematically show two alternative methods for selecting an offset overlay target 112 according to an embodiment of the present invention.

[0068] If the sizes of the N offset overlay targets 112 and their positions exist within the linear space of the scanner model, i.e., if the combination of the nominal displacements and target positions of the N targets can be fully described by the scanner model, then the offset overlay targets will, by simply correcting the estimated values of the scanner-correctable terms, not provide any information regarding the linearity coefficients α x and α y . Thus, the scanner-correctable terms will include both the error due to the nominal displacement and the error due to the uncorrected values of the linearity coefficients α x and α y . Therefore, the magnitude of the displacement of the center of symmetry of the target 112 and the position of the target should be selected (and implemented in the target formation step 206) in the displacement selection step 204 of FIG. 4, such that they are at least partially orthogonal to the scanner model used in the calculation. Here, the term "partially orthogonal" is used to mean that the displacement vector has components that are orthogonal to the scanner model. Since the position of the target 112 depends on the field coordinates (x F , y F ), only the field coordinate-dependent part of the scanner model is used to determine the orthogonality.

[0069] The foregoing requirement can be satisfied for almost any randomly selected set of displacements of ΔX i (x F i , y F i )(i = 1, 2,..., N) if N is large enough to yield statistically significant measurements (for a linear scanner model). However, for numerical considerations, a systematic method as shown in FIGS. 5 and 6 below is advantageous.

[0070] Flowchart 300 (Figure 5) shows an iterative method for determining and improving the orthogonality of overlay target 112 offset with respect to the scanner model. This method starts from start step 301. In selection step 302, N nominal displacements ΔX i (x F i ,y F i ) are selected. In projection step 304, the projection of ΔX i (x F i ,y F i ) onto the scanner field model MagX*x F i +FRotX*y F i is calculated by estimating the scanner field correction terms MagX and FRotX from the linear regression between ΔX i (x F i ,y F i ) and MagX*x F i +FRotX*y F i for i = 1, 2,..., N. In step 306 of calculating the magnitude of the projection, the relative magnitude Proj x of the projection is calculated by the following formula.

Equation

[0071] In the first comparison step 308, Proj x is compared with a predetermined limit. If Proj x exceeds the predetermined limit, in adjustment step 310, randomly select the magnitude and / or position of the nominal displacement target, or systematically iterate over vectors from the linear basis of a larger linear space (including the linear space spanned by the vectors of the model as a subspace), to obtain another nominal displacement ΔX i (x F i ,y Fi ) is selected. Proj x The projection step 304, the step 306 of calculating the size of the projection, the first comparison step 308, and the adjustment step 310 are repeated until Proj

[0072] Proj x reaches a value less than a predetermined limit. The nominal displacement ΔX i (x F i , y F i ) is determined so that it does not exceed a predetermined limit. In the second comparison step 312, the size of the nominal displacement ΔX i (x F i , y F i ) is compared with the expected size of the overlay error in the photolithography process. If the size of the nominal displacement is significantly different from the range of the expected overlay error value for the photolithography process under consideration, in the scaling step 314, a constant common to all components of ΔX i (x F i , y F i ) is multiplied. The loop of steps 312 and 314 is repeated until the nominal displacement reaches a satisfactory size, and then the process ends in the end step 316. The nominal displacement ΔX i (x F i , y F i ) obtained from this method is applied in a photolithography step of forming the target 112, such as step 206 (FIG. 4).

[0073] Flowchart 400 (FIG. 6) illustrates a straightforward method for selecting offset overlay targets 112 that are orthogonal to the scanner field model, i.e., have a zero projection onto the scanner field model. The method begins at start step 402. In selection step 404, similar to steps 302 and 304 (FIG. 5), N nominal displacements ΔX i (x F i ,y F i ) is selected. In a projection step 406, ΔX i (x F i ,y F i ) projection MagX*x F i +FRotX*y F i For i=1, 2, ..., N, ΔX i (x F i ,y F i ) and MagX*x F i +FRotX*y F i In step 408, the vertical nominal displacement component is calculated by estimating the scanner field correctable terms MagX and FRotX from a linear regression between i (x F i ,y F i ) component ΔX i ORTHO (x F i ,y F i ) i.e. scanner field model MagX*x F i +FRotX*y F i ΔX perpendicular to i (x F i ,y F i ) for i=1, 2, ..., N, the components are ΔXi ORTHO (x F i ,y F i ) = ΔX i (x F i ,y F i ) - MagX * x F i + FRotX * y F i is calculated.

[0074] In comparison step 410, similar to steps 312 and 314 (FIG. 5), the magnitude of the vertical nominal displacement component ΔX i ORTHO (x F i ,y F i ) is compared with the expected magnitude of the overlay error in the photolithography process under consideration. If necessary, the vertical nominal displacement component ΔX i ORTHO (x F i ,y F i ) is multiplied by a common constant in scaling step 412 until the required magnitude is achieved. This method ends at end step 414. The vertical nominal displacement ΔX i ORTHO (x F i ,y F i ) obtained from this method is applied to the formation of target 112 in a lithography step such as step 206 (FIG. 4).

[0075] Similarly, for a high - dimensional scanner model, i.e., a non - linear model, the selected set of displacements ΔX i (x F i ,y F i ) should not lie in the high - dimensional plane defined by the scanner model. For example, for a quadratic scanner model, the high - dimensional plane is defined by five vectors [Number] and [Number] are stretched by. In this case, for N > 5, almost all vectors ΔX i (x F i , y F i ) will satisfy the requirement of sufficient orthogonality.

[0076] It should be understood that the foregoing embodiments are cited by way of example, and the present invention is not particularly limited to those shown and described above. Rather, the scope of the present invention includes both the various combinations and sub - combinations of the features described above, as well as variations and modifications thereof that are not disclosed in the prior art and that come to the mind of those skilled in the art upon reading the foregoing description.

Claims

Claim 1 A method for semiconductor measurement, comprising: depositing a first film layer on a semiconductor substrate and depositing a second film layer on top of the first film layer; patterning the first film layer and the second film layer to define a plurality of overlay targets, wherein the overlay targets comprise: a first target feature formed at intervals of a first nominal distance in the first film layer having respective first positions; a second target feature formed at intervals of a second nominal distance different from the first nominal distance in the second film layer having respective second positions, each second target feature overlapping on top of a respective first target feature and defining one of the overlay targets; the step of defining; using an imaging assembly to capture at least one image of the semiconductor substrate on which the overlay targets are formed; processing the at least one image to measure a displacement between each respective first position and second position in each of the overlay targets; estimating both an actual overlay error between the patterning of the first film layer and the patterning of the second film layer and a measurement error of the imaging assembly based on the measured displacement and the first and second nominal distances; comprising: the first nominal distance and the second nominal distance are selected such that for each of the overlay targets, the respective displacement between the first position and the second position corresponds to a respective nominal displacement; the step of estimating both the actual overlay error and the measurement error includes comparing the measured displacement to a respective modeled displacement for a set of the overlay targets, each of the modeled displacements including a displacement calculated from a scanner model and the respective nominal displacement for a given overlay target; the scanner model includes coefficients defining a displacement between a pattern formed in the first film layer and a pattern formed in the second film layer by a photolithography process; The step of estimating the measurement error includes a step of finding a linearity coefficient other than 1 between each of the nominal displacements and the measured displacements over the set of the overlay targets. A method characterized by this.

2. The method according to claim 1, wherein the step of patterning the first and second film layers includes a step of patterning a matrix of fields to define the plurality of overlay targets in each of the fields, and the step of capturing an image includes capturing at least one image of the plurality of overlay targets in at least one of the fields. A method characterized by this.

3. The method according to claim 1, wherein the step of finding the linearity coefficient includes a step of applying a regression method between each of the measured displacements and the modeled displacements in order to estimate the coefficient and the linearity coefficient of the scanner model. A method characterized by this.

4. The method according to claim 1, wherein the step of estimating the actual overlay error includes a step of applying the linearity coefficient to the measured displacement. A method characterized by this.

5. An optical measurement device, A semiconductor substrate comprising a first film layer deposited on the semiconductor substrate and a second film layer overlapping the first film layer. In the semiconductor substrate, the first film layer and the second film layer are patterned to define a plurality of overlay targets, and the overlay targets are A first target feature formed at intervals of a first nominal distance in the first film layer having respective first positions, A second target feature formed at intervals of a second nominal distance different from the first nominal distance in the second film layer having respective second positions, wherein each second target feature overlaps each first target feature and defines each one of the overlay targets. A semiconductor substrate comprising a second target feature, A semiconductor substrate, An imaging assembly configured to capture at least one image of the semiconductor substrate on which the overlay target is formed. configured to process the at least one image to measure a displacement between the respective first and second positions in each of the overlay targets, and based on the measured displacement and the first and second nominal distances, estimate both an actual overlay error between the patterning of the first film layer and the patterning of the second film layer and a measurement error of the imaging assembly. A controller comprising wherein the first nominal distance and the second nominal distance are selected for each of the overlay targets such that the respective displacements between the first and second positions correspond to respective nominal displacements wherein the controller is configured to compare the measured displacements for a set of the overlay targets with respective modeled displacements, each of the modeled displacements including a sum of a displacement calculated from a scanner model and the respective nominal displacement for a given overlay target wherein the scanner model includes coefficients that define a displacement between a pattern formed in the first film layer and a pattern formed in the second film layer by a photolithography process An optical measurement device, characterized in that the step of estimating the measurement error includes the step of finding a linearity coefficient other than 1 between the respective nominal displacements and the measured displacements over the set of overlay targets. **Claim 6** The device according to claim 5, wherein the first and second film layers are patterned to form a matrix of fields and define the plurality of overlay targets in each of the fields, and the imaging assembly is configured to capture at least one image of the plurality of overlay targets in at least one of the fields. **Claim 7** The device according to claim 5, wherein the step of finding the linearity coefficient includes applying a regression method between each of the measured displacements and the modeled displacements to estimate the coefficient of the scanner model and the linearity coefficient. **Claim 8** The device according to claim 5, wherein the step of estimating the actual overlay error includes applying the linearity coefficient to the measured displacement.

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