Chip Resistor and Method for Manufacturing Chip Resistor

Abstract

To provide a chip resistor with excellent corrosion resistance in which separation of an external plating layer is prevented.SOLUTION: A chip resistor 1 includes an insulating substrate 2, a pair of front electrodes 3 provided in surface both end parts of the insulating substrate 2, a resistor 5 connecting between the front electrodes 3, a first protection film 6 covering the entire resistor 5 including a connection part to the front electrode 3, a pair of first conductive films 7 covering both end parts of the first protection film 6 and the front electrodes 3 exposed from the first protection film, a second protection film 8 covering the first protection film 6 and an end part of the first conductive film 7 overlapping with both end parts of the first protection film 6, a pair of second conductive films 9 covering the first conductive film 7 exposed from the second protection film 8 in contact with both end parts of the second protection film 8, a pair of end surface electrodes 10 provided at an end surface of the insulating substrate 2 and connected to the front electrodes 3 and each end part of the first conductive film 7 and the second conductive film 9, and a pair of external plating layers 11 covering the end surface electrodes 10 and the second conductive film 8. The first conductive film 7 and the second conductive film 8 are formed of a metal material that is sulfurized less easily than the front electrode 3.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to a chip resistor and a method for manufacturing the same.

Background Art

[0002] Generally, a chip resistor mainly includes a rectangular parallelepiped insulating substrate, a pair of front electrodes oppositely arranged on the surface of the insulating substrate at a predetermined interval, a pair of back electrodes oppositely arranged on the back surface of the insulating substrate at a predetermined interval, a pair of end face electrodes for conducting the front electrode and the back electrode, a pair of external plating layers covering these electrodes, a resistor bridging between the paired front electrodes, an insulating protective film covering the resistor, and the like.

[0003] In this type of chip resistor, usually, an Ag (silver)-based metal material with low specific resistance is used for the front electrode, and an external plating layer is formed to cover the front electrode. However, since corrosive sulfur-containing gas or the like easily penetrates from the gap at the boundary between the external plating layer and the protective film, there is a risk that the front electrode portion at the boundary position between the front electrode and the protective film is corroded by sulfur-containing gas or the like, leading to problems such as resistance value change and disconnection.

[0004] Therefore, conventionally, as shown in FIG. 7(a), a pair of end face electrodes 100 are formed so as to cover the boundary position between the front electrode 104 and the protective film 101 and extend to the end of the protective film 101, and the external plating layer 102 is brought into close contact with the end of the protective film 101, thereby eliminating the gap at the boundary between the external plating layer 102 and the protective film 101, and preventing the front electrode portion at the boundary position between the front electrode 104 and the protective film 101 from being exposed to sulfur-containing gas. A chip resistor has been proposed (see, for example, Patent Document 1). In FIG. 7, reference numeral 103 denotes an insulating substrate, reference numeral 105 denotes a resistor, and reference numeral 106 denotes a back electrode.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

SUMMARY OF THE INVENTION

PROBLEMS TO BE SOLVED BY THE INVENTION

[0006] By the way, in a conventional general chip resistor, when forming an external plating layer, electrolytic plating is widely adopted because it has advantages such as being cheaper in price and having a shorter plating treatment time compared to electroless plating. In such electrolytic plating, since the current flows perpendicular to the equipotential surface of the electrode surface of the object to be plated, in an object to be plated with a complex shape, the current distribution becomes non-uniform, and it becomes difficult to form a plating film with a uniform thickness.

[0007] In the chip resistor having the configuration shown in FIG. 7(a) described above, when forming the external plating layer 102 by electrolytic plating, since the current density concentrates at the tip of the external plating layer 102, as shown in FIG. 7(b), a film thickness portion 102a is likely to occur at the tip of the external plating layer 102 that adheres to the end portion of the protective film 101. When such a film thickness portion 102a is formed, the external plating layer 102 that adheres to the end portion of the protective film 101 is likely to peel off from the side of the film thickness portion 102a at the tip, and as a result, a gap is formed at the boundary portion between the external plating layer 102 and the protective film 101, and sulfurized gas or the like enters from the portion.

[0008] The present invention has been made in view of the above-described actual situation of the prior art. The first object is to provide a chip resistor that prevents peeling of the external plating layer and has excellent corrosion resistance, and the second object is to provide a method for manufacturing such a chip resistor.

MEANS FOR SOLVING THE PROBLEMS

[0009] To achieve the above first object, the chip resistor of the present invention includes a rectangular parallelepiped insulating substrate, a pair of electrodes provided at both ends of the main surface of the insulating substrate, a resistor connecting between the pair of electrodes, an insulating first protective film covering the entire resistor including the connection portions with the electrodes, a pair of first conductive films covering both ends of the first protective film and the entire exposed portions of the electrodes exposed from the first protective film, an insulating second protective film covering at least a part of the first protective film and one end portions of the first conductive films overlapping both ends of the first protective film, a pair of second conductive films covering the entire exposed portions of the first conductive films exposed from the second protective film and contacting both ends of the second protective film, a pair of end face electrodes extending on both end faces of the insulating substrate and connecting to the electrodes and each end portions of the first conductive film and the second conductive film, and a pair of external plating layers covering the end face electrodes and the second conductive films, wherein the first conductive film and the second conductive film are formed of a metal material having a characteristic of being less likely to be sulfided than the electrodes. Together with this, the ends of the first conductive film and the second conductive film are arranged at positions sandwiching the end of the second protective film. It is characterized by this.

[0010] In the chip resistor configured as described above, among the first conductive film and the second conductive film having a two-layer structure that conducts to the electrodes, since the upper second conductive film contacts the end portion of the second protective film, when the external plating layer is formed by electrolytic plating, the current density at the tip of the external plating layer decreases and does not become a thick film portion, and peeling of the external plating layer due to the thick film portion can be suppressed. Further, since these first conductive film and second conductive film are formed of a metal material having a characteristic of being less likely to be sulfided than the electrodes, even if sulfide gas enters from the boundary portion between the external plating layer and the second protective film, permeation of the sulfide gas is suppressed by the first conductive film covering the entire exposed portion of the electrode, and the corrosion resistance can be enhanced. Moreover, A pair of first conductive films cover both end portions of the first protective film and the entire exposed portion of the electrode exposed from the first protective film, and the ends of the first conductive film and the second conductive film are arranged at positions sandwiching the end of the second protective film. Since the second protective film and the electrode are not in contact with each other, sulfide gas that has permeated inside the second protective film is blocked by the first conductive film, and the corrosion resistance can be enhanced also from this point. Further, since the electrical conductivity of the first conductive film and the second conductive film formed of a metal material is very high compared to the resin material, an increase in TCR (temperature coefficient of resistance) can be suppressed even in a low-resistance region.

[0011] In the chip resistor having the above-described configuration, it is preferable that the external plating layer has a barrier layer made of Ni plating, the first conductive film is formed of an alloy material containing Cr, and the second conductive film is formed of an alloy material containing Ni. With this configuration, not only can the corrosion resistance of the electrode be enhanced by the first conductive film made of a Cr-based alloy that is resistant to sulfidation, but also the problem that the non-conductive film (oxide film) formed on the surface of the Cr-based alloy inhibits the formation of Ni plating is solved by providing the second conductive film made of a Ni-based alloy on the upper surface of the first conductive film, and a barrier layer made of Ni plating can be easily formed.

[0012] Further, in the chip resistor having the above-described configuration, when the first conductive film is formed by sputtering, if the film thickness of the sputtered film is too thin, gaps will occur and the function of blocking the permeation of sulfide gas will deteriorate. Therefore, the first conductive film is preferably a sputtered film having a film thickness of 1.0 μm or more.

[0013] Further, in the chip resistor having the above-described configuration, if a roughened portion is formed on the surface of the first protective film and a part of the first conductive film is formed on this roughened portion, the adhesion between the first protective film and the first conductive film is enhanced by the anchor effect of the roughened portion, so that the corrosion resistance can be further improved.

[0014] In order to achieve the above second object, the method for manufacturing a chip resistor of the present invention includes a step of forming a resistor on an insulating substrate and electrodes connected to both ends of the resistor, and a step of forming an insulating first protective film so as to cover the entire resistor including the connection portions with the electrodes. A step of forming a first conductive film made of a metal material having a characteristic of being less likely to be sulfided than the electrodes by sputtering metal particles on the surfaces of both ends of the first protective film and the exposed portions of the electrodes exposed from the first protective film; Forming an insulating second protective film so as to cover the remaining portion excluding both ends of the first protective film and one end portion of the first conductive film overlapping both ends of the first protective film; Forming a second conductive film made of a metal material having a characteristic of being less likely to be sulfided than the electrodes by sputtering metal particles on the surfaces of both ends of the second protective film and the exposed portions of the first conductive film exposed from the second protective film; Forming an end face electrode connected to each end of the electrode, the first conductive film, and the second conductive film by sputtering metal particles on an end face of the insulating substrate; and forming an external plating layer covering the end face electrode and the second conductive film by performing electrolytic plating.

[0015] In the method for manufacturing a chip resistor having the above configuration, it is preferable that the sputtering for forming the first conductive film and the second conductive film is performed toward the upper surface of the insulating substrate.

[0016] Further, in the method for manufacturing a chip resistor having the above configuration, if a step of roughening the surface of the first protective film with an acid or an alkaline solution is further included, the adhesion between the first protective film and the first conductive film is increased due to the anchor effect of the roughened portion, so that the corrosion resistance can be further improved.

Effects of the Invention

[0017] According to the present invention, it is possible to provide a chip resistor excellent in corrosion resistance by preventing peeling of the external plating layer.

Brief Description of the Drawings

[0018]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Mode for Carrying Out the Invention

[0019] Hereinafter, embodiments of the invention will be described with reference to the drawings.

[0020] FIG. 1 is a plan view of a chip resistor according to an embodiment of the present invention, FIG. 2 is an enlarged cross-sectional view taken along line II-II of FIG. 1, FIGS. 3 and 4 are plan views showing the manufacturing process of the chip resistor, and FIGS. 5 and 6 are cross-sectional views showing the manufacturing process of the chip resistor.

[0021] As shown in FIGS. 1 and 2, the chip resistor 1 according to this embodiment includes a rectangular parallelepiped insulating substrate 2, a pair of front electrodes 3 provided at both longitudinal ends on the upper surface of the insulating substrate 2, a pair of back electrodes 4 provided at both longitudinal ends on the lower surface of the insulating substrate 2, a rectangular resistor 5 provided so as to straddle the pair of front electrodes 3, an undercoat layer (first protective film) 6 covering the entire resistor 5 including the connection portion with the front electrode 3, a pair of first conductive films 7 covering both ends of the undercoat layer 6 and the entire exposed portion of the front electrode 3 exposed from the undercoat layer 6, an overcoat layer (second protective film) 8 covering the surface of the undercoat layer 6 sandwiched by these first conductive films 7 and the end side overlapping on the undercoat layer 6 of the first conductive film 7, a pair of second conductive films 9 covering the entire exposed portion of the first conductive film 7 exposed from the overcoat layer 8 and contacting both ends of the overcoat layer 8, and a pair of end face electrodes 10 extending on both end faces of the insulating substrate 2 to conduct the front electrode 3 and the back electrode 4, and a pair of external plating layers 11 provided so as to cover the back electrode 4, the end face electrodes 10, and the second conductive films 9.

[0022] The insulating substrate 2 is made of ceramics or the like, and this insulating substrate 2 is obtained by dividing a large-sized substrate described later along primary dividing grooves and secondary dividing grooves extending vertically and horizontally.

[0023] The front electrode 3 is formed by screen-printing an Ag (silver)-based paste containing 1 to 5 wt% of Pd (palladium) and drying and firing it. The back electrode 4 is formed by screen-printing an Ag paste and drying and firing it.

[0024] The resistor 5 is formed by screen-printing a resistive paste such as ruthenium oxide and drying and firing it, and both longitudinal ends of this resistor 5 overlap the front electrode 3. A trimming groove 5a for adjusting the resistance value is formed in the resistor 5, and this trimming groove 5a is formed by irradiating laser light from above the undercoat layer 6.

[0025] The undercoat layer 6 is formed by screen printing a glass paste and drying and baking it. This undercoat layer 6 is formed so as to cover the entire resistor 5 before the trimming groove 5a is formed.

[0026] The overcoat layer 8 is formed by screen printing a resin paste such as epoxy or phenol and heat-curing (baking) it. The overcoat layer 8 is formed so as to cover the undercoat layer 6 after the trimming groove 5a is formed. And these undercoat layer 6 and overcoat layer 8 constitute an insulating protective film having a two-layer structure.

[0027] The first conductive film 7 is made of a metal material having a characteristic of being less likely to be sulfided than the front electrode 3. In the case of this embodiment, the first conductive film 7 is formed by sputtering a Cr-based alloy (Ni-Cr) containing Cr, which is excellent in sulfidation resistance. In order to ensure the sulfidation resistance property by Cr, the first conductive film 7 is a Ni-Cr sputtered film having a Cr content of 50 wt% or more. This first conductive film 7 is located between the front electrode 3 and the external plating layer 11, and is formed so as to cover both end portions 6a of the undercoat layer 6 connected to the front electrode 3 and the entire exposed portion of the front electrode 3 exposed from the undercoat layer 6. Further, if the film thickness of the first conductive film 7 is too thin, gaps are likely to occur, so the film thickness of the first conductive film 7 is set to 1.0 μm or more.

[0028] The second conductive film 9 is also made of a metal material having a characteristic of being less likely to be sulfided than the front electrode 3. In the case of this embodiment, the second conductive film 9 is formed by sputtering a Ni-based alloy (Ni-Cr) containing Ni. In order to suppress the non-conductive film (oxide film) generated on the surface of the Cr-based alloy, the second conductive film 9 is a Ni-Cr sputtered film having a Cr content of 50 wt% or less. This second conductive film 9 is located between the first conductive film 7 and the external plating layer 11, and is formed so as to cover the entire exposed portion of the first conductive film 7 exposed from the overcoat layer 8 and to contact both end portions 8a of the overcoat layer 8.

[0029] The end face electrode 10 is formed by sputtering nickel (Ni) / chromium (Cr) or the like, and the front electrode 3 and the back electrode 4 separated through the end face of the insulating substrate 2 are electrically connected by this end face electrode 10. The end face electrode 10 is not only connected to the end face of the front electrode 3, but also connected to the end faces of the first conductive film 7 and the second conductive film 9 laminated on the front electrode 3.

[0030] The external plating layer 11 has a two-layer structure of an inner layer side barrier layer 12 and an outer layer side external connection layer 13 covering the barrier layer 12. The barrier layer 12 is a Ni plating layer formed by electrolytic plating, and this barrier layer 12 is formed so as to cover the entire surfaces of the end face electrode 10 and the back electrode 4 and also cover the entire surface of the second conductive film 9. The external connection layer 13 is a Sn plating layer formed by electrolytic plating, and this external connection layer 13 covers the entire surface of the barrier layer 12.

[0031] Next, the manufacturing method of the chip resistor 1 configured as described above will be described with reference to FIGS. 3 to 6.

[0032] First, a large-sized substrate 2A in which primary division grooves and secondary division grooves extending in a grid pattern are formed is prepared. The front and back surfaces of the large-sized substrate 2A are partitioned into a number of chip formation regions by these primary division grooves and secondary division grooves, and these chip formation regions each become an insulating substrate 2 for one piece. Although one chip formation region is typically shown in FIGS. 3 to 6, actually, a large number of such chip formation regions are arranged in a grid pattern.

[0033] Then, as shown in FIGS. 3(a) and 5(a), after screen printing Ag paste on the back surface of the large-sized substrate 2A and drying and firing this, a pair of back electrodes 4 facing each other with a predetermined interval at both longitudinal ends of each chip formation region are formed.

[0034] Next, as shown in FIGS. 3(b) and 5(b), after screen-printing an Ag-Pd paste on the surface of the large-sized substrate 2A and then drying and firing the same, a pair of front electrodes 3 facing each other with a predetermined interval therebetween are formed at both longitudinal ends of each chip formation region. Note that the formation order of the front electrode 3 and the back electrode 4 may be reversed from the above, or the front electrode 3 and the back electrode 4 may be formed simultaneously.

[0035] Next, after screen-printing a resistance paste containing ruthenium oxide or the like on the surface of the large-sized substrate 2A and then drying and firing the same, as shown in FIGS. 3(c) and 5(c), a rectangular resistor 5 with both ends overlapped with the front electrode 3 is formed.

[0036] Next, as shown in FIGS. 3(d) and 5(d), by screen-printing a glass paste on the region covering the resistor 5 and then drying and firing the same, an undercoat layer 6 covering the entire resistor 5 including the connection end portion with the front electrode 3 is formed. Note that after forming the undercoat layer 6, the surface thereof is treated with an acid or an alkali to roughen the surface of the undercoat layer 6.

[0037] Next, by irradiating laser light from above the undercoat layer 6, as shown in FIGS. 3(e) and 5(e), a trimming groove 5a penetrating the undercoat layer 6 and the resistor 5 is formed to adjust the resistance value of the resistor 5.

[0038] Next, a masking paste that can be washed away with water or the like is screen-printed on the surface of the undercoat layer 6 and dried, thereby forming a masking (not shown) that covers the trimming groove 5a on the surface of the undercoat layer 6. Thereafter, by sputtering a Cr-based alloy (Ni-Cr) mainly composed of Cr toward the surface of the large-sized substrate 2A, as shown in FIGS. 3(f) and 5(f), a pair of first conductive films 7 that cover both end portions of the undercoat layer 6 and the entire exposed portion of the surface electrode 3 are formed. Here, in order to ensure the sulfur resistance characteristics of the first conductive film 7 by Cr, the Cr content in Ni-Cr is 50 wt% or more, and in order to prevent gaps from occurring in the sputtered film, the film thickness of the first conductive film 7 is set to 1.0 μm or more. Since the surface of the undercoat layer 6 is roughened before the first conductive film 7 is sputtered, the adhesion between the first conductive film 7 and the undercoat layer 6 can be enhanced by the anchor effect of the roughened portion.

[0039] Next, after washing and removing the masking, an epoxy or phenolic resin paste is screen-printed from above the undercoat layer 6 and heat-cured (baked), thereby forming an overcoat layer 8 that covers the entire surface of the undercoat layer 6 sandwiched between both first conductive films 7 and the end portion side overlapping on the undercoat layer 6 of the first conductive film 7, as shown in FIGS. 4(g) and 6(g). Note that an insulating protective film having a two-layer structure is formed by these undercoat layer 6 and overcoat layer 8.

[0040] Next, by sputtering an Ni-based alloy (Ni-Cr) mainly composed of Ni toward the surface of the large-sized substrate 2A, as shown in FIGS. 4(h) and 6(h), a pair of second conductive films 9 are formed to cover the entire exposed portion of the first conductive film 7 exposed from the overcoat layer 8. These second conductive films 9 are formed so as to cover and contact both ends of the overcoat layer 8 beyond the boundary portion between the first conductive film 7 and the overcoat layer 8. Here, the reason for forming the second conductive film 9 on the upper surface of the first conductive film 7 is that Cr, which is the main component of the first conductive film 7, is very easily oxidized to form an insulating film (oxide film) on the surface, making it difficult to form Ni plating of the barrier layer 12, which is performed in a later process, on the first conductive film 7. Therefore, by forming the second conductive film 9 made of an Ni-based alloy mainly composed of Ni on the first conductive film 7, Ni plating can be easily formed on the second conductive film 9. However, if the Cr content in the Ni-Cr of the second conductive film 9 becomes too high, an insulating film that inhibits the formation of Ni plating will be formed on the surface of the second conductive film 9. Therefore, the Cr content of the second conductive film 9 is set to 50 wt% or less.

[0041] The processes up to this point are batch processes for the large-sized substrate 2A. In the next process, the large-sized substrate 2A is first divided into strip shapes along the primary division grooves to obtain a strip-shaped substrate 2B having the longitudinal direction of the chip formation region as the width dimension.

[0042] Next, by sputtering Ni / Cr toward the division surface (end face) of this strip-shaped substrate 2B, as shown in FIGS. 4(i) and 6(i), a pair of end face electrodes 10 that conduct between the front electrode 3 and the back electrode 4 are formed. These end face electrodes 10 are not only connected to the end face of the front electrode 3 but also connected to the end faces of the first conductive film 7 and the second conductive film 9 laminated on the front electrode 3.

[0043] Next, after the strip-shaped substrate 2B is secondarily divided into a plurality of chip-shaped substrates 2C along the secondary dividing grooves, electrolytic Ni plating is applied to these chip-shaped substrates 2C, whereby, as shown in FIGS. 4(j) and 6(j), a barrier layer 12 covering the entire surface of the back electrode 4, the end face electrode 10, and the second conductive film 9 is formed. At this time, since the second conductive film 9 is made of a Ni-based alloy having good adhesion with Ni plating, the barrier layer 12 can be surely adhered to the second conductive film 9.

[0044] Next, electrolytic Sn plating is applied to the chip-shaped substrate 2C, whereby, as shown in FIGS. 4(k) and 6(k), an external connection layer 13 covering the entire surface of the barrier layer 12 is formed. The barrier layer 12 and the external connection layer 13 form a two-layer external plating layer 11, and at this point, the chip resistor 1 as shown in FIGS. 1 and 2 is obtained.

[0045] As described above, in the chip resistor 1 according to the present embodiment, the first conductive film 7 and the second conductive film 9 having a two-layer structure that conduct to the front electrode 3 are provided, and among them, the upper second conductive film 9 is in contact with the end portion of the overcoat layer (second conductive film) 8. Therefore, when the external plating layer 11 is formed by electrolytic plating, the current density at the tip of the external plating layer 11 decreases and does not become a film thickness portion, and peeling of the external plating layer 11 due to the film thickness portion can be suppressed.

[0046] Further, since these first conductive film 7 and second conductive film 9 are formed of a metal material having characteristics that are less likely to be sulfided than the front electrode 3, even if sulfide gas enters from the boundary portion between the external plating layer 11 and the overcoat layer 8, the permeation of the sulfide gas is suppressed by the first conductive film 7 covering the front electrode 3, and the corrosion resistance can be enhanced. Moreover, since the first conductive film 7 covers the end portion of the undercoat layer (first conductive film) 6 and the exposed portion of the front electrode 3 so that the overcoat layer 8 and the front electrode 3 do not come into contact with each other, the sulfide gas that has permeated inside the overcoat layer 8 made of a resin material is blocked by the first conductive film 7, and the corrosion resistance can be enhanced also from this point.

[0047] Particularly in this embodiment, the external plating layer 11 has a barrier layer 12 formed by nickel plating, the first conductive film 7 is formed of a Cr-based alloy (Ni-Cr) mainly composed of Cr, and the second conductive film 9 is formed of a Ni-based alloy (Ni-Cr) mainly composed of Ni. Therefore, the corrosion resistance of the front electrode 3 is enhanced by the first conductive film 7 made of a Cr-based alloy that is resistant to sulfidation, and by providing the second conductive film 9 made of a Ni-based alloy on the upper surface of the first conductive film 7, which is inferior in adhesion to nickel plating, the nickel plating of the barrier layer 12 can be reliably adhered to the second conductive film 9.

[0048] Also, in a chip resistor with low resistance (for example, 100 mΩ or less), since the resistance value of the front electrode 3 affects the resistance value of the entire chip resistor, the TCR increases more in a chip resistor with lower resistance. In the case of the chip resistor 1 according to this embodiment, since the first conductive film 7 is a sputtered film made of a Cr-based alloy and the second conductive film 9 is a sputtered film made of a Ni-based alloy, the electrical conductivity of these metal materials (Cr and Ni) is extremely high compared to the resin material. Therefore, in the mounted state of the chip resistor 1 in which the external plating layer 11 is soldered to the land of a circuit board (not shown), the first conductive film 7 and the second conductive film 9 function as a conduction path between the external plating layer 11 and the resistor 5, and an increase in the TCR (temperature coefficient of resistance) can be suppressed even in a low-resistance region.

[0049] Also, in the manufacturing method of the chip resistor 1 according to this embodiment, by sputtering metal particles such as Cr-based alloys and Ni-based alloys toward the upper surface of a large-sized substrate (insulating substrate) 2A, the first conductive film 7 and the second conductive film 9 are formed, so that the film thicknesses of these first conductive film 7 and second conductive film 9 can be easily controlled. At that time, since the first conductive film 7 is formed to have a film thickness of 1.0 μm or more, it is possible to prevent gaps from occurring in the first conductive film 7 and enhance the function of the first conductive film 7 to block the permeation of sulfide gas.

[0050] In addition, in the method for manufacturing the chip resistor 1 according to the present embodiment, before sputtering the first conductive film 7, the surface of the undercoat layer 6 is roughened with an acid or an alkali solution. Therefore, the adhesion between the undercoat layer 6 and the first conductive film 7 is enhanced by the anchor effect of the roughened portion, and the corrosion resistance can be further improved.

[0051] Note that the present invention is not limited to the above-described embodiments, and various modifications are possible without departing from the technical gist thereof. For example, in the above embodiment, the chip resistor provided with the back electrode electrically connected to the front electrode on the back surface of the insulating substrate has been described. However, the present invention is also applicable to a type of chip resistor not provided with such a back electrode.

Explanation of Reference Numerals

[0052] 1 Chip resistor 2 Insulating substrate 2A Large-sized substrate 2B Strip-shaped substrate 2C Chip-shaped substrate 3 Front electrode (electrode) 4 Back electrode 5 Resistor 5a Trimming groove 6 Undercoat layer (first protective film) 7 First conductive film 8 Overcoat layer (second protective film) 9 Second conductive film 10 End face electrode 11 External plating layer 12 Barrier layer 13 External connection layer

Claims

1. A rectangular parallelepiped-shaped insulating substrate, A pair of electrodes provided at both ends of the main surface of the insulating substrate, A resistor connecting between the pair of electrodes, An insulating first protective film covering the entire resistor including the connection portions with the electrodes, A pair of first conductive films covering both ends of the first protective film and the entire exposed portions of the electrodes exposed from the first protective film, An insulating second protective film covering at least a part of the first protective film and one end portions of the first conductive films overlapping both ends of the first protective film, A pair of second conductive films covering the entire exposed portions of the first conductive films exposed from the second protective film and contacting both ends of the second protective film, A pair of end face electrodes extending on both end faces of the insulating substrate and connecting to the electrodes and the respective end portions of the first conductive film and the second conductive film, A pair of external plating layers covering the end face electrodes and the second conductive films, Comprising: The first conductive film and the second conductive film are formed of a metal material having a property of being less likely to be sulfided than the electrodes, and the end portions of the first conductive film and the second conductive film are disposed at positions sandwiching the end portions of the second protective film. A chip resistor characterized by the above.

2. The external plating layer has a barrier layer made of Ni plating, the first conductive film is formed of an alloy material containing Cr, and the second conductive film is formed of an alloy material containing Ni. The chip resistor according to claim 1, characterized by the above.

3. The first conductive film is Ni—Cr with a Cr content of 50 wt% or more, and the second conductive film is Ni—Cr with a Cr content of 50 wt% or less. The chip resistor according to claim 2, characterized by the above.

4. The first conductive film is a sputtered film having a film thickness of 1.0 μm or more. The chip resistor according to claim 2 or 3, characterized by the above.

5. A roughened portion roughened on the surface of the first protective film is formed, and a part of the first conductive film is formed on the roughened portion. The chip resistor according to any one of claims 1 to 4, characterized by the above.

6. A step of forming a resistor on an insulating substrate and electrodes connected to both ends of the resistor, A step of forming an insulating first protective film so as to cover the entire resistor including the connection portions with the electrodes, A step of forming a first conductive film made of a metal material having a property of being less likely to be sulfided than the electrodes by sputtering metal particles on the surfaces of both ends of the first protective film and the exposed portions of the electrodes exposed from the first protective film. A step of forming an insulating second protective film so as to cover a remaining portion of the first protective film excluding both end portions thereof and one end portion of the first conductive film overlapping both end portions of the first protective film; A step of forming a second conductive film made of a metal material having a property less likely to be sulfided than the electrode by sputtering metal particles on surfaces of both end portions of the second protective film and an exposed portion of the first conductive film exposed from the second protective film; A step of forming an end face electrode connected to each end portion of the electrode, the first conductive film, and the second conductive film by sputtering metal particles on an end face of the insulating substrate; A step of forming an external plating layer covering the end face electrode and the second conductive film by performing electrolytic plating; A method for manufacturing a chip resistor, comprising the above steps.

7. The method for manufacturing a chip resistor according to claim 6, wherein the sputtering for forming the first conductive film and the second conductive film is performed toward the upper surface of the insulating substrate.

8. The method for manufacturing a chip resistor according to claim 6, further comprising a step of roughening a surface of the first protective film with an acid or an alkaline solution.

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