Chip Resistors

Abstract

To provide a chip resistor excellent in corrosion resistance.SOLUTION: A chip resistor 1 comprises: an insulation substrate 2 with a rectangular parallelepiped shape; a pair of front electrodes 3 that are provided at front surface both end parts of the insulation substrate 2; a pair of back electrodes 4 that are formed on a back surface both end parts of the insulation substrate 2; a resistor 5 bridging the pair of front electrodes 3; a second insulation layer (a protection film) 7 made of a resin material covering the resister 5; a third insulation layer (an auxiliary film) 8 made of a rasin material laminated on the second insulation layer (the protection film) 7; a pair of auxiliary electrode layers 9 made of a rasin material containing conductive particles laminated on the front electrodes 3; a pair of end surface electrodes 10 that extend to both end surfaces of the insulation substrate 2 to conduct the corresponding auxiliary electrode layer 9 and the back electrode 4; and a pair of external plating layers 11 that are provided so as to cover front surfaces of the auxiliary electrode layers 9 and the end surface electrodes 10. The auxiliary electrode layer 9 is formed up to a position covering an end part front surface of the third insulation layer 8. The second insulation layer 7 contains more inorganic filler than the third insulation layer 8.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a surface-mount type chip resistor. [Background technology]

[0002] Generally, a chip resistor is mainly composed of a rectangular parallelepiped insulating substrate, a pair of front electrodes arranged opposite each other at a predetermined distance on the surface of the insulating substrate, a resistor bridging the pair of front electrodes, an insulating protective film covering the resistor, a pair of back electrodes arranged opposite each other at a predetermined distance on the back surface of the insulating substrate, a pair of end electrodes connecting the front and back electrodes, and a pair of external plating layers covering each of these electrodes.

[0003] In this type of chip resistor, the front electrode is typically made of a low-resistivity Ag (silver)-based metal material, and an outer plating layer is formed to cover this front electrode. However, highly corrosive sulfide gases and the like can easily penetrate through the gap at the boundary between the outer plating layer and the protective film, and there is a risk that the front electrode portion at the boundary between the front electrode and the protective film will be corroded by the sulfide gases and the like, resulting in problems such as changes in resistance value and breakage.

[0004] Conventionally, as disclosed in Patent Document 1, a chip resistor has been proposed that aims to improve sulfur resistance by forming a protective electrode made of a conductive resin material so as to connect to both the front electrode and the protective film, forming end surface electrodes on the front electrode and the protective electrode so as not to contact the protective film, and forming an external plating layer that extends beyond the boundary between the protective electrode and the end surface electrode and covers the edge of the protective film. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] International Publication No. 2018 / 123419 Summary of the Invention [Problem to be solved by the invention]

[0006] The chip resistor disclosed in Patent Document 1 is configured such that a protective film made of an insulating resin material covers the resistor element, and a protective electrode is formed in contact with the upper end surface of the protective film, thereby ensuring close contact between the protective electrode and the protective film. However, the resin material for the protective film generally contains inorganic fillers such as SiO2 to ensure heat resistance and mechanical strength against heat generated by the resistor, while the resin material for the protective electrode contains metal particles to ensure conductivity. These inorganic fillers and metal particles impair the adhesion between the protective electrode and the protective film. As a result, thermal stress caused by heat cycles or the like can create gaps at the interface between the protective electrode and the protective film, potentially allowing sulfide gases and other contaminants to enter through these gaps.

[0007] The present invention has been made in view of the above-mentioned state of the art, and an object of the present invention is to provide a chip resistor having excellent corrosion resistance. [Means for solving the problem]

[0008] In order to achieve the above-mentioned object, the chip resistor of the present invention comprises an insulating substrate having a rectangular parallelepiped shape, a pair of surface electrodes provided at both ends of the main surface of the insulating substrate, a resistor provided so that both ends overlap the pair of surface electrodes, a protective film made of a resin material provided to cover the resistor, an auxiliary film made of a resin material laminated on the protective film, a pair of auxiliary electrode layers made of a resin material containing conductive particles laminated on the electrodes, a pair of end surface electrodes extending at least to both end surfaces of the insulating substrate and conducting to the auxiliary electrode layer, and an external plating layer covering the auxiliary electrode layer and the end surface electrodes, wherein the auxiliary electrode layer is formed up to a position covering the end surface of the auxiliary film, and the protective film contains more inorganic filler than the auxiliary film.

[0009] In the chip resistor configured as described above, an auxiliary electrode layer made of a resin material containing conductive particles is laminated on the front electrode, and this auxiliary electrode layer is in contact with the upper surface of the end of the auxiliary film laminated on the protective film. Because the protective film made of a resin material contains a larger amount of inorganic filler than the auxiliary film, the resin content of the auxiliary film is relatively increased, thereby improving adhesion between the auxiliary electrode layer and the auxiliary film. As a result, even if thermal stress occurs due to a heat cycle or the like, the auxiliary electrode layer is prevented from peeling off from the auxiliary film due to thermal stress. Therefore, sulfide gas is less likely to penetrate into the interior through the interface between the auxiliary electrode layer and the auxiliary film, and corrosion of the front electrode by sulfide gas is prevented.

[0010] In the above configuration, when a trimming groove for adjusting the resistance value is formed in the resistor, it is preferable to further provide a glass layer that covers the entire resistor including the connection portion between the front electrode and the resistor, and to laminate a protective film on this glass layer.

[0011] Furthermore, in the above configuration, the amount of inorganic filler contained in the resin material of the auxiliary film may be less than that of the protective film, but if the content of inorganic filler contained in the resin material of the auxiliary film is zero or 10 wt% or less, the resin content of the auxiliary film will be significantly increased, thereby effectively improving the adhesion between the auxiliary electrode layer and the auxiliary film.

[0012] In the above configuration, the protective film and the auxiliary film may be made of different resin materials, but if the protective film and the auxiliary film are made of the same type of resin material, the adhesion between the auxiliary electrode layer and the auxiliary film is further improved.

[0013] In the above configuration, when the width of the auxiliary electrode layer is defined as the length along the short side of the insulating substrate, if the width of the auxiliary electrode layer is set to be wider than the width of the front electrode and narrower than the width of the auxiliary film, the auxiliary electrode layer, where the plating material is more likely to form, is located in an area inside the long side edge of the insulating substrate, and the plating material is formed to a thickness similar to that of other areas on the long side edge of the insulating substrate. As a result, localized increases in film thickness, which can cause peeling of the outer plating layer, do not occur, and peeling of the outer plating layer can be prevented.

[0014] Furthermore, in the above configuration, the auxiliary film does not necessarily have to cover the entire surface of the protective film, but if the outer shape of the auxiliary film is set larger than the outer shape of the protective film and the auxiliary film is formed to cover the entire surface of the protective film, this is preferable as it improves the adhesion between the auxiliary electrode layer and the auxiliary film. [Effects of the Invention]

[0015] According to the present invention, it is possible to provide a chip resistor that is excellent in corrosion resistance by preventing peeling of the auxiliary electrode layer. [Brief explanation of the drawings]

[0016] [Figure 1] FIG. 1 is a plan view of a chip resistor according to an embodiment of the present invention. [Figure 2] FIG. 2 is a cross-sectional view taken along line II-II in FIG. [Figure 3] 3A to 3C are plan views showing the manufacturing process of the chip resistor. [Figure 4] 3A to 3C are plan views showing the manufacturing process of the chip resistor. [Figure 5] 3A to 3C are cross-sectional views showing a manufacturing process of the chip resistor. [Figure 6] 3A to 3C are cross-sectional views showing a manufacturing process of the chip resistor. [Figure 7] 3 is a flowchart showing a manufacturing process of the chip resistor. [Figure 8] FIG. 2 is a cross-sectional view showing the mounted state of the chip resistor. DETAILED DESCRIPTION OF THE INVENTION

[0017] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0018] FIG. 1 is a cross-sectional view of a chip resistor according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along line II-II in FIG.

[0019] As shown in Figures 1 and 2, the chip resistor 1 of this embodiment is mainly composed of a rectangular insulating substrate 2, a pair of front electrodes 3 provided at both longitudinal ends of the upper surface of the insulating substrate 2, a pair of back electrodes 4 provided at both longitudinal ends of the lower surface of the insulating substrate 2, a rectangular resistor 5 provided so that both ends overlap the pair of front electrodes 3, a first insulating layer (glass layer) 6 covering the entire resistor 5 including the connection portion between the front electrodes 3 and the resistor 5, a second insulating layer (protective film) 7 laminated on the first insulating layer 6, a third insulating layer (auxiliary film) 8 laminated on the second insulating layer 7, a pair of auxiliary electrode layers 9 laminated on the front electrodes 3, a pair of end electrodes 10 extending on both end surfaces of the insulating substrate 2 and connecting the corresponding front electrodes 3 (and auxiliary electrode layer 9) and back electrodes 4, and a pair of external plating layers 11 provided so as to cover the surfaces of the auxiliary electrode layer 9 and the end electrodes 10.

[0020] The insulating substrate 2 is made of ceramics or the like, and is obtained by dividing a large sheet-like substrate, which will be described later, along primary dividing grooves and secondary dividing grooves that extend lengthwise and widthwise, thereby obtaining a large number of insulating substrates 2 .

[0021] The pair of front electrodes 3 are formed by screen printing an Ag-based paste containing Pd, followed by drying and firing. These front electrodes 3 are formed in a rectangular shape in plan view at both longitudinal ends on the upper surface of the insulating substrate 2. Here, if the short side direction of the insulating substrate 2 (the vertical direction in FIG. 1) is defined as the width direction, both ends of the front electrodes 3 in the width direction do not contact the long sides of the insulating substrate 2, and the width dimension of the front electrodes 3 is shorter than the width dimension of the insulating substrate 2.

[0022] The pair of back electrodes 4 are formed by screen printing an Ag-based paste, followed by drying and firing. The back electrodes 4 are formed in a rectangular shape in plan view at both longitudinal ends on the lower surface of the insulating substrate 2, and the width of the back electrodes 4 is also shorter than the width of the insulating substrate 2.

[0023] The resistor 5 is made by screen printing a resistive paste such as ruthenium oxide, drying and baking it, and both longitudinal ends of the resistor 5 overlap the front electrodes 3. The resistor 5 has trimming grooves 5a formed therein for adjusting the resistance value.

[0024] The first insulating layer 6 is formed by screen printing a glass paste, followed by drying and baking. The first insulating layer 6 is formed so as to cover the entire resistor 5 before the trimming groove 5a is formed.

[0025] The second insulating layer 7 is formed by screen-printing and heat-curing a resin paste such as epoxy resin or phenol resin. The second insulating layer 7 is formed so as to cover the entire first insulating layer 6 after the trimming grooves 5a have been formed, and both ends of the second insulating layer 7 in the width direction are in contact with the long sides of the insulating substrate 2. The resin material of the second insulating layer 7 contains an inorganic filler such as SiO2 or Al2O3 to ensure heat resistance and mechanical strength. It is preferable that the resin material of the second insulating layer 7 contain a large amount of inorganic filler. In this embodiment, the inorganic filler content is in the range of 20 to 40 wt%, but the inorganic filler content may be 40 wt% or more.

[0026] The third insulating layer 8 is formed by screen-printing and heat-curing a resin paste such as epoxy resin or phenolic resin. The third insulating layer 8 is formed to cover the entire second insulating layer 7, and both widthwise ends of the third insulating layer 8 are in contact with the long sides of the insulating substrate 2. That is, the longitudinal dimension of the third insulating layer 8 is set longer than the longitudinal dimension of the second insulating layer 7, and the third insulating layer 8 covers the entire surface of the second insulating layer 7, including the connection portion with the front electrode 3. The resin material of the third insulating layer 8 contains a lower inorganic filler content than the second insulating layer 7, or does not contain any inorganic filler at all (content = 0%). The inorganic filler content in the resin material of the third insulating layer 8 is preferably 10 wt% or less, and in this embodiment, the inorganic filler content is set to be 5 wt% or less, more preferably.

[0027] The third insulating layer 8 does not necessarily have to cover the entire surface of the second insulating layer 7, and may be formed on the surface of the second insulating layer 7 excluding the connection portion with the front electrode 3. In this case, the third insulating layer 8 will not be in contact with the front electrode 3, and the second insulating layer 7 will be exposed between both ends of the third insulating layer 8 and the front electrode 3, but it is sufficient that the auxiliary electrode layer 9 covers both ends of the third insulating layer 8 and is in close contact with them.

[0028] The auxiliary electrode layer 9 is formed by screen-printing and heat-curing a resin paste, such as epoxy resin or phenolic resin, filled with conductive particles of Ag, Cu, Ni, etc. The auxiliary electrode layer 9 covers the top surface of the front electrode 3 and extends partway up the top surface of the third insulating layer 8, with the auxiliary electrode layer 9 covering the curved portions at both ends of the third insulating layer 8. While the auxiliary electrode layer 9 and the third insulating layer 8 may be made of different resin materials, it is preferable that the third insulating layer 8 and the third insulating layer 8 are made of the same resin material. The auxiliary electrode layer 9 does not have to cover the entire top surface of the front electrode 3. The auxiliary electrode layer 9 may be formed inwardly away from the edge surface of the insulating substrate 2, so that part of the front electrode 3 is exposed between the edge surface of the insulating substrate 2 and the auxiliary electrode layer 9.

[0029] Here, the linear expansion coefficient of the third insulating layer 8 sandwiched between the second insulating layer 7 and the auxiliary electrode layer 9 is preferably a value between the linear expansion coefficients of the second insulating layer 7 and the auxiliary electrode layer 9. In this embodiment, the linear expansion coefficients have the relationship second insulating layer 7 > third insulating layer 8 > auxiliary electrode layer 9, but the relationship auxiliary electrode layer 9 > third insulating layer 8 > second insulating layer 7 may also be true. Furthermore, with regard to the glass transition temperatures of the second insulating layer 7, the third insulating layer 8, and the auxiliary electrode layer 9, it is preferable that the glass transition temperatures of the second insulating layer 7 and the auxiliary electrode layer 9 fall within a range of ±10% of the glass transition temperature of the third insulating layer 8.

[0030] The edge electrode 10 is formed by sputtering Ni-Cr or the like, and provides electrical continuity between the front electrode 3 and auxiliary electrode layer 9 and the back electrode 4, which are spaced apart vertically, via the edge surface of the insulating substrate 2. The upper surface of the auxiliary electrode layer 9, which is closer to the third insulating layer 8, is not covered by the edge electrode 10, and the inner portion of the back electrode 4, which is away from the edge surface of the insulating substrate 2, is also not covered by the edge electrode 10.

[0031] The external plating layer 11 has a two-layer structure consisting of an inner barrier layer 12 and an outer external connection layer 13. The barrier layer 12 is a Ni plating layer formed by electrolytic plating, and this barrier layer 12 covers the entire surface of the end electrode 10 as well as the auxiliary electrode layer 9 and back electrode 4 exposed from the end electrode 10. The external connection layer 13 is a Sn plating layer formed by electrolytic plating, and this external connection layer 13 covers the entire surface of the barrier layer 12.

[0032] Next, a method for manufacturing the chip resistor 1 configured as described above will be described with reference to Fig. 3 to Fig. 7. Fig. 3 and Fig. 4 are plan views showing the manufacturing process of the chip resistor 1, Fig. 5 and Fig. 6 are cross-sectional views showing the manufacturing process of the chip resistor 1, and Fig. 7 is a flowchart showing the manufacturing process of the chip resistor 1.

[0033] First, as shown in step S1 of Fig. 7, a sheet-like large-sized substrate 2A from which a large number of insulating substrates 2 are to be cut is prepared. Primary dividing grooves and secondary dividing grooves extending in a grid pattern are formed on this large-sized substrate 2A, and each of the squares separated by these dividing grooves becomes one chip forming region. Note that although Figs. 3 to 6 show one chip forming region as a representative example, in reality, many such chip forming regions are arranged in a grid pattern.

[0034] Then, Ag paste is screen-printed on the back surface of the large-format substrate 2A, dried, and fired at 850°C to form a pair of opposing back electrodes 4 at both longitudinal ends of each chip formation region with a predetermined gap between them (step S2 in FIG. 7). Subsequently, Ag-Pd-based paste is screen-printed on the front surface of the large-format substrate 2A, dried, and fired at 850°C to form a pair of opposing front electrodes 3 at both longitudinal ends of each chip formation region with a predetermined gap between them (step S3 in FIG. 7), as shown in FIGS. 3(a) and 5(a). The order of forming the front electrodes 3 and back electrodes 4 may be reversed, or the front electrodes 3 and back electrodes 4 may be formed simultaneously.

[0035] Next, a resistive paste containing ruthenium oxide or the like is screen-printed on the surface of the large-sized substrate 2A, dried, and then fired at 850°C to form a rectangular resistor 5 with both ends overlapping the front electrodes 3, as shown in Figures 3(b) and 5(b) (Step S4 in Figure 7).

[0036] Next, a glass paste is screen-printed in the area covering the resistor 5, dried, and then fired at 600°C to form a first insulating layer 6 that covers the entire resistor 5, including the connection end with the front electrode 3, as shown in Figures 3(c) and 5(c) (Step S5 in Figure 7). Laser light is then irradiated from above this first insulating layer 6 to form trimming grooves 5a in the resistor 5, thereby adjusting the resistance value.

[0037] Next, an epoxy resin (or phenol resin) paste is screen-printed onto the first insulating layer 6, and then heat-cured (baked) at 200°C to form the second insulating layer 7 that covers the entire first insulating layer 6, as shown in Figures 3(d) and 5(d) (Step S6 in Figure 7). The resin material of this second insulating layer 7 contains 20 to 40 wt% of inorganic filler such as SiO2 or Al2O3 to ensure heat resistance and mechanical strength.

[0038] Next, an epoxy resin (or phenol resin) paste is screen-printed onto the second insulating layer 7, and then heated and cured at 200°C to form a third insulating layer 8 that covers the entire second insulating layer 7, as shown in Figures 4(e) and 6(e) (Step S7 in Figure 7). The resin material of this third insulating layer 8 contains a lower amount of inorganic filler than the second insulating layer 7, or does not contain any inorganic filler at all, and the content of inorganic filler in the third insulating layer 8 is 10 wt% or less (including zero).

[0039] Next, a resin paste such as epoxy resin or phenolic resin filled with conductive particles (Ag-based, Cu-based, Ni-based, etc.) is screen-printed and then heated and cured at 200°C to form auxiliary electrode layers 9 on each of the pair of front electrodes 3, as shown in Figures 4(f) and 6(f) (Step S8 in Figure 7). These auxiliary electrode layers 9 are formed to cover the upper surfaces of the front electrodes 3 and extend partway up the upper surface of the third insulating layer 8, and the curved portions at both ends of the third insulating layer 8 are covered by the auxiliary electrode layers 9.

[0040] The steps up to this point have been batch processing of the large-sized substrate 2A, but in the next step, as shown in step S9 of Figure 7, the large-sized substrate 2A is primarily broken (primarily divided) along the primary dividing grooves to obtain strip-shaped substrates 2B.

[0041] Thereafter, Ni—Cr is sputtered toward the divided surfaces of the strip-shaped substrate 2B to form a pair of end electrodes 10 that electrically connect the front electrode 3 and auxiliary electrode layer 9 to the back electrode 4, as shown in Figures 4(g) and 6(g) (Step S10 in Figure 7). At this time, the end electrodes 10 are formed to have a U-shaped cross section so as to cover the surfaces of the auxiliary electrode layer 9 and the back electrode 4 near their outer ends, but the upper surface of the auxiliary electrode layer 9 near the third insulating layer 8 is not covered by the end electrodes 10, and the surface of the back electrode 4 near its inner end is also not covered by the end electrodes 10.

[0042] Next, as shown in step S11 of FIG. 7, the rectangular substrate 2B is secondarily broken (secondarily divided) along the secondary dividing grooves to obtain chip elements 2C having the same size as the chip resistor 1.

[0043] Thereafter, the individual chip units 2C are subjected to electrolytic Ni plating to form barrier layers 12 that cover the end surface electrodes 10. Next, the chip units 2C are subjected to electrolytic Sn plating to form external connection layers 13 that cover the barrier layers 12. As a result, as shown in Figures 4(h) and 6(h), an external plating layer 11 with a two-layer structure consisting of the barrier layer 12 and the external connection layer 13 is formed (step S12 in Figure 7), and the chip resistor 1 shown in Figures 1 and 2 is completed.

[0044] As shown in Figure 8, the chip resistor 1 manufactured in this manner is mounted on the lands 101 of the circuit board 100 with the back surface of the insulating substrate 2 facing downward, and is surface-mounted by joining a pair of outer plating layers 11 to the corresponding lands 101 via solder 102, respectively.

[0045] As described above, in the chip resistor 1 according to this embodiment, the auxiliary electrode layer 9 made of a resin material containing conductive particles is laminated on the front electrode 3, and this auxiliary electrode layer 9 is in contact with the upper end surface of the third insulating layer (auxiliary film) 8 laminated on the second insulating layer (protective film) 7. Because the second insulating layer 7 contains more inorganic filler than the third insulating layer 8, the second insulating layer 7 ensures heat resistance and mechanical strength, while the resin content of the third insulating layer 8 is relatively increased, thereby improving adhesion between the auxiliary electrode layer 9 and the third insulating layer 8. As a result, even if thermal stress occurs due to a heat cycle or the like in the mounted state of the chip resistor 1 shown in FIG. 8, peeling of the auxiliary electrode layer 9 from the third insulating layer 8 caused by the thermal stress is suppressed. This makes it difficult for sulfide gas to penetrate into the interior from the interface between the auxiliary electrode layer 9 and the third insulating layer 8, preventing corrosion of the front electrode 3 by the sulfide gas.

[0046] Furthermore, in the chip resistor 1 according to this embodiment, when the length along the short side of the insulating substrate 2 is taken as the width, the width of the auxiliary electrode layer 9 is set to be wider than the width of the front electrode 3 and narrower than the width of the third insulating layer 8. As a result, the auxiliary electrode layer 9, where the plating material is more likely to form, is located in an area more inward than the long side end faces of the insulating substrate 2. Therefore, when the barrier layer 12 and the external connection layer 13 are formed by electrolytic plating, the plating material is formed with a thickness similar to that of other parts on the long side end faces of the insulating substrate 2. As a result, there is no local increase in the film thickness, which can cause peeling of the outer plating layer 11, and peeling of the outer plating layer 11 can be prevented.

[0047] The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope of the gist of the present invention. The present invention covers all technical matters included in the technical ideas described in the claims. The above-described embodiments are preferred examples, but a person skilled in the art can realize various alternatives, modifications, variations, or improvements from the contents disclosed in this specification, and these are included in the technical scope described in the appended claims.

[0048] For example, in the case of a chip resistor that does not require adjustment of the resistance value of the resistor 5, the first insulating layer (glass layer) 6 may be omitted, and the resistor 5 may be covered with two layers: the second insulating layer (protective film) 7 and the third insulating layer (auxiliary film) 8.

[0049] In addition, in the above embodiment, a chip resistor 1 was described in which a back electrode 4 that is electrically connected to the front electrode 3 and the auxiliary electrode layer 9 is provided on the back surface of the insulating substrate 2, but the present invention is also applicable to chip resistors that do not have such a back electrode. [Explanation of symbols]

[0050] 1 Chip resistor 2. Insulating substrate 2A large board 2B strip-shaped board 2C chip alone 3. Surface electrode 4 Back electrode 5 Resistors 5a Trimming groove 6 First insulating layer (glass layer) 7 Second insulating layer (protective film) 8 Third insulating layer (auxiliary film) 9 Auxiliary electrode layer 10 Edge electrode 11 Outer plating layer 12 Barrier Layer 13 External connection layer

Claims

1. a rectangular parallelepiped insulating substrate; a pair of front electrodes provided at both ends of a main surface of the insulating substrate; a resistor provided so that both ends of the resistor overlap the pair of front electrodes; a protective film made of a resin material provided so as to cover the resistor; an auxiliary film made of a resin material laminated on the protective film; a pair of auxiliary electrode layers made of a resin material containing conductive particles and laminated on the electrodes; a pair of end surface electrodes extending at least on both end surfaces of the insulating substrate and electrically connected to the auxiliary electrode layer; an outer plating layer covering the auxiliary electrode layer and the end surface electrode; Equipped with the auxiliary electrode layer is formed up to a position covering an end surface of the auxiliary film, The protective film contains a larger amount of inorganic filler than the auxiliary film. A chip resistor characterized by:

2. 2. The chip resistor according to claim 1, further comprising a glass layer covering the entire resistor including the connection portion between the front electrode and the resistor, and the protective film is laminated on the glass layer.

3. 2. The chip resistor according to claim 1, wherein the content of inorganic filler contained in the resin material of the auxiliary film is zero or 10 wt % or less.

4. 2. The chip resistor according to claim 1, wherein the protective film and the auxiliary film are made of the same type of resin material.

5. The chip resistor according to claim 1, characterized in that, when the length along the short direction of the insulating substrate is taken as the width dimension, the width dimension of the auxiliary electrode layer is set to be wider than the width dimension of the front electrode and narrower than the width dimension of the auxiliary film.

6. 2. The chip resistor according to claim 1, wherein the outer shape of the auxiliary film is set larger than the outer shape of the protective film, and the auxiliary film is formed so as to cover the entire surface of the protective film.

7. 2. The chip resistor according to claim 1, further comprising a back electrode provided on a back surface of the insulating substrate, the end surface electrodes being electrically connected to the back electrode.

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