Control of a Linear Transimpedance Amplifier (TIA) during Settling after Recovery from Signal Loss in a Receiver
The system with a photodiode, input and output stages, and a linear TIA with a detection circuit accurately detects the settling of the TIA, preventing invalid data transmission and enabling prompt valid data output by dynamically adjusting the TIA's output based on the automatic gain control voltage.
Patent Information
- Application Number
- JP2023183429
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2023-07-26
- Filing Date
- 2023-10-25
- Publication Date
- 2025-07-11
- Estimated Expiration
- 2043-10-25
AI Technical Summary
Existing systems fail to accurately detect when a linear transimpedance amplifier (TIA) of an optical receiver settles after a signal resumption event, leading to the transmission of invalid data during the adaptation period, and lack mechanisms to shorten the time to output valid data.
A system with a photodiode, input and output stages, and a linear TIA featuring a variable gain amplifier (VGA) and automatic gain control loop, coupled with a detection circuit to monitor the rate of change in the automatic gain control voltage, enabling precise detection of the TIA's settling state to control its output.
Accurately detects the settling of the TIA, preventing the transmission of invalid data and enabling prompt resumption of valid data output by dynamically adjusting the TIA's output based on the detected slope in the automatic gain control voltage.
Smart Images

Figure 0007706520000001 
Figure 0007706520000002 
Figure 0007706520000003
Abstract
Description
Technical Field
[0001] The subject matter of the present disclosure generally relates to optical receivers, and in some non-limiting embodiments, to a system and method for accurately detecting when a linear transimpedance amplifier (TIA) of an optical receiver settles after a signal resumption event (e.g., after a loss of signal) occurs at the input of the linear TIA.
Background Art
[0002] For the purposes of the present disclosure, consider the physical interface of an optical fiber cable. As shown in FIG. 1A, data is transmitted from a laser transmitter 100 driven by a laser driver via an optical fiber 102. The optical signal 130 from the optical fiber 102 is received at the receiver 104 via a combination of a photodetector 110 and a subsequent linear transimpedance amplifier (TIA) 120, and its output is the electrical differential data 140 as shown in FIG. 1B.
[0003] In a data communication receiver 104 such as a Small Form-factor Pluggable (SFP) module, one requirement is to squelch the output of the receiver 104 when an input optical signal interruption event is detected. The signal interruption can occur due to unplugging the receiver's plug, reconfiguring the system, or other reasons. For example, FIG. 1B shows an input interruption 132 of the optical signal 130 and also shows a squelch 142 of the TIA output data 140. In the case of PAM4 data, the TIA needs to have linear amplification and is called a linear TIA. When the input optical signal 130 resumes, the receiver's TIA 120 needs time to readapt to the change in the input optical power level, and during that time, the TIA 120 does not operate correctly. It is preferable that the TIA 120 does not send invalid data while the adaptation is still in progress. Therefore, there is a desire to stop the output of the data 140 from the TIA 120 until it can send valid data, and there is a desire to start sending valid data 140 from the TIA 120 as soon as possible when it operates normally.
[0004] Some existing solutions turn on the output data 140 of the TIA immediately when the optical signal resumes, and send invalid data D11 as shown in Figure 1B until the TIA 120 re-settles into an effective operating state. Other solutions use a fixed delay to keep the output of the TIA skewed 142 so as not to send such invalid data D11. Since the settling time of the TIA depends on the input optical signal level, these fixed delays may be shorter or longer than the actual settling time required for the TIA 120. If the delay is shorter than the actual TIA settling time, invalid data D11 will be sent. If the delay is longer than the TIA settling time, the response time until the optical signal resumes will be unnecessarily long. Existing solutions not only do not properly time the resumption of the output of the data 140 of the TIA 120, but also existing techniques do not have a mechanism to shorten the time to output valid data (140) during the optical input signal resumption event to meet a shorter settling time than desired. U.S. Patent No. 11,381,318, titled "Control of Trans-Impedance Amplifier (TIA) during Settling after Recovery from Loss of Signal in Receiver," assigned to the assignee of the present application and incorporated herein by reference in its entirety, discloses a system and method for accurately detecting the settling of the TIA after a signal resumption event to prevent sending invalid data, but this patent does not consider the particularity of such a system when using a linear TIA. For example, when the input signal to a linear TIA resumes, the automatic gain control (AGC) loop of the linear TIA takes time to settle, and the settling time is proportional to the input step. The linear TIA cannot send valid data until the linear TIA control loop settles to a transient step input. Currently, there is no way to accurately detect the moment when the AGC feedback loop of the linear TIA settles to prevent sending invalid data. SUMMARY OF THE INVENTION PROBLEM TO BE SOLVED BY THE INVENTION
[0005] The subject matter of the present disclosure is directed to overcoming one or more of the above-described problems or at least reducing their impact.
[0006] Accordingly, it is an object of the subject matter of the present disclosure to provide a system that overcomes some or all of the drawbacks of the prior art.
Means for Solving the Problems
[0007] According to a non-limiting embodiment, an optical device for an optical signal is provided. The optical device includes a photodiode configured to receive the optical signal, an input stage, an output stage, and a linear transimpedance amplifier (TIA) having at least one variable gain amplifier (VGA) provided between the input stage and the output stage. The input stage is coupled to the photodiode, the output stage is coupled to the input stage, and is controllable to enable and disable the output of the linear TIA output. The optical device also includes an automatic gain control loop configured to rectify the output of at least one VGA and compare the rectified output with a threshold gain setting to generate an automatic gain control voltage, and a detection circuit configured to detect the rate of change of the automatic gain control voltage and determine a first state indicative of the Not detected optical signal at the photodiode. The detection circuit is configured to disable the output stage of the linear TIA at least in response to the determined first state.
[0008] The detection circuit may be configured to determine a second state indicative of the Detected optical signal at the photodiode, and the detection circuit may be configured to disable the output stage of the linear TIA in response to at least the second state determined after the first state and the detected rate of change. The detection circuit may be coupled to the photodiode and may include a received signal strength indicator configured to indicate the first and second states of the optical signal at the photodiode. At least the second state and , variable rate of change of Not detectedIn response, the detection circuit may be configured to enable the output stage of the linear TIA. The detection circuit may be configured to process the logical conjunction of a first state, a second state, a rate of change Detected , and a rate of change Not detected and include a digital logic circuit that provides an enable and disable signal to the output stage of the linear TIA based on the processed logical conjunction.
[0009] The automatic gain control loop may include a rectifier connected to the output of at least one VGA and a threshold circuit configured to generate a threshold gain setting. The detection circuit may include a slope detection circuit configured to detect the rate of change of the automatic gain control voltage. In one non-limiting embodiment, the slope detection circuit includes an operational amplifier, a first comparator configured to compare the output of the operational amplifier with a positive automatic gain control voltage and provide a first comparison state from the comparison, a second comparator configured to compare the output of the operational amplifier with a negative automatic gain control voltage and provide a second comparison state from the comparison, and an OR logic gate configured to receive the first and second comparison states and output a signal indicative of the rate of change of the automatic gain control voltage. The optical device may be at least a part of an optical receiver or an optical transceiver.
[0010] According to a non-limiting embodiment, a linear transimpedance amplifier (TIA) comprising a photodiode, an input stage, an output stage, and at least one variable gain amplifier (VGA) provided between the input stage and the output stage, the linear TIA being coupled to the photodiode, the linear TIA, an automatic gain control loop configured to rectify the output of the at least one VGA and compare the rectified output with a threshold gain setting to generate an automatic gain control voltage signal, and a slope detection circuit configured to receive the automatic gain control voltage signal and monitor the automatic gain control voltage signal from the automatic gain control loop, the slope detection circuit being configured to provide a first slope status signal indicating that a slope has been detected in response to the slope being detected in the automatic gain control voltage signal, the slope detection circuit, and a logic circuit coupled to the slope detection circuit and coupled to the output stage of the linear TIA, a photoreceiver is provided. The logic circuit is configured to skeletonize the output stage of the linear TIA in response to the first slope status signal.
[0011] The optical receiver may further include a received-signal-strength indicator (RSSI) configured to provide a first indication signal that asserts a loss of signal (LOS) in the photodiode and a second indication signal that de-asserts the LOS in the photodiode. The logic circuit may be configured to output a squelch signal from the logic circuit to the output stage of the linear TIA in response to the first indication signal that asserts a loss of signal (LOS). The logic circuit may be configured to output a squelch signal from the logic circuit to the output stage of the linear TIA in response to the second indication signal that de-asserts the loss of signal (LOS) and a first slope status signal indicating that a slope has been detected. The slope detection circuit may be further configured to provide to the logic circuit a second slope status signal indicating that no slope has been detected in response to no slope being detected in the automatic gain control voltage signal. The logic circuit may be configured to output a squelch de-assert signal from the logic circuit to the output stage of the linear TIA in response to the second indication signal that de-asserts the loss of signal (LOS) and the second slope status signal indicating that no slope has been detected. The output stage of the linear TIA may be activated in response to receiving the squelch de-assert signal.
[0012] The automatic gain control loop may include a rectifier connected to the output of at least one VGA and a threshold circuit configured to generate a threshold gain setting. The slope detection circuit may include an operational amplifier, a first comparator configured to compare the output of the operational amplifier with a positive automatic gain control voltage and provide a first comparison state from the comparison, a second comparator configured to compare the output of the operational amplifier with a negative automatic gain control voltage and provide a second comparison state from the comparison, and an OR logic gate configured to receive the first and second comparison states and output a signal indicating the slope of the automatic gain control voltage.
[0013] According to a non-limiting embodiment, a method for controlling the output of a linear trans-impedance amplifier (TIA) is provided. The method includes sending a squelch signal to the output buffer of the linear TIA to squelch the output voltage of the linear TIA in response to a first indication signal that asserts a loss of signal (LOS); rectifying the output of at least one variable gain amplifier (VGA) of the linear TIA, comparing the rectified output with a threshold gain setting to generate an automatic gain control voltage signal; monitoring the automatic gain control voltage signal to determine whether a slope is detected in the automatic gain control voltage; sending a first slope status signal indicating that a slope has been detected in response to the slope being detected in the automatic gain control voltage signal; and sending a squelch signal to the output buffer of the linear TIA to continue squelching the output voltage of the linear TIA in response to a second indication signal that de-asserts the LOS and the first slope status signal.
[0014] The method may further include sending a second slope status signal indicating that no slope has been detected in response to no slope being detected in the automatic gain control voltage signal; and sending an unsquelch signal to the output buffer of the linear TIA to unsquelch the output voltage of the linear TIA in response to the second indication signal that de-asserts the LOS and the second slope status signal. The first indication signal that asserts the LOS and the second indication signal that asserts the LOS may be provided by a received signal strength indicator (RSSI) in a photodiode of an optical receiver. The automatic gain control voltage signal may be monitored by a slope detection circuit to determine whether a slope is detected in the automatic gain control voltage.
[0015] Further embodiments are described in the numbered clauses below.
[0016] Clause 1: An optical device for an optical signal, comprising a photodiode configured to receive an optical signal, an input stage, an output stage, and a linear transimpedance amplifier (TIA) having at least one variable gain amplifier (VGA) provided between the input stage and the output stage, wherein the input stage is coupled to the photodiode, the output stage is coupled to the input stage, and the linear transimpedance amplifier is controllable to enable and disable the output of the linear transimpedance amplifier output; an automatic gain control loop configured to rectify the output of at least one VGA and compare the rectified output with a threshold gain setting to generate an automatic gain control voltage; and a detection circuit configured to detect a rate of change of the automatic gain control voltage and determine a first state indicative of an optical signal in the photodiode. The optical device is configured such that, at least in response to the determined first state, the detection circuit disables the output stage of the linear transimpedance amplifier. Not detected And a detection circuit configured to determine a first state indicating the
[0017] Clause 2: The detection circuit is configured to determine a second state indicative of an optical signal in the photodiode. At least in response to the second state determined after the first state and the detected rate of change, the detection circuit is configured to disable the output stage of the linear TIA. The optical device according to Clause 1. Detected And a detection circuit configured to determine a second state indicating the
[0018] Clause 3: The detection circuit is coupled to the photodiode and includes a received signal strength indicator configured to indicate the first and second states of the optical signal in the photodiode. The optical device according to Clause 1 or 2.
[0019] Clause 4: At least in response to the second state and , variable the rate of change of Not detected the detection circuit is configured to enable the output stage of the linear TIA. The optical device according to Clause 1 or 2.
[0020] Clause 5: The detection circuit is the first state, the second state, the rate of change of Detected and the rate of change ofNot detected The optical device according to clause 4, comprising a digital logic circuit configured to process the logical combination of Not detected and providing an enabling and disabling signal to the output stage of the linear TIA based on the processed logical combination.
[0021] Clause 6: The automatic gain control loop comprises a rectifier connected to the output of at least one VGA and a threshold circuit configured to generate a threshold gain setting. The optical device according to any one of clauses 1 to 5.
[0022] Clause 7: The detection circuit comprises a slope detection circuit configured to detect the rate of change of the automatic gain control voltage. The slope detection circuit comprises an operational amplifier, a first comparator configured to compare the output of the operational amplifier with the positive automatic gain control voltage and provide a first comparison state from the comparison, a second comparator configured to compare the output of the operational amplifier with the negative automatic gain control voltage and provide a second comparison state from the comparison, and an OR logic gate configured to receive the first and second comparison states and output a signal indicating the rate of change of the automatic gain control voltage. The optical device according to any one of clauses 1 to 6.
[0023] Clause 8: The optical device is at least part of an optical receiver or an optical transceiver. The optical device according to any one of clauses 1 to 7.
[0024] Clause 9: A linear transimpedance amplifier (TIA) comprising a photodiode, an input stage, an output stage, and at least one variable gain amplifier (VGA) provided between the input stage and the output stage, the linear TIA being coupled to the photodiode, the linear TIA, an automatic gain control loop configured to rectify the output of the at least one VGA and compare the rectified output with a threshold gain setting to generate an automatic gain control voltage signal, and a slope detection circuit configured to receive the automatic gain control voltage signal and monitor the automatic gain control voltage signal from the automatic gain control loop, the slope detection circuit being configured to provide a first slope status signal indicating that a slope has been detected in response to the slope being detected in the automatic gain control voltage signal, the slope detection circuit, and a logic circuit coupled to the slope detection circuit and coupled to the output stage of the linear TIA, the logic circuit being configured to skeletonize the output stage of the linear TIA in response to the first slope status signal, the logic circuit, a photoreceiver.
[0025] Clause 10: The photoreceiver according to Clause 9, further comprising a received signal strength indicator (RSSI) configured to provide a first indication signal for asserting a loss of signal (LOS) in the photodiode and a second indication signal for de-asserting the LOS in the photodiode.
[0026] Clause 11: The photoreceiver according to Clause 9 or 10, wherein the logic circuit is configured to output a skeleton signal from the logic circuit to the output stage of the linear TIA in response to a first indication signal for asserting a loss of signal (LOS).
[0027] Clause 12: The photoreceiver according to any one of Clauses 9 to 11, wherein the logic circuit is configured to output a skeleton signal from the logic circuit to the output stage of the linear TIA in response to a second indication signal for de-asserting a loss of signal (LOS) and a first slope status signal indicating that a slope has been detected.
[0028] Clause 13: The slope detection circuit is further configured to provide a second slope status signal indicating that no slope has been detected to the logic circuit in response to the fact that no slope has been detected in the automatic gain control voltage signal, for the optical receiver according to any one of Clauses 9 to 11.
[0029] Clause 14: The logic circuit is configured to output a skeleton de-assert signal from the logic circuit to the output stage of the linear TIA in response to a second indication signal for de-asserting signal loss (LOS) and a second slope status signal indicating that no slope has been detected, and the output stage of the linear TIA is activated in response to receiving the skeleton de-assert signal, for the optical receiver according to Clause 13.
[0030] Clause 15: The automatic gain control loop includes a rectifier connected to the output of at least one VGA and a threshold circuit configured to generate a threshold gain setting, for the optical receiver according to any one of Clauses 9 to 14.
[0031] Clause 16: The slope detection circuit includes an operational amplifier, a first comparator configured to compare the output of the operational amplifier with a positive automatic gain control voltage and provide a first comparison state from the comparison, a second comparator configured to compare the output of the operational amplifier with a negative automatic gain control voltage and provide a second comparison state from the comparison, and an OR logic gate configured to receive the first and second comparison states and output a signal indicating the slope of the automatic gain control voltage, for the optical receiver according to any one of Clauses 9 to 15.
[0032] Clause 17: A method for controlling the output of a linear transimpedance amplifier (TIA), comprising: sending a squelch signal to an output buffer of the linear TIA in response to a first indication signal that asserts a loss of signal (LOS), to squelch the output voltage of the linear TIA; rectifying the output of at least one variable gain amplifier (VGA) of the linear TIA, comparing the rectified output with a threshold gain setting to generate an automatic gain control voltage signal; monitoring the automatic gain control voltage signal to determine whether a slope is detected in the automatic gain control voltage; sending a first slope status signal indicating that a slope has been detected in response to the detection of a slope in the automatic gain control voltage signal; and sending a squelch signal to the output buffer of the linear TIA in response to a second indication signal that de-asserts the LOS and the first slope status signal, to continue squelching the output voltage of the linear TIA.
[0033] Clause 18: Further comprising: sending a second slope status signal indicating that no slope has been detected in response to the non-detection of a slope in the automatic gain control voltage signal; and sending an unsquelch signal to the output buffer of the linear TIA in response to a second indication signal that de-asserts the LOS and the second slope status signal, to unsquelch the output voltage of the linear TIA, the method according to Clause 17.
[0034] Clause 19: The first indication signal that asserts the LOS and the second indication signal that asserts the LOS are provided by a received signal strength indicator (RSSI) in a photodiode of an optical receiver, the method according to Clause 17 or 18. Data Clause 20: The automatic gain control voltage signal is monitored by a slope detection circuit to determine whether a slope is detected in the automatic gain control voltage, the method according to any one of Clauses 17 to 19.
[0035]
[0036] These and other features and characteristics of the subject matter of this disclosure, the methods of operation and functions of the related elements of the structure, and the combinations of parts and economies of manufacture will become more apparent upon consideration of the following description and the appended claims, which are all a part of this specification, and in which like reference numerals identify corresponding parts in the various figures. It should be clearly understood, however, that the drawings are for the purpose of illustration and description only and are not intended to limit the scope of the subject matter of this disclosure. As used in this specification and the appended claims, the singular forms "a", "an", and "the" include plural referents unless the context clearly dictates otherwise.
[0037] Further advantages and details of the subject matter of this disclosure will be described in more detail below with reference to the exemplary embodiments shown in the accompanying drawings.
Brief Description of the Drawings
[0038]
Figure 1
[0039] FIG. 1B is a diagram showing a comparison between an optical signal received by a receiver and an invalid output signal output by the receiver due to recovery from a loss of signal (LOS) state.
[0040]
Figure 2
[0041]
Figure 3
[0042]
Figure 4
[0043]
Figure 5
[0044]
Figure 6
[0045] For the purposes of the following description, the terms "end," "upper," "lower," "right," "left," "vertical," "horizontal," "top," "bottom," "lateral," "longitudinal," and derivatives thereof shall relate to the subject matter of the present disclosure as oriented in the drawings. However, it is to be understood that the subject matter of the present disclosure may assume various alternative variations and step sequences, except where expressly stated otherwise. Also, it is to be understood that the specific devices and processes shown in the accompanying drawings and described in the following specification are merely exemplary embodiments of the subject matter of the present disclosure. Accordingly, specific dimensions and other physical characteristics related to the embodiments disclosed herein should not be construed as limiting, unless otherwise noted.
[0046] As used herein, aspects, components, elements, structures, acts, steps, functions, instructions, etc. should not be construed as such unless explicitly stated to be important or essential. Also, as used herein, the articles "a" and "an" are to be construed as including one or more, and may be used interchangeably with "one or more" and "at least one". When intending only one, the term "one" or similar language is used. Also, as used herein, terms such as "has", "have", "having", etc. are to be considered open-ended terms. Also, the phrase "based on" shall mean "at least partially based on" unless explicitly stated otherwise.
[0047] Some non-limiting embodiments are described herein in relation to threshold values. As used herein, meeting a threshold value can refer to a value being greater than, more than, higher than, greater than or equal to, less than, fewer than, lower than, less than or equal to, equal to the threshold value, etc.
[0048] The present disclosure is directed to a slope detection circuit for accurately detecting when a linear transimpedance amplifier (TIA) of an optical receiver settles after a signal resumption event (e.g., after a signal break) occurs at the input of the linear TIA. By using accurate detection of the settling of the linear TIA to sketch the output of the linear TIA until the control loop of the TIA readapts and resettles to the correct operating state, invalid data is not sent.
[0049] Referring to FIG. 2, an example of the desired output of a linear TIA operating in accordance with the present disclosure is shown. The data 200 of the output of the linear TIA continues until a signal break is detected at the receiver. When an input optical signal break event is detected and the LOS indication is asserted, the output of the data of the linear TIA is skewed during the period P21. At time 202, the input optical signal resumes and the LOS indication is de-asserted, but since it takes time for the receiver (TIA) to adapt or re-adapt, the skew of the output of the TIA is not yet de-asserted. After time 202, there is a slope of the automatic gain control (AGC) loop voltage signal of the TIA, which can be detected by a slope detection circuit described in more detail below. Accordingly, the output of the receiver is further skewed during the period P22 until the linear TIA adapts. Finally, at time 204 when the adaptation or tuning of the linear TIA of the receiver is completed after the period P22, the slope of the AGC loop voltage signal of the linear TIA disappears and the skew of the output of the linear TIA is de-asserted. Accordingly, the data 200 of the output of the receiver can continue without including invalid data. By using the slope detection circuit disclosed herein, the moment of tuning of the AGC loop of the linear TIA can be accurately detected, so that invalid data is not sent until the loop is tuned, and the valid data at the output of the linear TIA can be utilized promptly. In one non-limiting configuration, the period P22 from when the input signal resumes until the skew of the output of the linear TIA ends can be within 80 μs from a transient step input.
[0050] Having understood how the slope detection circuit of the present disclosure is intended to control the output of the linear TIA of the receiver, the discussion will now turn to the circuit and other features of the receiver, as well as the method of controlling the output of the linear TIA of the receiver. Specifically, FIG. 3 shows a simplified block diagram of an optical receiver 310 according to the present disclosure. The optical receiver 310 includes a photodiode 311, a received signal strength indicator (RSSI) 317, a linear TIA 312, a DC cancellation feedback amplifier 316, a slope processing circuit 329, and an output buffer 315.
[0051] Generally, as described below, the optical receiver 310 receives an optical signal with a photodiode 311, and the linear TIA 312 converts the varying input current from the photodiode into a voltage (and also amplifies it) and outputs it as a differential output voltage 680 from the output buffer 315. In one non-limiting embodiment, the linear TIA 312 includes a low-noise input stage 313 configured to amplify the signal from the photodiode 311, a variable gain amplifier (VGA) stage 314 following it, and an output buffer 315. Although FIG. 3 shows only a single VGA stage 314, this should not be construed as limiting the present disclosure as multiple VGA stages may exist based on the application. Based on the input signal amplitude, the VGA stage 314 increases or decreases its gain to keep the output of the TIA 312 linear. The VGA output is rectified by a rectifier 318 and compared with a threshold gain setting generated by a threshold circuit 320 to generate a control voltage (V agc ). In one non-limiting embodiment, the threshold circuit 320 provides a threshold current for achieving a specific VGA gain. The control voltage (V agc ) is set by an AGC loop such that the rectifier's current output equals the threshold current.
[0052] The DC cancellation feedback amplifier 316 is used to reduce the DC component of the current of the varying input current using negative feedback. The DC cancellation feedback amplifier 316 is connected to the differential outputs 656, 658 from the VGA stage 314.
[0053] Briefly described, the photodiode 311 has a cathode connected to the received signal strength indicator (RSSI) 317 and an anode connected to the input stage 313 of the linear TIA 312. The photodiode 311 is configured to receive an input optical signal and convert the input optical signal into an electrical signal 650 in which the current is proportional to the optical power. The low-noise input stage 313 of the linear TIA 312 is configured to receive the electrical signal 650 from the photodiode 311 and provide the electrical signal 652 to the VGA stage 314 of the linear TIA 312. The input stage 313 is connected to the feedback from the DC cancellation feedback amplifier 316. That is, the feedback signal 670 from the feedback amplifier is connected to the input stage 313 to process the DC offset at the output of the VGA stage 314.
[0054] The VGA stage 314 is coupled to the output buffer 315 of the linear TIA 312, and the gain amplifier 314 provides differential outputs 656, 658 to the output buffer 315. In turn, the output buffer 315 provides the differential output voltage 680 of the receiver 310. However, the differential output voltage 680 of the output buffer 315 can be squelched and unsquelched in response to a control signal 672 (e.g., a squelch signal or an unsquelch signal) received by the output buffer 315 from the circuit described below.
[0055] To squelch the differential output voltage 680 of the output buffer 315 in response to a signal break, the linear TIA 312 uses the LOS status 600. To unsquelch the differential output voltage 680 of the output buffer 315 in response to a signal resume, the TIA 312 uses the LOS status 600 and the slope processing circuit 329.
[0056] On the cathode side of the photodiode 311, a received signal strength indicator (RSSI) 317 indicates the received signal strength and is configured to provide a loss of signal (LOS) status signal 600 indicating a signal break in response to the input optical signal being lost via the output terminal of the RSSI 317. That is, in response to the input optical signal being lost, a signal break (LOS) is asserted. In response thereto, the output stage 315 is switched off in the manner discussed below.
[0057] When the input optical signal resumes, the LOS is de-asserted. That is, a LOS status signal 600 indicating that the optical signal is not lost (i.e., non-LOS or the LOS is de-asserted) is generated or provided. In response thereto, the linear TIA 312 adapts or re-adapts to such changes using an automatic gain control (AGC) loop 331 and a DC cancellation loop 333. The AGC loop 331 is configured to rectify the output of the VGA stage 314 and compare the rectified output with a threshold gain setting to generate an automatic gain control voltage signal 675. The linear TIA 312 requires a certain settling time to adapt or re-adapt. During the settling time, the output data from the linear TIA 312 is invalid.
[0058] To facilitate resumption and sending valid data from the output buffer 315, the circuit of the optical receiver 310 (FIG. 3) includes a slope processing circuit 329. Shown schematically here and discussed in more detail below, the slope processing circuit 329 includes a slope detection circuit 330 and digital logic circuitry 350. The slope processing circuit 329 receives the LOS status signal 600 from the RSSI 317 and the automatic gain control voltage signal (V agc ) 675 from the automatic gain control loop. The slope detection circuit 330 may be configured to receive and monitor the automatic gain control voltage signal (V agc ) 675 from the automatic gain control loop 331.
[0059] In response to the LOS status signal 600 indicating a loss of signal (LOS), the slope processing circuit 329 skews the differential output voltage 680 by providing or sending a skew signal 672 to the output buffer 315. For example, the skew signal 672 is used to disable the output buffer 315. When the LOS status signal 600 indicates that the optical signal has not been lost, the control signal 672 from the slope processing circuit 329 to the output buffer 315 is determined according to whether a slope is detected in the automatic gain control voltage signal (V agc )675 from the automatic gain control loop 331, as discussed in more detail below.
[0060] The slope detection circuit 330 is configured to monitor the settling of the linear TIA 312 after the resumption of the input optical signal indicated by the LOS status signal 600. In some examples, after the linear TIA 312 has settled, the slope processing circuit 329 switches the output buffer 315 of the linear TIA "on" by sending an unskew signal 672 (e.g., a skew deassert signal) to the output buffer 315. That is, in response to the linear TIA 312 settling after a loss of signal, the slope processing circuit 329 turns the output buffer 315 of the linear TIA "on" by sending an unskew signal 672 (e.g., a skew deassert signal) from the slope processing circuit 329 to the output buffer 315. In a particular example, the slope processing circuit 329 turns the output buffer 315 of the TIA "off" (e.g., skews it) by sending the skew signal 672 to the output buffer 315. As shown only schematically here, the signal 672 is shown as enabling and disabling the output buffer 315 by operating a switch for a current source 335 to the output buffer 315 (see FIG. 4).
[0061] When the automatic gain control loop 331 has an automatic gain control voltage signal (V agc)In response to being in the calibration mode having a slope at 675, the output from the slope detection circuit 330 is asserted, for example, to a high voltage level. In response to the automatic gain control loop 331 having been calibrated, for example, the calibration of the automatic gain control loop 331 being completed, the output from the slope detection circuit 330 is de-asserted, for example, to a low voltage level. Thus, by using the output of the slope detection circuit 330 to keep the output of the linear TIA 312 skewed by the skewing signal 672 until the calibration of the automatic gain control loop 331 of the linear TIA is completed, invalid data in the differential output voltage 680 of the output buffer 315 can be prevented. By accurately determining the moment of calibration of the automatic gain control loop 331 of the linear TIA in this way using the slope detection circuit 330, invalid data can be prevented from being sent from the optical receiver 310. Further details of this slope detection circuit 330 are discussed below with reference to FIG. 4.
[0062] Having understood the circuitry of the receiver 310 having the slope processing circuit 329 (slope detection circuit 330 and digital logic circuit 350) used with the linear TIA 312, the discussion moves on to further details of the slope detection circuit 330. Referring to FIG. 4, further details of an example of the slope detection circuit 330 and an example of the digital logic circuit 350 for the slope processing circuit 329 are shown. In this configuration, the slope detection circuit 330 and the digital logic circuit 350 are configured to output a skewing / unskewing signal 672.
[0063] The slope detection circuit 330 has an input terminal for receiving the automatic gain control voltage signal (V agc )675 and an output terminal for outputting the slope status signal 671. The slope detection circuit 330 is configured to receive and monitor the automatic gain control voltage signal (V agc )675 from the automatic gain control loop (331; FIG. 3). Processing that signal 675, the slope detection circuit 330 is configured to determine or detect whether a slope exists in the received automatic gain control voltage signal (V agc )675. The received automatic gain control voltage signal (Vagc ) The slope at 675 indicates that the signal is changing over time and has not yet settled.
[0064] The digital logic circuit 350 has a first input terminal for receiving the LOS status signal 600 and a second input terminal for receiving the slope status signal 671 from the slope detection circuit 330. The digital logic circuit 350, which can include any suitable digital logic, provides a scratch signal 672. In response to receiving the LOS status signal 600 indicating a loss of signal (LOS), the digital logic circuit 350 is configured to send the scratch signal 672 to the output buffer 315. In response to receiving the scratch signal 672, the output of the output buffer 315 is scratched as described above.
[0065] The slope detection circuit 330 automatically controls the gain voltage signal (V agc ) In response to detecting a slope at 675, the slope detection circuit 330 provides or outputs a first slope status signal 671 (e.g., an assert signal having a predetermined voltage level) indicating that a slope has been detected at 675 in the automatic gain control voltage signal (V agc ) In response to not detecting a slope at 675 in the automatic gain control voltage signal (V agc ) The slope detection circuit 330 provides or outputs a second slope status signal 671 (e.g., a de-assert signal having a different predetermined voltage level) indicating that no slope has been detected at 675 in the automatic gain control voltage signal (V agc )
[0066] Accordingly, the output of the slope detection circuit 330 is coupled to the digital logic circuit 350 configured to receive the slope status signal 671, and the slope status signal 671 can indicate whether a slope has been detected or not detected at 675 in the automatic gain control voltage signal (V agc ) agc ) 675.
[0067] In some examples, the first input terminal of the digital logic circuit 350 receives a LOS status signal 600 indicating that the optical signal is no longer lost (i.e., resumed after being lost), and the digital logic circuit 350, in response to receiving a first slope status signal 671 indicating that a slope has been detected in the automatic gain control voltage signal (V agc ) 675, still sends the skelet signal 672 to the output buffer 315, and the output buffer 315 keeps the differential output voltage 680 skeleted.
[0068] In other examples, the first input terminal of the digital logic circuit 350 receives a LOS status signal 600 indicating that the optical signal is no longer lost (i.e., resumed after being lost), and the digital logic circuit 350, in response to receiving a second slope status signal 671 indicating that no slope has been detected in the automatic gain control voltage signal (V agc ) 675, sends an unskelet (skelet deassert) signal 672 to the output buffer 315. Accordingly, the differential output voltage 680 of the output buffer 315 is unskeleted.
[0069] Looking at the slope detection circuit 330 in more detail, the slope detection circuit 330 is configured to receive the automatic gain control voltage signal (V agc ) 675 as an input. The operational amplifier 337 amplifies the automatic gain control voltage signal (V agc ) 675 to generate an output voltage. For example, due to the arrangement of resistors and capacitors, a time delay occurs in the voltage at the first input terminal of the operational amplifier 337 compared to the second input terminal of the operational amplifier 337. Accordingly, if there is a slope in the automatic gain control voltage signal (V agc ) 675, the voltage difference between the input terminals of the operational amplifier 337 represents or may correspond to the difference in voltage at different points in time due to the slope of the automatic gain control voltage signal (V agc ) 675.
[0070] The output terminal of the operational amplifier 337 is coupled to the base of the transistor 339. The emitter of the transistor 339 is coupled to the first comparator 341 and the second comparator 342 of the window comparator 343. The outputs of the first comparator 341 and the second comparator 342 are connected to an OR gate 345, from which the slope status signal 671 is available. The first comparator 341 receives the automatic gain control voltage signal (V agc ) 675 at its inverting terminal and receives a signal from the emitter of the transistor 339 at its non-inverting terminal. The output terminal of the first comparator 341 is configured to output a high voltage level in response to (a) the non-inverting terminal of the first comparator 341 having a voltage higher than the inverting terminal of the first comparator 341, and (b) to output a low voltage level in response to the voltage of the non-inverting terminal being less than or equal to the voltage of the inverting terminal of the first comparator 341.
[0071] In relation thereto, the second comparator 342 receives the automatic gain control voltage signal (V agc ) 675 at its non-inverting terminal and receives a signal from the emitter of the transistor 339 at its inverting terminal. The output terminal of the second comparator 342 is configured to output a high voltage level in response to (a) the inverting terminal of the second comparator 342 having a voltage lower than the non-inverting terminal of the second comparator 342, and (b) to output a low voltage level in response to the voltage of the inverting terminal being greater than or equal to the voltage of the non-inverting terminal of the second comparator 342.
[0072] Using the outputs from comparators 341, 342, OR gate 345 is configured to output a high voltage level in response to either the first comparator 341 or the second comparator 342 having a high voltage level, and OR gate 345 is configured to output a low voltage level in response to both comparators 341, 342 providing a low voltage level. The OR gate can output a high voltage level in response to both of its inputs receiving a high voltage level, but comparators 341, 342 in FIG. 4 do not both output a high voltage level simultaneously. That is, when comparator 341 outputs a high voltage level, comparator 342 can only output a low voltage level, and when comparator 341 outputs a high voltage level, comparator 342 can only output a low voltage level.
[0073] The first comparator 341 detects a positive slope with respect to a change in the automatic gain control voltage signal (V agc ) 675, and the second comparator 342 detects a negative slope with respect to a change in the automatic gain control voltage signal (V agc ) 675. In a specific example, in response to a positive slope in the automatic gain control voltage signal (V agc ) 675 received at the input terminal of the slope detection circuit 330, the output of the first comparator 341 becomes a high voltage level, and the output of the OR gate 345 becomes a high voltage level as the first slope status signal 671 indicating that a slope has been detected. Thus, the slope detection circuit 330 can detect a positive slope in the automatic gain control voltage signal (V agc ) 675 and output a high voltage level first slope status signal 671 for indicating that a slope has been detected.
[0074] In another example, the automatic gain control voltage signal (V agc)In response to the negative slope at 675, the output of the second comparator 342 goes to a high voltage level, and the output of the OR gate 345 goes to a high voltage level as a first slope status signal 671 indicating that a slope has been detected. Thus, the slope detection circuit 330 can detect a negative slope in the change of the automatic gain control voltage signal (V agc )675 and output a first slope status signal 671 at a high voltage level to indicate that a slope has been detected.
[0075] In other examples, in response to there being no slope in the automatic gain control voltage signal (V agc )675 received at the input of the slope detection circuit 330, the output of the first comparator 341 goes to a low voltage level and the output of the second comparator 342 goes to a low voltage level. For this reason, the output of the OR gate 345 goes to a low voltage level as a second slope status signal 671 indicating that no slope has been detected. Thus, the slope detection circuit 330 can determine that there is no slope in the automatic gain control voltage signal (V agc )675 and output a second slope status signal 671 at a low voltage level to indicate that there is no slope in the automatic gain control voltage signal (V agc )675.
[0076] As discussed above with reference to FIG. 3, the slope detection circuit 330 and the digital logic circuit 350 can be coupled to the linear TIA 312. In other examples, the slope detection circuit 330 and the digital logic circuit 350 can be integrated into the linear TIA 312 or considered part of the linear TIA 312. For example, the integrated circuit of the linear TIA 312 can include the components of the slope detection circuit 330 and the digital logic circuit 350.
[0077] To further illustrate the teachings of the present disclosure, schematic examples of measurements of the undershoot of the output of a linear TIA in response to an input optical step are shown in FIGS. 5 and 6. FIG. 5 graphs the output of an undershoot operation using a fixed delay according to the prior art, and FIG. 6 graphs the output of an undershoot operation using the slope detection circuit of the present disclosure.
[0078] Referring to FIG. 5, curve 501 shows the TIA input voltage at different times. The TIA input voltage 501 can be measured and is equivalent to the electrical signal 650 from the photodiode 311. Curve 502 shows the automatic gain control voltage signal (V agc ) 675 at different times. The tuning of the automatic gain control loop 331 of the linear TIA can be interpreted from the slope in curve 502. Curve 503 shows the LOS status at different times. The LOS status of curve 503 switches from the LOS assert status to the LOS deassert status at time T53.
[0079] Curve 504 shows the conventional skelch signal 672 sent to the output buffer 315 that deasserts at time T53 with a fixed delay after the LOS assert status, and curve 505 shows the output of the linear TIA 312 from the output buffer 315. Curves 504 and 505 in FIG. 5 show turning on the output of the linear TIA at time T53 using the fixed delay D51 from time T51 when the LOS status curve 503 switches from the LOS assert status to the LOS deassert status. The tuning of the automatic gain control loop 331 of the linear TIA is the automatic gain control voltage signal (V agc) It can be interpreted from the setting of 675. Between time points T51 and T52, as indicated by the slope between T51 and T52 on curve 502, the linear TIA (e.g., the automatic gain control loop of the linear TIA) readapts. From time point T52, the automatic gain control loop of the linear TIA is being set. That is, from time point T52, the linear TIA enters an effective operating state. However, in FIG. 5, the output of the linear TIA shown by curve 505 remains sketched between time points T52 and T53 even after the automatic gain control loop of the linear TIA has been set as can be interpreted based on curve 502. Thus, this fixed delay D51 results in undesirable operation because the linear TIA does not resume data output after it has already generated valid data. Although not shown in the figure, in the case of fixed delay D51, similarly, the linear TIA may resume data output prematurely before the automatic gain control loop of the linear TIA is set, resulting in the linear TIA outputting invalid data.
[0080] In contrast, in FIG. 6, the output of the TIA is turned "on" using the dynamic time span (between T61 and T62) determined by the slope detection circuit according to the present disclosure. Referring to FIG. 6, curve 601 shows the TIA input voltage at different time points. The TIA input voltage 601 can be measured and is equivalent to the electrical signal 650 from the photodiode 311. Curve 602 shows the automatic gain control voltage signal (V agc ) 675. The setting of the automatic gain control loop 331 of the linear TIA can be interpreted from the slope on curve 602. Curve 604 shows the LOS status at different time points. The LOS status of curve 603 switches from the LOS assert status to the LOS deassert status at time point T61.
[0081] Curve 604 shows the skew signal 672 from the slope processing circuit 329 to the output buffer 315, and curve 605 shows the output of the linear TIA 312 from the output buffer 315. Curve 606 shows the slope status signal 671 over time. In response to the slope being detected in the automatic gain control voltage signal (V agc ) 675 by the slope detection circuit 330, the slope detection circuit 330 provides or outputs, at time T61, a first slope status signal 671 (e.g., an assert signal having a predetermined voltage level) indicating that the slope in the automatic gain control voltage signal (V agc ) 675 has been detected. In response to the slope not being detected in the automatic gain control voltage signal (V agc ) 675 by the slope detection circuit 330, the slope detection circuit 330 provides or outputs, at time T62, a second slope status signal 671 (e.g., a de-assert signal having a different predetermined voltage level) indicating that the slope in the automatic gain control voltage signal (V agc ) 675 has not been detected.
[0082] Curves 604 and 605 in FIG. 6 show turning on the output of the linear TIA at time T62 using the dynamic delay determined by a slope detection circuit such as circuit 330 in FIG. 3. The tuning of the automatic gain control loop 331 of the linear TIA is based on the automatic gain control voltage signal (V agc) It can be interpreted from the setting of 675. Between time points T61 and T62, as indicated by the slope between T61 and T62 on curve 602, the linear TIA (for example, the automatic gain control loop of the linear TIA) readapts. From time point T62, the automatic gain control loop of the linear TIA is being set. That is, from time point T62, the linear TIA enters or switches to an effective or normal operating mode. In response to the linear TIA entering the normal operating mode, the output of the TIA shown in curve 605 quickly switches "on" by using the slope detection circuit. Accordingly, as soon as the linear TIA completes its adaptation to the resumption of the input optical signal and enters the normal operating mode (time point T62), the output of the linear TIA is turned "on" (time point T62).
[0083] Based on what is considered to be the presently most practical and preferred embodiment, the subject matter of the present disclosure has been described in detail for purposes of illustration. However, such details are for illustrative purposes only, and the subject matter of the present disclosure is not limited to the disclosed embodiments. On the contrary, it is intended to cover modifications and equivalent configurations that fall within the spirit and scope of the appended claims. For example, it should be understood that the subject matter of the present disclosure assumes that, to the extent possible, one or more features of any embodiment can be combined with one or more features of any other embodiment.
Description of Reference Numerals
[0084] 100 Laser transmitter 102 Optical fiber 104 Receiver 110 Photodetector 120 Linear transimpedance amplifier, TIA, linear TIA 130 Optical signal 132 Input cut-off 140 TIA output data 142 Skeleton 200 Data 202 Time point 204 Time point 310 Optical receiver 311 Photodiode 312 Linear TIA 313 Low-noise input stage 314 Variable gain amplifier (VGA) stage 315 Output buffer 316 DC cancellation feedback amplifier 317 Received signal strength indicator (RSSI) 318 Rectifier 320 Threshold circuit 329 Slope processing circuit 330 Slope detection circuit, slope detector 331 Automatic gain control loop, AGC loop 333 DC cancellation loop 335 Current source 337 Operational amplifier 339 Transistor 341 First comparator 342 Second comparator 343 Window comparator 345 OR gate 350 Digital logic circuit 600 LOS status signal 650 Electrical signal 652 Electrical signal 656 Differential output 658 Differential output 670 Feedback signal 671 Slope status signal 672 Control signal, squelch signal, unsquelch signal 675 Automatic gain control voltage signal 680 Differential output voltage D11 Invalid data P21 Period P22 Period
Claims
Claim 1 An optical device for an optical signal, comprising: a photodiode configured to receive the optical signal; a linear transimpedance amplifier (TIA) having an input stage, an output stage, and at least one variable gain amplifier (VGA) provided between the input stage and the output stage, wherein the input stage is coupled to the photodiode, the output stage is coupled to the input stage, and the output of the linear transimpedance amplifier output is controllable to be enabled and disabled; the linear transimpedance amplifier; an automatic gain control loop configured to rectify the output of the at least one VGA and compare the rectified output with a threshold gain setting to generate an automatic gain control voltage; a detection circuit configured to detect a rate of change of the automatic gain control voltage and configured to determine a first state indicating non-detection of the optical signal in the photodiode; and an optical device, wherein at least in response to the determined first state, the detection circuit is configured to disable the output stage of the linear transimpedance amplifier. Claim 2 The detection circuit is configured to determine a second state indicating detection of the optical signal in the photodiode, and at least in response to the second state determined after the first state and the detected rate of change, the detection circuit is configured to disable the output stage of the linear TIA. The optical device according to claim 1. Claim 3 The detection circuit according to claim 2, further comprising a received signal strength indicator coupled to the photodiode and configured to indicate the first and second states of the optical signal in the photodiode. Claim 4 The detection circuit according to claim 2, wherein at least in response to the second state and the detection of the rate of change, the detection circuit is configured to enable the output stage of the linear TIA. The optical device according to claim 2. Claim 5 The detection circuit according to claim 4, further comprising a digital logic circuit configured to process a logical combination of the first state, the second state, the detection of the rate of change, and non-detection of the rate of change, and provide an enable and disable signal to the output stage of the linear TIA based on the processed logical combination. The optical device according to claim 4. Claim 6 The automatic gain control loop comprises a rectifier connected to the output of the at least one VGA, and a threshold circuit configured to generate the threshold gain setting. The optical device according to claim 1.
7. The detection circuit comprises a slope detection circuit configured to detect the rate of change of the automatic gain control voltage. The slope detection circuit an operational amplifier, a first comparator configured to compare the output of the operational amplifier with a positive automatic gain control voltage and provide a first comparison state from the comparison, a second comparator configured to compare the output of the operational amplifier with a negative automatic gain control voltage and provide a second comparison state from the comparison, an OR logic gate configured to receive the first and second comparison states and output a signal indicating the rate of change of the automatic gain control voltage. The optical device according to claim 1.
8. The optical device is at least part of an optical receiver or an optical transceiver. The optical device according to claim 1.
9. a photodiode, a linear transimpedance amplifier (TIA) comprising an input stage, an output stage, and at least one variable gain amplifier (VGA) provided between the input stage and the output stage, the linear TIA being coupled to the photodiode, the linear TIA, an automatic gain control loop configured to rectify the output of the at least one VGA and compare the rectified output with a threshold gain setting to generate an automatic gain control voltage signal, a slope detection circuit configured to receive the automatic gain control voltage signal and monitor the automatic gain control voltage signal from the automatic gain control loop. The slope detection circuit is configured to provide a first slope status signal indicating that the slope has been detected in response to the slope being detected in the automatic gain control voltage signal. The slope detection circuit, a logic circuit coupled to the slope detection circuit and coupled to the output stage of the linear TIA. The logic circuit is configured to skew the output stage of the linear TIA in response to the first slope status signal. The logic circuit. An optical receiver comprising.
10. A receiving signal strength indicator (RSSI) configured to provide a first indication signal for asserting a signal break (LOS) in the photodiode and a second indication signal for de-asserting the LOS in the photodiode, the optical receiver according to claim 9.
11. The optical receiver according to claim 10, wherein the logic circuit is configured to output a squelch signal from the logic circuit to the output stage of the linear TIA in response to the first indication signal for asserting a signal break (LOS).
12. The optical receiver according to claim 11, wherein the logic circuit is configured to output a squelch signal from the logic circuit to the output stage of the linear TIA in response to the second indication signal for de-asserting a signal break (LOS) and the first slope status signal indicating that the slope has been detected.
13. The optical receiver according to claim 11, wherein the slope detection circuit is further configured to provide a second slope status signal indicating that the slope has not been detected to the logic circuit in response to the slope in the automatic gain control voltage signal not being detected.
14. The optical receiver according to claim 13, wherein the logic circuit is configured to output a squelch de-assert signal from the logic circuit to the output stage of the linear TIA in response to the second indication signal for de-asserting a signal break (LOS) and the second slope status signal indicating that the slope has not been detected, and the output stage of the linear TIA is activated in response to receiving the squelch de-assert signal.
15. The optical receiver according to claim 9, wherein the automatic gain control loop includes a rectifier connected to the output of the at least one VGA and a threshold circuit configured to generate the threshold gain setting.
16. The slope detection circuit includes an operational amplifier, a first comparator configured to compare the output of the operational amplifier with a positive automatic gain control voltage and provide a first comparison state from the comparison, a second comparator configured to compare the output of the operational amplifier with a negative automatic gain control voltage and provide a second comparison state from the comparison. An OR logic gate configured to receive the first and second comparison states and output a signal indicating the slope of the automatic gain control voltage, and the optical receiver according to claim 9.
17. A method for controlling the output of a linear transimpedance amplifier (TIA), comprising: responding to a first indication signal asserting a signal break (LOS) by sending a skelet signal to an output buffer of the linear TIA to skelet the output voltage of the linear TIA; rectifying the output of at least one variable gain amplifier (VGA) of the linear TIA, comparing the rectified output with a threshold gain setting, and generating an automatic gain control voltage signal; monitoring the automatic gain control voltage signal to determine whether a slope is detected in the automatic gain control voltage; responding to the detection of a slope in the automatic gain control voltage signal by sending a first slope status signal indicating that the slope has been detected; responding to a second indication signal deasserting LOS and the first slope status signal by sending a skelet signal to the output buffer of the linear TIA to continue skeleting the output voltage of the linear TIA.
18. responding to the non-detection of a slope in the automatic gain control voltage signal by sending a second slope status signal indicating that the slope has not been detected; further comprising, in response to the second indication signal deasserting LOS and the second slope status signal, sending an unskelet signal to the output buffer of the linear TIA to unskelet the output voltage of the linear TIA, the method according to claim 17.
19. The first indication signal asserting LOS and the second indication signal deasserting LOS are provided by a received signal strength indicator (RSSI) in a photodiode of an optical receiver, the method according to claim 17.
20. The automatic gain control voltage signal is monitored by a slope detection circuit to determine whether a slope is detected in the automatic gain control voltage, the method according to claim 17.
Citation Information
Patent Citations
Preamplifier protection circuit
JP1993300097A
Burst light receiving circuit
JP2006254061A
Photo-receiver
JP2007049475A
Control of trans-impedance amplifier (TIA) during settling after recovering from loss of signal in receiver
US11381318B1
Optical dispersion correction in transimpedance amplifiers
US7305190B2