Method for manufacturing a micro light emitting diode device
The micro-LED device addresses efficiency and transfer challenges by using sidewall current limiting regions and ion implantation technology, enhancing luminous efficiency and stability for commercialization.
Patent Information
- Application Number
- JP2023200399
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2019-03-27
- Filing Date
- 2023-11-28
- Publication Date
- 2025-07-18
- Estimated Expiration
- 2039-05-27
AI Technical Summary
Micro-LED displays face challenges in reducing non-radiative recombination, achieving efficient mass transfer, and ensuring rapid inspection and maintenance, which hinder their commercialization.
The micro-LED device incorporates a sidewall current limiting region with a perimeter of 400 μm or less, along with additional current limiting and blocking regions, formed by ion implantation technology, to enhance luminous efficiency and stability.
The solution reduces sidewall leakage current, improves current distribution uniformity, and increases the light emission efficiency of micro-LEDs, facilitating their commercialization.
Smart Images

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Abstract
Description
Technical Field
[0001] The present disclosure relates to a micro light-emitting diode (micro-LED) device, and more particularly to a micro-LED device with improved luminous efficiency and production yield, a display panel and a flexible display including the micro-LED device, or a manufacturing method thereof.
Background Art
[0002] Compared with conventional display technologies such as liquid crystal displays (LCDs) and organic light-emitting diodes (OLEDs), micro-LED displays have advantages such as high contrast ratio, fast response speed, wide color gamut, low power consumption, and long lifespan. However, in order to achieve mass commercialization, several technical issues still remain, such as (1) epitaxial chips and manufacturing processes, (2) mass transfer, and (3) inspection and maintenance.
[0003] (1) Epitaxial chips and manufacturing processes: As the chip size of the LED is reduced, the external quantum efficiency (EQE) decreases. The reason is that defects on the sidewalls or surfaces of the LED and non-radiative recombination due to energy states occur, reducing the efficiency of the micro-LED. Therefore, how to reduce non-radiative recombination and increase luminous efficiency is an important point.
[0004] (2) Mass transfer: Transferring a large number of micro-LEDs to a display substrate or circuit through high-precision equipment is called mass transfer technology. Examples include electrostatic transfer technology, microtransfer printing technology, fluid assembly technology, and optical transfer technology. The main problem currently faced by the above technologies is to achieve mass transfer within a reasonable range of time and cost.
[0005] (3) Inspection and maintenance: Performing inspection and maintenance quickly and accurately is also a bottleneck faced by micro-LED technology at the present stage.
Summary of the Invention
Problems to be Solved by the Invention
[0006] To solve the above technical problems, the present invention provides a diode device, a display panel, and a flexible display.
Means for Solving the Problems
[0007] To achieve the above object, an embodiment of the present invention provides a diode device.
[0008] The diode device of the present invention includes a first-type semiconductor layer 101, a second-type semiconductor layer 102, a light-emitting layer 103 located between the first-type semiconductor layer 101 and the second-type semiconductor layer 102, and a sidewall current limiting region 201 in contact with the peripheral sidewall region of the second-type semiconductor layer 102, and the peripheral length of the sidewall current limiting region 201 is 400 μm or less.
[0009] Optionally, for the diode device, the sidewall current limiting region 201 further includes a first upper surface 201-up, the second-type semiconductor layer 102 further includes a second upper surface 102-up, and the second upper surface 102-up and the first upper surface 201-up are in the same plane.
[0010] Optionally, the diode device further includes a transparent electrode 301, the transparent electrode 301 is located on the second-type semiconductor layer 102, is electrically connected to the second-type semiconductor layer 102, and the transparent electrode 301 partially covers the sidewall current limiting region 201.
[0011] Optionally, the diode device further includes an electrode 302, the electrode 302 is located on the second-type semiconductor layer 102, is electrically connected to the transparent electrode 301, and the electrode 302 is in contact with the second-type semiconductor layer 102.
[0012] Optionally, with respect to the diode device, the sidewall current limiting region 201 further includes a first upper surface 201-up, the second-type semiconductor layer 102 further includes a second upper surface 102-up, and the first upper surface 201-up has an upper surface low conductivity region i L-up and the second upper surface 102-up has an upper surface high conductivity region i H-up and the conductivity distribution gradually increases from the upper surface low conductivity region i L-up towards the upper surface high conductivity region i H-up .
[0013] Optionally, with respect to the diode device, the sidewall current limiting region 201 further includes a first outer surface 201-out, the second-type semiconductor layer 102 further includes a second outer surface 102-out, the first outer surface 201-out has a sidewall low conductivity region i L-out and the second outer surface 102-out has a sidewall high conductivity region i H-out and the conductivity distribution gradually increases from the sidewall low conductivity region i L-out towards the sidewall high conductivity region i H-out .
[0014] Optionally, with respect to the diode device, the sidewall current limiting region 201 further includes a first upper surface 201-up, the first upper surface 201-up has a first surface roughness RS-201-up, and the first surface roughness RS-201-up is 10 nm or less.
[0015] Optionally, with respect to the diode device, the second-type semiconductor layer 102 further includes a second upper surface 102-up, the second upper surface 102-up has a second surface roughness RS-102-up, and the second surface roughness RS-102-up is 10 nm or less.
[0016] Optionally, with respect to the diode device, the sidewall current limiting region 201 further includes a first upper surface 201-up, the second-type semiconductor layer 102 further includes a second upper surface 102-up, the first upper surface 201-up has a first surface roughness RS-201-up, the second upper surface 102-up has a second surface roughness RS-102-up, and the first surface roughness RS-201-up is equal to or greater than the second surface roughness RS-102-up.
[0017] Optionally, with respect to the diode device, the sidewall current limiting region 201 further includes a first outer surface 201-out, and the roughness of the first outer surface 201-out is greater than 10 nm.
[0018] Optionally, with respect to the diode device, the second-type semiconductor layer 102 further includes a second outer surface 102-out, and the roughness of the second outer surface 102-out is greater than 10 nm.
[0019] Optionally, with respect to the diode device, the sidewall current limiting region 201 further includes a first outer surface 201-out, the second-type semiconductor layer 102 further includes a second outer surface 102-out, the first outer surface 201-out has a third surface roughness RS-201-out, the second outer surface 102-out has a fourth surface roughness RS-102-out, and the third surface roughness RS-201-out is equal to or greater than the fourth surface roughness RS-102-out.
[0020] Optionally, with respect to the diode device, the sidewall current limiting region 201 further includes a first upper surface 201-up, a first outer surface 201-out, and a first inner surface 201-in. The first upper surface 201-up and the first outer surface 201-out form a first included angle Θ1, and the first upper surface 201-up and the first inner surface 201-in form a second included angle Θ2. The first included angle Θ1 and the second included angle Θ2 are close to a right angle (90°).
[0021] Optionally, the diode device further includes a magnetic layer, and the magnetic layer is located under the first-type semiconductor layer 101.
[0022] Optionally, the diode device further includes a second current limiting region 202, and the shortest distance between the sidewall current limiting region 201 and the second current limiting region 202 is 50 μm or less.
[0023] Optionally, the diode device further includes a third current limiting region 203, the third current limiting region 203 is located between the sidewall current limiting region 201 and the second current limiting region 202, and is in contact with the second current limiting region 202. The upper surfaces of the third current limiting region 203 and the sidewall current limiting region 201 are in the same plane.
[0024] Optionally, for the diode device, the sidewall current limiting region 201 has a first depth D1, the second current limiting region 202 has a second depth D2, the third current limiting region 203 has a third depth D3, and the first depth D1 is equal to the second depth D2 and equal to the third depth D3.
[0025] Optionally, for the diode device, the sidewall current limiting region 201, the second current limiting region 202, and the third current limiting region 203 are formed by ion implantation technology.
[0026] Another embodiment of the present invention provides a display panel employing an array composed of the diode devices of the present invention.
[0027] The display panel includes a display substrate, and the display substrate includes an array of micro-LED devices. A part of the micro-LED devices has a sidewall current blocking region 501, and a part of the micro-LED devices has a sidewall current limiting region 201. The maximum width of each micro-LED device is from 1 μm to 100 μm. Each micro-LED device includes a first-type semiconductor layer 101, a second-type semiconductor layer 102, and a light-emitting layer 103 located between the first-type semiconductor layer 101 and the second-type semiconductor layer 102. The display panel further includes a circuit used to switch and drive the array of micro-LED devices, and further includes an array of microcontroller chips. Each microcontroller chip is connected to a scan drive circuit and a data drive circuit.
[0028] Another embodiment of the present invention provides a flexible display employing an array consisting of the diode devices of the present invention.
[0029] The flexible display includes a flexible substrate 1010, and the flexible substrate 1010 includes an array of micro-LED devices. A part of the micro-LED devices has a sidewall current blocking region 501, and a part of the micro-LED devices has a sidewall current limiting region 201. The sidewall current blocking region 501 may be composed of a dielectric material. The sidewall current limiting region 201 may be formed by ion implantation technology. The width of each micro-LED device is from 1 μm to 100 μm. Each micro-LED device includes a first-type semiconductor layer 101, a second-type semiconductor layer 102, and a light-emitting layer 103 located between the first-type semiconductor layer 101 and the second-type semiconductor layer 102. The flexible display further includes a plurality of scan lines 1014 and a plurality of data lines 1015. Each micro-LED device 1011 is connected to the corresponding scan line 1014 and the corresponding data line 1015. The flexible display further includes a drive circuit for driving the array of micro-LED devices, and the drive circuit includes a gate driver 1012 and a source driver 1013.
Advantages of the Invention
[0030] The beneficial effects of the present invention are that the sidewall current limiting region 201 can reduce the sidewall leakage current and improve the light emission efficiency of the micro light emitting diode, the second current limiting region 202 can improve the uniformity of the current distribution and improve the light emission efficiency of the micro light emitting diode, the third current limiting region 203 can improve the uniformity of the current distribution and improve the light emission efficiency of the micro light emitting diode. Since the peripheral length of the sidewall current limiting region 201 is 400 μm or less, it meets the size scale of the micro light emitting diode and has various advantages of the micro light emitting diode. The drawings are used to better understand the present invention, but do not limit the scope of the present invention.
Brief Description of the Drawings
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Embodiments for Carrying Out the Invention
[0032] Exemplary embodiments of the present invention will be described below in conjunction with the drawings, and the various details included in the embodiments are merely examples for better understanding. Therefore, those skilled in the art should understand that various modifications and changes can be made to the embodiments described herein without departing from the scope and spirit of the present invention. Also, for the sake of clarity and conciseness, the description of well-known functions or structures is omitted below.
[0033] A micro light-emitting diode (micro LED) device according to an embodiment of the present invention includes a first-type semiconductor layer 101, a second-type semiconductor layer 102, a light-emitting layer 103 located between the first-type semiconductor layer 101 and the second-type semiconductor layer 102, a first current-limiting region 201 located in the peripheral and sidewall regions of the second-type semiconductor layer 102, and a second current-limiting region 202 surrounded by the first current-limiting region 201. The shortest distance between the first current-limiting region 201 and the second current-limiting region 202 is 50 μm or less, and the perimeter of the first current-limiting region 201 is 400 μm or less.
[0034] Since the upper surface U6 of the second-type semiconductor layer 102, the upper surface U1 of the first current-limiting region 201, and the upper surface U2 of the second current-limiting region 202 are in the same plane, it has the beneficial effects of enhancing the flatness of the surface, improving the stability of the product, and reducing non-radiative recombination, thereby enhancing the efficiency of the micro light-emitting diode.
[0035] The first current-limiting region 201 has a first depth D1, the second current-limiting region 202 has a second depth D2, and the first depth D1 may be equal to, greater than, or less than the second depth D2.
[0036] The micro-LED device may further include a third current limiting region 203. The third current limiting region 203 is located between the first current limiting region 201 and the second current limiting region 202 and is in contact with the second current limiting region 202. Also, since the upper surface U3 of the third current limiting region 203 and the upper surface U1 of the first current limiting region 201 are in the same plane, it helps to enhance the flatness of the surface, improve the stability of the product, and reduce non-radiative recombination, thereby enhancing the efficiency of the micro-light emitting diode.
[0037] The first current limiting region 201 has a first depth D1, the second current limiting region 202 has a second depth D2, the third current limiting region 203 has a third depth D3, and the first depth D1 is equal to the second depth D2 and equal to the third depth D3. Since the depths are the same, it can be completed by the same ion implantation process, simplifying the process.
[0038] Alternatively, the first current limiting region 201 has a first depth D1, the second current limiting region 202 has a second depth D2, the third current limiting region 203 has a third depth D3, and the first depth D1 is greater than the second depth D2 and greater than the third depth D3. By increasing the first depth D1 according to different epitaxial structures, the effect of reducing the sidewall leakage current can be further improved, and the light emitting efficiency of the micro-light emitting diode can be enhanced.
[0039] The micro-LED device may further include a transparent electrode 301. The transparent electrode 301 is located on the second-type semiconductor layer 102, electrically connected to the second-type semiconductor layer 102, and the transparent electrode 301 covers the first current limiting region 201 and the third current limiting region 203. The third current limiting region 203 is formed by ion implantation technology. The ion implantation technology can improve the surface flatness and product stability. The first current limiting region 201 has a first width T1, the second current limiting region 202 has a second width T202, and the third current limiting region 203 has a third width T203. The second width T202 is greater than or equal to the first width T1, and the first width T1 is greater than or equal to the third width T203.
[0040] The micro-LED device may further include a transparent electrode 301. The transparent electrode 301 is located on the second-type semiconductor layer 102, electrically connected to the second-type semiconductor layer 102, and the transparent electrode 301 covers the first current limiting region 201. The transparent electrode 301 has a high light transmittance and can improve the light emission efficiency of the micro light emitting diode.
[0041] The micro-LED device may further include an electrode 302. The electrode 302 is located on the second-type semiconductor layer 102, electrically connected to the transparent electrode 301, and the electrode 302 is in direct contact with the second current limiting region 202. By directly contacting the electrode and the semiconductor, electrode peeling can be prevented and the product stability can be improved. Also, the micro-LED device may further include an electrode extension 303. The electrode extension 303 is located on the transparent electrode 301 and electrically connected to the electrode 302. This helps to improve the uniformity of the current distribution and enhance the light emission efficiency of the micro light emitting diode. Also, the micro-LED device may further include a back electrode 304. The back electrode 304 is located under the first-type semiconductor layer 101 and electrically connected to the first-type semiconductor layer 101. The back electrode 304 may be a multilayer structure including an ohmic contact layer, a diffusion barrier layer, a connection layer, and a mirror layer.
[0042] The first current limiting region 201 and the second current limiting region 202 are formed by ion implantation technology. The ion implantation technology can improve the flatness of the sidewalls and the stability of the product. Also, ion implantation can improve the flatness of the surface and the stability of the product can also be improved.
[0043] The first current limiting region 201 may have a first width T1 of 1 μm or more.
[0044] The second current limiting region 202 may be located in the middle of the second type semiconductor layer 102.
[0045] Regarding the depth of the first current limiting region 201, the following are some optional embodiments.
[0046] The first current limiting region 201 has a first depth D1, and the first depth D1 may be less than or equal to the depth of the second type semiconductor layer.
[0047] Alternatively, the first current limiting region 201 has a first depth D1, the first depth D1 further includes the periphery of the light emitting layer 103 and the first type semiconductor layer 101, and the first depth D1 may be greater than the sum of the depth of the second type semiconductor layer 102 and the depth of the light emitting layer 103.
[0048] Alternatively, the first current limiting region 201 has a first depth D1, the first depth D1 further includes the sidewall regions of the light emitting layer 103 and the first type semiconductor layer 101, and the first depth D1 may be greater than the sum of the depth of the second type semiconductor layer 102 and the depth of the light emitting layer 103.
[0049] Alternatively, the first current limiting region 201 has a first depth D1, the first depth D1 further includes the sidewall regions of the light emitting layer 103 and the first type semiconductor layer 101, and the first depth D1 is equal to the sum of the depth of the second type semiconductor layer 102, the depth of the light emitting layer 103, and the depth of the first type semiconductor layer 101.
[0050] Alternatively, the first current limiting region 201 has a first depth D1, and the first depth D1 further includes sidewall regions of the light emitting layer 103 and the first type semiconductor layer 101. The first current limiting region 201 located in the sidewall region of the first type semiconductor layer 101 has a first lateral width T1A, the first current limiting region 201 located in the sidewall region of the light emitting layer 103 has a second lateral width T1B, and the first current limiting region 201 located in the sidewall region of the second type semiconductor layer 102 has a third lateral width T1C. The first lateral width T1A is larger than the second lateral width T1B and larger than the third lateral width T1C. Alternatively, the third lateral width T1C is larger than the second lateral width T1B and larger than the first lateral width T1A.
[0051] Furthermore, the surface of the first current limiting region 201 may have a first low conductivity region i L-1 The following are several optional embodiments.
[0052] The surface of the first current limiting region 201 has a first low conductivity region i L-1 The surface of the second type semiconductor layer 102 has a high conductivity region i H The conductivity distribution gradually increases from the first low conductivity region i L-1 to the high conductivity region i H
[0053] Alternatively, the surface of the first current limiting region 201 has a first low conductivity region i L-1 The surface of the second current limiting region 202 has a second low conductivity region i L―2 The surface of the second type semiconductor layer 102 has a high conductivity region i H The conductivity distribution gradually increases from both the first low conductivity region i L―1 and the second low conductivity region i L―2 to the high conductivity region i H
[0054] By adopting the above embodiments, the surface leakage current and the sidewall leakage current can be reduced, and the light emitting efficiency of the micro light emitting diode can be improved.
[0055] Regarding the width of the first current limiting region 201, the following are some optional embodiments.
[0056] The first current limiting region 201 has a first width T1, the second current limiting region 202 has a second width T202, and the second width T202 is greater than or equal to the first width T1.
[0057] Alternatively, the first current limiting region 201 has a first width T1, the second current limiting region 202 has a second width T202, there is a width O3 between the first current limiting region 201 and the second current limiting region 202, the second width T202 is greater than or equal to the first width T1, and the width O3 is greater than the second width T202.
[0058] By adopting the above embodiments, the first current limiting region 201 can reduce the sidewall leakage current and improve the light emission efficiency of the micro light emitting diode. The second current limiting region 202 can improve the uniformity of the current distribution and improve the light emission efficiency of the micro light emitting diode. The third current limiting region 203 can improve the uniformity of the current distribution and improve the light emission efficiency of the micro light emitting diode. Since the perimeter of the first current limiting region 201 is 400 μm or less, the micro light emitting diode has various advantages.
[0059] A micro light emitting diode (micro LED) device according to another embodiment of the present invention includes a first type semiconductor layer 101, a second type semiconductor layer 102, a light emitting layer 103 located between the first type semiconductor layer 101 and the second type semiconductor layer 102, a first current limiting region 201 located in the peripheral and sidewall regions of the second type semiconductor layer 102, a second current limiting region 202 surrounded by the first current limiting region 201, and a third current limiting region 203 surrounded by the first current limiting region 201 and in contact with the second current limiting region 202. The shortest distance between the first current limiting region 201 and the second current limiting region 202 is 50 μm or less, and the perimeter of the first current limiting region 201 is 400 μm or less.
[0060] According to the above structure: (1) The first current limiting region 201 can reduce the sidewall leakage current and improve the light emitting efficiency of the micro light emitting diode.
[0061] (2) The second current limiting region 202 can improve the uniformity of the current distribution and improve the light emitting efficiency of the micro light emitting diode.
[0062] (3) The third current limiting region 203 can improve the uniformity of the current distribution and improve the light emitting efficiency of the micro light emitting diode.
[0063] (4) By reducing the perimeter length, the micro light emitting diode has various advantages.
[0064] Since the upper surface U6 of the second type semiconductor layer 102, the upper surface U1 of the first current limiting region 201, the upper surface U2 of the second current limiting region 202, and the upper surface U3 of the third current limiting region 203 are in the same plane, it helps to increase the flatness of the surface, improve the stability of the product, and reduce non-radiative recombination, thereby increasing the efficiency of the micro light emitting diode.
[0065] The first current limiting region 201 has a first depth D1, the second current limiting region 202 has a second depth D2, the third current limiting region 203 has a third depth D3, and the first depth D1 is equal to the second depth D2 and equal to the third depth D3. In this embodiment, since the depths are the same, it can be completed by the same manufacturing process, simplifying the process.
[0066] Alternatively, the first current limiting region 201 has a first depth D1, the second current limiting region 202 has a second depth D2, the third current limiting region 203 has a third depth D3, and the first depth D1 is greater than the second depth D2 and greater than the third depth D3. By increasing the first depth D1 according to different epitaxial structures, the effect of reducing the sidewall leakage current can be further improved, and the light emitting efficiency of the micro light emitting diode can be increased.
[0067] The micro-LED device may further include a transparent electrode 301. The transparent electrode 301 is located on the second-type semiconductor layer 102, electrically connected to the second-type semiconductor layer 102, and the transparent electrode 301 covers the first current limiting region 201 and the third current limiting region 203. The transparent electrode 301 has a high light transmittance and enhances the light emission efficiency of the micro light emitting diode. Further, the micro-LED device may further include an electrode 302. The electrode 302 is located on the second-type semiconductor layer 102, electrically connected to the transparent electrode 301, and the electrode 302 is in direct contact with the second current limiting region 202, thereby preventing electrode peeling and improving the stability of the product. Further, the micro-LED device may further include an electrode extension 303. The electrode extension 303 is located on the transparent electrode 301 and electrically connected to the electrode 302.
[0068] The first current limiting region 201, the second current limiting region 202, and the third current limiting region 203 are formed by ion implantation technology. Ion implantation technology can improve the flatness of the sidewalls and the stability of the product. Also, ion implantation can improve the flatness of the surface and the stability of the product can also be improved.
[0069] The width of the first current limiting region 201 may be 1 μm or more.
[0070] Furthermore, the second current limiting region 202 may be located in the middle of the second-type semiconductor layer 102.
[0071] A micro light-emitting diode (micro-LED) device according to another embodiment of the present invention includes a first-type semiconductor layer 101, a second-type semiconductor layer 102, a light-emitting layer 103 located between the first-type semiconductor layer 101 and the second-type semiconductor layer 102, a first current limiting region 201 located in the peripheral and sidewall regions of the second-type semiconductor layer 102, a second current limiting region 202 surrounded by the first current limiting region 201, and a third current blocking region 503 surrounded by the first current limiting region 201 and in contact with the second current limiting region 202. The shortest distance between the first current limiting region 201 and the second current limiting region 202 is 50 μm or less, and the perimeter of the first current limiting region 201 is 400 μm or less. According to the above structure:
[0072] (1) The first current limiting region 201 can reduce the sidewall leakage current and improve the light emission efficiency of the micro light-emitting diode.
[0073] (2) The second current limiting region 202 can improve the uniformity of the current distribution and improve the light emission efficiency of the micro light-emitting diode.
[0074] (3) The third current blocking region 503 can improve the uniformity of the current distribution and improve the light emission efficiency of the micro light-emitting diode.
[0075] (4) Since the perimeter is smaller than 400 μm, the micro light-emitting diode has various advantages.
[0076] Since the upper surface U6 of the second-type semiconductor layer 102, the upper surface U1 of the first current limiting region 201, and the upper surface U2 of the second current limiting region 202 are in the same plane, the flatness of the surface is improved, the stability of the product is improved, and the efficiency of the micro light-emitting diode is increased by reducing non-radiative recombination.
[0077] The first current limiting region 201 has a first depth D1, the second current limiting region 202 has a second depth D2, and the first depth D1 is equal to the second depth D2. Since the depths are the same, they can be completed in the same manufacturing process, simplifying the process.
[0078] Alternatively, the first current limiting region 201 has a first depth D1, the second current limiting region 202 has a second depth D2, and the first depth D1 is greater than the second depth D2.
[0079] Alternatively, the first current limiting region 201 has a first depth D1, the second current limiting region 202 has a second depth D2, and the first depth D1 is less than the second depth D2.
[0080] By increasing or decreasing the first depth D1 according to different epitaxial structures, the effect of reducing the sidewall leakage current can be further improved, and the light emission efficiency of the micro light emitting diode can be increased.
[0081] The micro LED device may further include a transparent electrode 301. The transparent electrode 301 is located on the second type semiconductor layer 102, is electrically connected to the second type semiconductor layer 102, and the transparent electrode 301 covers the first current limiting region 201 and the third current blocking region 503. The transparent electrode 301 has a high light transmittance and can increase the light emission efficiency of the micro light emitting diode. Further, the micro LED device may further include an electrode 302. The electrode 302 is located on the second type semiconductor layer 102, is electrically connected to the transparent electrode 301, and the electrode 302 is in direct contact with the second current limiting region 202, thereby preventing electrode peeling and improving the stability of the product. Further, the micro LED device may further include an electrode extension 303. The electrode extension 303 is located on the transparent electrode 301 and is electrically connected to the electrode 302.
[0082] The first current limiting region 201 and the second current limiting region 202 are formed by ion implantation technology. The ion implantation technology can improve the flatness of the sidewalls and the stability of the product. Also, ion implantation can improve the flatness of the surface and the stability of the product.
[0083] The third current blocking region 503 may be composed of a dielectric material.
[0084] The width of the first current limiting region 201 may be 1 μm or more.
[0085] The second current limiting region 202 may be located in the middle of the second type semiconductor layer 102.
[0086] A micro light emitting diode (micro LED) device according to another embodiment of the present invention includes a first type semiconductor layer 101, a second type semiconductor layer 102, a light emitting layer 103 located between the first type semiconductor layer 101 and the second type semiconductor layer 102, a first current limiting region 201 located in the peripheral and sidewall regions of the second type semiconductor layer 102, a second current blocking region 502 surrounded by the first current limiting region 201, and a third current blocking region 503 surrounded by the first current limiting region 201 and in contact with the second current blocking region 502. The shortest distance between the first current limiting region 201 and the second current blocking region 502 is 50 μm or less, and the perimeter of the first current limiting region 201 is 400 μm or less.
[0087] Such a structure of the micro LED device has the following beneficial effects.
[0088] (1) The first current limiting region 201 can reduce the sidewall leakage current and improve the light emitting efficiency of the micro light emitting diode.
[0089] (2) The second current blocking region 502 can improve the uniformity of the current distribution and improve the light emitting efficiency of the micro light emitting diode.
[0090] (3) The third current blocking region 503 can improve the uniformity of the current distribution and enhance the light emission efficiency of the micro light emitting diode.
[0091] (4) Since the peripheral length is less than 400 μm, it meets the size scale of the micro light emitting diode and has various advantages of the micro light emitting diode.
[0092] The upper surface U6 of the second-type semiconductor layer 102 and the upper surface U1 of the first current limiting region 201 are in the same plane, which helps to enhance the flatness of the surface, improve the stability of the product, and reduce non-radiative recombination, thereby enhancing the efficiency of the micro light emitting diode.
[0093] The micro LED device may further include a transparent electrode 301. The transparent electrode 301 is located on the second-type semiconductor layer 102 and is electrically connected to the second-type semiconductor layer 102, and the transparent electrode 301 covers the first current limiting region 201, the second current blocking region 502, and the third current blocking region 503. Also, the micro LED device may further include an electrode 302. The electrode 302 is located on the second-type semiconductor layer 102 and is electrically connected to the transparent electrode 301, and the electrode 302 is in direct contact with the second-type semiconductor layer 102, thereby preventing electrode peeling and improving the stability of the product. The transparent electrode 301 has a high light transmittance and enhances the light emission efficiency of the micro light emitting diode. Also, the micro LED device may further include an electrode extension 303. The electrode extension 303 is located on the transparent electrode 301 and is electrically connected to the electrode 302.
[0094] The first current limiting region 201 is formed by ion implantation technology. The ion implantation technology can enhance the flatness of the sidewalls and the stability of the product.
[0095] The second current blocking region 502 and the third current blocking region 503 may be composed of a dielectric material.
[0096] The width of the electrode extension portion 303 may be smaller than the width of the third current blocking region 503.
[0097] The width of the first current limiting region 201 may be 1 μm or more.
[0098] The second current blocking region 502 may have a hollow ring shape and may have a hollow width O2 of 1 μm or more.
[0099] The second current blocking region 502 may be located in the middle of the second-type semiconductor layer 102.
[0100] A micro light-emitting diode (micro LED) device according to another embodiment of the present invention includes a first-type semiconductor layer 101, a second-type semiconductor layer 102, a light-emitting layer 103 located between the first-type semiconductor layer 101 and the second-type semiconductor layer 102, a first current blocking region 501 located in the peripheral and sidewall regions of the second-type semiconductor layer 102, a second current limiting region 202 surrounded by the first current blocking region 501, and a third current blocking region 503 surrounded by the first current blocking region 501 and in contact with the second current limiting region 202. The shortest distance between the first current blocking region 501 and the second current limiting region 202 is 50 μm or less, and the perimeter of the first current blocking region 501 is 400 μm or less.
[0101] According to the structure of the micro LED device, the following are beneficial effects.
[0102] (1) The first current blocking region 501 can reduce the sidewall leakage current and improve the light emission efficiency of the micro light-emitting diode.
[0103] (2) The second current limiting region 202 can improve the uniformity of the current distribution and improve the light emission efficiency of the micro light-emitting diode.
[0104] (3) The third current blocking region 503 can improve the uniformity of current distribution and enhance the light emission efficiency of the micro light emitting diode.
[0105] (4) Since the peripheral length is less than 400 μm, it meets the size scale of the micro light emitting diode and has various advantages of the micro light emitting diode.
[0106] The first current blocking region 501 may cover at least the sidewalls of the first type semiconductor layer 101, the sidewalls of the second type semiconductor layer 102, and the sidewalls of the light emitting layer 103.
[0107] The micro LED device may further include a transparent electrode 301. The transparent electrode 301 is located on the second type semiconductor layer 102, electrically connected to the second type semiconductor layer 102, and the transparent electrode 301 covers the first current blocking region 501, the second current limiting region 202, and the third current blocking region 503. The transparent electrode 301 has a high light transmittance and can enhance the light emission efficiency of the micro light emitting diode. Further, the micro LED device may further include an electrode 302. The electrode 302 is located on the second type semiconductor layer 102, electrically connected to the transparent electrode 301, and the electrode 302 is in direct contact with the second current limiting region 202, thereby preventing electrode peeling and improving the stability of the product. Further, the micro LED device may further include an electrode extension 303. The electrode extension 303 is located on the transparent electrode 301 and electrically connected to the electrode 302.
[0108] The second current limiting region 202 is formed by ion implantation technology. The ion implantation technology can improve the surface flatness and the stability of the product.
[0109] The first current blocking region 501 and the third current blocking region 503 may be composed of a dielectric material.
[0110] The width of the electrode extension portion 303 may be smaller than the width of the third current blocking region 503.
[0111] The width of the first current blocking region 501 may be 1 μm or more.
[0112] The second current limiting region 202 may be located in the middle of the second type semiconductor layer 102.
[0113] A micro light emitting diode (micro LED) device according to another embodiment of the present invention includes a first type semiconductor layer 101, a second type semiconductor layer 102, a light emitting layer 103 located between the first type semiconductor layer 101 and the second type semiconductor layer 102, a first current blocking region 501 located in the peripheral and side wall regions of the second type semiconductor layer 102, a second current limiting region 202 surrounded by the first current blocking region 501, and a third current limiting region 203 surrounded by the first current blocking region 501 and in contact with the second current limiting region 202. The shortest distance between the first current blocking region 501 and the second current limiting region 202 is 50 μm or less, and the perimeter length of the first current blocking region 501 is 400 μm or less.
[0114] According to the structure of the micro LED device, the following are beneficial effects.
[0115] (1) The first current blocking region 501 can reduce the side wall leakage current and improve the light emitting efficiency of the micro light emitting diode.
[0116] (2) The second current limiting region 202 can improve the uniformity of the current distribution and improve the light emitting efficiency of the micro light emitting diode.
[0117] (3) The third current limiting region 203 can improve the uniformity of the current distribution and improve the light emitting efficiency of the micro light emitting diode.
[0118] (4) Since the peripheral length is less than 400 μm, it meets the size scale of the micro light-emitting diode and has various advantages of the micro light-emitting diode.
[0119] The first current blocking region 501 covers at least the sidewalls of the first-type semiconductor layer 101, the sidewalls of the second-type semiconductor layer 102, and the sidewalls of the light-emitting layer 103.
[0120] The micro-LED device may further include a transparent electrode 301. The transparent electrode 301 is located on the second-type semiconductor layer 102 and is electrically connected to the second-type semiconductor layer 102, and the transparent electrode 301 covers the first current blocking region 501 and the third current limiting region 203. Also, the micro-LED device may further include an electrode 302. The electrode 302 is located on the second-type semiconductor layer 102 and is electrically connected to the transparent electrode 301, and the electrode 302 is in direct contact with the second current limiting region 202, thereby preventing electrode peeling and improving the stability of the product. The transparent electrode 301 has a high light transmittance and increases the light emission efficiency of the micro light-emitting diode. Also, the micro-LED device may further include an electrode extension 303. The electrode extension 303 is located on the transparent electrode 301 and is electrically connected to the electrode 302.
[0121] The second current limiting region 202 and the third current limiting region 203 are formed by ion implantation technology. Ion implantation technology can improve the flatness of the sidewalls and the stability of the product. Also, ion implantation can improve the flatness of the surface and can also improve the stability of the product.
[0122] The first current blocking region 501 may be composed of a dielectric material.
[0123] The width of the first current blocking region 501 may be 1 μm or more.
[0124] The second current limiting region 202 may be located in the middle of the second type semiconductor layer 102.
[0125] The second current limiting region 202 has a second depth D2, the third current limiting region 203 has a third depth D3, and the second depth D2 may be equal to the third depth D3.
[0126] The second current limiting region 202 may be located in the middle of the second type semiconductor layer 102.
[0127] The first current blocking region 501 covering the sidewall region has a thickness H1, the first current blocking region 501 covering the upper surface region has a thickness H2, and the thickness H1 may be greater than, less than, or equal to the thickness H2. The first current blocking region 501 may expose the transparent electrode 301, and the transparent electrode 301 is located on the second type semiconductor layer 102 and is electrically connected to the second type semiconductor layer 102.
[0128] A micro light emitting diode (micro LED) device according to another embodiment of the present invention includes a first type semiconductor layer 101, a second type semiconductor layer 102, a light emitting layer 103 located between the first type semiconductor layer 101 and the second type semiconductor layer 102, a first current blocking region 501 located around and on the sidewall region of the second type semiconductor layer 102, a second current blocking region 502 surrounded by the first current blocking region 501, and a third current blocking region 503 surrounded by the first current blocking region 501 and in contact with the second current blocking region 502. The shortest distance between the first current blocking region 501 and the second current blocking region 502 is 50 μm or less, and the perimeter length of the first current blocking region 501 is 400 μm or less.
[0129] According to the above structure, the micro LED device has the following beneficial effects.
[0130] (1) The first current blocking region 501 can reduce the sidewall leakage current and improve the light emitting efficiency of the micro light emitting diode.
[0131] (2) The second current blocking region 502 can improve the uniformity of the current distribution and enhance the light emission efficiency of the micro light emitting diode.
[0132] (3) The third current blocking region 503 can improve the uniformity of the current distribution and enhance the light emission efficiency of the micro light emitting diode.
[0133] (4) Since the peripheral length is less than 400 μm, it meets the size scale of the micro light emitting diode and has various advantages of the micro light emitting diode.
[0134] The first current blocking region 501 may cover at least the sidewalls of the first type semiconductor layer 101, the sidewalls of the second type semiconductor layer 102, and the sidewalls of the light emitting layer 103.
[0135] The micro LED device may further include a transparent electrode 301. The transparent electrode 301 is located on the second type semiconductor layer 102, is electrically connected to the second type semiconductor layer 102, and the transparent electrode 301 covers the first current blocking region 501, the second current blocking region 502, and the third current blocking region 503. Also, the micro LED device may further include an electrode 302. The electrode 302 is located on the second type semiconductor layer 102, is electrically connected to the transparent electrode 301, and the electrode 302 is in direct contact with the second type semiconductor layer 102, thereby preventing electrode peeling and improving the stability of the product. The transparent electrode 301 has a high light transmittance and enhances the light emission efficiency of the micro light emitting diode. Also, the micro LED device may further include an electrode extension 303. The electrode extension 303 is located on the transparent electrode 301 and is electrically connected to the electrode 302. The width of the electrode extension 303 is smaller than the width of the third current blocking region 503.
[0136] The first current blocking region 501, the second current blocking region 502, and the third current blocking region 503 may be made of a dielectric material.
[0137] The width of the first current blocking region 501 may be 1 μm or more.
[0138] The second current blocking region 502 may be in a hollow ring shape and may have a hollow width O2 of 1 μm or more.
[0139] The second current blocking region 502 may be located in the middle of the second-type semiconductor layer 102.
[0140] A micro light-emitting diode (micro LED) device according to another embodiment of the present invention includes a first-type semiconductor layer 101, a second-type semiconductor layer 102, a light-emitting layer 103 located between the first-type semiconductor layer 101 and the second-type semiconductor layer 102, a first current blocking region 501 located in the peripheral and sidewall regions of the second-type semiconductor layer 102, a second current blocking region 502 surrounded by the first current blocking region 501, and a third current limiting region 203 surrounded by the first current blocking region 501 and in contact with the second current blocking region 502. The shortest distance between the first current blocking region 501 and the second current blocking region 502 is 50 μm or less, and the perimeter of the first current blocking region 501 is 400 μm or less.
[0141] Such a structure of the micro LED device has the following beneficial effects.
[0142] (1) The first current blocking region 501 can reduce the sidewall leakage current and improve the light emission efficiency of the micro light-emitting diode.
[0143] (2) The second current blocking region 502 can improve the uniformity of the current distribution and improve the light emission efficiency of the micro light-emitting diode.
[0144] (3) The third current limiting region 203 can improve the uniformity of the current distribution and enhance the light emission efficiency of the micro light emitting diode.
[0145] (4) Since the peripheral length is less than 400 μm, it has various advantages of the micro light emitting diode.
[0146] The first current blocking region 501 covers at least the sidewalls of the first type semiconductor layer 101, the sidewalls of the second type semiconductor layer 102, and the sidewalls of the light emitting layer 103.
[0147] The micro LED device further includes a transparent electrode 301. The transparent electrode 301 is located on the second type semiconductor layer 102 and is electrically connected to the second type semiconductor layer 102. The transparent electrode 301 covers the first current blocking region 501, the second current blocking region 502, and the third current limiting region 203. Also, the micro LED device further includes an electrode 302. The electrode 302 is located on the second type semiconductor layer 102 and is electrically connected to the transparent electrode 301. The electrode 302 is in direct contact with the second type semiconductor layer 102, thereby preventing electrode peeling and improving the stability of the product. The transparent electrode 301 has a high light transmittance and enhances the light emission efficiency of the micro light emitting diode. Also, the micro LED device further includes an electrode extension 303. The electrode extension 303 is located on the transparent electrode 301 and is electrically connected to the electrode 302. The first current blocking region 501, the second current blocking region 502, and the third current blocking region 503 are composed of a dielectric material, for example, silicon oxide (SiO2), silicon nitride (Si3N4), aluminum oxide (Al2O3), yttrium oxide (Y2O3), titanium oxide (TiO2), yttrium oxide (Y2O3), hafnium oxide (HfO2), zirconium oxide (ZrO2), barium zirconate (BaZrO3), barium titanate (BaTiO3), tantalum pentoxide (Ta2O5), silicon (Si).
[0148] The first current blocking region 501 and the third current blocking region 503 are composed of a dielectric material.
[0149] The third current limiting region 203 is formed by ion implantation technology. Ion implantation technology can improve the surface flatness and product stability.
[0150] The width of the first current blocking region 501 is 1 μm or more.
[0151] The second current blocking region 502 is in a hollow ring shape and has a hollow width O2 of 1 μm or more.
[0152] The second current blocking region 502 is located in the middle of the second type semiconductor layer 102.
[0153] A micro light emitting diode (micro LED) device includes a first type semiconductor layer 101, a second type semiconductor layer 102, a light emitting layer 103 located between the first type semiconductor layer 101 and the second type semiconductor layer 102, a first current blocking region 501 located in the periphery and sidewall regions of the second type semiconductor layer 102, and a second current blocking region 502 surrounded by the first current blocking region 501. The shortest distance between the first current blocking region 501 and the second current blocking region 502 is 50 μm or less, and the perimeter of the first current blocking region 501 is 400 μm or less. The beneficial effects are as follows.
[0154] (1) The first current blocking region 501 can reduce the sidewall leakage current and improve the light emitting efficiency of the micro light emitting diode.
[0155] (2) The second current blocking region 502 can improve the uniformity of the current distribution and improve the light emitting efficiency of the micro light emitting diode.
[0156] (3) Since the perimeter is less than 400 μm, it meets the size scale of the micro light emitting diode and has various advantages of the micro light emitting diode.
[0157] The first current blocking region 501 covers at least the sidewalls of the first-type semiconductor layer 101, the sidewalls of the second-type semiconductor layer 102, and the sidewalls of the light-emitting layer 103.
[0158] The micro-LED device may further include a transparent electrode 301. The transparent electrode 301 is located on the second-type semiconductor layer 102, is electrically connected to the second-type semiconductor layer 102, and the transparent electrode 301 covers the first current blocking region 501 and the second current blocking region 502. Also, the micro-LED device may further include an electrode 302. The electrode 302 is located on the second-type semiconductor layer 102, is electrically connected to the transparent electrode 301, and the electrode 302 is in direct contact with the second-type semiconductor layer 102, thereby preventing electrode peeling and improving the stability of the product. The transparent electrode 301 has a high light transmittance and increases the light-emitting efficiency of the micro-light-emitting diode. Also, the micro-LED device may further include an electrode extension 303. The electrode extension 303 is located on the transparent electrode 301 and is electrically connected to the electrode 302. The first current blocking region 501 covering the sidewall region has a first thickness H1, the first current blocking region 501 covering the upper surface region has a second thickness H2, the second current blocking region 502 has a third thickness H3, and the third current blocking region 503 has a fourth thickness H4. The first thickness H1 is greater than or equal to the second thickness H2, and greater than or equal to the third thickness H3, and greater than or equal to the fourth thickness H4. Alternatively, the first current blocking region 501 covering the sidewall region has a first thickness H1, the first current blocking region 501 covering the upper surface region has a second thickness H2, the second current blocking region 502 has a third thickness H3, and the third current blocking region 503 has a fourth thickness H4. The first thickness H1 is less than or equal to the second thickness H2, and less than or equal to the third thickness H3, and less than or equal to the fourth thickness H4.
[0159] The micro-LED device may further include a third current blocking region 503. The third current blocking region 503 is surrounded by the first current blocking region 501 and is in contact with the second current blocking region 502. The third current blocking region 503 can improve the uniformity of current distribution and enhance the light emission efficiency of the micro-light emitting diode. Also, the micro-LED device may further include a transparent electrode 301. The transparent electrode 301 is located on the second-type semiconductor layer 102, is electrically connected to the second-type semiconductor layer 102, and the transparent electrode 301 covers the first current blocking region 501, the second current blocking region 502, and the third current blocking region 503. Also, the micro-LED device may further include an electrode 302. The electrode 302 is located on the second-type semiconductor layer 102, is electrically connected to the transparent electrode 301, and the electrode 302 is in direct contact with the second-type semiconductor layer 102. Note that the micro-LED device may further include an electrode extension 303. The electrode extension 303 is located on the transparent electrode 301 and is electrically connected to the electrode 302. The width of the electrode extension 303 is smaller than the width of the third current blocking region 503.
[0160] The first current blocking region 501, the second current blocking region 502, and the third current blocking region 503 may be made of a dielectric material.
[0161] The width of the first current blocking region 501 may be 1 μm or more.
[0162] The second current blocking region 502 may be in a hollow ring shape and may have a hollow width O2 of 1 μm or more.
[0163] The second current blocking region 502 may be located in the middle of the second-type semiconductor layer 102.
[0164] The first current blocking region 501 covering the sidewall region has a first thickness H1, and the first current blocking region 501 covering the upper surface region has a second thickness H2. The first thickness H1 is greater than or equal to the second thickness H2. Alternatively, the first current blocking region 501 covering the sidewall region has a first thickness H1, and the first current blocking region 501 covering the upper surface region has a second thickness H2. The first thickness H1 is smaller than the second thickness H2.
[0165] The first current blocking region 501 covering the sidewall region has a first thickness H1, the first current blocking region 501 covering the upper surface region has a second thickness H2, and the second current blocking region 502 has a third thickness H3. The first thickness H1 is greater than or equal to the second thickness H2 and greater than or equal to the third thickness H3. Alternatively, the first current blocking region 501 covering the sidewall region has a first thickness H1, the first current blocking region 501 covering the upper surface region has a second thickness H2, and the second current blocking region 502 has a third thickness H3. The first thickness H1 is smaller than the second thickness H2 and smaller than the third thickness H3.
[0166] The first current blocking region 501 exposes the transparent electrode 301. The transparent electrode 301 is located on the second-type semiconductor layer 102 and is electrically connected to the second-type semiconductor layer 102. The second current blocking region 502 exposes the electrode 302. The electrode 302 is located on the second-type semiconductor layer 102, is electrically connected to the transparent electrode 301, and the electrode 302 is in direct contact with the second current limiting region 202. Alternatively, the second current blocking region 502 exposes the electrode 302. The electrode 302 is located on the second-type semiconductor layer 102 and is electrically connected to the second-type semiconductor layer 102.
[0167] The luminous efficiency of the above micro light-emitting diode exceeds 250 lumens per watt (lm / W).
[0168] The ability R9 of the above-mentioned micro light-emitting diode to indicate red in the Color Rendering Index (CRI) is greater than 90.
[0169] The color rendering evaluation number of the above-mentioned micro light-emitting diode is greater than 90.
[0170] The average color rendering evaluation number Ra of the above-mentioned micro light-emitting diode is greater than 90.
[0171] The micro light-emitting diode (micro LED) device of another embodiment of the present invention includes a first-type semiconductor layer 101, a second-type semiconductor layer 102, a light-emitting layer 103 located between the first-type semiconductor layer 101 and the second-type semiconductor layer 102, and a sidewall current limiting region 201 that is in direct contact with the peripheral sidewall regions of the second-type semiconductor layer 102, the light-emitting layer 103, and the first-type semiconductor layer 101. The sidewall current limiting region 201 further includes an upper surface 201-up, a bottom surface 201-down, an outer surface 201-out, and an inner surface 201-in. The upper surface 201-up of the sidewall current limiting region 201 and the upper surface 102-up of the second-type semiconductor layer are in the same plane. The vertical projection of the outermost peripheral length of the sidewall current limiting region 201 is 400 μm or less.
[0172] The beneficial effects of the micro LED device are as follows.
[0173] (1) The sidewall current limiting region 201 can reduce the sidewall leakage current and improve the light emission efficiency of the micro light-emitting diode.
[0174] (2) Since the peripheral length is smaller than 400 μm, it meets the size scale of the micro light-emitting diode and has various advantages of the micro light-emitting diode.
[0175] The bottom surface 201-down of the sidewall current limiting region 201 and the bottom surface 101-down of the first-type semiconductor layer 101 are in the same plane.
[0176] The vertical projection of the upper surface 201-up of the sidewall current limiting region 201 is the upper surface width T-up, the vertical projection of the bottom surface 201-down of the sidewall current limiting region 201 is the bottom surface width T-down, and the upper surface width T-up is greater than the bottom surface width T-down. Alternatively, the vertical projection of the upper surface 201-up of the sidewall current limiting region 201 is the upper surface width T-up, the vertical projection of the bottom surface 201-down of the sidewall current limiting region 201 is the bottom surface width T-down, and the upper surface width T-up is smaller than the bottom surface width T-down.
[0177] The vertical projection of the upper surface 201-up of the sidewall current limiting region 201 may partially overlap with the vertical projection of the bottom surface 201-down of the sidewall current limiting region 201.
[0178] The outer surface 201-out of the sidewall current limiting region 201 has a sidewall length DS, the inner surface 201-in of the sidewall current limiting region 201 has a first depth D1, and the sidewall length DS is equal to the first depth D1. Alternatively, the outer surface 201-out of the sidewall current limiting region 201 has a sidewall length DS, the inner surface 201-in of the sidewall current limiting region 201 has a first depth D1, and the sidewall length DS is greater than the first depth D1.
[0179] The upper surface 201-up of the sidewall current limiting region 201 and the outer surface 201-out of the sidewall current limiting region 201 form a first included angle Θ1, the upper surface 201-up of the sidewall current limiting region 201 and the inner surface 201-in of the sidewall current limiting region 201 form a second included angle Θ2, and the first included angle Θ1 and the second included angle Θ2 are each a right angle (90°) or close to a right angle, an obtuse angle (greater than 90°), or an acute angle (less than 90°).
[0180] The sidewall current limiting region 201 located in the sidewall region of the first-type semiconductor layer 101 has a first lateral width T1A, the sidewall current limiting region 201 located in the sidewall region of the light emitting layer 103 has a second lateral width T1B, and the sidewall current limiting region 201 located in the sidewall region of the second-type semiconductor layer 102 has a third lateral width T1C. Also, the vertical projections of the first lateral width T1A, the second lateral width T1B, and the third lateral width T1C partially overlap. The width of the vertical projection of the first lateral width T1A is larger than the width of the vertical projection of the third lateral width T1C. Alternatively, the width of the vertical projection of the first lateral width T1A is smaller than the width of the vertical projection of the third lateral width T1C. Alternatively, the width of the vertical projection of the first lateral width T1A is equal to the width of the vertical projection of the third lateral width T1C.
[0181] In the above device, by controlling the depth of the sidewall current limiting region 201, the effect of reducing the sidewall leakage current can be further improved, and the light emitting efficiency of the micro light emitting diode can be increased.
[0182] The micro-LED device may further include a second current limiting region 202. The second current limiting region 202 is surrounded by the sidewall current limiting region 201, and the shortest distance between the sidewall current limiting region 201 and the second current limiting region 202 is 50 μm or less. The second current limiting region 202 can improve the uniformity of the current distribution and enhance the light emission efficiency of the micro light-emitting diode. The upper surface 102-up of the second-type semiconductor layer 102, the upper surface 201-up of the sidewall current limiting region 201, and the upper surface 202-up of the second current limiting region 202 are in the same plane. Further, the micro-LED device may further include a third current limiting region 203. The third current limiting region 203 is located between the sidewall current limiting region 201 and the second current limiting region 202 and is in contact with the second current limiting region 202. The upper surface 203-up of the third current limiting region 203 and the upper surface 201-up of the sidewall current limiting region 201 are in the same plane. The second current limiting region 202 has a second depth D2, the third current limiting region 203 has a third depth D3, and the second depth D2 is equal to the third depth D3. The micro-LED device may further include a transparent electrode 301. The transparent electrode 301 is located on the second-type semiconductor layer 102 and is electrically connected to the second-type semiconductor layer 102, and the transparent electrode 301 covers the upper surface 201-up of the sidewall current limiting region 201 and the upper surface 203-up of the third current limiting region 203. Further, the micro-LED device may further include an electrode 302. The electrode 302 is located on the second-type semiconductor layer 102 and is electrically connected to the transparent electrode 301, and the electrode 302 is directly connected to the second current limiting region 202. Further, the micro-LED device may further include an electrode extension 303. The electrode extension 303 is located on the transparent electrode 301 and is electrically connected to the electrode 302. The second current limiting region 202 may be located in the middle of the second-type semiconductor layer 102.
[0183] The micro-LED device may further include a transparent electrode 301. The transparent electrode 301 is located on the second-type semiconductor layer 102, electrically connected to the second-type semiconductor layer 102, and the transparent electrode 301 covers the upper surface 201-up of the sidewall current limiting region 201. Further, the micro-LED device may further include an electrode 302. The electrode 302 is located on the second-type semiconductor layer 102, electrically connected to the transparent electrode 301, and the electrode 302 is directly connected to the second current limiting region 202, thereby preventing electrode peeling and improving the stability of the product. The transparent electrode 301 has a high light transmittance and increases the light emission efficiency of the micro light-emitting diode. Further, the micro-LED device may further include an electrode extension 303. The electrode extension 303 is located on the transparent electrode 301 and electrically connected to the electrode 302.
[0184] The sidewall current limiting region 201, the second current limiting region 202, and the third current limiting region 203 may be formed by ion implantation technology. Ion implantation technology can improve the surface flatness and the stability of the product.
[0185] The sidewall current limiting region 201, the second current limiting region 202, and the third current limiting region 203 may be formed by diffusion technology or thin film deposition.
[0186] The upper surface 201-up of the sidewall current limiting region 201 has a first width T-up of 1 μm or more.
[0187] The light emitting layer 103 includes a single-layer quantum well structure or a multi-layer quantum well structure.
[0188] Alternatively, the light emitting layer 103 includes a single-layer quantum wire structure or a multi-layer quantum wire structure.
[0189] Alternatively, the light emitting layer 103 includes a single-layer quantum dot structure or a multi-layer quantum dot structure.
[0190] The micro-LED device may further include a back electrode 304. The back electrode 304 is located under the first-type semiconductor layer 101 and is electrically connected to the first-type semiconductor layer 101.
[0191] The sidewall current limiting region 201, the second current limiting region 202, or the third current limiting region 203 may be formed by metal organic chemical vapor phase deposition (MOCVD) epitaxial regrowth technology.
[0192] Alternatively, the sidewall current limiting region 201, the second current limiting region 202, or the third current limiting region 203 may be formed by molecular beam epitaxy (MBE) epitaxial regrowth technology.
[0193] Alternatively, the sidewall current limiting region 201, the second current limiting region 202, or the third current limiting region 203 may be formed by atomic layer chemical vapor deposition system (ALD) technology.
[0194] Alternatively, the sidewall current limiting region 201, the second current limiting region 202, or the third current limiting region 203 may be formed by laser surface modification technology.
[0195] The upper surface 201-up of the sidewall current limiting region 201 and the outer surface 201-out of the sidewall current limiting region 201 form a first included angle Θ1, and the upper surface 201-up of the sidewall current limiting region 201 and the inner surface 201-in of the sidewall current limiting region 201 form a second included angle Θ2. The first included angle Θ1 is an acute angle smaller than 90°, and the second included angle Θ2 is an obtuse angle larger than 90°.
[0196] Alternatively, the upper surface 201-up of the sidewall current limiting region 201 and the outer surface 201-out of the sidewall current limiting region 201 form a first included angle Θ1, and the upper surface 201-up of the sidewall current limiting region 201 and the inner surface 201-in of the sidewall current limiting region 201 form a second included angle Θ2. The first included angle Θ1 is an obtuse angle greater than 90°, and the second included angle Θ2 is an acute angle less than 90°.
[0197] The sidewall current limiting region 201, the second current limiting region 202, or the third current limiting region 203 may be formed by selective oxidation technology.
[0198] Alternatively, the sidewall current limiting region 201, the second current limiting region 202, or the third current limiting region 203 may be formed by thermal oxidation technology.
[0199] Alternatively, the sidewall current limiting region 201, the second current limiting region 202, or the third current limiting region 203 may be formed by wet thermal oxidation technology.
[0200] The manufacturing method of a micro light-emitting diode (micro-LED) device according to an embodiment of the present invention includes forming the above micro light-emitting diode on a growth substrate 100. The step of forming the micro light-emitting diode includes forming an electrode electrically connected to the second-type semiconductor layer, bonding the micro light-emitting diode to a test substrate, removing the growth substrate, forming another electrode electrically connected to the first-type semiconductor layer, providing a voltage source to perform electroluminescence (EL) inspection on each micro light-emitting diode, recording the positions of abnormal micro light-emitting diodes, removing the abnormal micro light-emitting diodes by a first selective removal process, leaving the micro light-emitting diodes that passed the inspection, transferring the micro light-emitting diodes that passed the inspection onto a permanent substrate by a first transfer process, leaving the holes of the removed abnormal micro light-emitting diodes on the permanent substrate, and filling the holes on the permanent substrate by a second transfer process.
[0201] By performing master test (mass inspection) before mass transfer to remove abnormal micro light-emitting diodes in advance, the yield of mass transfer can be improved, and additional repair costs after mass transfer can be saved.
[0202] The manufacturing method of the micro-LED device may further include a sacrificial layer 700. As shown in FIG. 9-6, FIG. 10-6, or FIG. 28-6, the micro-light-emitting diode is bonded to the test substrate via the sacrificial layer 700. In the first selective removal process of removing the abnormal micro-light-emitting diode, a laser may be introduced to change the adhesiveness of the sacrificial layer 700, so as to remove the abnormal micro-light-emitting diode from the test substrate. In the first transfer process, a laser may be introduced to change the adhesiveness of the sacrificial layer 700, so as to transfer the micro-light-emitting diode from the test substrate to the permanent substrate. In the second transfer process, a laser may be introduced to change the adhesiveness of the sacrificial layer 700, so as to transfer the micro-light-emitting diode from the test substrate to the permanent substrate. By adopting a laser to change the adhesiveness of the sacrificial layer 700, the speed of mass transfer can be increased, the production cost can be reduced, and the production yield can be improved.
[0203] The micro-light-emitting diodes transferred in the first transfer process and the micro-light-emitting diodes transferred in the second transfer process may be derived from the same growth substrate or different growth substrates.
[0204] The advantages of the above manufacturing method are as follows.
[0205] (1) Since the wavelengths of the same epitaxial chips are approximate, the speed of mass transfer can be increased.
[0206] (2) Waste of chip materials can be reduced, the die utilization rate of the source chips can be increased, and the manufacturing cost can be reduced.
[0207] The manufacturing method of the above micro-LED device may employ a magnetic bonding layer. Through the magnetic bonding layer, the micro light-emitting diode is temporarily bonded to the test substrate. Also, in the first selective removal process of removing the abnormal micro light-emitting diode, the abnormal micro light-emitting diode may be removed from the test substrate by changing the magnetic force of the magnetic bonding layer. In the first transfer process, the micro light-emitting diode may be transferred from the test substrate to the permanent substrate by changing the magnetic force of the magnetic bonding layer. In the second transfer process, the micro light-emitting diode may be transferred from the test substrate to the permanent substrate by changing the magnetic force of the magnetic bonding layer. The magnetic bonding layer can improve the inspection and transfer speed and yield, and reduce the production cost.
[0208] Alternatively, the manufacturing method of the above micro-LED device may employ a vacuum adsorption layer. Through the vacuum adsorption layer, the micro light-emitting diode is bonded to the test substrate. Also, in the first selective removal process of removing the abnormal micro light-emitting diode, the abnormal micro light-emitting diode may be removed from the test substrate by changing the suction force of the vacuum adsorption layer. In the first transfer process, the micro light-emitting diode may be transferred from the test substrate to the permanent substrate by changing the suction force of the vacuum adsorption layer. In the second transfer process, the micro light-emitting diode may be transferred from the test substrate to the permanent substrate by changing the suction force of the vacuum adsorption layer. The vacuum adsorption layer can improve the inspection and transfer speed and yield, and reduce the production cost.
[0209] Alternatively, the method for manufacturing the micro-LED device may employ an electrostatic adsorption layer. The micro-light emitting diode is bonded to the test substrate via the electrostatic adsorption layer. Also, in the first selective removal process of removing the abnormal micro-light emitting diode, the abnormal micro-light emitting diode may be removed from the test substrate by changing the electrostatic force of the electrostatic adsorption layer. In the first transfer process, the micro-light emitting diode may be transferred from the test substrate to the permanent substrate by changing the electrostatic force of the electrostatic adsorption layer. In the second transfer process, the micro-light emitting diode may be transferred from the test substrate to the permanent substrate by changing the electrostatic force of the electrostatic adsorption layer. The electrostatic adsorption layer can improve the inspection and transfer speed and yield, and reduce the production cost.
[0210] Alternatively, the method for manufacturing the micro-LED device may employ an adhesive layer. The micro-light emitting diode is bonded to the test substrate via the adhesive layer. Also, in the first selective removal process of removing the abnormal micro-light emitting diode, the abnormal micro-light emitting diode may be removed from the test substrate by changing the adhesive force of the adhesive layer. In the first transfer process, the micro-light emitting diode may be transferred from the test substrate to the permanent substrate by changing the adhesive force of the adhesive layer. In the second transfer process, the micro-light emitting diode may be transferred from the test substrate to the permanent substrate by changing the adhesive force of the adhesive layer. The adhesive layer can improve the inspection and transfer speed and yield, and reduce the production cost.
[0211] Regarding the method for manufacturing the above micro-LED device, the first selective removal process for removing the abnormal micro-light emitting diodes has a first removal speed, the first transfer process for transferring the micro-light emitting diodes that have passed the inspection onto the permanent substrate has a first transfer speed, the second transfer process for filling the holes on the permanent substrate has a second transfer speed, the first transfer speed is greater than the second transfer speed, and the first removal speed is equal to or greater than the second transfer speed.
[0212] In addition, the following method may be adopted for the method for manufacturing the above micro-LED device. The first transfer process for transferring the micro-light emitting diodes that have passed the inspection onto the permanent substrate has a first transfer speed, the second transfer process for filling the holes on the permanent substrate has a second transfer speed, and the first transfer speed is greater than the second transfer speed. By controlling the transfer speed and the removal speed, the yield of the mass transfer can be improved, and the production cost can be reduced.
[0213] According to the method for manufacturing the micro-LED device, there is a first pitch P1 between the micro-light emitting diodes on the growth substrate 100, there is a second pitch P2 between the micro-light emitting diodes on the permanent substrate 820, and the second pitch P2 is equal to or greater than the first pitch P1.
[0214] By controlling the transfer pitch, the subsequent production cost can be reduced.
[0215] In the method for manufacturing the above micro-LED device, the micro-light emitting diodes include an array structure composed of at least a red light emitting diode, a green light emitting diode, and a blue light emitting diode. In addition, the method for manufacturing the micro-LED device further includes forming a wall structure 850 located between the micro-light emitting diodes and forming a light transmissive gel body F covering the micro-light emitting diodes. The wall structure 850 can improve the contrast of the micro-light emitting diode display.
[0216] The micro light-emitting diode includes an array structure composed of at least an ultraviolet light-emitting diode.
[0217] The method for manufacturing the micro-LED device further includes forming a wall structure 850 located between the micro light-emitting diodes, forming a first fluorescent gel body F1 covering the micro light-emitting diodes, the first fluorescent gel body F1 being excited by the micro light-emitting diodes and emitting red light, forming a second fluorescent gel body F2 covering the micro light-emitting diodes, the second fluorescent gel body F2 being excited by the micro light-emitting diodes and emitting blue light, forming a third fluorescent gel body F3 covering the micro light-emitting diodes, and the third fluorescent gel body F3 being excited by the micro light-emitting diodes and emitting green light.
[0218] The micro light-emitting diode includes an array structure composed of at least a blue light-emitting diode.
[0219] Alternatively, the method for manufacturing the micro-LED device includes forming a wall structure 850 located between the micro light-emitting diodes, forming a light-transmissive gel body F covering the micro light-emitting diodes, the micro light-emitting diodes emitting blue light transmitted through the light-transmissive gel body F, forming a first fluorescent gel body F1 covering the micro light-emitting diodes, the first fluorescent gel body F1 being excited by the micro light-emitting diodes and emitting red light, forming a third fluorescent gel body F3 covering the micro light-emitting diodes, and the third fluorescent gel body F3 being excited by the micro light-emitting diodes and emitting green light.
[0220] The luminous efficiency of the micro light-emitting diode exceeds 250 lumens per watt (lm / W).
[0221] The ability R9 of the micro light-emitting diode to indicate red in the color rendering evaluation number is greater than 90.
[0222] The color rendering evaluation number of the micro light-emitting diode is greater than 90.
[0223] The average color rendering evaluation number Ra of the micro light-emitting diode is greater than 90.
[0224] The permanent substrate 820 is a flexible substrate, and the material of the flexible substrate may include ultra-thin glass, metal foil, fiber-reinforced composite material, plastic film, ceramic substrate, or any combination of two or more of these materials. The flexible substrate can be applied to a flexible display. Preferably, the coefficient of thermal expansion of the metal foil approximates that of the thin glass. At a wavelength of 550 nm, the light transmittance of the plastic film exceeds 90%. The material of the plastic film may include, for example, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES). The fiber-reinforced composite material may include, for example, carbon fibers, silicon carbide fibers, or boron filaments.
[0225] The preferred thickness of the flexible substrate is less than 200 μm, more preferably less than 50 μm, and most preferably from 25 μm to 50 μm.
[0226] The metal foil may include, for example, stainless steel, aluminum, nickel, titanium, zirconium, copper, iron, cobalt, palladium, or any combination of two or more of these materials.
[0227] The surface roughness Ra of the metal foil is less than 10 nm.
[0228] The permanent substrate 820 may be a transparent substrate, and the material of the transparent substrate may be formed of, for example, ordinary glass, hard glass, quartz, ceramic, or plastic.
[0229] The manufacturing method of the micro light-emitting diode (micro LED) device according to another embodiment of the present invention includes forming the micro light-emitting diode on a growth substrate. The step of forming the micro light-emitting diode includes forming an electrode electrically connected to the second-type semiconductor layer, bonding the micro light-emitting diode to a test substrate, removing the growth substrate, forming another electrode electrically connected to the first-type semiconductor layer, providing a voltage source to perform electroluminescence (EL) inspection on each micro light-emitting diode, and recording the positions of abnormal micro light-emitting diodes. Removing the abnormal micro light-emitting diodes by a first selection and removal process, leaving the micro light-emitting diodes that passed the inspection, transferring the micro light-emitting diodes that passed the inspection into a first container by a first transfer process. The first container contains a first solution covering the micro light-emitting diodes, and transferring the micro light-emitting diodes to a receiving substrate by a second transfer process.
[0230] The beneficial effects of the manufacturing method of the micro LED device are as follows.
[0231] (1) By performing electroluminescence (EL) inspection on each micro light-emitting diode before transfer, the repair cost after transfer can be saved.
[0232] (2) Fluid transfer has the advantages of low cost and high transfer speed.
[0233] The second transfer process may transfer the micro light-emitting diodes to the receiving substrate by changing the flow rate of the first solution.
[0234] In the second transfer process, the micro light-emitting diode may be transferred to the receiving substrate by changing the viscosity of the first solution.
[0235] In the second transfer process, the micro light-emitting diode may be transferred to the receiving substrate by changing the capture rate of the receiving substrate. Mass transfer can be achieved by controlling the flow rate of the solution, the viscosity of the solution, and the capture rate of the receiving substrate.
[0236] The method for manufacturing the micro-LED device may further include a sacrificial layer 700. As shown in FIGS. 9-6, 10-6, or 28-6, the micro light-emitting diode is bonded to the test substrate via the sacrificial layer 700. In the first selective removal process of removing the abnormal micro light-emitting diode, a laser may be introduced to change the adhesiveness of the sacrificial layer 700, thereby removing the abnormal micro light-emitting diode from the test substrate. In the first transfer process, a laser may be introduced to change the adhesiveness of the sacrificial layer 700, thereby transferring the micro light-emitting diode from the test substrate into the first container. The sacrificial layer 700 and the laser can improve the speed and yield of inspection and transfer and reduce production costs.
[0237] The micro light-emitting diodes transferred in the first transfer process and the micro light-emitting diodes transferred in the second transfer process are derived from the same growth substrate. Alternatively, the micro light-emitting diodes transferred in the first transfer process and the micro light-emitting diodes transferred in the second transfer process are derived from different growth substrates.
[0238] The advantages of the above manufacturing method are as follows.
[0239] (1) Since the wavelengths of the same epitaxial chips are approximate, the mass transfer speed can be increased.
[0240] (2) It is possible to reduce the waste of chip materials, increase the utilization rate of the dies of the source chips, and reduce the manufacturing cost.
[0241] The manufacturing method of the micro-LED device may employ a magnetic bonding layer. Through the magnetic bonding layer, the micro-light-emitting diode is bonded to the test substrate. Also, in the first selective removal process of removing the abnormal micro-light-emitting diode, the abnormal micro-light-emitting diode may be removed from the test substrate by changing the magnetic force of the magnetic bonding layer. In the first transfer process, the micro-light-emitting diode may be transferred from the test substrate into the first container by changing the magnetic force of the magnetic bonding layer. The magnetic bonding layer can improve the speed and yield of inspection and transfer, and reduce the production cost.
[0242] Alternatively, the manufacturing method of the micro-LED device may employ a vacuum adsorption layer. Through the vacuum adsorption layer, the micro-light-emitting diode is bonded to the test substrate. Also, in the first selective removal process of removing the abnormal micro-light-emitting diode, the abnormal micro-light-emitting diode may be removed from the test substrate by changing the suction force of the vacuum adsorption layer. In the first transfer process, the micro-light-emitting diode may be transferred from the test substrate into the first container by changing the suction force of the vacuum adsorption layer. The vacuum adsorption layer can improve the speed and yield of inspection and transfer, and reduce the production cost.
[0243] Alternatively, the method for manufacturing the micro-LED device may employ an electrostatic adsorption layer. The micro-light-emitting diode is bonded to the test substrate via the electrostatic adsorption layer. Also, in the first selective removal process of removing the abnormal micro-light-emitting diode, the abnormal micro-light-emitting diode may be removed from the test substrate by changing the electrostatic force of the electrostatic adsorption layer. In the first transfer process, the micro-light-emitting diode may be transferred from the test substrate into the first container by changing the electrostatic force of the electrostatic adsorption layer. The electrostatic adsorption layer can improve the inspection and transfer speed and yield, and reduce the production cost.
[0244] Alternatively, the method for manufacturing the micro-LED device may employ an adhesive layer. The micro-light-emitting diode is bonded to the test substrate via the adhesive layer. Also, in the first selective removal process of removing the abnormal micro-light-emitting diode, the abnormal micro-light-emitting diode may be removed from the test substrate by changing the adhesive force of the adhesive layer. In the first transfer process, the micro-light-emitting diode may be transferred from the test substrate into the first container by changing the adhesive force of the adhesive layer. The adhesive layer can improve the inspection and transfer speed and yield, and reduce the production cost.
[0245] According to the method for manufacturing the micro-LED device, the first selective removal process of removing the abnormal micro-light-emitting diode has a first removal speed, the first transfer process of transferring the micro-light-emitting diode that has passed the inspection into the first container has a first transfer speed, the second transfer process of transferring the micro-light-emitting diode to the receiving substrate has a second transfer speed, the first transfer speed is greater than the second transfer speed, and the first removal speed is equal to or greater than the second transfer speed.
[0246] By controlling the transfer speed and removal speed, the yield of mass transfer can be improved, and the production cost can be reduced.
[0247] Alternatively, according to the method for manufacturing the micro-LED device, the first transfer process of transferring the micro light-emitting diodes that have passed the inspection into the first container has a first transfer speed, and the second transfer process of transferring the micro light-emitting diodes onto the receiving substrate has a second transfer speed, and the first transfer speed is greater than the second transfer speed.
[0248] According to the method for manufacturing the micro-LED device, there is a first pitch P1 between the micro light-emitting diodes on the growth substrate 100, and there is a second pitch P2 between the micro light-emitting diodes on the receiving substrate 830, and the second pitch P2 is greater than or equal to the first pitch P1.
[0249] Alternatively, according to the method for manufacturing the micro-LED device, there is a first pitch P1 between the micro light-emitting diodes on the growth substrate 100, and there is a second pitch P2 between the micro light-emitting diodes on the receiving substrate 830, and the second pitch P2 is greater than the first pitch P1. By controlling the transfer pitch, the subsequent production cost can be reduced.
[0250] According to the method for manufacturing the micro-LED device, the micro light-emitting diodes include an array structure composed of at least a red light-emitting diode, a green light-emitting diode, and a blue light-emitting diode. Further, the method for manufacturing the micro-LED device further includes forming a wall structure 850 located between the micro light-emitting diodes and forming a light-transmissive gel body F covering the micro light-emitting diodes. The wall structure 850 can improve the contrast of the micro light-emitting diode display.
[0251] The micro light-emitting diode includes an array structure composed of at least an ultraviolet light-emitting diode. Further, the method for manufacturing the micro LED device includes forming a wall structure 850 located between the micro light-emitting diodes, forming a first fluorescent gel body F1 covering the micro light-emitting diodes, the first fluorescent gel body F1 being excited by the micro light-emitting diodes and emitting red light, forming a second fluorescent gel body F2 covering the micro light-emitting diodes, the second fluorescent gel body F2 being excited by the micro light-emitting diodes and emitting blue light, forming a third fluorescent gel body F3 covering the micro light-emitting diodes, and further including that the third fluorescent gel body F3 is excited by the micro light-emitting diodes and emits green light.
[0252] The micro light-emitting diode includes an array structure composed of at least a blue light-emitting diode. Further, the method for manufacturing the micro LED device includes forming a wall structure 850 located between the micro light-emitting diodes, forming a light-transmissive gel body F covering the micro light-emitting diodes, the micro light-emitting diodes emitting blue light transmitted through the light-transmissive gel body F, forming a first fluorescent gel body F1 covering the micro light-emitting diodes, the first fluorescent gel body F1 being excited by the micro light-emitting diodes and emitting red light, forming a third fluorescent gel body F3 covering the micro light-emitting diodes, and further including that the third fluorescent gel body F3 is excited by the micro light-emitting diodes and emits green light.
[0253] The luminous efficiency of the micro light-emitting diode exceeds 250 lumens per watt (lm / W).
[0254] The ability R9 of the micro light-emitting diode to indicate red in the color rendering evaluation number is greater than 90.
[0255] The color rendering evaluation number of the micro light-emitting diode is greater than 90.
[0256] The average color rendering evaluation number Ra of the micro light-emitting diode is greater than 90.
[0257] Another method for manufacturing a micro light emitting diode (micro-LED) device according to an embodiment of the present invention includes forming the micro light emitting diode on a growth substrate. The step of forming the micro light emitting diode includes forming an electrode electrically connected to the second-type semiconductor layer, bonding the micro light emitting diode to a test substrate, removing the growth substrate, forming another electrode electrically connected to the first-type semiconductor layer, providing a voltage source to perform electroluminescence (EL) inspection on each micro light emitting diode, recording the positions of abnormal micro light emitting diodes, selectively removing the abnormal micro light emitting diodes, and leaving the micro light emitting diodes that passed the inspection. The micro light emitting diodes include a first-color micro light emitting diode, a second-color micro light emitting diode, and a third-color micro light emitting diode. Transferring the first-color micro light emitting diodes that passed the inspection into a first container, and placing the first container in a first sub-chamber. The first sub-chamber contains a solution covering the first-color micro light emitting diodes. Transferring the second-color micro light emitting diodes that passed the inspection into a second container, and placing the second container in a second sub-chamber. The second sub-chamber contains a solution covering the second-color micro light emitting diodes. Transferring the third-color micro light emitting diodes that passed the inspection into a third container, and placing the third container in a third sub-chamber. The third sub-chamber contains a solution covering the third-color micro light emitting diodes. It includes transferring the first-color micro light emitting diode, the second-color micro light emitting diode, and the third-color micro light emitting diode to a receiving substrate respectively through a fluid transfer system.
[0258] The beneficial effects of the method for manufacturing the micro-LED device are as follows.
[0259] (1) By performing electroluminescence (EL) inspection on each micro light emitting diode before transfer, the repair cost after transfer can be saved.
[0260] (2) Fluid transfer has the advantages of low cost and high transfer speed.
[0261] (3) Due to the design of the first sub-chamber, the second sub-chamber, and the third sub-chamber, micro light-emitting diodes of different colors can be batch-transferred respectively, and the production speed can be improved.
[0262] The receiving substrate has a plurality of recesses, and a plurality of gravity layers controllable by a program are arranged in the receiving substrate. The gravity layer may provide electric gravity, magnetic gravity, electrostatic gravity, fluid gravity, air gravity, van der Waals gravity, thermal gravity, and adhesion gravity. The gravity generated by the gravity layer can capture the micro light-emitting diodes in the fluid. Further, the fluid transfer system includes a first sub-chamber, a second sub-chamber, and a third sub-chamber. The first sub-chamber includes a plurality of micro light-emitting diodes of a first color, a solution, a first valve, and a first input port. When the first valve is opened, the plurality of micro light-emitting diodes of the first color are flowed downward by the solution injected from the first input port, pass through the first valve and flow into the main chamber, and flow into the corresponding recesses on the receiving substrate through the fluid of the solution. The micro light-emitting diodes of the first color are attracted by the gravity of the gravity layer on the receiving substrate and self-align in the recesses. The recess has the same shape as the micro light-emitting diodes of the first color. Thus, the transfer of the micro light-emitting diodes of the first color onto the receiving substrate is completed.
[0263] The second sub-chamber contains a plurality of micro light-emitting diodes of a second color, a solution, a second valve, and a second input port. When the second valve is opened, the plurality of micro light-emitting diodes of the second color are flowed downward by the solution injected from the second input port, pass through the second valve and flow into the main chamber, and flow into the corresponding recesses on the receiving substrate through the fluid of the solution. The micro light-emitting diodes of the second color are attracted by the attraction of the attraction layer on the receiving substrate and self-align within the recesses. The recesses have the same shape as the micro light-emitting diodes of the second color. Thus, the transfer of the micro light-emitting diodes of the second color onto the receiving substrate is completed.
[0264] The beneficial effects of the manufacturing method of the micro-LED device are as follows.
[0265] (1) By performing electroluminescence (EL) inspection on each micro light-emitting diode before transfer, the repair cost after transfer can be saved.
[0266] (2) Fluid transfer has the advantages of low cost and high transfer speed.
[0267] (3) Due to the design of the first sub-chamber, the second sub-chamber, and the third sub-chamber, it has the advantage of batch-transferring micro light-emitting diodes of different colors respectively, and the production speed can be improved.
[0268] (4) The design of self-aligning in the recesses can reduce the production cost.
[0269] The third sub-chamber contains a plurality of micro light-emitting diodes of a third color, a solution, a third valve, and a third input port. When the third valve is opened, the plurality of micro light-emitting diodes of the third color are flowed downward by the solution injected from the third input port, pass through the third valve and flow into the main chamber, and flow into the corresponding recesses on the receiving substrate through the fluid of the solution. The micro light-emitting diodes of the third color are attracted by the attraction of the attraction layer on the receiving substrate and self-align within the recesses. The recesses have the same shape as the micro light-emitting diodes of the third color. Thus, the transfer of the micro light-emitting diodes of the third color onto the receiving substrate is completed.
[0270] A micro light-emitting diode (micro LED) device according to another embodiment of the present invention includes a first-type semiconductor layer 101, a second-type semiconductor layer 102, a light-emitting layer 103 located between the first-type semiconductor layer 101 and the second-type semiconductor layer 102, and a first current-limiting region 201 located in the peripheral and sidewall regions of the second-type semiconductor layer 102. The first current-limiting region 201 can reduce the sidewall leakage current and increase the light-emitting efficiency of the micro light-emitting diode.
[0271] The upper surface U6 of the second-type semiconductor layer 102 and the upper surface U1 of the first current-limiting region 201 are in the same plane.
[0272] The micro-LED device may further include a transparent electrode 301. The transparent electrode 301 is located on the second-type semiconductor layer 102, electrically connected to the second-type semiconductor layer 102, and the transparent electrode 301 covers the first current limiting region 201. Further, the micro-LED device may further include an electrode 302. The electrode 302 is located on the second-type semiconductor layer 102, electrically connected to the transparent electrode 301, and the electrode 302 is in direct contact with the second-type semiconductor layer 102, thereby preventing electrode peeling and improving the stability of the product. Further, the micro-LED device may further include another electrode 304. The another electrode 304 is located on the first-type semiconductor layer 101 and the second-type semiconductor layer 102, and is electrically connected to the first-type semiconductor layer 101. The transparent electrode 301 has a high light transmittance and enhances the light emission efficiency of the micro light-emitting diode. Note that the micro-LED device may further include a fifth current blocking region 505. The fifth current blocking region 505 covers the transparent electrode 301 and insulates the electrode 302 from the another electrode 304. The another electrode 304 has a fourth width T4, the electrode 302 has a fifth width T5, and the fourth width T4 is greater than or equal to the fifth width T5. The contact surface between the another electrode 304 and the first-type semiconductor layer 101 has a third width T3, and the third width T3 is smaller than the fourth width T4.
[0273] The first current limiting region 201 is formed by ion implantation technology. The ion implantation technology can improve the flatness of the sidewalls and the stability of the product.
[0274] The first current limiting region 201 has a first width T1 of 1 μm or more.
[0275] The micro-LED device may include an etching groove portion 105. The groove portion 105 is formed by removing a part of the second-type semiconductor layer 102 and the light-emitting layer 103, and the groove portion 105 exposes the first-type semiconductor layer 101. The groove portion 105 has a seventh depth D7, the first current limiting region 201 has a first depth D1, and the first depth D1 is less than or equal to the seventh depth D7. The micro-LED device has the characteristics of a flip-chip structure. Further, the micro-LED device further includes a fifth current blocking region 505, and the fifth current blocking region 505 is located on the sidewall of the etching groove portion 105.
[0276] The first-type semiconductor layer 101, the second-type semiconductor layer 102, and the light-emitting layer 103 have an epitaxial thickness E1, and the epitaxial thickness E1 is less than 10 μm
[0277] The micro-LED device may include a sixth current blocking region 506. The sixth current blocking region 506 covers the sidewalls of the second-type semiconductor layer 102, the sidewalls of the light-emitting layer 103, and the sidewalls of the first-type semiconductor layer 101, and the sixth current blocking region 506 surrounds the first current limiting region 201.
[0278] The micro-LED device may include a fourth current limiting region 204. The fourth current limiting region 204 is surrounded by the first current limiting region 201. The first current limiting region 201 has a first depth D1, the fourth current limiting region 204 has a fourth depth D4, and the first depth D1 is equal to the fourth depth D4. Further, the fourth current limiting region 204 is formed by ion implantation technology. The upper surface U4 of the fourth current limiting region 204 and the upper surface U6 of the second-type semiconductor layer 102 are in the same plane. The fifth current limiting region 205 is formed by ion implantation technology. The upper surface U5 of the fifth current limiting region 205 and the upper surface U6 of the second-type semiconductor layer 102 are in the same plane.
[0279] The micro-LED device may include a fifth current limiting region 205. The fifth current limiting region 205 is surrounded by the first current limiting region 201. The first current limiting region 201 has a first depth D1, the fifth current limiting region 205 has a fifth depth D5, the first depth D1 is equal to the fifth depth D5, and the fifth current limiting region 205 surrounds the etching groove portion 105.
[0280] The micro-LED device may include a fourth current blocking region 504. The fourth current blocking region 504 is surrounded by the first current limiting region 201 and is in direct contact with the second type semiconductor layer 102.
[0281] The periphery of the first current limiting region 201 has a first length S1, a second length S2, a third length S3, and a fourth length S4. The first length S1, the second length S2, the third length S3, and the fourth length S4 are each 100 μm or less.
[0282] The periphery of the first current limiting region 201 has a first length S1, a second length S2, a third length S3, and a fourth length S4. The sum of the first length S1, the second length S2, the third length S3, and the fourth length S4 is 400 μm or less.
[0283] The luminous efficiency of the micro light-emitting diode exceeds 250 lumens per watt (lm / W).
[0284] The ability R9 of the micro light-emitting diode to indicate red in the color rendering evaluation number is greater than 90.
[0285] The color rendering evaluation number of the micro light-emitting diode is greater than 90.
[0286] The average color rendering evaluation number Ra of the micro light-emitting diode is greater than 90.
[0287] The perimeter length of the first current limiting region 201 is 400 μm or less. Alternatively, the perimeter length of the first current limiting region 201 is 200 μm or less. Alternatively, the perimeter length of the first current limiting region 201 is 100 μm or less. Alternatively, the perimeter length of the first current limiting region 201 is 50 μm or less. Alternatively, the perimeter length of the first current limiting region 201 is 20 μm or less.
[0288] The materials used in the above ion implantation technology may include, for example, H+, He+, N+, F+, Mg+, Ar+, Zn+, O+, Si+, P+, Be+, C+, B+, P+, As+, Sb+, Te+, Fe+, Co+, Sn+, Zr+, Ag+, Au+, Ti+, Al+, or combinations thereof, but are not limited thereto. In the ion implantation technology, ions first pass through a mass spectrometer to remove unnecessary ions by a magnetic field, and then the selected doping ions enter an accelerator and are accelerated by an electric field to have high energy. Subsequently, the high-energy ion beam passes through scanners in the vertical and horizontal directions and is implanted into the semiconductor to perform pre-deposition of the doping ions. When performing pre-deposition of the doping ions, the pre-deposition doping concentration can be controlled by the current intensity and implantation time of the ion beam, and the distribution of dopants in the semiconductor can be adjusted through the energy obtained by the ions through acceleration, so that the concentration and distribution of the doping ions in the semiconductor can be accurately controlled. After ion implantation, rapid thermal annealing (RTA) or activation annealing by a high-temperature furnace tube (Furnace) is performed to repair lattice defects and disorders caused by collisions, recrystallize the implanted ions and the atoms of the semiconductor, and enable the implanted ions to be arranged at the positions of the main atoms of the new lattice.
[0289] The first-type semiconductor layer 101, the second-type semiconductor layer 102, and the light-emitting layer 103 of the micro light-emitting diode may contain any material, for example, gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), aluminum gallium indium nitride (AlGaInN), gallium phosphide (GaP), aluminum phosphide (AlP), aluminum gallium phosphide (AlGaP), aluminum arsenide (AlAs), aluminum gallium arsenide (AlGaAs), aluminum indium gallium phosphide (AlInGaP), aluminum indium gallium arsenide (AlInGaAs), zinc selenide (ZnSe), zinc oxide (ZnO), or alloys thereof, but are not limited thereto.
[0290] Each micro light-emitting diode of the micro light-emitting diode can be independently controlled.
[0291] The manufacturing method of the micro light-emitting diode (micro LED) device according to another embodiment of the present invention includes forming the micro light-emitting diode on a growth substrate. The step of forming the micro light-emitting diode includes forming an electrode electrically connected to the second-type semiconductor layer, forming another electrode electrically connected to the first-type semiconductor layer, bonding the micro light-emitting diode to a test substrate, removing the growth substrate, providing a voltage source to perform electroluminescence (EL) inspection on each micro light-emitting diode, and recording the positions of abnormal micro light-emitting diodes. Transfer the micro light-emitting diode to a transfer substrate, remove the abnormal micro light-emitting diode by a first selection and removal process, and leave the micro light-emitting diodes that passed the inspection. Transfer the micro light-emitting diodes that passed the inspection onto a permanent substrate by a first transfer process, and leave the holes of the removed abnormal micro light-emitting diodes on the permanent substrate. Filling the holes on the permanent substrate by a second transfer process.
[0292] The manufacturing method of the micro-LED device may further include a sacrificial layer 700. As shown in FIGS. 9-6, 10-6, or 28-6, the micro-light emitting diode is bonded to the test substrate via the sacrificial layer 700. In the first selective removal process of removing the abnormal micro-light emitting diode, a laser may be introduced to change the adhesiveness of the sacrificial layer 700, thereby removing the abnormal micro-light emitting diode from the test substrate. In the first transfer process, a laser may be introduced to change the adhesiveness of the sacrificial layer 700, thereby transferring the micro-light emitting diode from the test substrate to the permanent substrate. In the second transfer process, a laser may be introduced to change the adhesiveness of the sacrificial layer 700, thereby transferring the micro-light emitting diode from the test substrate to the permanent substrate. The micro-light emitting diodes transferred in the first transfer process and the micro-light emitting diodes transferred in the second transfer process are derived from different growth substrates. The manufacturing method of the micro-LED device may further include a magnetic bonding layer. The micro-light emitting diode is temporarily bonded to the test substrate via the magnetic bonding layer. Also, in the first selective removal process of removing the abnormal micro-light emitting diode, the abnormal micro-light emitting diode may be removed from the test substrate by changing the magnetic force of the magnetic bonding layer. In the first transfer process, the micro-light emitting diode may be transferred from the test substrate to the permanent substrate by changing the magnetic force of the magnetic bonding layer. In the second transfer process, the micro-light emitting diode may be transferred from the test substrate to the permanent substrate by changing the magnetic force of the magnetic bonding layer.
[0293] The micro-light emitting diodes transferred in the first transfer process and the micro-light emitting diodes transferred in the second transfer process may be derived from the same growth substrate.
[0294] The manufacturing method of the micro-LED device may further include a vacuum adsorption layer. The micro-light emitting diode is bonded to the test substrate through the vacuum adsorption layer. In the first selective removal process of removing the abnormal micro-light emitting diode, the abnormal micro-light emitting diode may be removed from the test substrate by changing the suction force of the vacuum adsorption layer. In the first transfer process, the micro-light emitting diode may be transferred from the test substrate to the permanent substrate by changing the suction force of the vacuum adsorption layer. In the second transfer process, the micro-light emitting diode may be transferred from the test substrate to the permanent substrate by changing the suction force of the vacuum adsorption layer.
[0295] Alternatively, the manufacturing method of the micro-LED device may further include an electrostatic adsorption layer. The micro-light emitting diode is bonded to the test substrate through the electrostatic adsorption layer. Also, in the first selective removal process of removing the abnormal micro-light emitting diode, the abnormal micro-light emitting diode may be removed from the test substrate by changing the electrostatic force of the electrostatic adsorption layer. In the first transfer process, the micro-light emitting diode may be transferred from the test substrate to the permanent substrate by changing the electrostatic force of the electrostatic adsorption layer. In the second transfer process, the micro-light emitting diode may be transferred from the test substrate to the permanent substrate by changing the electrostatic force of the electrostatic adsorption layer.
[0296] Alternatively, the method for manufacturing the micro-LED device may further include an adhesive layer. The micro light-emitting diode is bonded to the test substrate via the adhesive layer. In the first selective removal process of removing the abnormal micro light-emitting diode, the abnormal micro light-emitting diode may be removed from the test substrate by changing the adhesive force of the adhesive layer. In the first transfer process, the micro light-emitting diode may be transferred from the test substrate to the permanent substrate by changing the adhesive force of the adhesive layer. In the second transfer process, the micro light-emitting diode may be transferred from the test substrate to the permanent substrate by changing the adhesive force of the adhesive layer.
[0297] In the method for manufacturing the micro-LED device, the first selective removal process of removing the abnormal micro light-emitting diode has a first removal speed, the first transfer process of transferring the micro light-emitting diode that has passed the inspection onto the permanent substrate has a first transfer speed, the second transfer process of filling the holes on the permanent substrate has a second transfer speed, the first transfer speed is greater than the second transfer speed, and the first removal speed is greater than or equal to the second transfer speed.
[0298] In the method for manufacturing the micro-LED device, the first transfer process of transferring the micro light-emitting diode that has passed the inspection onto the permanent substrate has a first transfer speed, the second transfer process of filling the holes on the permanent substrate has a second transfer speed, and the first transfer speed is greater than the second transfer speed.
[0299] In the method for manufacturing the micro-LED device, there is a first pitch P1 between the micro light-emitting diodes on the growth substrate 100, a second pitch P2 between the micro light-emitting diodes on the transfer substrate 801, and a third pitch P3 between the micro light-emitting diodes on the permanent substrate 820. The second pitch P2 is greater than or equal to the first pitch P1, and the third pitch P3 is greater than or equal to the second pitch P2.
[0300] Alternatively, in the method for manufacturing the micro-LED device, there is a first pitch P1 between the micro-light emitting diodes on the growth substrate 100, a second pitch P2 between the micro-light emitting diodes on the transfer substrate 801, and a third pitch P3 between the micro-light emitting diodes on the permanent substrate 820, the second pitch P2 is larger than the first pitch P1, and the third pitch P3 is larger than the second pitch P2.
[0301] The micro-light emitting diodes include an array structure composed of at least a red light emitting diode, a green light emitting diode, and a blue light emitting diode. The method for manufacturing the micro-LED device further includes forming a wall structure 850 located between the micro-light emitting diodes and forming a light-transmissive gel body F covering the micro-light emitting diodes.
[0302] Optionally, the micro-light emitting diodes include an array structure composed of at least an ultraviolet light emitting diode. The method for manufacturing the above micro-LED device further includes forming a wall structure 850 located between the micro-light emitting diodes, forming a first fluorescent gel body F1 covering the micro-light emitting diodes, the first fluorescent gel body F1 being excited by the micro-light emitting diodes and emitting red light, forming a second fluorescent gel body F2 covering the micro-light emitting diodes, the second fluorescent gel body F2 being excited by the micro-light emitting diodes and emitting blue light, forming a third fluorescent gel body F3 covering the micro-light emitting diodes, and the third fluorescent gel body F3 being excited by the micro-light emitting diodes and emitting green light.
[0303] Optionally, the micro light-emitting diode includes an array structure composed of at least blue light-emitting diodes. The manufacturing method of the micro-LED device includes forming a wall structure 850 located between the micro light-emitting diodes, forming a light-transmissive gel body F covering the micro light-emitting diodes, the micro light-emitting diodes emitting blue light transmitted through the light-transmissive gel body F, forming a first fluorescent gel body F1 covering the micro light-emitting diodes, the first fluorescent gel body F1 being excited by the micro light-emitting diodes and emitting red light, forming a third fluorescent gel body F3 covering the micro light-emitting diodes, and further including that the third fluorescent gel body F3 is excited by the micro light-emitting diodes and emits green light.
[0304] The luminous efficiency of the micro light-emitting diode exceeds 250 lumens per watt (lm / W).
[0305] The ability R9 of the micro light-emitting diode to indicate red in the color rendering evaluation number is greater than 90.
[0306] The color rendering evaluation number of the micro light-emitting diode is greater than 90.
[0307] The average color rendering evaluation number Ra of the micro light-emitting diode is greater than 90.
[0308] The first transfer process of transferring the micro light-emitting diodes that passed the inspection onto the permanent substrate has a first transfer speed, and the first transfer speed is greater than 1 million micro-LEDs per hour (Million Micro-LEDs / hour).
[0309] Alternatively, the first transfer process of transferring the micro light-emitting diodes that passed the inspection onto the permanent substrate has a first transfer speed, and the first transfer speed is greater than 10 million micro-LEDs per hour.
[0310] Alternatively, the first transfer process of transferring the micro light-emitting diodes that have passed the inspection onto the permanent substrate has a first transfer speed, and the first transfer speed is greater than 20 million micro light-emitting diodes per hour.
[0311] Alternatively, the first transfer process of transferring the micro light-emitting diodes that have passed the inspection onto the permanent substrate has a first transfer speed, and the first transfer speed is greater than 100 million micro light-emitting diodes per hour.
[0312] Alternatively, the first transfer process of transferring the micro light-emitting diodes that have passed the inspection onto the permanent substrate has a first transfer speed, and the first transfer speed is greater than 200 million micro light-emitting diodes per hour.
[0313] Alternatively, the first transfer process of transferring the micro light-emitting diodes that have passed the inspection onto the permanent substrate has a first transfer speed, and the first transfer speed is greater than 500 million micro light-emitting diodes per hour.
[0314] The first selective removal process of removing the abnormal micro light-emitting diodes has a first removal speed, and the first removal speed is greater than 1 million micro light-emitting diodes per hour.
[0315] Alternatively, the first selective removal process of removing the abnormal micro light-emitting diodes has a first removal speed, and the first removal speed is greater than 10 million micro light-emitting diodes per hour.
[0316] Alternatively, the first selective removal process of removing the abnormal micro light-emitting diodes has a first removal speed, and the first removal speed is greater than 20 million micro light-emitting diodes per hour.
[0317] Alternatively, the first selective removal process of removing the abnormal micro light-emitting diodes has a first removal speed, and the first removal speed is greater than 100 million micro light-emitting diodes per hour.
[0318] Alternatively, the first selective removal process for removing the abnormal micro light-emitting diodes has a first removal speed, and the first removal speed is greater than 200 million micro light-emitting diodes per hour.
[0319] Alternatively, the first selective removal process for removing the abnormal micro light-emitting diodes has a first removal speed, and the first removal speed is greater than 500 million micro light-emitting diodes per hour.
[0320] The second transfer process for filling the holes on the permanent substrate has a second transfer speed, and the second transfer speed is greater than 1 million micro light-emitting diodes per hour.
[0321] Alternatively, the second transfer process for filling the holes on the permanent substrate has a second transfer speed, and the second transfer speed is greater than 10 million micro light-emitting diodes per hour.
[0322] Alternatively, the second transfer process for filling the holes on the permanent substrate has a second transfer speed, and the second transfer speed is greater than 20 million micro light-emitting diodes per hour.
[0323] Alternatively, the second transfer process for filling the holes on the permanent substrate has a second transfer speed, and the second transfer speed is greater than 100 million micro light-emitting diodes per hour.
[0324] Alternatively, the second transfer process for filling the holes on the permanent substrate has a second transfer speed, and the second transfer speed is greater than 200 million micro light-emitting diodes per hour.
[0325] Alternatively, the second transfer process for filling the holes on the permanent substrate has a second transfer speed, and the second transfer speed is greater than 500 million micro light-emitting diodes per hour.
[0326] In the method for manufacturing the above-described micro-LED device, the material of the growth substrate 100 may include, for example, silicon, aluminum oxide (Al2O3), gallium nitride (GaN), silicon carbide (SiC), and gallium arsenide (GaAs), but is not limited thereto.
[0327] In the method for manufacturing the above-described micro-LED device, each micro light-emitting diode may be independently controlled.
[0328] A micro light-emitting diode (micro-LED) device according to another embodiment of the present invention includes a first-type semiconductor layer 101, a second-type semiconductor layer 102, a light-emitting layer 103 located between the first-type semiconductor layer 101 and the second-type semiconductor layer 102, a magnetic layer located under the first-type semiconductor layer 101, and a sidewall current limiting region located in a peripheral sidewall region of the second-type semiconductor layer 102 and the light-emitting layer 103. The upper surface of the sidewall current limiting region and the upper surface of the second-type semiconductor layer 102 are in the same plane, and the peripheral length of the sidewall current limiting region is 400 μm or less.
[0329] According to the above structure, the beneficial effect of the micro-LED device is that the micro light-emitting diode has magnetic characteristics, the sidewall current limiting region reduces the sidewall leakage current, and the light-emitting efficiency of the micro light-emitting diode can be improved.
[0330] The micro-LED device may further include a second current limiting region 202. The second current limiting region 202 is surrounded by the sidewall current limiting region, and the shortest distance between the sidewall current limiting region and the second current limiting region 202 is 50 μm or less. The second current limiting region 202 is located in the middle of the second-type semiconductor layer 102. The magnetic layer may include a semiconductor layer, a conductor layer, and an oxide layer, and may be formed by epitaxial doping, ion implantation, diffusion, or thin film deposition. The magnetic material for epitaxial doping, ion implantation, diffusion, or thin film deposition may include, for example, iron (Fe), cobalt (Co), nickel (Ni), terbium (Tb), aluminum (Al), platinum (Pt), samarium (Sm), copper (Cu), chromium (Cr), or a combination thereof. The light-emitting layer 103 includes a single-layer quantum well structure or a multi-layer quantum well structure. Alternatively, the light-emitting layer 103 includes a single-layer quantum wire structure or a multi-layer quantum wire structure. Alternatively, the light-emitting layer 103 includes a single-layer quantum dot structure or a multi-layer quantum dot structure. Also, the upper surfaces of the second-type semiconductor layer 102, the upper surface of the sidewall current limiting region, and the upper surface of the second current limiting region 202 are in the same plane. The second current limiting region 202 is formed by ion implantation technology. The micro-LED device may further include a third current limiting region 203. The third current limiting region 203 is located between the sidewall current limiting region and the second current limiting region 202 and is in contact with the second current limiting region 202. The micro-LED device may further include a transparent electrode 301. The transparent electrode 301 is located on the second-type semiconductor layer 102, is electrically connected to the second-type semiconductor layer 102, and the transparent electrode 301 covers the sidewall current limiting region and the third current limiting region 203. Note that the micro-LED device may further include an electrode 302. The electrode 302 is located on the second-type semiconductor layer 102, is electrically connected to the transparent electrode 301, and the electrode 302 is in direct contact with the second current limiting region 202. Also, the micro-LED device may further include an electrode extension 303.The electrode extension part 303 is located on the transparent electrode 301 and is electrically connected to the electrode 302. The upper surface of the third current limiting region 203 and the upper surface of the sidewall current limiting region are in the same plane. The third current limiting region 203 is formed by an ion implantation technique. The second current limiting region 202 has a second depth D2, the third current limiting region 203 has a third depth D3, and the second depth D2 is equal to the third depth D3. The micro-LED device may further include a transparent electrode 301. The transparent electrode 301 is located on the second-type semiconductor layer 102, is electrically connected to the second-type semiconductor layer 102, and the transparent electrode 301 covers the sidewall current limiting region. The transparent electrode 301 has a high light transmittance and can improve the light emission efficiency of the micro light emitting diode. The micro-LED device may further include an electrode 302. The electrode 302 is located on the second-type semiconductor layer 102, is electrically connected to the transparent electrode 301, and the electrode 302 is in direct contact with the second current limiting region 202, thereby preventing electrode peeling and improving the stability of the product. The micro-LED device may further include an electrode extension part 303. The electrode extension part 303 is located on the transparent electrode 301 and is electrically connected to the electrode 302.
[0331] The sidewall current limiting region is formed by an ion implantation technique.
[0332] (1) The sidewall current limiting region can reduce the sidewall leakage current and improve the light emission efficiency of the micro light emitting diode.
[0333] (2) The second current limiting region 202 can improve the uniformity of the current distribution and improve the light emission efficiency of the micro light emitting diode.
[0334] (3) The third current limiting region 203 can improve the uniformity of the current distribution and improve the light emission efficiency of the micro light emitting diode.
[0335] (4) Ion implantation technology can enhance the flatness of the sidewalls and the stability of the product.
[0336] (5) Ion implantation technology can enhance the flatness of the surface and the stability of the product.
[0337] The sidewall current limiting region has a first width T1 of 1 μm or more.
[0338] A micro light-emitting diode (micro-LED) device according to another embodiment of the present invention includes a first-type semiconductor layer 101, a second-type semiconductor layer 102, a light-emitting layer 103 located between the first-type semiconductor layer 101 and the second-type semiconductor layer 102, a magnetic layer located under the first-type semiconductor layer 101, and a first current blocking region 501 located in a peripheral sidewall region of the second-type semiconductor layer 102 and the light-emitting layer 103. The peripheral length of the first current blocking region 501 is 400 μm or less.
[0339] By adopting the above structure, the beneficial effect of the micro-LED device is that the micro light-emitting diode has magnetic characteristics, the first current blocking region 501 can reduce the sidewall leakage current, and the light-emitting efficiency of the micro light-emitting diode can be enhanced. Since the peripheral length is smaller than 400 μm, it meets the size scale of the micro light-emitting diode and has various advantages.
[0340] The micro-LED device may further include a second current blocking region 502. The second current blocking region 502 is surrounded by the first current blocking region 501, and the shortest distance between the first current blocking region 501 and the second current blocking region 502 is 50 μm or less. Also, the micro-LED device may further include a third current blocking region 503. The third current blocking region 503 is surrounded by the first current blocking region 501 and is in contact with the second current blocking region 502. The micro-LED device may further include a transparent electrode 301. The transparent electrode 301 is located on the second-type semiconductor layer 102, is electrically connected to the second-type semiconductor layer 102, and the transparent electrode 301 covers the first current blocking region 501, the second current blocking region 502, and the third current blocking region 503. The second current blocking region 502 is in a hollow ring shape and has a hollow width O2 of 1 μm or more. The second current blocking region 502 is located in the middle of the second-type semiconductor layer 102. The micro-LED device may further include an electrode 302. The electrode 302 is located on the second-type semiconductor layer 102, is electrically connected to the transparent electrode 301, and the electrode 302 is in direct contact with the second-type semiconductor layer 102. Also, the micro-LED device may further include an electrode extension 303. The electrode extension 303 is located on the transparent electrode 301 and is electrically connected to the electrode 302. The width of the electrode extension 303 is smaller than the width of the third current blocking region 503. Furthermore, the micro-LED device may further include a transparent electrode 301. The transparent electrode 301 is located on the second-type semiconductor layer 102, is electrically connected to the second-type semiconductor layer 102, and the transparent electrode 301 covers the first current blocking region 501 and the second current blocking region 502. The micro-LED device may further include an electrode 302. The electrode 302 is located on the second-type semiconductor layer 102, is electrically connected to the transparent electrode 301, and the electrode 302 is in direct contact with the second-type semiconductor layer 102, thereby preventing electrode peeling and improving the stability of the product.The transparent electrode 301 has a high light transmittance and enhances the light emission efficiency of the micro light-emitting diode. The micro-LED device may further include an electrode extension 303. The electrode extension 303 is located on the transparent electrode 301 and is electrically connected to the electrode 302.
[0341] The width T2 of the first current blocking region 501 is 1 μm or more.
[0342] A micro light-emitting diode (micro-LED) device according to another embodiment of the present invention includes a first-type semiconductor layer 101, a second-type semiconductor layer 102, a light-emitting layer 103 located between the first-type semiconductor layer 101 and the second-type semiconductor layer 102, and a sidewall current limiting region 201 in direct contact with a peripheral sidewall region of the second-type semiconductor layer 102. The sidewall current limiting region 201 further includes an upper surface 201-up, a bottom surface 201-down, an outer surface 201-out, and an inner surface 201-in. The second-type semiconductor layer 102 further includes an upper surface 102-up and an outer surface 102-out. The peripheral length of the sidewall current limiting region 201 is 400 μm or less.
[0343] By adopting the above structure, the following beneficial effects can be obtained.
[0344] (1) The sidewall current limiting region 201 can reduce the sidewall leakage current and enhance the light emission efficiency of the micro light-emitting diode.
[0345] (2) Since the peripheral length is less than 400 μm, the size scale of the micro light-emitting diode is satisfied, and it has various advantages.
[0346] The upper surface 102-up of the second-type semiconductor layer 102 and the upper surface 201-up of the sidewall current limiting region 201 are in the same plane.
[0347] The micro-LED device may further include a transparent electrode 301. The transparent electrode 301 is located on the second-type semiconductor layer 102, is electrically connected to the second-type semiconductor layer 102, and the transparent electrode 301 covers the sidewall current limiting region 201. The micro-LED device may further include an electrode 302. The electrode 302 is located on the second-type semiconductor layer 102, is electrically connected to the transparent electrode 301, and the electrode 302 is in direct contact with the second-type semiconductor layer 102, thereby preventing electrode peeling and improving the stability of the product. The transparent electrode 301 has a high light transmittance and can increase the light emission efficiency of the micro light-emitting diode.
[0348] The sidewall current limiting region 201 is formed by ion implantation technology. The ion implantation technology can improve the flatness of the sidewall and the stability of the product.
[0349] The sidewall current limiting region 201 has a first width T1 of 1 μm or more.
[0350] The micro-LED device may further include a back electrode 304. The back electrode 304 is located under the first-type semiconductor layer 101 and is electrically connected to the first-type semiconductor layer 101.
[0351] The upper surface 201-up of the sidewall current limiting region 201 has an upper surface low conductivity region i L-up and the upper surface 102-up of the second-type semiconductor layer 102 has an upper surface high conductivity region i H-up The conductivity distribution gradually increases from the upper surface low conductivity region i L-up to the upper surface high conductivity region i H-up This helps to reduce the surface leakage current and the sidewall leakage current and can improve the light emission efficiency of the micro light-emitting diode.
[0352] The outer surface 201-out of the sidewall current limiting region 201 has a sidewall low conductivity region i L-out and the outer surface 102-out of the second-type semiconductor layer 102 has a sidewall high conductivity region iH-out has a conductivity distribution, and the conductivity distribution gradually increases from the sidewall low-conductivity region i L-out towards the sidewall high-conductivity region i H-out and increases gradually.
[0353] The upper surface 201-up of the sidewall current limiting region 201 has a first surface roughness RS-201-up, and the first surface roughness RS-201-up is 10 nm or less.
[0354] The upper surface 102-up of the second-type semiconductor layer 102 has a second surface roughness RS-102-up, and the second surface roughness RS-102-up is 10 nm or less.
[0355] Alternatively, the upper surface 201-up of the sidewall current limiting region 201 has a first surface roughness RS-201-up, the upper surface 102-up of the second-type semiconductor layer 102 has a second surface roughness RS-102-up, and the first surface roughness RS-201-up is equal to or greater than the second surface roughness RS-102-up.
[0356] The outer surface 201-out of the sidewall current limiting region 201 has a third surface roughness RS-201-out, and the third surface roughness RS-201-out is greater than 10 nm.
[0357] The outer surface 102-out of the second-type semiconductor layer 102 has a fourth surface roughness RS-102-out, and the fourth surface roughness RS-102-out is greater than 10 nm.
[0358] Alternatively, the outer surface 201-out of the sidewall current limiting region 201 has a third surface roughness RS-201-out, the outer surface 102-out of the second-type semiconductor layer 102 has a fourth surface roughness RS-102-out, and the third surface roughness RS-201-out is equal to or greater than the fourth surface roughness RS-102-out.
[0359] Optionally, the upper surface 201-up of the sidewall current limiting region 201 has a first surface roughness RS-201-up, the outer surface 201-out of the sidewall current limiting region 201 has a third surface roughness RS-201-out, and the first surface roughness RS-201-up is greater than or equal to the third surface roughness RS-201-out.
[0360] Optionally, the upper surface 102-up of the second-type semiconductor layer 102 has a second surface roughness RS-102-up, the outer surface 102-out of the second-type semiconductor layer 102 has a fourth surface roughness RS-102-out, and the second surface roughness RS-102-up is greater than or equal to the fourth surface roughness RS-102-out.
[0361] The advantage of any of the above embodiments is that the leakage current can be reduced by controlling the surface roughness and the sidewall roughness, and the light emission efficiency of the micro light emitting diode can be improved.
[0362] The sidewall current limiting region 201 has a first depth D1, and the first depth D1 is less than 1 μm. Alternatively, the sidewall current limiting region 201 has a first depth D1, and the first depth D1 is 1 μm or more.
[0363] The sidewall current limiting region 201 further includes the sidewall region 103-out of the light emitting layer 103.
[0364] The sidewall current limiting region 201 further includes other sidewall regions of the light emitting layer 103.
[0365] The sidewall current limiting region 201 further includes the sidewall region 103-out of the light emitting layer 103 and the sidewall region 101-out of the first-type semiconductor layer 101.
[0366] The advantage of any of the above embodiments is that by controlling the depth of the sidewall current limiting region, the effect of reducing the sidewall leakage current can be further improved, and the light emission efficiency of the micro light emitting diode can be improved.
[0367] Optionally, the upper surface 201-up of the sidewall current limiting region 201 and the outer surface 201-out of the sidewall current limiting region 201 form a first included angle Θ1, and the upper surface 201-up of the sidewall current limiting region 201 and the inner surface 201-in of the sidewall current limiting region 201 form a second included angle Θ2. The first included angle Θ1 is an acute angle smaller than 90°, and the second included angle Θ2 is an obtuse angle larger than 90°.
[0368] Optionally, the upper surface 201-up of the sidewall current limiting region 201 and the outer surface 201-out of the sidewall current limiting region 201 form a first included angle Θ1, and the upper surface 201-up of the sidewall current limiting region 201 and the inner surface 201-in of the sidewall current limiting region 201 form a second included angle Θ2. The first included angle Θ1 is an obtuse angle larger than 90°, and the second included angle Θ2 is an acute angle smaller than 90°.
[0369] Optionally, the upper surface 201-up of the sidewall current limiting region 201 and the outer surface 201-out of the sidewall current limiting region 201 form a first included angle Θ1, and the upper surface 201-up of the sidewall current limiting region 201 and the inner surface 201-in of the sidewall current limiting region 201 form a second included angle Θ2. The first included angle Θ1 and the second included angle Θ2 are close to a right angle (90°).
[0370] Optionally, the upper surface 201-up of the sidewall current limiting region 201 and the outer surface 201-out of the sidewall current limiting region 201 form a first included angle Θ1, and the upper surface 201-up of the sidewall current limiting region 201 and the inner surface 201-in of the sidewall current limiting region 201 form a second included angle Θ2. The first included angle Θ1 and the second included angle Θ2 are right angles (90°).
[0371] Optionally, the upper surface 201-up of the sidewall current limiting region 201 and the outer surface 201-out of the sidewall current limiting region 201 form a first included angle Θ1, and the upper surface 201-up of the sidewall current limiting region 201 and the inner surface 201-in of the sidewall current limiting region 201 form a second included angle Θ2. The first included angle Θ1 and the second included angle Θ2 are obtuse angles greater than 90°.
[0372] Optionally, the upper surface 201-up of the sidewall current limiting region 201 and the outer surface 201-out of the sidewall current limiting region 201 form a first included angle Θ1, and the upper surface 201-up of the sidewall current limiting region 201 and the inner surface 201-in of the sidewall current limiting region 201 form a second included angle Θ2. The first included angle Θ1 and the second included angle Θ2 are acute angles less than 90°.
[0373] A micro light-emitting diode (micro LED) device according to another embodiment of the present invention includes a first-type semiconductor layer 101, a second-type semiconductor layer 102, a light-emitting layer 103 located between the first-type semiconductor layer 101 and the second-type semiconductor layer 102, and a first current blocking region 501 located in the peripheral and sidewall regions of the second-type semiconductor layer 102. The perimeter length of the first current blocking region 501 is 400 μm or less.
[0374] By adopting the above structure, the following beneficial effects can be obtained.
[0375] (1) The first current blocking region 501 can reduce the sidewall leakage current and improve the light-emitting efficiency of the micro light-emitting diode.
[0376] (2) Since the perimeter length is less than 400 μm, it meets the size scale of the micro light-emitting diode and has various advantages.
[0377] The first current blocking region 501 covers at least the sidewalls of the first-type semiconductor layer 101, the sidewalls of the second-type semiconductor layer 102, and the sidewalls of the light-emitting layer 103. Optionally, other embodiments are as follows.
[0378] The first current blocking region 501 covers only the sidewalls of the second-type semiconductor layer 102 and the sidewalls of the light-emitting layer 103.
[0379] The first current blocking region 501 completely covers only the sidewalls of the second-type semiconductor layer 102.
[0380] The first current blocking region 501 partially covers the sidewalls of the second-type semiconductor layer 102.
[0381] The first current blocking region 501 completely covers the sidewalls of the light-emitting layer 103.
[0382] The first current blocking region 501 partially covers the sidewalls of the light-emitting layer 103.
[0383] The first current blocking region 501 completely covers the sidewalls of the first-type semiconductor layer 101.
[0384] The first current blocking region 501 partially covers the sidewalls of the first-type semiconductor layer 101.
[0385] In the above micro-LED device, by controlling the depth and range of the first current blocking region 501, the effect of reducing the sidewall leakage current can be further improved, and the light-emitting efficiency of the micro-light-emitting diode can be increased.
[0386] The micro-LED device may further include a transparent electrode 301. The transparent electrode 301 is located on the second-type semiconductor layer 102, is electrically connected to the second-type semiconductor layer 102, and the transparent electrode 301 covers the first current blocking region 501. Also, on the upper surface 301-up of the transparent electrode 301, there is an upper surface high conductivity region i H-up and on the upper surface 501-up of the first current blocking region 501, there is an upper surface low conductivity region i L-up and the conductivity distribution is from the upper surface low conductivity region i L-up to the upper surface high conductivity region i H-upGradually increases towards
[0387] The micro-LED device may further include an electrode 302. The electrode 302 is located on the second-type semiconductor layer 102 and is electrically connected to the transparent electrode 301. The electrode 302 is in direct contact with the second current limiting region 202, thereby preventing electrode peeling and improving the stability of the product. The transparent electrode 301 has a high light transmittance and can enhance the light emission efficiency of the micro light emitting diode.
[0388] The first current blocking region 501 is composed of a dielectric material.
[0389] The width of the first current blocking region 501 is 1 μm or more.
[0390] The first current blocking region 501 covering the sidewall region has a thickness H1, and the first current blocking region 501 covering the upper surface region has a thickness H2. The thickness H1 is greater than, less than, or equal to the thickness H2. The first current blocking region 501 covering the sidewall region has an arc shape. By controlling the geometric shape of the first current blocking region 501, the effect of reducing the sidewall leakage current can be further improved, and the light emission efficiency of the micro light emitting diode can be enhanced.
[0391] Regarding the upper surface 501-up and the outer surface 501-out of the first current blocking region 501, any embodiment is as follows.
[0392] The upper surface 501-up of the first current blocking region 501 has a first surface roughness RS-501-up, and the first surface roughness RS-501-up is 10 nm or less.
[0393] The outer surface 501-out of the first current blocking region 501 has a second surface roughness RS-501-out, and the second surface roughness RS-501-out is 10 nm or less.
[0394] The upper surface 501-up of the first current blocking region 501 has a first surface roughness RS-501-up, the outer surface 501-out of the first current blocking region 501 has a second surface roughness RS-501-out, and the first surface roughness RS-501-up is greater than the second surface roughness RS-501-out.
[0395] The upper surface 501-up of the first current blocking region 501 has a first surface roughness RS-501-up, the outer surface 501-out of the first current blocking region 501 has a second surface roughness RS-501-out, and the first surface roughness RS-501-up is equal to the second surface roughness RS-501-out.
[0396] The upper surface 501-up of the first current blocking region 501 has a first surface roughness RS-501-up, the outer surface 501-out of the first current blocking region 501 has a second surface roughness RS-501-out, and the first surface roughness RS-501-up is smaller than the second surface roughness RS-501-out.
[0397] In the above micro-LED device, by controlling the surface roughness and sidewall roughness of the first current blocking region 501, the leakage current can be reduced and the light emission efficiency of the micro light emitting diode can be improved.
[0398] Optionally, the upper surface 501-up of the first current blocking region 501 has an upper surface low conductivity region i L-up and the upper surface 102-up of the second type semiconductor layer 102 has an upper surface high conductivity region i H-up and the conductivity distribution gradually increases from the upper surface low conductivity region i L-up to the upper surface high conductivity region i H-up in a direction.
[0399] Optionally, the outer surface 501-out of the first current blocking region 501 has an outer surface low conductivity region i L-out and the upper surface 501-up of the first current blocking region 501 has an upper surface low conductivity region i L-up and the outer surface low conductivity region i L-outThe conductivity of the above is equal to that of the upper surface low-conductivity region i L-up is equal to the conductivity of.
[0400] Optionally, the outer surface 501-out of the first current block region 501 has an outer surface low-conductivity region i L-out and the upper surface 501-up of the first current block region 501 has an upper surface low-conductivity region i L-up and the conductivity of the outer surface low-conductivity region i L-out is greater than the conductivity of the upper surface low-conductivity region i L-up of.
[0401] Optionally, the outer surface 501-out of the first current block region 501 has an outer surface low-conductivity region i L-out and the upper surface 501-up of the first current block region 501 has an upper surface low-conductivity region i L-up and the conductivity of the outer surface low-conductivity region i L-out is less than the conductivity of the upper surface low-conductivity region i L-up of.
[0402] In the above micro-LED device, surface and sidewall leakage currents can be reduced, and the light emission efficiency of the micro-light emitting diode can be increased.
[0403] Embodiments of the present invention further include a display panel. The display panel includes a display substrate, and the display substrate includes an array of micro-LED devices. A part of the micro-LED (micro-light emitting diode) device has a sidewall current block region 501, and a part of the micro-LED device has a sidewall current limiting region 201.
[0404] Regarding the formation of the sidewall current block region 501, the following are some optional embodiments.
[0405] The sidewall current block region 501 may be formed by Atomic Layer Chemical Vapor Deposition System (ALD) technology.
[0406] The sidewall current blocking region 501 may be formed by a metal organic chemical vapor phase deposition (MOCVD) epitaxial regrowth technique.
[0407] The sidewall current blocking region 501 may be formed by a molecular beam epitaxy (MBE) epitaxial regrowth technique.
[0408] The sidewall current blocking region 501 may be formed by a plasma enhanced chemical vapor deposition (PECVD) technique.
[0409] The sidewall current limiting region 201 may be formed by a selective oxidation technique.
[0410] The sidewall current limiting region 201 may be formed by a thermal oxidation technique.
[0411] The sidewall current limiting region 201 may be formed by a wet thermal oxidation technique.
[0412] The sidewall current limiting region 201 may be formed by an ion implantation technique.
[0413] The maximum width of each micro-LED device is from 1 μm to 100 μm.
[0414] Each micro-LED device includes a semiconductor material.
[0415] Each micro-LED device includes a first-type semiconductor layer 101, a second-type semiconductor layer 102, and a light-emitting layer 103 positioned between the first-type semiconductor layer 101 and the second-type semiconductor layer 102.
[0416] The display panel further includes a circuit used to switch and drive the array of micro-LED devices, and further includes an array of microcontroller chips. Each microcontroller chip is connected to a scan drive circuit and a data drive circuit.
[0417] Embodiments of the present invention further provide a flexible display. The flexible display includes a flexible substrate, and the flexible substrate includes an array of micro-LED devices. A part of the micro-LED devices has a sidewall current blocking region 501, and a part of the micro-LED devices has a sidewall current limiting region 201.
[0418] The sidewall current blocking region 501 may be composed of a dielectric material.
[0419] Also, the sidewall current limiting region 201 may be formed by ion implantation technology.
[0420] The maximum width of each micro-LED device is from 1 μm to 100 μm.
[0421] Each micro-LED device includes a semiconductor material.
[0422] Each micro-LED device includes a first-type semiconductor layer 101, a second-type semiconductor layer 102, and a light-emitting layer 103 located between the first-type semiconductor layer 101 and the second-type semiconductor layer 102.
[0423] The flexible display may further include a circuit used to switch and drive the array of micro-LED devices, and may further include an array of microcontroller chips. Each microcontroller chip is connected to a scan drive circuit and a data drive circuit.
[0424] The material of the flexible substrate may include ultra-thin glass, metal foil, fiber-reinforced composite material, plastic film, ceramic substrate, or any combination of two or more of the above materials. The thickness of the flexible substrate is preferably less than 200 μm, more preferably less than 50 μm, and most preferably from 25 μm to 50 μm. The metal foil may include, for example, stainless steel, aluminum, nickel, titanium, zirconium, copper, iron, cobalt, palladium, or any combination of two or more of the above materials. The coefficient of thermal expansion of the metal foil approximates that of the ultra-thin glass. The surface roughness (Ra) of the metal foil is less than 10 nm. The plastic film has a light transmittance greater than 90% at a wavelength of 550 nm. The material of the plastic film may include, for example, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), or polyethersulfone (PES). The fiber-reinforced composite material may include, for example, carbon fibers, silicon carbide fibers, or boron filaments.
[0425] Embodiments of the present invention further provide a method for manufacturing a flexible display. The manufacturing method includes providing a flexible substrate, arranging a plurality of scan lines in parallel in a first direction on the flexible substrate, arranging a plurality of data lines in parallel in a second direction on the flexible substrate, where the first direction and the second direction are orthogonal, arranging an array of a plurality of micro light-emitting diodes, each of the micro light-emitting diodes being electrically connected to the corresponding data line, and each of the micro light-emitting diodes being electrically connected to the scan line respectively.
[0426] A part of the micro-LED device has a sidewall current blocking region 501, and a part of the micro-LED device has a sidewall current limiting region 201.
[0427] In other embodiments of the present invention, a micro-LED device is realized by 3D stacking of an RGB pixel array and the yield of mass transfer is improved by combining with ion implantation planarization technology. By 3D stacking of the RGB pixel array, preliminary light-emitting diodes can be arranged in sub-pixels, so the manufacturing cost for replacing dead pixels can be avoided. Also, by reducing the distance between sub-pixels, the distance between sub-pixels is smaller than the minimum resolution of the human eye, and even if there are dead pixels, they are difficult to visually recognize, so ultimately, a technology for replacing dead pixels is not required. Moreover, a micro-LED is realized by combining a light-transmissive epitaxial substrate with 3D stacking of an RGB pixel array, and a micro-LED display can be directly formed from an epitaxial chip without requiring mass transfer technology.
[0428] Prior art: The structure of a conventional flip chip micro-LED is shown in FIG. 29, the side length of the micro-LED is less than 100 μm, and in the conventional manufacturing process, those with side lengths from 10 μm to 100 μm are made.
[0429] As shown in FIG. 30, when the size is reduced to 10 μm or less, micro-LED components with a smaller pitch can be defined by etching (such as dry etching or wet etching) or cutting, but dangling bonds (i.e., unbonded electrons) are likely to form on the surface and sidewalls of the components. Dangling bonds have very high activity, are likely to form trap centers, and cause recombination of electron-hole pairs, thereby shortening the carrier lifetime and reducing the conversion efficiency. Therefore, the ratio of the leakage current to the total current of the micro-light-emitting diode may increase, and the light-emitting efficiency of the micro-light-emitting diode may decrease. The present invention realizes reducing the roughness of the surface and sidewalls of the component by using ion implantation technology, reducing non-radiative recombination of the micro-light-emitting diode, and thus improving the efficiency of the micro-light-emitting diode.
[0430] As shown in FIG. 30, when the size is reduced to 10 μm or less, during the etching process, especially during the flip-chip process or mass transfer, the Ridge area is likely to be damaged. Also, due to the non-uniform height of the Metal bump, it may cause damage during mass transfer and reduce the production yield.
[0431] As shown in FIG. 31, the size of the flip-chip micro-LED is reduced by ion implantation technology, and by improving the surface flatness, the problem of damage to the etched ridge area or non-uniform height of the metal bump is solved, and the production yield is improved.
[0432] As shown in FIG. 32, in order to avoid the extra cost for replacing dead pixels, at least one set of spare light-emitting diodes is arranged in the structure by ion implantation technology.
[0433] As shown in Fig. 33-1, the first epitaxial layer structure (Epi layer-1) is formed on the first epitaxial substrate S1, and the first micro light-emitting diode (M1) having a pitch P1 is formed by photolithography and etching processes. Fig. 33-2 shows a cross-sectional view taken along line A-A' of the top view in Fig. 33-3.
[0434] As shown in Figs. 34-1 and 34-2, the first ion implantation region (Ion-1) and the first sub-pixel region (R1) are defined on the first micro light-emitting diode (M1) by ion implantation technology.
[0435] As shown in Figs. 35-1, 35-2, and 35-3, the conductive layer (ML) is formed on the first sub-pixel region (R1). Figs. 35-1 and 35-2 show cross-sectional views taken along lines A-A' and A''-A''' of Fig. 35-3, respectively.
[0436] As shown in Fig. 36-1, the first sub-pixel (R1) having the conductive layer structure (ML) is electrically connected to the first transparent substrate (T1) via a bonding pad (BL), and the first epitaxial substrate (S1) is removed, for example, by etching or laser. Next, as shown in Fig. 36-2, in order to strengthen the mechanical structure, the first light-transmissive intermediate layer (B1) is filled between the first transparent substrate (T1) and the first sub-pixel (R1). The first micro light-emitting diode (M1) located on the first transparent substrate (T1) has a pitch P2, and the pitch P1 is equal to the pitch P2. Fig. 36-2 shows the array structure of the first sub-pixels.
[0437] As shown in Fig. 37-1, the second epitaxial layer structure (Epi layer-2) is formed on the second epitaxial substrate S2, and the second micro light-emitting diode (M2) having a pitch P3 is formed by photolithography and etching processes. Fig. 37-2 shows a cross-sectional view taken along line C-C' of the top view in Fig. 37-3.
[0438] As shown in FIGS. 38-1 and 38-2, the first section (Ion-2a) and the second section (Ion-2b) of the second ion implantation region, and the second sub-pixel region (G1) are defined on the second micro light-emitting diode (M2) by ion implantation technology.
[0439] As shown in FIGS. 39-1, 39-2 and 39-3, the conductive layer (ML) is formed on the second sub-pixel region (G1), and FIGS. 39-1 and 39-2 respectively show cross-sectional views along the C-C' line and the C''-C''' line of FIG. 39-3.
[0440] As shown in FIG. 40-1, the second sub-pixel (G1) having the conductive layer structure (ML) is electrically connected to the second transparent substrate (T2) via the bonding pad (BL), and the second epitaxial substrate (S2) is removed, for example, by etching or laser. Next, as shown in FIG. 40-2, in order to strengthen the mechanical structure, the second light-transmissive intermediate layer (B2) is filled between the second transparent substrate (T2) and the second sub-pixel (G1). The second micro light-emitting diode (M2) located on the second transparent substrate (T2) has a pitch P4, and the pitch P3 is equal to the pitch P4. FIG. 40-2 shows the array structure of the second sub-pixels.
[0441] As shown in FIG. 41-1, the third epitaxial layer structure (Epi layer-3) is formed on the third epitaxial substrate S3, and the third micro light-emitting diode (M3) having a pitch P5 is formed by photolithography and etching processes. FIG. 41-2 shows a cross-sectional view along the E-E' line of the top view FIG. 41-3.
[0442] As shown in FIGS. 42-1 and 42-2, the third ion implantation region (Ion-3) and the third sub-pixel region (B1) are defined on the third micro light-emitting diode (M3) by ion implantation technology.
[0443] As shown in FIGS. 43-1, 43-2, and 43-3, the conductive layer (ML) is formed over the third subpixel region (B1), and FIGS. 43-1 and 43-2 show cross-sectional views along the E-E' line and the E''-E''' line of FIG. 43-3, respectively.
[0444] As shown in FIG. 44-1, the third subpixel (B1) having the conductive layer structure (ML) is electrically connected to the third transparent substrate (T3) via the bonding pad (BL), and the third epitaxial substrate (S3) is removed, for example, by etching or laser. Next, as shown in FIG. 44-2, the third light-transmissive intermediate layer (B3) is filled between the third transparent substrate (T3) and the third subpixel (B1) to strengthen the mechanical structure. The third micro light-emitting diode (M3) located on the third transparent substrate (T3) has a pitch P6, and the pitch P5 is equal to the pitch P6. FIG. 44-2 shows the array structure of the third subpixels, among which P2 = P4 = P6.
[0445] As shown in FIGS. 45-1 and 45-2, the first sub-pixel structure, the second sub-pixel structure, and the third sub-pixel structure realize a micro-LED by 3D stacking of an RGB pixel array via A-1 and A-2 of a light-transmissive adhesive layer. FIG. 45-2 is an enlarged view of the first pixel (Pixel1) and is a cross-sectional view taken along line G-G' in FIG. 45-3. The first sub-pixel region (R1) is equal to the first section (Ion-2a) of the second ion implantation region, the third sub-pixel region (B1) is equal to the second section (Ion-2b) of the second ion implantation region, and the sum of the second sub-pixel region (G1) and the third sub-pixel region (B1) is equal to the first ion implantation region (Ion-1). The micro-LED realized by 3D stacking of the RGB pixel array of the present invention has a thickness D-1. In one embodiment, the thickness D-1 is less than 500 μm, in other preferred embodiments, the thickness D-1 is less than 200 μm, in more preferred embodiments, the thickness D-1 is less than 100 μm, and in even more preferred embodiments, the thickness D-1 is less than 50 μm. In one embodiment, the sub-pixel having the longest wavelength is disposed at the bottom and the sub-pixel having the shortest wavelength is disposed at the top, thereby avoiding the excitation of the long-wavelength sub-pixel by the short-wavelength sub-pixel. The emission wavelength and position of the sub-pixel are not limited thereto. In one embodiment, the light transmittance of the micro-LED realized by 3D stacking of the RGB pixel array of the present invention is greater than 60%, in a preferred embodiment, greater than 70%, in a more preferred embodiment, greater than 80%, and in an even more preferred embodiment, greater than 90%.
[0446] The transparent substrates (T1, T2, T3) of the present invention may be flexible substrates. The material of the flexible substrate may include ultra-thin glass, metal foil, fiber-reinforced composite material, plastic film, ceramic substrate, or any combination of two or more of the above materials. The thickness of the flexible substrate is preferably less than 200 μm, more preferably less than 50 μm, and most preferably from 25 μm to 50 μm.
[0447] The coefficient of thermal expansion of the metal foil approximates that of thin glass. The surface roughness Ra of the transparent metal foil is less than 10 nm. The plastic film has a light transmittance greater than 90% at a wavelength of 550 nm. The material of the plastic film may include, for example, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), or polyethersulfone (PES). The fiber-reinforced composite material may include, for example, carbon fibers, silicon carbide fibers, or boron filaments.
[0448] According to another embodiment of the present invention shown in FIGS. 46-1 and 46-2, R1-1 is the first sub-pixel, R1-2 is the first spare sub-pixel, G1-1 is the second sub-pixel, G1-2 is the second spare sub-pixel, B1-1 is the third sub-pixel, and B1-2 is the third spare sub-pixel. Through the circuit, only one of the sub-pixels R1-1 and R1-2 is controlled to emit light, only one of the sub-pixels G1-1 and G1-2 is controlled to emit light, and only one of the sub-pixels B1-1 and B1-2 is controlled to emit light. Note that the sum of the first sub-pixel (R1-1) region and the first spare sub-pixel (R1-2) region is equal to the first section (Ion-2a) of the second ion implantation region. The sum of the third sub-pixel (B1-1) region and the third spare sub-pixel (B1-2) region is equal to the second section (Ion-2b) of the second ion implantation region. The sum of the second sub-pixel (G1-1) region, the second spare sub-pixel (G1-2) region, the third sub-pixel (B1-1) region, and the third spare sub-pixel (B1-2) region is equal to the first ion implantation region (Ion-1).
[0449] (R1-1)+(R1-2)=Ion-2a
[0450] (B1-1)+(B1-2)=Ion-2b
[0451] (G1-1)+(G1-2)+(B1-1)+(B1-2)=Ion-1
[0452] According to another embodiment of the present invention shown in FIGS. 47-1 and 47-2, R1-1 is the first sub-pixel, and R1-2, R1-3, R1-4, R1-5, and R1-6 are all the first spare sub-pixels, G1-1 is the second sub-pixel, and G1-2, G1-3, and G1-4 are all the second spare sub-pixels, B1-1 is the third sub-pixel, and B1-2 is the third spare sub-pixel. Through the circuit, only one of the sub-pixels R1-1, R1-2, R1-3, R1-4, R1-5, and R1-6 is controlled to emit light, only one of the sub-pixels G1-1, G1-2, G1-3, and G1-4 is controlled to emit light, and only one of the sub-pixels B1-1 and B1-2 is controlled to emit light. The advantage of this design is that the spare pixels can be used more flexibly.
[0453] The sum of the first sub-pixel (R1-1) region and the first spare sub-pixel (R1-2) region is equal to the second ion implantation region (Ion-2).
[0454] (R1-1)+(R1-2)=Ion-2
[0455] (R1-3)+(R1-4)=(G1-1)+(G1-2)
[0456] (R1-5)+(R1-6)=(G1-3)+(G1-4)=(B1-1)+(B1-2)
[0457] (R1-1)+(R1-2)+(R1-3)+(R1-4)=Ion-3
[0458] According to another embodiment of the present invention shown in FIGS. 48-1 and 48-2, R1-1 is the first sub-pixel, and R1-2, R1-3, R1-4, R1-5, and R1-6 are all the first preliminary sub-pixels, G1-1 is the second sub-pixel, and G1-2, G1-3, G1-4, G1-5 and G1-6 are all the second preliminary sub-pixels, B1-1 is the third sub-pixel, and B1-2, B1-3, B1-4, B1-5, and B1-6 are all the third preliminary sub-pixels. Through the circuit, only one of the sub-pixels R1-1, R1-2, R1-3, R1-4, R1-5, and R1-6 is controlled to emit light, only one of the sub-pixels G1-1, G1-2, G1-3, G1-4, G1-5, and G1-6 is controlled to emit light, and only one of the sub-pixels B1-1, B1-2, B1-3, B1-4, B1-5, and B1-6 is controlled to emit light. The advantage of this design is that the preliminary pixels can be used more flexibly. (R1-1)=(G1-5)=(B1-3) (R1-2)=(G1-6)=(B1-4) (R1-3)=(G1-1)=(B1-5) (R1-4)=(G1-2)=(B1-6) (R1-5)=(G1-3)=(B1-1) (R1-6)=(G1-4)=(B1-2)
[0459] According to another embodiment of the present invention shown in FIGS. 49-1 and 49-2, R1-1A, R1-2A, R1-3A, R1-4A, R1-5A, and R1-6A are all the first sub-pixels, G1-1A, G1-2A, G1-3A, G1-4A, G1-5A, and G1-6A are all the second sub-pixels, and B1-1A, B1-2A, B1-3A, B1-4A, B1-5A, and B1-6A are all the third sub-pixels.
[0460] The first pixel is composed of pixels 1A to 1F. Since the width of any one of pixels 1A to 1F is smaller than the limit of the resolution of the human eye, no spare pixels are required. Even if any one of pixels 1A to 1F is broken, since the human eye cannot recognize a dead pixel, there is no need to replace the dead pixel. According to an embodiment of the present invention, for example, when the resolution of the monitor is 1440×960 (pixels), the number of pixels per inch is 494.48 ppi, and the dot pitch of the sub-pixel is smaller than 0.0514 mm. This is because the human eye cannot recognize a single dead pixel at a normal viewing distance, so no spare pixels are required. In a preferred embodiment of the present invention, for example, when the resolution of the monitor is 1920×1280 (pixels), the number of pixels per inch is 659.3 ppi, and the dot pitch of the sub-pixel is smaller than 0.0385 mm. This is because even if any one of the adjacent micro light-emitting diodes fails, the human eye cannot recognize a single dead pixel at a normal viewing distance, so no spare pixels are required. In a more preferred embodiment of the present invention, for example, when the resolution of the monitor is 3840×2560 (pixels), the number of pixels per inch is 1318.6 ppi, and the dot pitch of the sub-pixel is smaller than 0.0193 mm. This is because even if any two of the adjacent micro light-emitting diodes fail, the human eye cannot recognize a single dead pixel at a normal viewing distance, so no spare pixels are required.
[0461] According to another embodiment of the present invention shown in FIG. 50, the epitaxial substrates (S1), (S2), and (S3) are all transparent substrates. Since the RGB micro LEDs can perform 3D stacking directly without being transferred to the transparent substrate, the manufacturing process can be simplified.
[0462] According to another embodiment of the present invention shown in FIG. 51, in order to enhance the contrast of the pixel, a black mattress layer BM is further included.
[0463] According to another embodiment of the present invention shown in FIG. 52, in order to improve the accuracy of 3D stacking, each micro light-emitting diode may further include a magnetic layer (ML). The magnetic layer may be formed by techniques such as doping, ion implantation, diffusion, or thin film deposition. The magnetic material may include, for example, iron (Fe), cobalt (Co), nickel (Ni), terbium (Tb), aluminum (Al), platinum (Pt), samarium (Sm), copper (Cu), chromium (Cr), or combinations thereof.
[0464] According to another embodiment of the present invention shown in FIG. 53, the surface and sidewall regions of each micro light-emitting diode further include a current blocking area. The current blocking area reduces non-radiative recombination of the micro light-emitting diode, and thus improves the efficiency of the micro light-emitting diode. The current blocking area is composed of a dielectric material such as silicon nitride, silicon dioxide, or aluminum oxide (Al2O3). The first current blocking area covering the sidewall region of the present invention has an arc shape.
[0465] According to another embodiment of the present invention shown in FIG. 54, the surface and sidewall regions of each micro light-emitting diode further include a current limiting area. The current limiting area reduces non-radiative recombination of the micro light-emitting diode, and thus improves the efficiency of the micro light-emitting diode. The current limiting area is formed by ion implantation technology.
[0466] According to another embodiment of the present invention shown in FIG. 55-1, a Micro-led display controls light emission by being electrically connected to an Integrated control system. Also, the image displayed by the Micro-led display is projected onto an Optical component via a Lens system and reflected to the human eye. The human eye can simultaneously view the actual scene and the Augmented Reality (AR) generated by the image of the Micro-led display through the Optical component. The Optical component may be a light-transmissive windscreen glass, a transparent resin glass, a light-transmissive spectacle lens, or a foldable display. The Optical component has functions of light transmission and reflection. The Micro-led display is implemented by 3D stacking of an RGB pixel array to realize Micro-LEDs and in combination with ion implantation planarization technology. The side length of the Micro-LED of the present invention is preferably less than 4 μm.
[0467] According to another embodiment of the present invention shown in FIG. 55-2, the difference from FIG. 55-1 is that the RGB Micro-led display can be independently controlled and displayed after projection by being electrically connected to the integrated control system individually, so no mass transfer is required and an RGB Micro-led display can be realized with a single epitaxial chip. Also, the Micro-led display is implemented by 3D stacking of an RGB pixel array to realize Micro-LEDs and in combination with ion implantation planarization technology. The side length of the Micro-LED of the present invention is preferably less than 4 μm.
[0468] According to another embodiment of the present invention shown in FIG. 55-3, the micro light-emitting diode display and the lens system are integrated inside the optical component. The micro light-emitting diode display projects the image of the micro light-emitting diode display onto the lens system and reflects it to the human eye by being electrically connected to the integrated control system. The human eye can simultaneously see the actual scene and the augmented reality (AR) generated by the image of the micro light-emitting diode display through the optical component. The optical component may be a light-transmissive windshield glass, a transparent resin glass, a light-transmissive spectacle lens, or a foldable display. The integrated control system may be disposed inside or outside the optical component. The micro light-emitting diode display is implemented by realizing micro LEDs through 3D stacking of RGB pixel arrays and combining with ion implantation planarization technology. The side length of the micro LED of the present invention is preferably less than 4 μm.
[0469] According to another embodiment of the present invention shown in FIG. 55-4, the difference from FIG. 55-3 is that the RGB micro light-emitting diode displays can be independently controlled and displayed after projection by being electrically connected to the integrated control system individually, so no master transfer is required and the RGB micro light-emitting diode display can be realized with a single epitaxial chip. The integrated control system may be disposed inside or outside the optical component. Also, the micro light-emitting diode display is implemented by realizing micro LEDs through 3D stacking of RGB pixel arrays and combining with ion implantation planarization technology. The side length of the micro LED of the present invention is preferably less than 4 μm.
[0470] As shown in FIG. 55-5, in order to provide control of the micro-LED display and appropriate augmented reality functions to the user, the above integrated control system may further include a multi-function sensor, microchip processors, and a network interface. The multi-function sensor may be, for example, an ultrasonic sensor, a temperature sensor, a humidity sensor, a gas sensor, a pressure sensor, an acceleration sensor, an ultraviolet sensor, a magnetic sensor, a magnetoresistive sensor, an image sensor, an electrical sensor, a displacement sensor, a touch sensor, an infrared proximity / distance sensor, a GPS satellite positioning system module, a gyroscope and an accelerometer, a fingerprint sensor, an iris sensor, a button, a knob, a switch, a microphone, a camera, or an RFID reader module. The user can adjust the position, size, or zoom in / out of the augmented reality through the multi-function sensor and can provide appropriate augmented reality information. In one embodiment, the position of the projection of the augmented reality is adjusted by sensing the position and state of the pupil through a multi-function sensor in cooperation with the microchip processor. This is to match the actual scene seen through the optical components with the augmented reality, avoid distortion of the augmented reality, and display it accurately. Further, in order to provide appropriate augmented reality information, the network interface may be used to transfer information to another network.
[0471] FIG. 56-1 shows the structure of smart glasses. The integrated control system and the display are arranged on the frame of the glasses, and the image is projected by the display onto the optical component and reflected to the human eye. The human eye can simultaneously view the actual scene and the augmented reality (AR) generated by the image on the display through the optical component. Since the structure of the smart glasses is limited by the size of the light source of the display, it is difficult to achieve lightweight and miniaturization. Display technologies include digital light processing (DLP), microelectromechanical system (MEMS) lasers, liquid crystal on silicon (LCOS), etc. Among them, DLP technology is based on a microelectromechanical system component called a digital micromirror device (DMD). The DMD has a large volume due to its complex peripheral circuits, and furthermore, the high-frequency switches of the MEMS components also cause excessive power consumption problems. Also, LCOS technology has the drawbacks of low luminous efficiency and large volume. By replacing the normal display with a micro-light emitting diode display (Micro-led display), the present invention can not only improve the resolution but also reduce the size according to the needs of wearable devices, thus having the advantages of low power consumption and miniaturization and enhancing the market competitiveness. Furthermore, normal smart glasses are limited by the size of the light source of the display and the design of the mirror, so the range of augmented reality provided is limited. In the present invention, the size of the display is reduced, the design of the projection optical path becomes more flexible, the range of augmented reality provided can be expanded, and a more comfortable usage environment can be provided for the user. Also, the micro-light emitting diode display is realized by 3D stacking of RGB pixel arrays of micro LEDs and is implemented by combining with ion implantation planarization technology. The side length of the micro LED of the present invention is preferably less than 4 μm.
[0472] According to an embodiment of the present invention shown in FIG. 56-2, an integrated control system combined with a micro light emitting diode display is disposed on the frame of glasses, and an image is projected onto an optical component and reflected onto a human eye. The human eye can simultaneously view the actual scene and the augmented reality generated by the image of the display through the optical component.
[0473] According to an embodiment of the present invention shown in FIG. 56-3, an integrated control system combined with a micro light emitting diode display is disposed on the upper part of the rims of glasses, and an image is projected onto an optical component and reflected onto a human eye. The human eye can simultaneously view the actual scene and the augmented reality generated by the image of the display through the optical component.
[0474] According to an embodiment of the present invention shown in FIG. 56-4, the integrated control system may be combined with a micro light emitting diode display and disposed at any position around the rims of the glasses or at the bridge portion of the glasses, and is not limited to the shape of the frame of the glasses. An image is projected onto an optical component and reflected onto a human eye. The human eye can simultaneously view the actual scene and the augmented reality generated by the image of the display through the optical component.
[0475] According to an embodiment of the present invention shown in FIG. 56-5, the integrated control system is disposed on the upper part of the rims of the glasses, and the micro light emitting diode display and the lens system are integrated inside the optical component. The micro light emitting diode display is electrically connected to the integrated control system, so that the image of the micro light emitting diode display is projected onto the lens system and reflected onto a human eye. The human eye can simultaneously view the actual scene and the augmented reality generated by the image of the micro light emitting diode display through the optical component.
[0476] According to another embodiment of the present invention shown in FIG. 57-1, the micro light-emitting diode has a magnetic layer structure. First, an epitaxial substrate is provided, and then a magnetic layer (Magnetic Layer, ML) is formed on the epitaxial substrate. The material of the magnetic layer may include a semiconductor layer, a conductive layer, and an oxide layer, and the magnetic layer is formed by techniques such as doping, ion implantation, diffusion, or thin film deposition. The magnetic material may include, for example, iron (Fe), cobalt (Co), nickel (Ni), terbium (Tb), aluminum (Al), platinum (Pt), samarium (Sm), copper (Cu), chromium (Cr), or combinations thereof. Finally, a first-type semiconductor layer, a light-emitting layer, and a second-type semiconductor layer are sequentially formed on the magnetic layer.
[0477] FIG. 57-2 shows the structure of a horizontal magnetic micro light-emitting diode. The horizontal magnetic micro light-emitting diode removes a part of the second-type semiconductor layer and the light-emitting layer by an etching process to expose a part of the first-type semiconductor layer, forms a metal layer that makes an ohmic contact with the first-type semiconductor layer, forms another metal layer that makes an ohmic contact with the second-type semiconductor layer, and forms a horizontal magnetic micro light-emitting diode by removing the epitaxial substrate.
[0478] FIG. 57-3 shows the structure of a vertical magnetic micro light-emitting diode. The vertical magnetic micro horizontal magnetic micro light-emitting diode is formed by forming a metal layer that makes an ohmic contact with the second-type semiconductor layer, removing the epitaxial substrate to expose the magnetic layer, and forming another metal layer that contacts the magnetic layer.
[0479] FIG. 57-4 shows the structure of another vertical magnetic micro light-emitting diode. The vertical magnetic micro light-emitting diode is formed by forming a metal layer that makes an ohmic contact with the second-type semiconductor layer, removing the epitaxial substrate and a part of the magnetic layer to expose the first-type semiconductor layer, and forming another metal layer that makes an ohmic contact with the first-type semiconductor layer.
[0480] As shown in FIGS. 57-5, 57-6, and 57-7, the surface and sidewall regions of the magnetic micro light-emitting diode further include a first current blocking layer. The first current blocking layer reduces non-radiative recombination of the magnetic micro light-emitting diode, and thus improves the efficiency of the micro light-emitting diode. The first current blocking layer is composed of a dielectric material such as silicon nitride, silicon dioxide, or aluminum oxide (Al2O3), for example.
[0481] As shown in FIGS. 57-8, 57-9, and 57-10, the surface and sidewall regions of the magnetic micro light-emitting diode further include a first current limiting layer. The current limiting layer reduces non-radiative recombination of the magnetic micro light-emitting diode, and thus improves the efficiency of the micro light-emitting diode. The first current limiting layer is formed by ion implantation technology.
[0482] FIG. 57-11 shows the structure of a horizontal magnetic micro light-emitting diode. The horizontal magnetic micro light-emitting diode is formed by removing a part of the second-type semiconductor layer and a part of the light-emitting layer by an etching process, exposing a part of the first-type semiconductor layer, forming a metal layer in ohmic contact with the first-type semiconductor layer, forming a second current blocking layer on the second-type semiconductor layer, forming a transparent conductive layer in ohmic contact with the second-type semiconductor layer on the second-type semiconductor layer, covering the second current blocking layer with the transparent conductive layer, removing a part of the transparent conductive layer and a part of the second current blocking layer, exposing a part of the second-type semiconductor layer, forming another metal layer in direct contact with the second-type semiconductor layer, electrically connecting the another metal layer to the transparent conductive layer, forming a first current blocking layer covering the sidewall region and the transparent conductive layer, and removing the epitaxial substrate.
[0483] The first current blocking layer can reduce the non-radiative recombination of the magnetic micro light-emitting diode, and thus improve the efficiency of the micro light-emitting diode. The first current blocking layer is composed of a dielectric material. The second current blocking layer can prevent current congestion, enhance the effect of current diffusion, increase the probability of electron-hole recombination, and improve the light-emitting efficiency. The second current blocking layer is composed of a dielectric material. Since the other metal layer is in direct contact with the second-type semiconductor layer, a stable bonding effect can be obtained, and the structural stability can be improved.
[0484] FIG. 57-12 shows the structure of a horizontal magnetic micro light-emitting diode. The horizontal magnetic micro light-emitting diode removes a part of the second-type semiconductor layer and a part of the light-emitting layer through an etching process, exposes a part of the first-type semiconductor layer, forms a metal layer that makes an ohmic contact with the first-type semiconductor layer, forms a second current limiting layer in the inner upper region of the second-type semiconductor layer, forms a transparent conductive layer that makes an ohmic contact with the second-type semiconductor layer on the second-type semiconductor layer, the transparent conductive layer covers the second current limiting layer, removes a part of the transparent conductive layer, exposes a part of the second-type semiconductor layer, forms another metal layer that is in direct contact with the second-type semiconductor layer, the other metal layer is electrically connected to the transparent conductive layer, forms a first current limiting layer in the sidewall region, and a horizontal magnetic micro light-emitting diode is formed by removing the epitaxial substrate. The first current limiting layer is located on the surface and sidewall region of the magnetic micro light-emitting diode, can reduce the non-radiative recombination of the magnetic micro light-emitting diode, and thus improve the efficiency of the magnetic micro light-emitting diode. The first current limiting layer is formed by ion implantation technology. The second current limiting layer can prevent current congestion, enhance the effect of current diffusion, increase the probability of electron-hole recombination, and improve the light-emitting efficiency. The second current limiting layer is formed by ion implantation technology. Since the other metal layer is in direct contact with the second-type semiconductor layer, a stable bonding effect can be obtained, and the structural stability can be improved.
[0485] FIG. 57-13 shows the structure of a horizontal magnetic micro light-emitting diode. The horizontal magnetic micro light-emitting diode removes a part of the second-type semiconductor layer and a part of the light-emitting layer by an etching process to expose a part of the first-type semiconductor layer, forms a metal layer that makes an ohmic contact with the first-type semiconductor layer, forms a second current limiting layer in the inner upper region of the second-type semiconductor layer, forms a transparent conductive layer that makes an ohmic contact with the second-type semiconductor layer on the second-type semiconductor layer, the transparent conductive layer covers the second current limiting layer, removes a part of the transparent conductive layer to expose a part of the second-type semiconductor layer, forms another metal layer that directly contacts the second-type semiconductor layer, the another metal layer is electrically connected to the transparent conductive layer, forms a first current blocking layer that covers the sidewall region and the transparent conductive layer, and a horizontal magnetic micro light-emitting diode is formed by removing the epitaxial substrate. The first current blocking layer reduces non-radiative recombination of the magnetic micro light-emitting diode, and thus improves the efficiency of the micro light-emitting diode. The first current blocking layer is composed of a dielectric material. The second current limiting layer can prevent current congestion, enhance the effect of current diffusion, increase the probability of electron-hole recombination, and improve the light-emitting efficiency. The second current limiting layer is formed by ion implantation technology. Since the another metal layer directly contacts the second-type semiconductor layer, a stable bonding effect can be obtained and the structural stability can be improved.
[0486] FIG. 57-14 shows the structure of a horizontal magnetic micro light-emitting diode. The horizontal magnetic micro light-emitting diode removes a part of the second-type semiconductor layer and a part of the light-emitting layer by an etching process to expose a part of the first-type semiconductor layer, forms a metal layer that makes an ohmic contact with the first-type semiconductor layer, forms a second current blocking layer on the second-type semiconductor layer, forms a transparent conductive layer that makes an ohmic contact with the second-type semiconductor layer on the second-type semiconductor layer, the transparent conductive layer covers the second current blocking layer, removes a part of the transparent conductive layer and a part of the second current blocking layer to expose a part of the second-type semiconductor layer, forms another metal layer that directly contacts the second-type semiconductor layer, the another metal layer is electrically connected to the transparent conductive layer, forms a first current limiting layer in the sidewall region, and forms a horizontal magnetic micro light-emitting diode by removing the epitaxial substrate. The first current limiting layer is located on the surface and sidewall region of the magnetic micro light-emitting diode, reduces non-radiative recombination of the magnetic micro light-emitting diode, and thus improves the efficiency of the magnetic micro light-emitting diode. The first current limiting layer is formed by ion implantation technology. The second current blocking layer can prevent current congestion, enhance the effect of current diffusion, increase the probability of electron-hole recombination, and improve the light-emitting efficiency. The second current blocking layer is composed of a dielectric material. Since the another metal layer directly contacts the second-type semiconductor layer, a stable bonding effect can be obtained and the structural stability can be improved.
[0487] FIG. 57-15 shows the structure of a vertical magnetic micro light emitting diode. In the vertical magnetic micro light emitting diode, a second current blocking layer is formed on a second type semiconductor layer, a transparent conductive layer that makes an ohmic contact with the second type semiconductor layer is formed on the second type semiconductor layer, the transparent conductive layer covers the second current blocking layer, a part of the transparent conductive layer and the second current blocking layer is removed to expose a part of the second type semiconductor layer, a metal layer that is in direct contact with the second type semiconductor layer is formed, the metal layer is electrically connected to the transparent conductive layer, the first type semiconductor layer is exposed by removing an epitaxial substrate and a part of a magnetic layer, another metal layer that makes an ohmic contact with the first type semiconductor layer is formed, and a vertical magnetic micro light emitting diode is formed by forming a first current blocking layer that covers a sidewall region and the transparent conductive layer. The first current blocking layer reduces non-radiative recombination of the magnetic micro light emitting diode, and thus improves the efficiency of the micro light emitting diode. The first current blocking layer is composed of a dielectric material. The second current blocking layer can prevent current congestion, enhance the effect of current diffusion, increase the probability of electron-hole recombination, and improve the light emitting efficiency. The second current blocking layer is composed of a dielectric material. Since the metal layer is in direct contact with the second type semiconductor layer, a stable bonding effect can be obtained and the structural stability can be improved.
[0488] FIG. 57-16 shows the structure of a vertical magnetic micro light-emitting diode. The vertical magnetic micro light-emitting diode forms a first current limiting layer in the sidewall region, forms a second current limiting layer in the internal upper layer region of the second-type semiconductor layer, forms a transparent conductive layer on the second-type semiconductor layer that makes an ohmic contact with the second-type semiconductor layer, the transparent conductive layer covers the second current limiting layer, removes a part of the transparent conductive layer to expose a part of the second-type semiconductor layer, forms a metal layer that directly contacts the second-type semiconductor layer, the metal layer is electrically connected to the transparent conductive layer, forms a first current limiting layer in the sidewall region, removes the epitaxial substrate and part of the magnetic layer to expose the first-type semiconductor layer, and forms another metal layer that makes an ohmic contact with the first-type semiconductor layer, thereby forming a vertical magnetic micro light-emitting diode. The first current limiting layer is located on the surface and in the sidewall region of the magnetic micro light-emitting diode, reduces the non-radiative recombination of the magnetic micro light-emitting diode, and thus improves the efficiency of the magnetic micro light-emitting diode. The first current limiting layer is formed by ion implantation technology. The second current limiting layer can prevent current congestion, enhance the effect of current diffusion, increase the probability of electron-hole recombination, and improve the light-emitting efficiency. The second current limiting layer is formed by ion implantation technology. Since the metal layer directly contacts the second-type semiconductor layer, a stable bonding effect can be obtained, and the structural stability can be improved.
[0489] FIG. 57-17 shows the structure of a vertical magnetic micro light-emitting diode. The vertical magnetic micro light-emitting diode forms a second current limiting layer in the internal upper layer region of the second-type semiconductor layer, forms a transparent conductive layer on the second-type semiconductor layer that makes an ohmic contact with the second-type semiconductor layer, the transparent conductive layer covers the second current limiting layer, removes a part of the transparent conductive layer to expose a part of the second-type semiconductor layer, forms a metal layer that directly contacts the second-type semiconductor layer, the metal layer is electrically connected to the transparent conductive layer, forms a first current blocking layer that covers the sidewall region and the transparent conductive layer, removes the epitaxial substrate and part of the magnetic layer to expose the first-type semiconductor layer, and forms another metal layer that makes an ohmic contact with the first-type semiconductor layer, thereby forming a vertical magnetic micro light-emitting diode.
[0490] The first current blocking layer reduces non-radiative recombination of the magnetic micro light-emitting diode, thereby improving the efficiency of the micro light-emitting diode. The first current blocking layer is composed of a dielectric material. The second current limiting layer can prevent current congestion, enhance the effect of current diffusion, increase the probability of electron-hole recombination, and improve the light-emitting efficiency. The second current limiting layer is formed by ion implantation technology. Since the metal layer is in direct contact with the second-type semiconductor layer, a stable bonding effect can be obtained, and the structural stability can be improved.
[0491] FIG. 57-18 shows the structure of a vertical magnetic micro light-emitting diode. The vertical magnetic micro light-emitting diode forms a first current limiting layer in the sidewall region, forms a second current blocking layer on the second-type semiconductor layer, forms a transparent conductive layer that makes an ohmic contact with the second-type semiconductor layer on the second-type semiconductor layer, the transparent conductive layer covers the second current blocking layer, removes a part of the transparent conductive layer and the second current blocking layer, exposes a part of the second-type semiconductor layer, forms a metal layer that is in direct contact with the second-type semiconductor layer, the metal layer is electrically connected to the transparent conductive layer, removes the epitaxial substrate and a part of the magnetic layer, exposes the first-type semiconductor layer, and forms another metal layer that makes an ohmic contact with the first-type semiconductor layer, thereby forming a vertical magnetic micro light-emitting diode. The first current limiting layer is located on the surface and sidewall region of the magnetic micro light-emitting diode, reduces non-radiative recombination of the magnetic micro light-emitting diode, thereby improving the efficiency of the magnetic micro light-emitting diode. The second current blocking layer can prevent current congestion, enhance the effect of current diffusion, increase the probability of electron-hole recombination, and improve the light-emitting efficiency. The first current limiting layer is formed by ion implantation technology. The second current blocking layer is composed of a dielectric material. Since the metal layer is in direct contact with the second-type semiconductor layer, a stable bonding effect can be obtained, and the structural stability can be improved.
[0492] As shown in Fig. 57-19, since the magnetic micro light-emitting diode has a magnetic layer, the magnetic micro light-emitting diode can be transferred to a target substrate by controlling a controllable transfer head having a magnetic attraction force. Since a good magnetic attraction force is generated between the magnetic force of the magnetic layer itself and the transfer head, the yield of the mass transfer of the micro light-emitting diode can be improved.
[0493] As shown in Fig. 57-20, the structure of the magnetic micro light-emitting diode of the present invention is suitable for fluid mass transfer. When a magnetic micro light-emitting diode having a magnetic layer structure is placed in a fluid transfer system, the magnetic micro light-emitting diode can be self-aligned through its magnetic layer, reducing misalignments that tend to occur during fluid transfer, such as opposite polarities or positional errors, etc., thereby improving the yield of mass transfer and achieving a cost reduction effect.
[0494] Figure 57-20 shows a fluid transfer system. The fluid transfer system has a main chamber, and a solution is contained in the main chamber. A substrate is disposed in the main chamber. The substrate has a plurality of recesses, and a corresponding plurality of magnetic layers are provided at the central portions of the plurality of recesses. The magnetic layers are disposed on the substrate, and some of the magnetic layers are exposed. The main chamber further includes an input end, an input valve, an output end, and an output valve. The solution controls the opening ratios of the input valve and the output valve so as to become a fluid with a flow rate F. The fluid transfer system includes a first sub-chamber, a second sub-chamber, and a third sub-chamber. The first sub-chamber contains a plurality of magnetic micro light-emitting diodes of a first color, a solution, a first valve, and a first input port. When the first valve is opened, the plurality of magnetic micro light-emitting diodes of the first color are flowed downward by the solution injected from the first input port, pass through the first valve and flow into the main chamber, and flow into the corresponding recesses on the substrate through the fluid of the solution. The magnetic micro light-emitting diodes of the first color are attracted by the magnetic force of the magnetic layer on the substrate and self-align in the recesses. The recess has the same shape as the magnetic micro light-emitting diodes of the first color. Thus, the transfer of the magnetic micro light-emitting diodes of the first color onto the substrate is completed.
[0495] The second sub-chamber contains a plurality of magnetic micro light-emitting diodes of a second color, a solution, a second valve, and a second input port. When the second valve is opened, the plurality of magnetic micro light-emitting diodes of the second color are flowed downward by the solution injected from the second input port, pass through the second valve and flow into the main chamber, and flow into the corresponding recesses on the substrate through the fluid of the solution. The magnetic micro light-emitting diodes of the second color are attracted by the magnetic force of the magnetic layer on the substrate and self-align in the recesses. The recess has the same shape as the magnetic micro light-emitting diodes of the second color. Thus, the transfer of the magnetic micro light-emitting diodes of the second color onto the substrate is completed.
[0496] The third sub-chamber contains a plurality of magnetic micro light-emitting diodes of a third color, a solution, a third valve, and a third input port. When the third valve is opened, the plurality of magnetic micro light-emitting diodes of the third color are flowed downward by the solution injected from the third input port, pass through the third valve and flow into the main chamber, and flow into the corresponding recesses on the substrate through the fluid of the solution. The magnetic micro light-emitting diodes of the third color are attracted by the magnetic force of the magnetic layer on the substrate and self-align within the recesses. The recesses have the same shape as the magnetic micro light-emitting diodes of the third color. Thus, the transfer of the magnetic micro light-emitting diodes of the third color onto the substrate is completed.
[0497] FIG. 57-21-1 shows a top view of a substrate of a fluid transfer system. The substrate of the fluid transfer system includes a first recess having a first shape, a second recess having a second shape, and a third recess having a third shape. Each recess has a magnetic layer, and the shape of the first recess is the same as the shape of the magnetic micro light-emitting diodes of the first color, the shape of the second recess is the same as the shape of the magnetic micro light-emitting diodes of the second color, and the shape of the third recess is the same as the shape of the magnetic micro light-emitting diodes of the third color.
[0498] When the first valve is opened, the plurality of magnetic micro light-emitting diodes of the first color are flowed downward by the solution injected from the first input port, pass through the first valve and flow into the main chamber, and flow into the corresponding recesses on the substrate through the fluid of the solution. The magnetic micro light-emitting diodes of the first color are attracted by the magnetic force of the magnetic layer on the substrate and self-align within the recesses. The recesses have the same shape as the magnetic micro light-emitting diodes of the first color. Thus, the transfer of the magnetic micro light-emitting diodes of the first color onto the substrate is completed. By arranging the magnetic micro light-emitting diodes of the first color in the first recess on the substrate, a first sub-pixel area is formed.
[0499] When the second valve is opened, the plurality of magnetic micro light-emitting diodes of the second color are flowed downward by the solution injected from the second input port, pass through the second valve and flow into the main chamber, and flow into the corresponding recesses on the substrate through the fluid of the solution. The magnetic micro light-emitting diodes of the second color are attracted by the magnetic force of the magnetic layer on the substrate and self-align within the recesses. The recesses have the same shape as the magnetic micro light-emitting diodes of the second color. Thus, the transfer of the magnetic micro light-emitting diodes of the second color onto the substrate is completed. By arranging the magnetic micro light-emitting diodes of the second color in the second recesses on the substrate, a second sub-pixel area is formed.
[0500] When the third valve is opened, the plurality of magnetic micro light-emitting diodes of the second color are flowed downward by the solution injected from the third input port, pass through the third valve and flow into the main chamber, and flow into the corresponding recesses on the substrate through the fluid of the solution. The magnetic micro light-emitting diodes of the third color are attracted by the magnetic force of the magnetic layer on the substrate and self-align within the recesses. The recesses have the same shape as the magnetic micro light-emitting diodes of the third color. Thus, the transfer of the magnetic micro light-emitting diodes of the third color onto the substrate is completed. By arranging the magnetic micro light-emitting diodes of the third color in the third recesses on the substrate, a third sub-pixel area is formed.
[0501] The first sub-pixel area, the second sub-pixel area, and the third sub-pixel area form a pixel area.
[0502] Figure 57-21-2 shows a top view of the substrate of the fluid transfer system. The substrate of the fluid transfer system includes a first recess, a second recess, and a third recess. Each recess has a magnetic layer, and the magnetic layer has a programmable function, for example, the presence or absence of magnetic attraction can be controlled by electromagnetic force.
[0503] Before the first valve is opened, the magnetic layer in the first recess is controlled to have a magnetic attraction force, and the second and third recesses are controlled not to have a magnetic attraction force. When the first valve is opened, the plurality of magnetic micro light-emitting diodes of the first color are flowed downward by the solution injected from the first input port, pass through the first valve and flow into the main chamber, and flow into the corresponding recesses on the substrate through the fluid of the solution. The magnetic micro light-emitting diodes of the first color are attracted by the magnetic force of the magnetic layer on the substrate and self-align within the recesses. When the magnetic micro light-emitting diodes of the first color flow into the second or third recess, the magnetic layers of those recesses are controlled not to have a magnetic attraction force, and the flow rate of the fluid is controlled so that the fluid propulsion force of the solution is greater than the capture force of the recess, so the magnetic micro light-emitting diodes of the first color are moved away from the second or third recess and flow into the first recess. Thus, the transfer of the magnetic micro light-emitting diodes of the first color onto the substrate is completed. The magnetic micro light-emitting diodes of the first color are arranged in the first recess on the substrate to form a first sub-pixel area.
[0504] Before the second valve is opened, the magnetic layers of the first recess and the second recess are controlled to have a magnetic attraction force, and the third recess is controlled not to have a magnetic attraction force. When the second valve is opened, a plurality of magnetic micro light-emitting diodes of the second color are flowed downward by the solution injected from the second input port, pass through the second valve and flow into the main chamber, and flow into the corresponding recesses on the substrate through the fluid of the solution. The magnetic micro light-emitting diodes of the second color are attracted by the magnetic force of the magnetic layer on the substrate and self-align in the recesses. When the magnetic micro light-emitting diodes of the second color flow into the third recess, the magnetic layer of the third recess is controlled not to have a magnetic attraction force, and the flow rate of the fluid is controlled so that the fluid propulsion force of the solution is greater than the capture force of the third recess. Therefore, the magnetic micro light-emitting diodes of the second color are moved away from the third recess and flow into the second recess. In this way, the transfer of the magnetic micro light-emitting diodes of the second color onto the substrate is completed. The magnetic micro light-emitting diodes of the second color are arranged in the second recess on the substrate to form a second sub-pixel area.
[0505] Before the third valve is opened, the magnetic layers of the first recess, the second recess and the third recess are controlled to have a magnetic attraction force. When the third valve is opened, a plurality of magnetic micro light-emitting diodes of the third color are flowed downward by the solution injected from the third input port, pass through the third valve and flow into the main chamber, and flow into the corresponding recesses on the substrate through the fluid of the solution. The magnetic micro light-emitting diodes of the third color are attracted by the magnetic force of the magnetic layer on the substrate and self-align in the recesses. In this way, the transfer of the magnetic micro light-emitting diodes of the third color onto the substrate is completed. The magnetic micro light-emitting diodes of the third color are arranged in the third recess on the substrate to form a third sub-pixel area.
[0506] The first sub-pixel area, the second sub-pixel area, and the third sub-pixel area form a pixel area.
[0507] Figures 57-22-1 and 57-22-2 show top views of the substrate of the fluid transfer system. The substrate of the fluid transfer system includes a first recess, a second recess, a third recess, and further a first preliminary recess, a second preliminary recess, and a third preliminary recess. Each recess has a magnetic layer, and each preliminary recess has a preliminary magnetic layer. All of the magnetic layer and the preliminary magnetic layers have functions that can be controlled by a program. For example, the presence or absence of magnetic attraction can be controlled by electromagnetic force. After transferring the magnetic micro light-emitting diodes, an inspection is performed, the positions of abnormal dead pixels are recorded by a program, and mass repair is executed through the preliminary recesses. The magnetic micro light-emitting diodes are transferred to the corresponding preliminary recesses and exchanged with the abnormal dead pixels to complete the repair. Since a large number of dead pixels can be repaired simultaneously, the time and cost required for repair can be significantly reduced. The shape of each preliminary recess may be the same as or different from the shape of the first recess, the second recess, or the third recess. The first recess and the first preliminary recess form a first sub-pixel region, the second recess and the second preliminary recess form a second sub-pixel region, the third recess and the third preliminary recess form a third sub-pixel region, and the first sub-pixel region, the second sub-pixel region, and the third sub-pixel region form a pixel area.
[0508] Figure 57-23 shows the fluid transfer system. The substrate of the fluid transfer system further includes a first valve of the substrate, a second valve of the substrate, and a third valve of the substrate. The valves of the substrate are controlled by a program. When the valves of the substrate are opened, the recesses of the substrate are exposed, and the substrate can capture the micro light-emitting diodes. The micro light-emitting diodes are not limited to magnetic micro light-emitting diodes. The recesses of the substrate further include an attraction layer. The attraction layer may provide electric attraction, magnetic attraction, electrostatic attraction, fluid attraction, air attraction, van der Waals attraction, thermal attraction, and adhesion attraction. The attraction generated by the attraction layer can capture the micro light-emitting diodes in the fluid.
[0509] Before the first valve is opened, control is performed so that the first valve of the substrate is opened, and control is performed so that the second valve and the third valve of the substrate are closed. When the first valve is opened, a plurality of micro light-emitting diodes of the first color are flowed downward by the solution injected from the first input port, pass through the first valve, flow into the main chamber, and flow into the corresponding recesses on the substrate through the fluid of the solution. The micro light-emitting diodes of the first color are attracted by the attraction of the attraction layer on the substrate and self-align in the recesses. Thus, the transfer of the micro light-emitting diodes of the first color onto the substrate is completed.
[0510] Before the second valve is opened, control is performed so that the second valve of the substrate is opened, and control is performed so that the third valve of the substrate is closed. When the second valve is opened, a plurality of micro light-emitting diodes of the second color are flowed downward by the solution injected from the second input port, pass through the second valve, flow into the main chamber, and flow into the corresponding recesses on the substrate through the fluid of the solution. The micro light-emitting diodes of the second color are attracted by the attraction of the attraction layer on the substrate and self-align in the recesses. Thus, the transfer of the micro light-emitting diodes of the second color onto the substrate is completed.
[0511] FIG. 57-24 shows a fluid transfer system. The substrate further includes an attraction layer controllable by a program. The attraction layer may provide electric attraction, magnetic attraction, electrostatic attraction, fluid attraction, air attraction, van der Waals attraction, thermal attraction, and adhesion attraction. The attraction generated by the attraction layer can capture micro light-emitting diodes in the fluid.
[0512] Before the first valve is opened, the first gravitational layer of the substrate is controlled to have a gravitational force, and the second and third gravitational layers of the substrate are controlled not to have a gravitational force. When the first valve is opened, a plurality of micro light-emitting diodes of the first color are flowed downward by the solution injected from the first input port, pass through the first valve and flow into the main chamber, and flow into the corresponding recesses on the substrate through the fluid of the solution. The micro light-emitting diodes of the first color are attracted by the gravitational force of the gravitational layer on the substrate and self-align within the recesses. When the micro light-emitting diodes of the first color flow into the second or third recesses, the gravitational layers of those recesses are controlled not to have a gravitational force, and the flow rate of the fluid is controlled so that the fluid propulsion force of the solution is greater than the capture force of the recesses. Therefore, the micro light-emitting diodes of the first color are moved away from the second or third recesses and flow into the first recesses. Thus, the transfer of the micro light-emitting diodes of the first color onto the substrate is completed.
[0513] Before the second valve is opened, the first and second gravitational layers of the substrate are controlled to have a gravitational force, and the third gravitational layer of the substrate is controlled not to have a gravitational force. When the second valve is opened, a plurality of micro light-emitting diodes of the second color are flowed downward by the solution injected from the second input port, pass through the second valve and flow into the main chamber, and flow into the corresponding recesses on the substrate through the fluid of the solution. The micro light-emitting diodes of the second color are attracted by the gravitational force of the gravitational layer on the substrate and self-align within the recesses. When the micro light-emitting diodes of the second color flow into the third recess, the gravitational layer of that recess is controlled not to have a gravitational force, and the flow rate of the fluid is controlled so that the fluid propulsion force of the solution is greater than the capture force of the recess. Therefore, the micro light-emitting diodes of the second color are moved away from the third recess and flow into the second recess. Thus, the transfer of the micro light-emitting diodes of the second color onto the substrate is completed.
[0514] Before the third valve is opened, the first, second, and third gravitational layers of the substrate are controlled to have a gravitational force. When the third valve is opened, a plurality of micro light-emitting diodes of the third color are flowed downward by the solution injected from the third input port, pass through the third valve, and flow into the main chamber, and flow into the corresponding recesses on the substrate through the fluid of the solution. The micro light-emitting diodes of the third color are attracted by the gravitational force of the gravitational layer on the substrate and self-align within the recesses. In this way, the transfer of the micro light-emitting diodes of the third color onto the substrate is completed.
[0515] FIG. 57-25 shows a fluid transfer system. The substrate of the fluid transfer system further includes a filling layer. The filling layer may be a photoresist or a thermally decomposed dielectric layer, or a solid dissolved by the solution in the chamber. When irradiated by a laser light source or a UV light source, the filling layer dissolves and is removed by the fluid. That is, the filling layer is removed by irradiation or the flow of the solution by controlling the opening and closing of the first valve, the second valve, or the third valve of the substrate, and as a result, the programmably controllable gravitational layer under the recess is exposed. The programmably controllable gravitational layer may provide an electric gravitational force, a magnetic gravitational force, an electrostatic gravitational force, a fluid gravitational force, an air gravitational force, a van der Waals gravitational force, a thermal gravitational force, and an adhesion gravitational force. The gravitational force generated by the gravitational layer can capture the micro light-emitting diodes in the fluid.
[0516] The substrate of the present invention may be a flexible substrate. The material of the flexible substrate may include ultra-thin glass, metal foil, fiber-reinforced composite material, plastic film, ceramic substrate, or any combination of two or more of the above materials. The thickness of the flexible substrate is preferably less than 200 μm, more preferably less than 50 μm, and most preferably from 25 μm to 50 μm. The metal foil may include, for example, stainless steel, aluminum, nickel, titanium, zirconium, copper, iron, cobalt, palladium, or any combination of two or more of the above materials. The coefficient of thermal expansion of the metal foil approximates that of thin glass. The surface roughness (Ra) of the metal foil is less than 10 nm. The plastic film has a light transmittance greater than 90% at a wavelength of 550 nm. The material of the plastic film may include, for example, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), or polyethersulfone (PES).
[0517] The fiber-reinforced composite material may include, for example, carbon fibers, silicon carbide fibers, or boron filament.
[0518] The present invention provides a micro-LED device, and in particular, provides a micro-LED device that does not require preliminary design. FIGS. 58-1A, 58-2A, and 58-3A show a conventional display. The horizontal resolution of the conventional display is 960 pixels, the vertical resolution is 640 pixels, and the diagonal distance is 3.5 inches (8.89 centimeters (cm)). When the size of the display is 329.65 PPI, it is 2.91”×1.94” = 5.65 square inches (in 2 ) which is equivalent to 7.4 cm × 4.93 cm = 36.48 cm 2 . The dot pitch of the display is 0.0771 mm, and the resolution of the screen is 960×640 (the number of pixels per inch is 329.65 PPI). For a display in which the light-emitting unit is composed of three types of micro light-emitting diodes of RGB, such as a Retina display, the human eye cannot recognize a single pixel at a normal viewing distance. However, in the conventional device, if one of the micro light-emitting diodes fails, it cannot be displayed normally and will be noticed by the human eye. In the conventional method for solving this problem, preliminary circuit design, preliminary micro light-emitting diodes, etc. are used, but there is a drawback of increased cost.
[0519] The present invention provides a micro-LED device that does not require preliminary design. As shown in FIGS. 58-1B, 58-2B, and 58-3B, the display in one embodiment of the present invention has a horizontal resolution of 1920 pixels, a vertical resolution of 1280 pixels, and a diagonal distance of 3.5 inches (8.89 cm). When the size of the display is 659.3 PPI, it is 2.91”×1.94” = 5.65 square inches, which is equivalent to 7.4 cm × 4.93 cm = 36.48 cm 2It corresponds to. The dot pitch of the display is 0.0385 mm, and the screen resolution is 1920×1280 (the number of pixels per inch is 659.3 PPI). Since even if there is one abnormal micro light-emitting diode between any two micro light-emitting diodes of the same color, it cannot be recognized by the human eye, there is an advantage that no redundant circuit design or redundant micro light-emitting diodes are required. Since even if there is one abnormal pixel between any two pixels, it cannot be recognized by the human eye and is thus acceptable, there is an advantage that no redundant circuit design or redundant micro light-emitting diodes are required. Since even if there is one abnormal sub-pixel between any two sub-pixels of the same color, it cannot be recognized by the human eye and is thus acceptable, there is an advantage that no redundant circuit design or redundant micro light-emitting diodes are required.
[0520] The present invention provides a micro-LED device that does not require redundant design. As shown in FIGS. 58-1C, 58-2C, and 58-3C, the display in another embodiment of the present invention has a horizontal resolution of 3840 pixels, a vertical resolution of 2560 pixels, and a diagonal distance of 3.5 inches (8.89 cm). When the size of the display is 1318.6 PPI, it is 2.91”×1.94” = 5.65 square inches, that is, 7.4 cm×4.93 cm = 36.48 cm 2 It corresponds to. The dot pitch of the display is 0.0193 mm, and the screen resolution is 3840×2560 (the number of pixels per inch is 1318.6 PPI). Since even if there are two abnormal micro light-emitting diodes between any two micro light-emitting diodes of the same color, it cannot be recognized by the human eye and is thus acceptable, there is an advantage that no redundant circuit design or redundant micro light-emitting diodes are required. Since even if there are two abnormal pixels between any two pixels, it cannot be recognized by the human eye and is thus acceptable, there is an advantage that no redundant circuit design or redundant micro light-emitting diodes are required. Since even if there are two abnormal sub-pixels between any two sub-pixels of the same color, it cannot be recognized by the human eye and is thus acceptable, there is an advantage that no redundant circuit design or redundant micro light-emitting diodes are required.
[0521] The present invention provides a micro-LED device that does not require preliminary design. The display in one embodiment of the present invention has a horizontal resolution of 1440 pixels, a vertical resolution of 960 pixels, and a diagonal distance of 3.5 inches (8.89 cm). When the size of the display is 494.48 PPI, it is 2.91”×1.94” = 5.65 square inches, that is, 7.4 cm×4.93 cm = 36.48 cm 2 corresponds to. The dot pitch of the display is 0.0514 mm, and the resolution of the screen is 1440×960 (the number of pixels per inch is 494.48 PPI). Between any two micro-light-emitting diodes of the same color, even if there is one abnormal micro-light-emitting diode, it is allowed because it cannot be recognized by the human eye, and there is an advantage that no preliminary circuit design or preliminary micro-light-emitting diodes are required. Between any two pixels, even if there is one abnormal pixel, it is allowed because it cannot be recognized by the human eye, and there is an advantage that no preliminary circuit design or preliminary micro-light-emitting diodes are required. Between any two sub-pixels of the same color, even if there is one abnormal sub-pixel, it is allowed because it cannot be recognized by the human eye, and there is an advantage that no preliminary circuit design or preliminary micro-light-emitting diodes are required.
[0522] As shown in FIGS. 58-1B, 58-1C, 58-2B, 58-2C, 58-3B and 58-3C, the micro-light-emitting diodes in the region surrounded by the dotted line are operating abnormally.
[0523] As shown in FIGS. 58-1B, 58-1C, 58-2B, 58-2C, 58-3B and 58-3C, the sub-pixels in the region surrounded by the dotted line are operating abnormally.
[0524] The pixel of the present invention is composed of three different color micro-light-emitting diodes of R, G, and B (red, green, and blue).
[0525] The pixel of the present invention is composed of three different color sub-pixels of R, G, and B (red, green, and blue).
[0526] For example, the dot pitch, which represents the distance between sub-pixels, is also referred to as line pitch, stripe pitch, phosphor pitch, or pixel pitch.
Number
[0527] The general formula for designing a retina display is as follows. a = 2arctan(h / 2d)
[0528] As shown in Figure 59, "a" is the viewing angle of the human eye, "h" is the dot pitch, and "d" is the distance between the human eye and the display. A display that meets the following requirements belongs to a retina display because the human eye cannot recognize a single pixel. h / 2 = d × tan(a / 2) a = 1 / 53.53 degrees d = viewing distance = 10 inches h = recognition limit h = 2 × d × tan(1 / 53.53 / 2) × π / 180 When d = 10 inches h = 2 × 10 × tan(1 / 53.53 / 2) × π / 180 = 0.003258911 inches 1 / h = 306.85 PPI When d = 15 inches h = 2 × 15 × tan(1 / 53.53 / 2) × π / 180 = 0.004888366831 inches 1 / h = 204.57 PPI When d = 20 inches h = 2 × 20 × tan(1 / 53.53 / 2) × π / 180 = 0.00651788224416 inches 1 / h = 153.42 PPI
Table 1
[0529] In the present invention, by improving the resolution and shortening the distance between sub-pixels, sub-pixels that malfunction become difficult to visually recognize with the human eye, and a backup design of the micro-LED device is unnecessary. In one embodiment of the present invention, as shown in the above table, through different sizes of the retina display and an appropriate viewing distance between the human eye and the display, the PPI and dot pitch adapted to make a single pixel invisible to the human eye can be calculated. When the calculated dot pitch is further reduced to 1 / 1.5, 1 / 2, or 1 / 4, the human eye cannot recognize the malfunctioning sub-pixels, so a backup-designed micro-LED device is not required.
[0530] According to one embodiment of the present invention, by improving the resolution and shortening the distance between sub-pixels, sub-pixels that malfunction become difficult to visually recognize with the human eye, and a backup design of the micro-LED device is unnecessary. Additionally, by combining with the backup design of the micro-LED device, it is also possible to apply it to higher-resolution applications.
[0531] The foregoing embodiments do not impose limitations on the claims of the present invention. Those skilled in the art understand that various changes, combinations, sub-combinations, or substitutions may occur according to design requirements and other factors, and any changes, equivalent substitutions, improvements, etc. made without departing from the spirit or gist of the present invention are included in the protection scope of the present invention.
Explanation of Reference Numerals
[0532] 100 Growth substrate 101 First-type semiconductor layer 102 Second-type semiconductor layer 103 Light-emitting layer 104 Groove 105 Etching region 101―down Bottom surface of the first-type semiconductor layer; second bottom surface Upper surface of the type-2 semiconductor layer; second upper surface 201 First current limiting region, sidewall current limiting region 202 Second current limiting region 203 Third current limiting region 204 Fourth current limiting region 205 Fifth current limiting region Upper surface of the sidewall current limiting region; first upper surface Bottom surface of the sidewall current limiting region; first bottom surface Outer surface of the sidewall current limiting region; first outer surface Inner surface of the sidewall current limiting region; first inner surface Upper surface of the second current limiting region Upper surface of the third current limiting region 301 Transparent electrode 302 Electrode 303 Electrode extension 304 Electrode, back electrode 305 Metal layer 306 Metal layer, magnetic bonding layer, vacuum adsorption layer, electrostatic adsorption layer, adhesive layer 307 Metal layer, magnetic bonding layer, vacuum adsorption layer, electrostatic adsorption layer, adhesive layer 308 Metal layer, magnetic bonding layer, vacuum adsorption layer, electrostatic adsorption layer, adhesive layer 309 Metal layer Arc Arc-shaped D1 First depth D2 Second depth D3 Third depth D4 Fourth depth D5 Fifth depth D6 Sixth depth D7 Seventh depth DS Sidewall length E1 Epitaxial thickness F Light transmissive gel body F1 First fluorescent gel body F2 Second fluorescent gel body F3 Third fluorescent gel body H1 First thickness H2 Second thickness H3 Third thickness H4 Fourth Thickness i L-1 First Low Conductivity Region i L-2 Second Low Conductivity Region i H High Conductivity Region i L-up Top Low Conductivity Region i H-up Top High Conductivity Region i L-out Sidewall Low Conductivity Region, Outer Surface Low Conductivity Region i H-out Sidewall High Conductivity Region, Outer Surface High Conductivity Region O1 Width of the First Opening O2 Width of the Second Opening O3 Third Width O4 Fourth Width O5 Fifth Width P1 First Pitch P2 Second Pitch P3 Third Pitch RS-102-top, RS-201-top, RS-501-top Top Surface Roughness RS-102-out, RS-201-out, RS-501-out Outer Surface Roughness, Sidewall Roughness S1 First Length S2 Second Length S3 Third Length S4 Fourth Length T1 First Width T2 Width T3 Third Width T4 Fourth Width T-up Top Surface Width T-down Bottom Surface Width T1A First Horizontal Width T1B Second Horizontal Width T1C Third Horizontal Width U1 First Surface U2 Second Surface U3 Third Surface U4 Fourth Surface U5 Fifth Surface U6 Sixth Surface 400 Photoelectric Sensor 501 First Current Blocking Region 502 Second Current Blocking Region 503 Third Current Block Region 504 Fourth Current Block Region 505 Fifth Current Block Region 506 Sixth Current Block Region 507 Opening 601 Shield 602 Shield 603 Shield 700 Sacrificial Layer 800 Test Substrate 801 Transfer Substrate 805 Insulating Layer 810 Collection Substrate 820 Permanent Substrate 821 Hole 830 Receiving Substrate 840 Test Substrate 841 Voltage Source 831 First Recess 832 Second Recess 833 Third Recess 850 Wall Structure 901 Ion Implantation 902 Laser 903 Laser 1001 First Container 2001 First Solution Θ1 First Included Angle Θ2 Second Included Angle 1010 Flexible Substrate 1011 Micro Light-Emitting Diode 1012 Gate Driver 1013 Source Driver 1014 Scan Line 1015 Data Line 1100 Bump 1101 Ridge Region 1102 N-Type Pad 1103 P-Type Pad 1104 P-Type Contact Layer 1105 Multi-Layer Quantum Well 1106 N-Type Contact Layer 1107 Buffer Layer 1108 Ion Implantation Region 1109 Preliminary micro light-emitting diode 1110 First epitaxial substrate (S1) 1111 First epitaxial layer structure (Epi layer-1) 1112 First micro light-emitting diode (M1) 111P1 Pitch (P1) 111P2 Pitch (P2) 1114 First ion implantation region (Ion-1) 1115 First sub-pixel region (R1) 1116 Conductive layer (ML) 1117 First transparent substrate (T1) 1118 Bonding pad (BL) 1119 Conductive layer (ML) 111BR1 First light transmissive intermediate layer (BR1) 1120 Second epitaxial substrate (S2) 1121 Second epitaxial layer structure (Epi layer-2) 1122 Second micro light-emitting diode (M2) 112P3 Pitch (P3) 112P4 Pitch (P4) 1124 Second ion implantation region (ion-2) 1124-2a First section of the second ion implantation region (ion-2a) 1124-2b Second section of the second ion implantation region (ion-2b) 1125 Second sub-pixel region (G1) 1126 Conductive layer (ML) 1127 Second transparent substrate (T2) 1128 Bonding pad (BL) 1129 Conductive layer (ML) 1130 Third epitaxial substrate (S3) 1131 Third epitaxial layer structure (Epi layer-3) 1132 Third micro light-emitting diode (M3) 113P5 Pitch (P5) 113P6 Pitch (P6) 1134 Third Ion Implantation Region (Ion-3) 1135 Third Sub-Pixel Region (B1) 1136 Conductive Layer (ML) 1137 Third Transparent Substrate (T3) 1138 Bonding Pad (BL) 1139 Conductive Layer (ML) 113BR3 Third Light-Transmissive Intermediate Layer (BR3) 1141, 1161, 1171, 1181, 1191, 1201, 1211, 1221, 1231, 1241, 1251 First Sub-Pixel Structure (Pixel 1) 1142, 1162, 1172, 1182, 1192, 1202, 1212, 1222, 1232, 1242, 1252 Second Sub-Pixel Structure (Pixel 2) 1143, 1163, 1173, 1183, 1193, 1203, 1213, 1223, 1233, 1243, 1253 Third Sub-Pixel Structure (Pixel 3) 1151 First Light-Transmissive Adhesive Layer (T1) 1152 Second Light-Transmissive Adhesive Layer (T2) 1153 Thickness (D-1) 1161 First Sub-Pixel (R1-1, R1-1A, R1-2A, R1-3A, R1-4A, R1-5A, R1-6A) 1162 Second Sub-Pixel (G1-1, G1-1A, G1-2A, G1-3A, G1-4A, G1-5A, G1-6A) 1163 Third Sub-Pixel (B1-1, B1-1A, B1-2A, B1-3A, B1-4A, B1-5A, B1-6A) 1171 First Spare Sub-Pixel (R1-2, R1-3, R1-4, R1-5, R1-6) 1172 Second Spare Sub-Pixel (G1-2, G1-3, G1-4, G1-5, G1-6) 1173 Third Spare Sub-Pixel (B1-2, B1-3, B1-4, B1-5, B1-6) 1300 Black Matrix Layer 1301 Magnetic Layer (ML) 1302 Current Blocking Region 1303 Current Limiting Region 1400 Integrated Control System 1401 Micro Light Emitting Diode Display 1402 Lens System 1403 Optical Component 1404 Human Eye 1405 Augmented Reality (AR) 1500 Integrated Control System 1501 RGB Micro Light Emitting Diode Display 1502 Lens System 1503 Optical Component 1504 Human Eye 1505 Augmented Reality (AR) 1600 Integrated Control System 1601 Micro Light Emitting Diode Display 1602 Lens System 1603 Optical Component 1604 Human Eye 1605 Augmented Reality (AR) 1700 Integrated Control System 1701 RGB Micro Light Emitting Diode Display 1702 Lens System 1703 Optical Component 1704 Human Eye 1705 Augmented Reality (AR) 1800 Integrated Control System 1801 Multifunctional Sensor 1802 Microchip Processor 1803 Network Interface 1900 Integrated Control System 1901 Display 1902 Frame 1903 Optical Component 1904 Human Eye 1905 Augmented Reality (AR) 1906 Rim 1907 Bridge 2000, 2010, 2020, 2030 Integrated Control System Micro Light-Emitting Diode Displays in 2001, 2011, 2021, 2031 Frames in 2002, 2012, 2022, 2032 Optical Components in 2003, 2013, 2023, 2033 Human Eyes in 2004, 2014, 2024, 2034 Augmented Reality (AR) in 2005, 2015, 2025, 2035 Rims in 2006, 2016, 2026, 2036 Bridges in 2007, 2017, 2027, 2037 Epitaxial Substrate 3000 Magnetic Layer (ML) 3001 First-Type Semiconductor Layer 3002 Light-Emitting Layer 3003 Second-Type Semiconductor Layer 3004 Metal Layers 3005, 3006, 3007, 3008, 3009, 3010 Transparent Conductive Layers 3011, 3012 First Current Blocking Layers 3100, 3101, 3102 First Current Limiting Layers 3200, 3201, 3202 Second Current Blocking Layer 3300 Second Current Limiting Layer 3400 Controllable Transfer Head 3500 Electromagnetic Layer 3501 Magnetic Micro Light-Emitting Diode 3502 Substrate 3503 Fluid Transfer System 3600 Main Chamber 3601 Solution 3602 Substrate 3603 Recess 3604 Magnetic Layer 3605 Input End 3606 Input Valve 3607 Output End 3608 Output Valve 3609 Flow Rate (F) 3610 First Sub-Chamber 3611 Second Sub-Chamber 3612 3613 The 3rd Sub-chamber 3614 The 1st-color Magnetic Micro Light-emitting Diode 3615 The 1st Valve 3616 The 1st Input Port 3617 The 2nd-color Magnetic Micro Light-emitting Diode 3618 The 2nd Valve 3619 The 2nd Input Port 3620 The 3rd-color Magnetic Micro Light-emitting Diode 3621 The 3rd Valve 3622 The 3rd Input Port 3623 Fluid 3624 The 1st Recess of the 1st Shape 3625 The 2nd Recess of the 2nd Shape 3626 The 3rd Recess of the 3rd Shape 3627 The 1st Sub-pixel Region 3628 The 2nd Sub-pixel Region 3629 The 3rd Sub-pixel Region 3630 Pixel Region 3634 The 1st Recess 3635 The 2nd Recess 3636 The 3rd Recess 3637 The 1st Sub-pixel Region 3638 The 2nd Sub-pixel Region 3639 The 3rd Sub-pixel Region 3640 Pixel Region 3650 Preliminary Magnetic Layer 3651, 3661, 3671 The 1st Preliminary Recess 3652, 3662, 3672 The 2nd Preliminary Recess 3653, 3663, 3673 The 3rd Preliminary Recess 3654, 3664, 3674 The 1st Recess 3655, 3665, 3675 The 2nd Recess 3656, 3666, 3676 The 3rd Recess 3657, 3667, 3677 The 1st Sub-pixel Region 3658, 3668, 3678 The 2nd Sub-pixel Region 3659, 3669, 3679 The 3rd Sub-pixel Region 3660, 3670, 3680 pixel regions 3700 Fluid transfer system 3701 Main chamber 3702 Solution 3703 Substrate 3704-1 First recess 3704-2 Second recess 3704-3 Third recess 3705 Gravitational layer 3706 Input end 3707 Input valve 3708 Output end 3709 Output valve 3710 Flow rate (F) 3711 First sub-chamber 3712 Second sub-chamber 3713 Third sub-chamber 3714 Micro light-emitting diode of the first color 3715 First valve 3716 First input port 3717 Micro light-emitting diode of the second color 3718 Second valve 3719 Second input port 3720 Micro light-emitting diode of the third color 3721 Third valve 3722 Third input port 3723 Fluid 3724 First valve of the substrate 3725 Second valve of the substrate 3726 Third valve of the substrate 3800 Fluid transfer system 3801 Main chamber 3802 Solution 3803 Substrate 3804-1 First recess 3804-2 Second recess 3804-3 Third recess 3805-1 First gravitational layer 3805-2 Second gravitational layer 3805-3 Third gravitational layer 3806 Input terminal 3807 Input valve 3808 Output terminal 3809 Output valve 3810 Flow rate (F) 3811 First sub-chamber 3812 Second sub-chamber 3813 Third sub-chamber 3814 Micro light-emitting diode of the first color 3815 First valve 3816 First input port 3817 Micro light-emitting diode of the second color 3818 Second valve 3819 Second input port 3820 Micro light-emitting diode of the third color 3821 Third valve 3822 Third input port 3823 Fluid 3900 Fluid transfer system 3901 Main chamber 3902 Solution 3903 Substrate 3904-1 First filling layer 3904-2 Second filling layer 3904-3 Third filling layer 3905-1 First gravitational layer 3905-2 Second gravitational layer 3905-3 Third gravitational layer 3906 Input terminal 3907 Input valve 3908 Output terminal 3909 Output valve 3910 Flow rate (F) 3911 First sub-chamber 3912 Second sub-chamber 3913 Third sub-chamber 3914 Micro light-emitting diode of the first color 3915 First valve 3916 First input port 3917 Micro light-emitting diode of the second color 3918 Second Valve 3919 Second Input Port 3920 Third Color Micro Light Emitting Diode 3921 Third Valve 3922 Third Input Port 3923 Fluid 3924 First Valve of the Substrate 3925 Second Valve of the Substrate 3926 Third Valve of the Substrate 3927 Light Source
Claims
1. A method for manufacturing a micro light emitting diode device, comprising: forming a micro light emitting diode on a growth substrate; bonding the micro light emitting diode to a test substrate; supplying power for performing an electroluminescence (EL) test on the micro light emitting diode and recording the positions of abnormal micro light emitting diodes; selectively removing the abnormal micro light emitting diodes and leaving the micro light emitting diodes that have passed the test on the test substrate; a first transfer step of transferring the micro light emitting diodes that have passed the test to a permanent substrate; a second transfer step of transferring and filling one or more holes on the permanent substrate, which are formed by selectively removing the abnormal micro light emitting diodes, with the micro light emitting diodes that have passed the test; wherein the removing step of the abnormal micro light emitting diodes has a removal speed, the first transfer step of transferring the micro light emitting diodes that have passed the test to the permanent substrate has a first transfer speed, and the second transfer step of filling the holes on the permanent substrate has a second transfer speed; A method for manufacturing a micro light emitting diode device.
2. The method for manufacturing a micro light emitting diode device according to claim 1, wherein the first transfer speed is greater than the second transfer speed.
3. The method for manufacturing a micro light emitting diode device according to claim 1, wherein the removal speed is equal to or greater than the second transfer speed.
4. The method for manufacturing a micro light emitting diode device according to claim 1, wherein the micro light emitting diodes on the growth substrate have a first pitch, the micro light emitting diodes on the permanent substrate have a second pitch, and the second pitch is equal to or greater than the first pitch.
5. The method for manufacturing a micro light emitting diode device according to claim 1, wherein the micro light emitting diodes on the growth substrate have a first pitch, the micro light emitting diodes on the test substrate have a second pitch, the micro light emitting diodes on the permanent substrate have a third pitch, the second pitch is equal to or greater than the first pitch, and the third pitch is equal to or greater than the second pitch.
6. The method for manufacturing a micro light emitting diode device according to claim 1, wherein the micro light emitting diodes on the test substrate have a second pitch, the micro light emitting diodes on the permanent substrate have a third pitch, and the third pitch is equal to or greater than the second pitch.
7. The micro light-emitting diode includes an array including at least a red LED, a green LED, and a blue LED, and the manufacturing method further includes forming a wall structure located between adjacent micro light-emitting diodes and forming a light-transmissive adhesive covering the micro light-emitting diodes. The method for manufacturing a micro light-emitting diode device according to claim 1.
8. The micro light-emitting diode includes an array structure composed of at least ultraviolet LEDs, The manufacturing method further includes a step of forming a wall structure located between adjacent micro light-emitting diodes, a step of forming a first phosphor with an adhesive covering one or more of the micro light-emitting diodes, wherein the first phosphor with the adhesive emits red light when excited by the micro light-emitting diode, a step of forming a second phosphor with an adhesive covering one or more of the micro light-emitting diodes, wherein the second phosphor with the adhesive emits blue light when excited by the micro light-emitting diode, a step of forming a third phosphor with an adhesive covering one or more of the micro light-emitting diodes, wherein the third phosphor with the adhesive emits green light when excited by the micro light-emitting diode. The method for manufacturing a micro light-emitting diode device according to claim 1.
9.
9. The micro light-emitting diode includes an array including at least blue LEDs, The manufacturing method further includes a step of forming a wall structure located between adjacent micro light-emitting diodes, a step of forming a first light-transmissive adhesive covering one or more of the micro light-emitting diodes, wherein the blue light emitted by the micro light-emitting diode passes through the first light-transmissive adhesive, a step of forming a first phosphor with an adhesive covering one or more of the micro light-emitting diodes, wherein the first phosphor with the adhesive emits red light when excited by the micro light-emitting diode, a step of forming a third phosphor with an adhesive covering one or more of the micro light-emitting diodes, wherein the third phosphor with the adhesive emits green light when excited by the micro light-emitting diode. The method for manufacturing a micro light-emitting diode device according to claim 1.
10.
10. The manufacturing method of the micro light-emitting diode device according to claim 1, wherein the first transfer speed is greater than 1 million micro light-emitting diodes per hour (1 million micro LEDs / hour).
11. The manufacturing method of the micro light-emitting diode device according to claim 1, wherein the second transfer speed is greater than 1 million micro light-emitting diodes per hour (1 million micro LEDs / hour).
12. The growth substrate is silicon, aluminum oxide (Al 2 O 3 ), gallium nitride (GaN), silicon carbide (SiC), or gallium arsenide (GaAs), and the method for manufacturing a micro light emitting diode device according to claim 1.
13. The manufacturing method of the micro light-emitting diode device according to claim 1, wherein each of the micro light-emitting diodes is independently controllable.
14. The manufacturing method of the micro light-emitting diode device according to claim 1, wherein the permanent substrate is a flexible substrate, and the material of the flexible substrate includes ultra-thin glass, metal foil, fiber-reinforced composite material, plastic film, ceramic substrate, or a combination of any two or more of these materials.
15. The manufacturing method of the micro light-emitting diode device according to claim 14, wherein the thickness of the flexible substrate is less than 200 micrometers.
16. The manufacturing method of the micro light-emitting diode device according to claim 14, wherein the metal foil includes stainless steel, aluminum, nickel, titanium, zirconium, copper, iron, cobalt, palladium, or a combination of any two or more of these materials.
17. The manufacturing method of the micro light-emitting diode device according to claim 14, wherein the surface roughness of the metal foil is 10 nanometers or less.
18. The manufacturing method of the micro light-emitting diode device according to claim 14, wherein the light transmittance of the plastic film is 90% or more for a wavelength of 550 nanometers.
19. The manufacturing method of the micro light-emitting diode device according to claim 14, wherein the plastic film includes polyethylene terephthalate (PET), polyethylene naphthalate (PEN), or polyethersulfone (PES).
20. The manufacturing method of the micro light-emitting diode device according to claim 14, wherein the permanent substrate includes a transparent substrate, and the transparent substrate is formed of ordinary glass, hard glass, quartz, ceramic, or plastic.
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