Communication device, communication method, and program

Abstract

To provide a communication device, a communication method, and a program capable of suppressing a decrease in the communication speed of data from a communication device performing serial communication to a line side.SOLUTION: A communication device 1 includes a high-speed serial communication transmitter 10, a controller 20, a control buffer unit 30, a high-speed serial communication receiver 40, and a line output unit 50. The transmitter 10 transmits data A to the controller 20, and before an overflow occurs in the control buffer unit 30, temporarily stops the transmission of data A in response to a flow control signal received from the controller 20. The controller 20 receives the data A from the transmitter 10, transmits the received data A to the control buffer unit 30 as data B, receives a timing signal from the receiver 40, and controls the timing of transmitting data C from the controller 20 to the receiver 40 on the basis of the received timing signal.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present disclosure relates to a communication device, a communication method, and a program.

Background Art

[0002] Communication is performed by communication devices in various fields. Patent Document 1 discloses a technique related to a terminal adapter equipped with a communication port whose communication speed is variable as a related technique.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] By the way, in high-speed serial communication such as the XFI interface used in communication devices, when the communication speed on the line side is changed to a low speed, the communication speed between devices connected by the XFI interface may become lower than the communication speed on the line. As a result, the communication speed of data from the communication device to the line side may decrease. Therefore, there is a need for a technique capable of suppressing a decrease in the communication speed of data from a communication device performing serial communication to the line side.

[0005] One of the objects of each aspect of the present disclosure is to provide a communication device, a communication method, and a program capable of solving the above problems.

Means for Solving the Problems

[0006] To achieve the above object, according to one aspect of the present disclosure, a communication device Before the control buffer overflows, first processing means for controlling data to be transmitted to the line side by flow control; second processing means for transmitting the data in the control buffer to a receiving section that performs high-speed serial communication based on a timing signal indicating the transmission timing of the data; and third processing means for generating the timing signal indicating a timing at which the data can be transmitted and a timing at which the data cannot be transmitted based on the internal state of a transmission buffer. .

[0007] To achieve the above object, according to another aspect of the present disclosure, a communication method is as follows: A communication method executed by a communication device, the communication device controlling data to be transmitted to the line side by flow control before a control buffer overflows; the communication device transmitting the data in the control buffer to a receiving section that performs high-speed serial communication based on a timing signal indicating the transmission timing of the data; and the communication device generating the timing signal indicating a timing at which the data can be transmitted and a timing at which the data cannot be transmitted based on the internal state of a transmission buffer. .

[0008] To achieve the above object, according to another aspect of the present disclosure, a program is as follows: Causing a computer to control data to be transmitted to the line side by flow control before a control buffer overflows; transmit the data in the control buffer to a receiving section that performs high-speed serial communication based on a timing signal indicating the transmission timing of the data; and generate the timing signal indicating a timing at which the data can be transmitted and a timing at which the data cannot be transmitted based on the internal state of a transmission buffer. . [Advantages of the Invention]

[0009] According to each aspect of the present disclosure, in a communication device, it is possible to suppress a decrease in the communication speed of data from the communication device performing serial communication to the line side. [Brief Description of the Drawings]

[0010]

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[0011] Hereinafter, embodiments will be described in detail with reference to the drawings. <Embodiment> A communication device 1 according to an embodiment of the present disclosure has a function of generating transmission timing from a line clock or a high-speed serial clock, a function of optimizing the transmission timing in consideration of the state of a transmission buffer, a function of transmitting data on a control buffer to high-speed serial based on the generated transmission timing, and a function of controlling data by flow control before the control buffer overflows.

[0012] FIG. 1 is a diagram showing an example of the configuration of a communication device 1 according to an embodiment of the present disclosure. As shown in FIG. 1, the communication device 1 includes a transmission unit 10 for high-speed serial communication (hereinafter referred to as the transmission unit 10), a control unit 20 (an example of a first processing means and an example of a second processing means), a control buffer unit 30, a reception unit 40 for high-speed serial communication (hereinafter referred to as the reception unit 40), and a line output unit 50.

[0013] The transmission unit 10 transmits data A to the control unit 20. Further, the transmission unit 10 temporarily stops the transmission of data A by a flow control signal described later received from the control unit 20 before an overflow (that is, data digit overflow) occurs in the control buffer unit 30.

[0014] The control unit 20 receives data A from the transmission unit 10. The control unit 20 transmits the received data A to the control buffer unit 30 as data B. Note that the payload parts of data A and data B are all the same data. The difference between data A and data B is the header and the like. This is to distinguish the names assuming cases where headers and the like are added for control in each block. Then, the control unit 20 receives data B from the control buffer unit 30. The control unit 20 transmits the received data B to the reception unit 40 as data C. Note that the payload parts of data B and data C are all the same data. The difference between data B and data C is the header and the like. This is to distinguish the names assuming cases where headers and the like are added for control in each block.

[0015] Also, the control unit 20 receives a timing signal from the reception unit 40. Details of the timing signal will be described later. The control unit 20 controls the timing to transmit data C from the control unit 20 to the reception unit 40 based on the received timing signal.

[0016] Also, the control unit 20 receives a buffer status signal indicating the internal state of the control buffer unit 30 from the control buffer unit 30. When the control unit 20 determines that the internal state of the control buffer unit 30 indicated by the buffer status signal is in a predetermined state (for example, a state where the buffer inside the control buffer unit 30 exceeds a predetermined threshold), it determines that an overflow is likely to occur and transmits a flow control signal to the transmission unit 10.

[0017] Here, the specific configuration of the control unit 20 will be described. FIG. 2 is a diagram showing an example of the configuration of the control unit 20 according to an embodiment of the present disclosure. As shown in FIG. 2, the control unit 20 includes a high-speed serial reception unit 201, a control buffer transmission / reception unit 202, a high-speed serial transmission unit 203, a flow control transmission unit 204, and a transmission timing reception unit 205.

[0018] The high-speed serial receiver 201 receives data A from the transmitter 10. The high-speed serial receiver 201 transmits the received data A to the control buffer transceiver 202.

[0019] The control buffer transceiver 202 receives data A from the high-speed serial receiver 201. The control buffer transceiver 202 transmits and receives the received data A as data B to and from the control buffer unit 30. Also, the control buffer transceiver 202 transmits data B to the high-speed serial transmitter 203.

[0020] Also, the control buffer transceiver 202 receives a timing signal from the transmission timing receiver 205. Then, the control buffer transceiver 202 controls the timing of transmitting data B based on the timing signal. By this control, the timing at which the high-speed serial transmitter 203 described later transmits data B as data C to the receiver 40 can be controlled.

[0021] The high-speed serial transmitter 203 receives data B from the control buffer transceiver 202. The high-speed serial transmitter 203 transmits the received data B as data C to the receiver 40.

[0022] The flow control transmitter 204 receives a buffer status signal from the control buffer unit 30. The flow control transmitter 204 transmits the received buffer status signal as a flow control signal to the transmitter 10. The flow control transmitter 204 monitors the buffer status based on the buffer status signal and notifies the transmitter 10 using the flow control signal before an overflow occurs. Note that the buffer status signal is a signal indicating the degree of congestion of the buffer. Also, the flow control signal is a signal indicating the result of determining whether to perform flow control based on its status by the flow control transmitter 204.

[0023] The transmission timing receiving unit 205 receives a timing signal from the receiving unit 40. The transmission timing receiving unit 205 transmits the received timing signal to the control buffer transceiver unit 202 and the high-speed serial transmission unit 203. The above is the specific configuration of the control unit 20.

[0024] The control buffer unit 30 transmits and receives data B to and from the control unit 20. And the control buffer unit 30 temporarily buffers the data B. Also, the control buffer unit 30 notifies the control unit 20 of the amount of data B staying in the buffer inside the control buffer unit 30 by transmitting a buffer status signal indicating how much data B is staying in the buffer inside the control buffer unit 30 to the control unit 20.

[0025] The receiving unit 40 receives data C from the control unit 20. And when the receiving unit 40 receives the data C, it transmits data D to the line output unit 50. As the receiving unit 40, an Ethernet PHY, that is, the lowest physical layer in the OSI layer model, is assumed. Therefore, the payload part of the data D is the same as the payload part of the data C, but control signals on the data line are added to the data D.

[0026] Also, the receiving unit 40 generates a timing signal. The receiving unit 40 transmits the generated timing signal to the control unit 20.

[0027] Here, the specific configuration of the receiving unit 40 will be described. FIG. 3 is a diagram showing an example of the configuration of the receiving unit 40 according to an embodiment of the present disclosure. As shown in FIG. 3, the receiving unit 40 includes a high-speed serial receiving unit 401, a transmission buffer unit 402, a line data transmission unit 403, a high-speed serial clock extraction unit 404, a line speed setting unit 405, a transmission timing transmission unit 406, a transmission timing generation unit 407 (an example of the third processing means, an example of the fourth processing means), and a line clock generation unit 408.

[0028] The high-speed serial receiving unit 401 receives data C from the high-speed serial transmitting unit 203. The high-speed serial receiving unit 401 transmits the received data C to the transmission buffer unit 402 and the high-speed serial clock extraction unit 404.

[0029] The transmission buffer unit 402 receives data C from the high-speed serial receiving unit 401. The transmission buffer unit 402 temporarily buffers the received data C. Then, the transmission buffer unit 402 transmits the buffered data C to the line data transmission unit 403.

[0030] Also, the transmission buffer unit 402 transmits a status signal indicating the state of the buffer inside the transmission buffer unit 402 to the transmission timing generation unit 407.

[0031] The line data transmission unit 403 receives the line clock from the line clock generation unit 408. The line clock is a clock signal used to generate the timing for outputting data D from the line data transmission unit 403.

[0032] Also, the line data transmission unit 403 receives data C from the transmission buffer unit 402. Then, when the line data transmission unit 403 receives data C, it transmits data D to the line output unit 50 according to the timing of the line clock.

[0033] The high-speed serial clock extraction unit 404 receives data C from the high-speed serial receiving unit 401. The high-speed serial clock extraction unit 404 extracts the high-speed serial clock from the received data C. The high-speed serial clock extraction unit 404 transmits the extracted high-speed serial clock to the transmission timing generation unit 407.

[0034] The line speed setting unit 405 sets the line speed information to itself. The line speed information is information on what line speed to set (for example, 10M, 100M, 1G, etc.). The line speed setting unit 405 transmits the set line speed information to the line clock generation unit 408.

[0035] The transmission timing transmission unit 406 receives a timing signal from the transmission timing generation unit 407. The transmission timing transmission unit 406 transmits the received timing signal to the control unit 20.

[0036] The transmission timing generation unit 407 receives a status signal from the transmission buffer unit 402. Also, the transmission timing generation unit 407 receives a high-speed serial clock from the high-speed serial clock extraction unit 404. Also, the transmission timing generation unit 407 receives a line clock from the line clock generation unit 408. Then, the transmission timing generation unit 407 generates a timing signal based on the received status signal, high-speed serial clock, and line clock. Details of this generation by the transmission timing generation unit 407 will be described later. The transmission timing generation unit 407 transmits the generated timing signal to the transmission timing transmission unit 406.

[0037] The line clock generation unit 408 receives line speed information from the line speed setting unit 405. Then, when the line clock generation unit 408 receives the line speed information, it receives a reference clock from the outside and generates a line clock by multiplying the reference clock. The line clock generation unit 408 transmits the generated line clock to the line data transmission unit 403 and the transmission timing generation unit 407. The above is the specific configuration of the reception unit 40.

[0038] The line output unit 50 receives the data D from the reception unit 40. The line output unit 50 outputs the received data D to the communication line.

[0039] FIG. 4 is a diagram showing an example of a signal in the communication device 1 according to an embodiment of the present disclosure. FIG. 5 is a diagram showing a first example of a processing flow of the communication device 1 according to an embodiment of the present disclosure. FIG. 6 is a diagram showing a second example of a processing flow of the communication device 1 according to an embodiment of the present disclosure. First, as for the processing performed by the communication device 1, the processing of generating a timing signal performed by the transmission timing generation unit 407 will be described with reference to FIGS. 4 and 5. The signal shown in FIG. 4 is an image diagram and is not an exact signal considering delays and the like. Further, FIG. 4 is an example of a signal when the number of transmission bits is 2 bits and the line clock is at a speed that is one-tenth of the high-speed serial clock (the wavelength is 10 times). It is assumed that the high-speed serial clock extraction unit 404 transmits the high-speed serial clock extracted from the data C to the transmission timing generation unit 407. Also, it is assumed that the line clock generation unit 408 transmits the line speed received from the line speed setting unit 405 to the line data transmission unit 403 and the transmission timing generation unit 407.

[0040] The receiving unit 40 generates a timing signal as follows. The transmission timing generation unit 407 determines the number of transmission bits (step S1). This number of transmission bits may be set in advance as a fixed value in the transmission timing generation unit 407. Also, as will be described later, this number of transmission bits may change dynamically.

[0041] The transmission timing generation unit 407 divides the line clock received from the line clock generation unit 408 for each number of transmission bits (step S2). Then, the transmission timing generation unit 407 assigns the same number of bits as the number of bits of the divided line clock onto the high-speed serial clock received from the high-speed serial clock extraction unit 404 (step S3).

[0042] The transmission timing generation unit 407 uses the portion of the high-speed serial clock that is assigned the same number of bits as the number of bits of the divided line clock as the period during which data can be transmitted, and generates a signal that enables data transmission during that period (step S4). Further, the transmission timing generation unit 407 uses the portion on the high-speed serial clock until the number of bits corresponding to the next divided line clock is assigned as the period during which data cannot be transmitted, and generates a signal that disables data transmission during that period (step S5). The signals generated by the processes of step S4 and step S5 are timing signals indicating the optimized timing.

[0043] Next, as for the process performed by the communication device 1, the process of the control buffer transceiver unit 202 transmitting data C will be described with reference to FIG. 6. Note that the process shown in FIG. 6 is a process performed subsequent to the process shown in FIG. 5.

[0044] The control unit 20 transmits data C to the receiving unit 40 as follows. The control buffer transceiver unit 202 receives a timing signal from the transmission timing receiving unit 205. Based on the received timing signal, the control buffer transceiver unit 202 retrieves the necessary amount of data B for transmission from the control buffer unit 30 (step S11). For example, the control buffer transceiver unit 202 can determine the required data transmission amount from the timing signal received from the transmission timing receiving unit 205. The control buffer transceiver unit 202 can simply obtain that data from the control buffer unit 30 each time. Thereafter, the control buffer transceiver unit 202 transmits data B to the high-speed serial transmission unit 203 in accordance with the timing signal. For example, the control buffer transceiver unit 202 puts the transmission data (i.e., data B) into the "transmittable" portion in FIG. 4. Then, the control buffer transceiver unit 202 transmits the transmission data to the high-speed serial transmission unit 203.

[0045] The high-speed serial transmission unit 203 receives data B from the control buffer transceiver unit 202. The high-speed serial transmission unit 203 transmits preamble data determined in advance only at a timing when transmission is possible to the receiving unit 40 (step S12). The control buffer transceiver unit 202 and the high-speed serial transmission unit 203 are provided with buffers. The high-speed serial transmission unit 203 may use its buffer to make the timing at which data B is received the timing at which transmission is possible. Then, the high-speed serial transmission unit 203 transmits the received data B to the receiving unit 40 as data C (step S13). Note that the preamble data here is general. That is, valid data does not always flow on the communication line, and empty data flows while there is no valid data. By flowing preamble data immediately before the valid data, it becomes possible to discriminate between valid and empty.

[0046] The high-speed serial receiving unit 401 receives preamble data from the high-speed serial transmission unit 203. Then, the high-speed serial receiving unit 401 receives data C from the high-speed serial transmission unit 203. The high-speed serial receiving unit 401 can know the timing at which transmission is possible by receiving the preamble data. As a result (that is, when the transmitting unit 20 performs the processing from step S11 to step S13), the high-speed serial receiving unit 401 can determine whether the data C is data transmitted at the timing at which transmission is possible.

[0047] FIG. 7 is a diagram showing a third example of the processing flow of the communication device 1 according to an embodiment of the present disclosure. Here, as an example in which the number of transmission bits changes dynamically, the processing in which the communication device 1 determines the number of transmission bits according to the state of the transmission buffer will be described with reference to FIG. 7.

[0048] The transmission buffer unit 402 constantly monitors the internal state of the transmission buffer unit 402. Specifically, the transmission buffer unit 402 determines whether the amount of data stored in the internal buffer is equal to or greater than a preset first threshold (step S21). When the transmission buffer unit 402 determines that the amount of data is equal to or greater than the first threshold (YES in step S21), it reduces the number of transmission bits by a predetermined number of bits (step S22). Then, the transmission buffer unit 402 returns to the process of step S21. Also, when the transmission buffer unit 402 determines that the amount of data is less than the first threshold (NO in step S21), it determines whether the amount of data is equal to or greater than a second threshold having a value smaller than the first threshold (step S23).

[0049] When the transmission buffer unit 402 determines that the amount of data is equal to or greater than the second threshold (YES in step S23), it returns to the process of step S21. Also, when the transmission buffer unit 402 determines that the amount of data is less than the second threshold (NO in step S23), it increases the number of transmission bits by a predetermined number of bits (step S24). Then, the transmission buffer unit 402 returns to the process of step S23. The predetermined number of bits in the process of step S24 may be the same as or different from the predetermined number of bits in the process of step S22.

[0050] Through the processing from step S21 to step S24 described above, the amount of data stored in the buffer inside the transmission buffer unit 402 is adjusted within an appropriate range that is less than the first threshold value and equal to or greater than the second threshold value. As a result, overflow in the control buffer unit 30 can be suppressed, and the transmission rate of the data D can be made stable and have low latency. Note that the amount of data stored in the buffer inside the transmission buffer unit 402 is determined by the difference between the input and output rates of the buffer and the amount of data input to the buffer at one time. The difference between the input and output rates of the buffer refers to the difference between the rate at which data is input to the buffer inside the transmission buffer unit 402 and the rate at which data is output from that buffer. When the rate at which data is input to the buffer is greater than the rate at which data is output from the buffer, an overflow will occur. However, in one embodiment of the present disclosure, the difference between the input and output rates of the buffer is almost eliminated by the processing performed by the communication device 1 described with reference to FIGS. 4 to 6. Therefore, in the processing from step S21 to step S24 described above, the amount of data input to the buffer at one time is suppressed.

[0051] FIG. 8 is a diagram showing a fourth example of the processing flow of the communication device 1 according to an embodiment of the present disclosure. Next, the processing performed by the control buffer unit 30 that controls the transmission of data A before the control buffer overflows will be described with reference to FIG. 8.

[0052] The control buffer unit 30 constantly monitors the internal state of the control buffer unit 30. Specifically, the control buffer unit 30 determines whether the amount of data stored in the internal buffer is equal to or greater than a preset third threshold value (step S31). When the control buffer unit 30 determines that the amount of data is equal to or greater than the third threshold value (YES in step S31), the control buffer unit 30 transmits a flow control signal to the transmission unit 10 (step S32).

[0053] The transmission unit 10 receives a flow control signal from the control buffer unit 30. The transmission unit 10 reduces the transmission rate of data A or temporarily stops the transmission of data A according to the received flow control signal (step S33). Note that there is no clear definition for rate reduction and stop in the communication device 1. Here, the transmission unit 10 stops the transmission of data A while the flow control signal is valid. If the flow control signal is switched frequently, the stop of transmission by the transmission unit 10 will be temporary. Therefore, it seems to the user that the transmission rate has decreased. Also, if the flow control signal is valid for a while, it seems to the user that the stop of transmission continues. Then, the transmission unit 10 returns to the process of step S31.

[0054] Also, when the control buffer unit 30 determines that the data volume is less than the third threshold (NO in step S31), it stops transmitting the flow control signal to the transmission unit 10 (step S34).

[0055] When the transmission unit 10 does not receive a flow control signal from the control buffer unit 30, it sets the transmission rate of data A to a predetermined rate (original rate) or starts transmitting data A (step S35). Then, the transmission unit 10 returns to the process of step S31.

[0056] Through the processes from step S31 to step S35 described above, when the data volume stored in the buffer inside the control buffer unit 30 is equal to or greater than the third threshold, it is adjusted by flow control, and when it is less than the third threshold, it is adjusted to a predetermined rate (original rate). As a result, overflow in the control buffer unit 30 can be suppressed, and the transmission rate of data D can be made stable and have low latency.

[0057] The communication device 1 according to an embodiment of the present disclosure has been described above. In the communication device 1, a control unit 20 (an example of a first processing means) determines that when the internal state of the control buffer unit 30 indicated by the buffer state signal is in a predetermined state (for example, a state where a buffer (an example of a control buffer) inside the control buffer unit 30 exceeds a predetermined threshold value), it is likely to overflow (an example before overflowing), and transmits a flow control signal to the transmission unit 10 (an example of flow control). That is, the control unit 20 controls the data to be transmitted to the line side by flow control before the control buffer overflows. With this communication device 1, it is possible to suppress a decrease in the communication speed of data from a communication device performing serial communication to the line side.

[0058] Note that the control unit 20 and the reception unit 40 included in the communication device 1 according to another embodiment of the present disclosure are not limited to the control unit 20 shown in FIG. 2 and the reception unit 40 shown in FIG. 3. FIG. 9 is a diagram showing an example of the configuration of the control unit 20 included in the communication device 1 according to another embodiment of the present disclosure. FIG. 10 is a diagram showing an example of the configuration of the reception unit 40 included in the communication device 1 according to another embodiment of the present disclosure.

[0059] In another embodiment of the present disclosure, as shown in FIG. 9, the control unit 20 includes a high-speed serial reception unit 201, a control buffer transmission / reception unit 202, a high-speed serial transmission unit 203, a flow control transmission unit 204, a high-speed serial clock extraction unit 206, and a transmission timing generation unit 207. The reception unit 40, as shown in FIG. 10, includes a high-speed serial reception unit 401, a transmission buffer unit 402, a line data transmission unit 403, a line speed setting unit 405, and a line clock generation unit 408. That is, in the communication device 1 according to another embodiment of the present disclosure, the high-speed serial clock extraction unit 404, the transmission timing transmission unit 406, and the processing performed by the transmission timing generation unit 407 in the reception unit 40 according to one embodiment of the present disclosure may be executed by the high-speed serial clock extraction unit 206 and the transmission timing generation unit 207 included in the control unit 20. In this case, it is necessary to delete the function of notifying the state of the transmission buffer unit 402 or to add a signal line from the transmission buffer unit 402 other than the line clock to the transmission timing generation unit 207 to notify the state signal to the transmission timing generation unit 207. With the communication device 1 according to another embodiment of the present disclosure, it is possible to suppress a decrease in the communication speed of data from a communication device that performs serial communication to the line side, similar to the communication device 1 according to one embodiment of the present disclosure.

[0060] Note that the configuration of the communication device 1 according to another embodiment of the present disclosure may be different from the configuration of the communication device 1 according to one embodiment of the present disclosure shown in FIG. 1. FIG. 11 is a diagram showing an example of the configuration of the transmission unit 10 and the control unit 20 according to another embodiment of the present disclosure. The transmission unit 10, as shown in FIG. 11, includes a high-speed serial control unit / transmission unit 101. The control unit 20, as shown in FIG. 11, includes a high-speed serial reception unit 201, a control buffer transmission / reception unit 202, a high-speed serial transmission unit 203, and a transmission timing reception unit 205. In the communication device 1 according to another embodiment of the present disclosure, by also transmitting the timing signal transmitted from the reception unit 40 to the control unit 20 to the transmission unit 10, the same processing as the processing performed in the control unit 20 is realized in the high-speed serial control unit / transmission unit 101.

[0061] The control unit 20 transmits the data C to the receiving unit 40 as follows. The control buffer transceiver unit 202 receives a timing signal from the transmission timing receiving unit 205. Based on the received timing signal, the control buffer transceiver unit 202 extracts the necessary amount of data B from the buffer inside the high-speed serial control unit / transmission unit 101. For example, the control buffer transceiver unit 202 can know the required data transmission amount from the timing signal received from the transmission timing receiving unit 205. The control buffer transceiver unit 202 may actively obtain the data from the control buffer unit 30 each time. After that, the control buffer transceiver unit 202 transmits the data B to the high-speed serial transmission unit 203 in accordance with the timing signal. For example, the control buffer transceiver unit 202 puts the transmission data (i.e., data B) into the "transmittable" part in FIG. 4. Then, the control buffer transceiver unit 202 transmits the transmission data to the high-speed serial receiving unit 201.

[0062] According to another embodiment of the communication device 1 of the present disclosure, similar to the communication device 1 according to an embodiment of the present disclosure, it is possible to suppress a decrease in the communication speed of data from the communication device performing serial communication to the line side.

[0063] FIG. 12 is a diagram showing the minimum configuration of the communication device 1 according to the embodiment of the present disclosure. The communication device 1 includes a first processing means 100. The first processing means 100 controls the data to be transmitted to the line side by flow control before the control buffer overflows. The first processing means 100 can be realized, for example, by using the functions of the control unit 20 illustrated in FIG. 1.

[0064] FIG. 13 is a diagram showing an example of the processing flow of the communication device 1 with the minimum configuration according to the embodiment of the present disclosure. Next, the processing of the communication device 1 with the minimum configuration according to the embodiment of the present disclosure will be described with reference to FIG. 13.

[0065] In the communication device 1, the first processing means 100 controls the data to be transmitted to the line side by flow control before the control buffer overflows (step S101).

[0066] The minimum-configuration communication device 1 according to the embodiment of the present disclosure has been described above. With this communication device 1, it is possible to suppress a decrease in the communication speed of data from a communication device that performs serial communication to the line side.

[0067] Note that in the embodiment of the present disclosure, the order of the processes may be changed as long as appropriate processes are performed.

[0068] Although the embodiment of the present disclosure has been described, the above-described communication device 1, transmission unit 10, control unit 20, control buffer unit 30, reception unit 40, line output unit 50, and other control devices may have a computer system inside. And, the processes described above are stored in a computer-readable recording medium in the form of a program, and the above processes are performed by the computer reading and executing this program. Specific examples of the computer are shown below.

[0069] FIG. 14 is a schematic block diagram showing the configuration of a computer according to at least one embodiment. As shown in FIG. 14, the computer 5 includes a CPU 6, a main memory 7, a storage 8, and an interface 9. For example, each of the above-described communication device 1, transmission unit 10, control unit 20, control buffer unit 30, reception unit 40, line output unit 50, and other control devices is implemented in the computer 5. And, the operations of the respective processing units described above are stored in the storage 8 in the form of a program. The CPU 6 reads the program from the storage 8 and expands it in the main memory 7, and executes the above processes according to the program. Further, the CPU 6 secures a storage area corresponding to each of the above-described storage units in the main memory 7 according to the program.

[0070] Examples of the storage 8 include HDD (Hard Disk Drive), SSD (Solid State Drive), magnetic disk, magneto-optical disk, CD-ROM (Compact Disc Read Only Memory), DVD-ROM (Digital Versatile Disc Read Only Memory), semiconductor memory, and the like. The storage 8 may be an internal medium directly connected to the bus of the computer 5, or an external medium connected to the computer 5 via the interface 9 or a communication line. Further, when this program is distributed to the computer 5 via a communication line, the computer 5 that has received the distribution may expand the program in the main memory 7 and execute the above processing. In at least one embodiment, the storage 8 is a non-transitory tangible storage medium.

[0071] Also, the above program may implement a part of the functions described above. Further, the above program may be a file that can implement the above functions in combination with a program already recorded in the computer system, that is, a so-called difference file (difference program).

[0072] Although some embodiments of the present disclosure have been described, these embodiments are examples and do not limit the scope of the disclosure. These embodiments may be subject to various additions, omissions, replacements, and changes without departing from the gist of the disclosure.

[0073] Note that some or all of the above embodiments may be described as follows in the appended claims, but are not limited thereto.

[0074] (Appended Note 1) First processing means for controlling data to be transmitted to the line side by flow control before the control buffer overflows, A communication device comprising:

[0075] (Appended Note 2) Second processing means for transmitting data in the control buffer to a receiving unit that performs high-speed serial communication based on a timing signal indicating the transmission timing of the data. The communication device according to Supplementary Note 1, comprising the same.

[0076] (Supplementary Note 3) Third processing means for generating the timing signal indicating a timing at which the data can be transmitted and a timing at which the data cannot be transmitted based on a state inside the transmission buffer. The communication device according to Supplementary Note 2, comprising the same.

[0077] (Supplementary Note 4) Fourth processing means for generating the timing signal based on at least one of a line clock and a high-speed serial clock. The communication device according to Supplementary Note 2 or Supplementary Note 3, comprising the same.

[0078] (Supplementary Note 5) Controlling data to be transmitted to the line side by flow control before the control buffer overflows. A communication method including the same.

[0079] (Supplementary Note 6) Controlling data to be transmitted to the line side by flow control before the control buffer overflows. A program for causing a computer to execute the same.

Explanation of Signs

[0080] 1 ··· Communication device 5 ··· Computer 6 ··· CPU 7 ··· Main memory 8 ··· Storage 9 ··· Interface 10 ··· Transmitting unit 20 ··· Control unit 30 ··· Control buffer unit 40 ··· Receiving unit 50 ··· Line output unit 101 ··· High-speed serial control unit / transmission unit 201, 401 ··· High-speed serial reception unit 202 ··· Control buffer transmission / reception unit 203 ··· High-speed serial transmission unit 204 ··· Flow control transmission unit 205 ··· Transmission timing reception unit 206 ··· High-speed serial clock extraction unit 207, 407 ··· Transmission timing generation unit 402 ··· Transmission buffer unit 403 ··· Line data transmission unit 404 ··· High-speed serial clock extraction unit 405 ··· Line speed setting unit 406 ··· Transmission timing transmission unit 408 ··· Line clock generation unit

Claims

1. First processing means for controlling data to be transmitted to the line side by flow control before the control buffer overflows; Second processing means for transmitting the data in the control buffer to a receiving unit that performs high-speed serial communication based on a timing signal indicating the transmission timing of the data; Third processing means for generating the timing signal indicating a timing at which the data can be transmitted and a timing at which the data cannot be transmitted based on the internal state of the transmission buffer; A communication device comprising the above.

2. Fourth processing means for generating the timing signal based on at least one of a line clock and a high-speed serial clock; The communication device according to claim 1, comprising the above.

3. A communication method executed by a communication device, comprising: The communication device controls data to be transmitted to the line side by flow control before the control buffer overflows; The communication device transmits the data in the control buffer to a receiving unit that performs high-speed serial communication based on a timing signal indicating the transmission timing of the data; The communication device generates the timing signal indicating a timing at which the data can be transmitted and a timing at which the data cannot be transmitted based on the internal state of the transmission buffer; A communication method including the above.

4. Controlling data to be transmitted to the line side by flow control before the control buffer overflows; Transmitting the data in the control buffer to a receiving unit that performs high-speed serial communication based on a timing signal indicating the transmission timing of the data; Generating the timing signal indicating a timing at which the data can be transmitted and a timing at which the data cannot be transmitted based on the internal state of the transmission buffer; A program for causing a computer to execute the above.

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