Capacitor, electric circuit, circuit board, device, and method for manufacturing a capacitor
The capacitor design addresses size and substrate limitations by using a conductive base material with parallel dielectric layers and conductors, achieving high capacitance and durability through flexible manufacturing processes and insulation, suitable for various substrates.
Patent Information
- Application Number
- JP2025521844
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2023-05-19
- Filing Date
- 2024-04-04
- Publication Date
- 2025-07-28
- Estimated Expiration
- 2044-04-04
AI Technical Summary
Existing capacitors face limitations in reducing size and substrate constraints while maintaining multiple dielectric layers and conductors, particularly those using silicon substrates and anodized oxide dielectric layers with limited permittivity and electrode surface area.
A capacitor design featuring a conductive base material with parallel-connected dielectric layers and conductors, where the base material is insulated by dielectric layers and electrically connected to a conductor, allowing for a MIMIM structure with flexible substrate options and manufacturing processes beyond MOS processes.
The design achieves high capacitance, reduced size constraints, and improved durability with fewer substrate restrictions, enabling larger capacitors and enhanced reliability through conductive connections and protective coatings.
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Abstract
Description
Technical Field
[0001] The present disclosure relates to a capacitor, an electric circuit, a circuit board, a device, and a method for manufacturing a capacitor.
Background Art
[0002] Conventionally, a capacitor having a structure in which a plurality of dielectric layers and a plurality of conductors are alternately stacked is known.
[0003] For example, Patent Document 1 describes a capacitor having a metal-insulator-metal-insulator-metal (MIMIM) stack. This capacitor is formed in a trench of a substrate. The trench has end walls and a rim. The trench is configured to have a pillar. The cross-section of this pillar has a tripod-shaped contour. The trench includes a packing formed by an alternately stacked stack. The stack includes a first electrode, a first auxiliary layer, an additional electrode, an additional auxiliary layer, and a second electrode. The auxiliary layer electrically insulates the electrodes from each other. The electrodes are made of a conductive material such as doped polysilicon or metal. The substrate is a low-resistance substrate such as a high-resistance silicon substrate or a p-type doped silicon wafer.
Prior Art Documents
Patent Documents
[0004]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0005] The present disclosure provides an advantageous capacitor from the viewpoint of reducing size and substrate constraints while including a plurality of dielectric layers and a plurality of conductors.
Means for Solving the Problems
[0006] The capacitor of the present disclosure is A base material having conductivity, a first dielectric layer disposed on the base material, a first conductor disposed on the first dielectric layer and having a layer shape, a second dielectric layer disposed on the first conductor, and a second conductor disposed on the second dielectric layer.
[0007] The first conductor includes an exposed portion not covered by the second dielectric layer and the second conductor, the base material is electrically insulated from the first conductor by the first dielectric layer, the second conductor is electrically insulated from the first conductor by the second dielectric layer, the base material includes a conductive portion electrically connected to the second conductor.
Advantages of the Invention
[0008] According to the present disclosure, it is possible to provide an advantageous capacitor in terms of reducing size and substrate constraints while including a plurality of dielectric layers and a plurality of conductors.
Brief Description of the Drawings
[0009]
Figure 1
Figure 2A
Figure 2B
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7A
Figure 7B
Figure 7C
[0010] (Knowledge underlying the present disclosure) For example, the dielectric layer in an electrolytic capacitor can be formed by anodizing a valve metal anode. In this case, the material of the dielectric layer is limited to oxides of valve metals, etc., and it is not easy to increase the relative permittivity of the dielectric layer obtained by anodization. For example, it is possible to increase the capacitance of a capacitor by increasing the specific surface area of the electrode of the capacitor by using a porous body containing a valve metal. On the other hand, the average pore diameter of such a porous body is as small as about 100 nm, and it is not easy to further increase the specific surface area of the electrode.
[0011] The capacitor described in Patent Document 1 uses a high-resistance silicon substrate or a low-resistance substrate such as a p-type doped silicon wafer, and is understood to correspond to a so-called silicon capacitor. The silicon capacitor is intended to increase the capacitance by significantly increasing the electrode surface area by applying a semiconductor metal oxide semiconductor (MOS) process to three dimensions. Therefore, it is understood that the capacitor described in Patent Document 1 has restrictions on size and base material.
[0012] Therefore, the present inventor has intensively studied the structure of a capacitor with few restrictions on size and base material while including a plurality of dielectric layers and a plurality of conductors. As a result, the present inventor has newly found that a capacitor with few restrictions on size and base material can be configured by having a conductive base material, a dielectric, and a conductor in a predetermined relationship, and has devised the capacitor of the present disclosure.
[0013] (Embodiment) Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. The present disclosure is not limited to the following embodiments.
[0014] FIG. 1 is a cross-sectional view showing an example of a capacitor of the present disclosure. As shown in FIG. 1, the capacitor 1a includes a conductive base material 10, a first dielectric layer 21, a first conductor 31, a second dielectric layer 22, and a second conductor 32. The first dielectric layer 21 is disposed on the base material 10. The first conductor 31 is disposed on the first dielectric layer 21 and has a layer shape. The second dielectric layer 22 is disposed on the first conductor 31. The second conductor 32 is disposed on the second dielectric layer 22. The first conductor 31 includes an exposed portion 31e that is not covered by the second dielectric layer 22 and the second conductor 32. The base material 10 is electrically insulated from the first conductor 31 by the first dielectric layer 21. The second conductor 32 is electrically insulated from the first conductor 31 by the second dielectric layer 22. In addition, the base material 10 includes a conduction portion 10c that is electrically connected to the second conductor 32. According to such a configuration, in the capacitor 1a, the portion including the first dielectric layer 21 and the portion including the second dielectric layer 22 can be electrically connected in parallel, so that the capacitor 1a is likely to have a high capacitance. In addition, the base material 10 is not limited to a specific base material as long as it has conductivity, and there are few restrictions on the base material in the capacitor 1a. It is also possible to manufacture by applying a process other than the MOS process of a semiconductor, and the capacitor 1a has few size restrictions and may be provided as a capacitor having a larger size than, for example, a silicon capacitor.
[0015] The electrical connection between the conduction part 10c and the second conductor 32 is not limited to a specific mode. As shown in FIG. 1, the conduction part 10c may be in contact with the second conductor 32, for example. According to such a configuration, the structure of the capacitor 1a is likely to be simplified. The conduction part 10c may be configured in a manner different from the parts of the base material 10 other than the conduction part 10c. For example, the conduction part 10c may be constituted by a conductive coating formed on the surface of the main body of the base material 10. The conduction part 10c may be electrically connected to the second conductor 32 in a state where another conductive member is disposed between the conduction part 10c and the second conductor 32. In this case, for example, the conduction part 10c is protected by another conductive member, and the capacitor 1a is likely to have high durability.
[0016] FIG. 1 shows a cross-sectional view of the capacitor 1a having a three-dimensional shape. As shown in FIG. 1, the conduction part 10c may be surrounded by the second conductor 32, for example. According to such a configuration, it is difficult for a defect to occur in the electrical connection between the conduction part 10c and the second conductor 32, and the capacitor 1a is likely to have high reliability. The conduction part 10c is configured to have a columnar surface, for example, and the second conductor 32 is formed so as to surround the columnar surface. For example, the part disposed on the second dielectric layer 22 of the second conductor 32 and the part surrounding the conduction part 10c are integrally configured. The second conductor 32 is formed in a cylindrical shape having an annular bottom, for example, and the annular bottom surrounds the conduction part 10c. The second conductor 32 is, for example, cylindrical.
[0017] As shown in FIG. 1, the capacitor 1a further includes a first terminal 41 and a second terminal 42, for example. The first terminal 41 is electrically connected to the base material 10 or the second conductor 32. In the capacitor 1a, the first terminal 41 is electrically connected to the base material 10 or the second conductor 32, for example. The first terminal 41 is electrically connected to the base material 10, for example, and is also electrically connected to the second conductor 32 by the base material 10. The second terminal 42 is electrically connected to the first conductor 31. The potentials of the base material 10 or the second conductor 32 and the potential of the first conductor 31 are adjusted by the first terminal 41 and the second terminal 42.
[0018] In the capacitor 1a, for example, the anode includes the first terminal 41, and the cathode includes the second terminal 42. In the capacitor 1a, the anode may include the second terminal 42, and the cathode may include the first terminal 41.
[0019] The electrical connection between the first terminal 41 and the base material 10 or the second conductor 32 is not limited to a specific mode. The first terminal 41 includes, for example, a lead wire, and one end of the lead wire is fixed to the base material 10 or the second conductor 32.
[0020] The electrical connection between the second terminal 42 and the first conductor 31 is not limited to a specific mode. The first conductor 31 is electrically connected to the second terminal 42 by, for example, a conductive adhesive portion 35. According to such a configuration, the first conductor 31 can be protected by the conductive adhesive portion 35, and the capacitor 1a is likely to have high durability.
[0021] As shown in FIG. 1, the conductive adhesive portion 35 is in contact with, for example, the exposed portion 31e. The second terminal 42 includes, for example, a lead wire, and one end of the lead wire is fixed by the conductive adhesive portion 35.
[0022] The conductive adhesive portion 35 is not limited to a specific configuration as long as it has conductivity and adhesiveness. The conductive adhesive portion 35 contains, for example, silver or a conductive polymer. According to such a configuration, in the manufacture of the capacitor 1a, when the second terminal 42 and the first conductor 31 are electrically connected, heat treatment at a high temperature is likely to be unnecessary, and the yield of the capacitor 1a is likely to be high. In addition, a defect is less likely to occur in the electrical connection between the second terminal 42 and the first conductor 31, and the capacitor 1a is likely to have high reliability. When the conductive adhesive portion 35 contains silver, the conductive adhesive portion 35 includes, for example, a binder containing a resin and silver particles dispersed in the conductive adhesive portion 35.
[0023] As shown in FIG. 1, the capacitor 1a further includes, for example, a case 50. Inside the case 50, a base material 10, a first dielectric layer 21, a first conductor 31, a second dielectric layer 22, a second conductor 32, and a conductive adhesive portion 35 are accommodated. The case 50 is made of a dielectric such as resin. The case 50 has, for example, a partition inside it that electrically insulates the second conductor 32 and the conductive adhesive portion 35. A part of the first terminal 41 and the second terminal 42 is drawn out to the outside of the case 50.
[0024] As shown in FIG. 1, the capacitor 1a has a MIMIM structure composed of a base material 10, a first dielectric layer 21, a first conductor 31, a second dielectric layer 22, and a second conductor 32. In FIG. 1, an example in which one MIMIM structure is accommodated in the case 50 is shown, but the present invention is not limited to this example. A plurality of MIMIM structures laminated on each other may be accommodated in the case 50.
[0025] The material of the base material 10 is not limited to a specific material as long as it has conductivity. The base material 10 may contain, for example, metal, or may contain a semiconductor whose conductivity is enhanced by the inclusion of a dopant. The base material 10 desirably has high conductivity. From the viewpoint of high conductivity, the base material 10 desirably contains metal. The metal may be a valve metal. In this case, the first dielectric layer 21 can be formed by anodic oxidation. Examples of valve metals are Al, Ta, Ti, Hf, Zr, Si, and Nb.
[0026] The base material 10 may be sheet-shaped or columnar.
[0027] The thickness of the first dielectric layer 21 is not limited to a specific value. The thickness is, for example, 5 nm or more. Thereby, the leakage current is suppressed, and the capacitor 1a is likely to have a desired withstand voltage property. The thickness of the first dielectric layer 21 is, for example, 500 nm or less. Thereby, the capacitor 1a is more likely to have a high capacitance. The thickness of the first dielectric layer 21 may be 10 nm or more, or may be 400 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, or 20 nm or less.
[0028] The material of the first dielectric layer 21 is not limited to a specific material. The first dielectric layer 21 contains, for example, an oxide. In this case, the oxide contains at least one selected from the group consisting of hafnium, zirconium, aluminum, tantalum, titanium, silicon, zinc, and niobium. Examples of the oxide include HfO2, ZrO2, Hf 1-x Zr x O2, Al2O3, Ta2O5, TiO2, SiO2, ZnO, and Nb2O5. The first dielectric layer 21 containing such an oxide can be formed, for example, by anodizing a valve metal. Therefore, the first dielectric layer 21 may be an anodic oxide film. The oxide desirably contains at least one selected from the group consisting of Al2O3 and Ta2O5. In this case, the capacitor 1a is likely to have a high breakdown voltage.
[0029] The first dielectric layer 21 may contain an inorganic compound. In this case, the inorganic compound contains at least one selected from the group consisting of, for example, oxides, nitrides, and oxynitrides. The inorganic compound contains at least one selected from the group consisting of hafnium, zirconium, aluminum, tantalum, titanium, silicon, zinc, and niobium, for example.
[0030] The first dielectric layer 21 may be an oxide film other than an anodic oxide film or a vapor deposition film. In this specification, vapor deposition can include physical vapor deposition and chemical vapor deposition as described in Japanese Industrial Standard JIS H0211-1992. The vapor deposition film can be formed, for example, by a vapor phase method such as chemical vapor deposition. In this case, the first dielectric layer 21 contains at least one selected from the group consisting of oxides, nitrides, and oxynitrides. Examples of the oxide are HfO2, ZrO2, Hf 1-x Zr x O2, Al2O3, Ta2O5, TiO2, SiO2, ZnO, and Nb2O5. Examples of the nitride are HfN, ZrN, Hf 1-x Zr x N, AlN, and SiN. Examples of the oxynitride are HfON, ZrON, HfZrON, AlON, and SiON.
[0031] The thickness of the first conductor 31 is not limited to a specific value. For example, the thickness is 20 nm or more. Thereby, the electrical resistance of the first conductor 31 is likely to be low. The thickness of the first conductor 31 is, for example, 500 nm or less. Thereby, the capacitance density per volume of the capacitor 1a is likely to be high. The thickness of the first conductor 31 may be 30 nm or more, 40 nm or more, or 50 nm or more, and may be 400 nm or less, 300 nm or less, 200 nm or less, or 100 nm or less.
[0032] The material of the first conductor 31 is not limited to a specific material. The first conductor 31 includes, for example, at least one selected from the group consisting of Ti, W, Mo, Co, Ru, CoSi2, NiSi, TiN, TaN, indium tin oxide (ITO), ZnO, indium gallium zinc oxide (IGZO), WO3, and TiAlN.
[0033] The method of forming the first conductor 31 is not limited to a specific method. The first conductor 31 is, for example, a vapor deposition film. The first conductor 31 is formed, for example, by a vapor phase method such as chemical vapor deposition. In this case, the first conductor 31 easily covers a desired site of the first dielectric layer 21. Desirably, the first conductor 31 is formed by atomic layer deposition (ALD). In this case, the first conductor 31 more easily covers a desired site of the first dielectric layer 21, and the first conductor 31 is likely to form a uniform layer. The first conductor 31 may be formed by physical vapor deposition such as sputtering.
[0034] As shown in FIG. 1, the first dielectric layer 21 and the first conductor 31 are disposed, for example, on a plurality of intersecting surfaces of the substrate 10.
[0035] The thickness of the second dielectric layer 22 is not limited to a specific value. The thickness is, for example, 5 nm or more. Thereby, leakage current is suppressed, and the capacitor 1a is likely to have a desired withstand voltage property. The thickness of the second dielectric layer 22 is, for example, 500 nm or less. Thereby, the capacitor 1a is more likely to have a high capacitance. The thickness of the second dielectric layer 22 may be 10 nm or more, and may be 400 nm or less, 300 nm or less, 200 nm or less, or 100 nm or less.
[0036] The material of the second dielectric layer 22 is not limited to a specific material. The second dielectric layer 22 contains, for example, an inorganic compound. The inorganic compound contains, for example, at least one selected from the group consisting of oxides, nitrides, and oxynitrides. In addition, the inorganic compound contains, for example, at least one selected from the group consisting of hafnium, zirconium, aluminum, tantalum, titanium, silicon, niobium, and zinc. When the inorganic compound contained in the second dielectric layer 22 contains an oxide, the oxide may contain at least one selected from the group consisting of hafnium, zirconium, aluminum, tantalum, titanium, silicon, niobium, and zinc. Examples of the oxide are HfO2, ZrO2, Hf 1-x Zr x O2, Al2O3, Ta2O5, TiO2, SiO2, Nb2O5, and ZnO. Examples of the nitride are HfN, ZrN, Hf 1-x Zr x N, AlN, and SiN. Examples of the oxynitride are HfON, ZrON, HfZrON, AlON, and SiON.
[0037] The method for forming the second dielectric layer 22 is not limited to a specific method. The second dielectric layer 22 is, for example, a vapor deposition film. The second dielectric layer 22 is formed, for example, by a vapor phase method such as chemical vapor deposition. In this case, the second dielectric layer 22 easily covers a desired site of the first conductor 31. Desirably, the second dielectric layer 22 is formed by ALD. In this case, the second dielectric layer 22 more easily covers a desired site of the first conductor 31, and the second dielectric layer 22 is likely to be uniform. The second dielectric layer 22 may be formed by physical vapor deposition such as sputtering.
[0038] The material of the second conductor 32 is not limited to a specific material. The second conductor 32 includes, for example, at least one selected from the group consisting of a conductive polymer, an electrolyte, manganese oxide, Ti, W, Mo, Co, Ru, CoSi2, NiSi, TiN, TaN, ITO, ZnO, IGZO, WO3, and TiAlN.
[0039] The second conductor 32 preferably includes a conductive polymer. In this case, the second conductor 32 is likely to exhibit a self-healing function, and the capacitor 1a is likely to have high reliability. Examples of the conductive polymer are polyaniline and polypyrrole.
[0040] FIG. 2A is a cross-sectional view schematically showing an example of a method for manufacturing a capacitor according to the present disclosure. FIG. 2B is a flowchart showing an example of a method for manufacturing a capacitor according to the present disclosure. As shown in FIGS. 2A and 2B, the method for manufacturing the capacitor 1a includes, for example, the following (i) to (vi). According to such a method, there are few restrictions on the substrate 10, and there are also few restrictions on the size of the capacitor 1a that can be manufactured. (i) Form a first dielectric layer 21 on a conductive substrate 10. (ii) Form a layer by the first conductor 31 on the first dielectric layer 21. (iii) Form a second dielectric layer 22 on the first conductor 31. (iv) Form a second conductor 32 on the second dielectric layer 22. (v) Expose a part of the surface of the first conductor 31 to obtain a first exposed portion E1. (vi) Electrically connect the substrate 10 and the second conductor 32 by a second exposed portion E2 obtained by exposing a part of the surface of the substrate 10.
[0041] As shown in FIGS. 2A and 2B, the method for manufacturing the capacitor 1a may include, for example, the following (ia) to (iva). According to such a method, each layer can be arranged at a desired position by using masks M1 and M2. (ia) With the first mask M1 disposed on the first portion P1 which is a part of the surface of the base material 10, a first dielectric layer 21 is formed on the base material 10 and the first mask M1, and a layer is formed by the first conductor 31 on the first dielectric layer 21. (iia) The second portion P2 which is a part of the first dielectric layer 21 formed on the first mask M1 and the third portion P3 which is a part of the first conductor 31 disposed on the second portion P2 are removed together with the first mask M1. (iiia) After removing the first mask M1, with the second mask M2 disposed, a second dielectric layer 22 is formed on the second mask M2, the base material 10, and the first conductor 31. The second mask M2 is disposed on the fourth portion P4 which is a part of the first portion P1 and the fifth portion P5 which is a part of the surface of the first conductor 31. (iva) A sixth portion P6 which is a part of the second dielectric layer 22 formed on the second mask M2 is removed together with the second mask M2 to obtain a first exposed portion E1 and a second exposed portion E2.
[0042] As shown in FIG. 2B, for example, in step S101, the first mask M1 is disposed on the first portion P1 of the base material 10. The first portion P1 is, for example, the surface of one end of the base material 10. Next, in step S102, the first dielectric layer 21 and the first conductor 31 are formed. The formation of the first dielectric layer 21 may be performed, for example, by anodization, or may be performed by a vapor phase method such as ALD, chemical vapor deposition (CVD), mist CVD, and sputtering. The formation of the first conductor 31 is performed, for example, by a vapor phase method such as ALD, chemical vapor deposition (CVD), mist CVD, and sputtering.
[0043] Next, in step S103, the second portion P2 and the third portion P3 are removed together with the first mask M1. Next, in step S104, the second mask M2 is disposed on the fourth portion P4 and the fifth portion P5. The fourth portion P4 is a part of the first portion P1 and is, for example, the surface of one end of the base material 10. The fifth portion P5 is a part of the surface of the first conductor 31 and is, for example, the surface of the end of the first conductor 31 located near the end on the side opposite to the fourth portion P4 of the base material 10.
[0044] Next, in step S105, the second dielectric layer 22 is formed. The formation of the second dielectric layer 22 may be performed, for example, by a vapor phase method such as ALD, CVD, mist CVD, and sputtering.
[0045] Next, in step S106, the sixth site P6 is removed together with the second mask M2 to obtain a first exposed portion E1 and a second exposed portion E2.
[0046] Next, in step S107, the second terminal 42 is electrically connected to the first conductor 31. For example, a conductive adhesive is supplied so as to contact the first exposed portion E1, and a conductive adhesive portion 35 is formed by solidification of the conductive adhesive. The second terminal 42 is fixed by the conductive adhesive portion 35.
[0047] Next, in step S108, a protective material 50r is formed so as to surround the first exposed portion E1 and the conductive adhesive portion 35. Next, in step S109, the second conductor 32 is formed. The second conductor 32 is formed so as to contact the second exposed portion E2. In addition, the second conductor 32 is formed so as not to contact the first exposed portion E1. Therefore, the second conductor 32 is electrically insulated from the first conductor 31. The formation of the second conductor 32 may be performed by electrolytic polymerization or may be performed by a vapor phase method such as ALD, CVD, mist CVD, and sputtering.
[0048] Next, in step S110, the first terminal 41 is electrically connected to the base material 10. For example, the first terminal 41 is attached so that one end of the first terminal 41 contacts the base material 10.
[0049] Next, in step S111, a case 50 is formed by molding. At this time, a part of the first terminal 41 and the second terminal 42 is taken out to the outside of the case 50.
[0050] FIG. 3 is a cross-sectional view showing another example of the capacitor of the present disclosure. The capacitor 1b shown in FIG. 3 is configured in the same manner as the capacitor 1a except for the parts to be particularly described. The components of the capacitor 1b that are the same as or corresponding to the components of the capacitor 1a are denoted by the same reference numerals, and detailed descriptions thereof are omitted. The description regarding the capacitor 1a applies to the capacitor 1b as well unless there is a technical contradiction.
[0051] As shown in FIG. 3, in the capacitor 1b, the base material 10 includes a porous portion 11. The first dielectric layer 21 is disposed on the porous portion 11. According to such a configuration, in the capacitor 1b, the area of the electrode tends to be large, and the capacitor 1b tends to have a higher capacitance.
[0052] FIG. 4 is a partial cross-sectional view of the capacitor shown in FIG. 3. FIG. 4 is a cross-sectional view of the porous portion 11 in contact with the first dielectric layer 21 and the portion around the porous portion 11 in the capacitor 1b. As shown in FIG. 4, the first dielectric layer 21, the first conductor 31, and the second dielectric layer 22 are formed so as to cover the wall surface of the porous portion 11. The pores in the porous portion 11 may extend straight without branching, or may extend with branching. The porous portion 11 may have a structure such as a trench shape, a sponge shape, a lattice shape, and a tunnel shape.
[0053] The porous portion 11 contains, for example, valve metal. In this case, for example, the first dielectric layer 21 can be formed in the porous portion 11 by anodic oxidation.
[0054] The valve metal contained in the porous portion 11 may be aluminum. In this case, the porous portion 11 can be formed, for example, by electrolytic etching of an aluminum foil. Therefore, in the capacitor 1b, the area of the electrode tends to be larger, and the capacitor 1b tends to have a higher capacitance.
[0055] The porous portion 11 may contain a metal sintered body. In this case, in the capacitor 1b, the area of the electrode tends to be larger, and the capacitor 1b tends to have a higher capacitance.
[0056] The metal sintered body contains, for example, tantalum. In this case, in the capacitor 1b, the area of the electrode is likely to be larger, and the capacitor 1b is more likely to have a high capacitance.
[0057] As shown in FIG. 3, the conductive portion 10c may be formed by the porous portion 11. In this case, for example, when the conductive portion 10c comes into contact with the second conductor 32, the second conductor 32 may be present inside the porous portion 11. Thereby, it is difficult for a defect to occur in the electrical connection between the conductive portion 10c and the second conductor 32. The conductive portion 10c may be formed by a non-porous portion of the base material 10.
[0058] As shown in FIG. 3, the base material 10 includes a dense portion 12. The dense portion 12 is a non-porous portion. The dense portion 12 forms, for example, the core of the base material 10. For example, in the capacitor 1b, the porous portion 11 is formed around the dense portion 12.
[0059] FIG. 5 is a cross-sectional view showing still another example of the capacitor of the present disclosure. The capacitor 1c shown in FIG. 5 is configured in the same manner as the capacitor 1a except for the parts to be particularly described. The components of the capacitor 1c that are the same as or corresponding to the components of the capacitor 1a are denoted by the same reference numerals, and detailed description thereof is omitted. The description regarding the capacitor 1a also applies to the capacitor 1c as long as there is no technical contradiction.
[0060] As shown in FIG. 5, in the capacitor 1c, the first terminal 41 is electrically connected to the second conductor 32. In addition, the first terminal 41 is electrically connected to the base material 10 by the second conductor 32.
[0061] FIG. 6 is a cross-sectional view showing another example of the method for manufacturing a capacitor of the present disclosure. FIG. 6 shows an example of the method for manufacturing capacitor 1c. As shown in FIG. 6, first, a first dielectric layer 21 is formed on a base material 10. The first dielectric layer 21 may be formed by anodization, or may be formed by a vapor phase method such as ALD, CVD, mist CVD, and sputtering.
[0062] Next, a first conductor 31 is formed on the first dielectric layer 21. The first conductor 31 is formed, for example, by a vapor phase method such as ALD, CVD, mist CVD, and sputtering. Before forming the first conductor 31, a mask M1 is disposed at an end portion of the base material 10. This mask M1 is removed together with a part of the first conductor 31 deposited on the mask M1 after the first conductor 31 is formed.
[0063] Next, a second dielectric layer 22 is formed on the first conductor 31 and the first dielectric layer 21. The second dielectric layer 22 is formed, for example, by a vapor phase method such as ALD, CVD, mist CVD, and sputtering. Before forming the second dielectric layer 22, a mask M2 is disposed at an end portion of the first conductor 31 opposite to the end portion where the mask M1 is disposed. The mask M2 is removed together with the second dielectric layer 22 deposited on the mask M2 after the second dielectric layer 22 is formed. Thereby, an exposed portion 31e is obtained.
[0064] Next, at the end portion of the base material 10 where the mask M1 is disposed, a part of the first dielectric layer 21 and the second dielectric layer 22 on the base material 10 is removed by a method such as etching, laser processing, or cutting. Thereby, a conduction portion 10c is formed.
[0065] Next, the second conductor 32 is formed on the conduction part 10c and the second dielectric layer 22. Thereby, the conduction part 10c of the base material 10 is in contact with the second conductor 32 and electrically connected. The second conductor 32 is formed so as not to contact the exposed part 31e and is electrically insulated from the first conductor 31. The second conductor 32 may be formed by electrolytic polymerization or by a vapor phase method such as ALD, CVD, mist CVD, and sputtering. The second conductor 32 is connected to the first terminal 41.
[0066] Next, the conductive adhesive part 35 is formed on the exposed part 31e. The conductive adhesive part 35 is formed so as not to contact the second conductor 32 and is electrically insulated from the second conductor 32. Next, the conductive adhesive part 35 is connected to the second terminal 42. Finally, the case 50 is formed by molding. At this time, a part of the first terminal 41 and the second terminal 42 is taken out to the outside of the case 50.
[0067] FIG. 7A is a diagram schematically showing an example of the electric circuit of the present disclosure. As shown in FIG. 7A, the electric circuit 3 includes a capacitor 1a. The electric circuit 3 may be an active circuit or a passive circuit. The electric circuit 3 may be a discharge circuit, a smoothing circuit, a decoupling circuit, or a coupling circuit. Since the electric circuit 3 includes the capacitor 1a, the electric circuit 3 easily exhibits desired performance. For example, noise is easily reduced in the electric circuit 3. The electric circuit 3 may include a capacitor 1b or 1c.
[0068] FIG. 7B is a diagram schematically showing an example of the circuit board of the present disclosure. As shown in FIG. 7B, the circuit board 5 includes a capacitor 1a. For example, in the circuit board 5, an electric circuit 3 including the capacitor 1a is formed. Since the circuit board 5 includes the capacitor 1a, the circuit board 5 easily exhibits desired performance. The circuit board 5 may be a built-in board or a motherboard. The circuit board 5 may include a capacitor 1b or 1c.
[0069] FIG. 7C is a diagram schematically showing an example of the device of the present disclosure. As shown in FIG. 7C, the device 7 includes a capacitor 1a. The device 7 includes, for example, a circuit board 5 including the capacitor 1a. Since the device 7 includes the capacitor 1a, the device 7 is likely to exhibit desired performance. The device 7 may be an electronic device, a communication device, a signal processing device, or a power supply device. The device 7 may be a server, an AC adapter, an accelerator, a flat panel display such as a liquid crystal display (LCD), a USB charger, a solid state drive (SSD), an information terminal such as a PC, a smartphone, and a tablet PC, or an Ethernet switch. The device 7 may include a capacitor 1b or 1c.
[0070] (Appendix) From the above description, the following technologies are disclosed.
[0071] (Technology 1) A conductive substrate, a first dielectric layer disposed on the substrate, a first conductor disposed on the first dielectric layer and having a layer shape, a second dielectric layer disposed on the first conductor, a second conductor disposed on the second dielectric layer, and the first conductor includes an exposed portion not covered by the second dielectric layer and the second conductor, the substrate is electrically insulated from the first conductor by the first dielectric layer, the second conductor is electrically insulated from the first conductor by the second dielectric layer, the substrate includes a conduction portion electrically connected to the second conductor, a capacitor.
[0072] (Technology 2) the conduction portion is in contact with the second conductor, The capacitor according to Technique 1.
[0073] (Technique 3) The conducting part is surrounded by the second conductor. The capacitor according to Technique 1 or 2.
[0074] (Technique 4) The base material includes a porous part. The first dielectric layer is disposed on the porous part. The capacitor according to any one of Techniques 1 to 3.
[0075] (Technique 5) The porous part includes valve metal. The capacitor according to Technique 4.
[0076] (Technique 6) The valve metal is aluminum. The capacitor according to Technique 5.
[0077] (Technique 7) The porous part includes a metal sintered body. The capacitor according to Technique 4.
[0078] (Technique 8) The metal sintered body includes tantalum. The capacitor according to Technique 7.
[0079] (Technique 9) A first terminal electrically connected to the base material or the second conductor, and a second terminal electrically connected to the first conductor. The capacitor according to any one of Techniques 1 to 8.
[0080] (Technique 10) Further comprising a conductive adhesive part containing silver or a conductive polymer, The first conductor is electrically connected to the second terminal by the conductive adhesive part. The capacitor according to Technique 9.
[0081] (Technique 11) At least one selected from the group consisting of the first dielectric layer and the second dielectric layer contains an inorganic compound. The inorganic compound contains at least one selected from the group consisting of oxides, nitrides, and oxynitrides. The oxide contains at least one selected from the group consisting of hafnium, zirconium, aluminum, tantalum, titanium, silicon, zinc, and niobium. The capacitor according to any one of Techniques 1 to 10.
[0082] (Technique 12) The first conductor contains at least one selected from the group consisting of Ti, W, Mo, Co, Ru, CoSi2, NiSi, TiN, TaN, indium tin oxide (ITO), ZnO, indium gallium zinc oxide (IGZO), WO3, and TiAlN. The capacitor according to any one of Techniques 1 to 11.
[0083] (Technique 13) The second conductor contains at least one selected from the group consisting of a conductive polymer, an electrolyte, manganese oxide, Ti, W, Mo, Co, Ru, CoSi2, NiSi, TiN, TaN, indium tin oxide (ITO), ZnO, indium gallium zinc oxide (IGZO), WO3, and TiAlN. The capacitor according to any one of Techniques 1 to 12.
[0084] (Technique 14) An electric circuit comprising the capacitor according to any one of Techniques 1 to 13. Electric circuit.
[0085] (Technique 15) A circuit board comprising the capacitor according to any one of Techniques 1 to 13. Circuit board.
[0086] (Technique 16) An apparatus comprising the capacitor according to any one of Technologies 1 to 13. Apparatus.
[0087] (Technology 17) Forming a first dielectric layer on a conductive substrate; Forming a layer by a first conductor on the first dielectric layer; Forming a second dielectric layer on the first conductor; Forming a second conductor on the second dielectric layer; Exposing a part of the surface of the first conductor to obtain a first exposed portion; Electrically connecting the substrate and the second conductor by a second exposed portion obtained by exposing a part of the surface of the substrate, and a method for manufacturing a capacitor. Method for manufacturing a capacitor.
[0088] (Technology 18) In forming the first dielectric layer and forming the layer by the first conductor, with a first mask disposed at a first portion that is a part of the surface of the substrate, the first dielectric layer is formed on the substrate and the first mask, and the layer is formed by the first conductor on the first dielectric layer. Further comprising removing, together with the first mask, a second portion that is a part of the first dielectric layer formed on the first mask and a third portion that is a part of the first conductor disposed on the second portion. In forming the second dielectric layer, after removing the first mask, with a second mask disposed on a fourth portion that is a part of the first portion and a fifth portion that is a part of the surface of the first conductor, the second dielectric layer is formed on the second mask, the substrate, and the first conductor. In obtaining the first exposed portion and electrically connecting the substrate and the second conductor, a sixth portion that is a part of the second dielectric layer formed on the second mask is removed together with the second mask to obtain the first exposed portion and the second exposed portion. Method for manufacturing a capacitor according to Technology 17.
Example
[0089] Hereinafter, the present disclosure will be described in more detail with reference to examples. It should be noted that the following examples are illustrative, and the present disclosure is not limited to the following examples.
[0090] <Example 1> An Al foil having a thickness of 120 μm was prepared as a conductive substrate. An Al2O3 film was formed on the surface of the Al foil by anodic oxidation to obtain a first dielectric layer. In the anodic oxidation, with the Al foil immersed in a 0.3 mol / L aqueous solution of diammonium adipate, a voltage of 7 V was applied with the Al foil as the anode. The thickness of the Al2O3 film was 10 nm. Utilizing the fact that anodic oxidation does not proceed in the region not immersed in the diammonium adipate aqueous solution, a portion where the Al2O3 film was not formed was provided at the end of the Al foil to form a conduction part. A 50-nm Ti film was formed on the Al2O3 film by RF magnetron sputtering to obtain a first conductive layer. A mask, which is a heat-resistant adhesive tape, was placed so as to completely cover the conduction part at the end of the Al foil, and the Ti film was provided so that the conduction part of the Al foil and the Ti film were electrically insulated. Next, a 20-nm ZrO2 film was formed by RF magnetron sputtering to obtain a second dielectric layer. A mask, which is a heat-resistant adhesive tape, was placed on the conduction part at the end of the Al foil and on the Ti film at the end opposite to the conduction part of the Al foil to form an exposed part where the conduction part and the Ti film were exposed. Finally, a Ti film having a thickness of 50 nm was formed on the ZrO2 film by RF magnetron sputtering to form a second conductive layer. Before forming the second conductive layer, a mask, which is a heat-resistant adhesive tape, was placed on the exposed part so that the Ti film was not formed on the exposed part. On the other hand, the Ti film was formed on the conduction part. In this way, a capacitor according to Example 1 having a MIMIM structure was obtained.
[0091] Using a probe, contact was taken from the exposed part with the second conductive layer in the capacitor according to Example 1 as one electrode and the first conductive layer as the other electrode. Impedance measurement was performed using Modulab manufactured by Solartron Analytical. The results are shown in Table 1.
[0092] <Comparative Example 1> In the same manner as in Example 1, a conductive substrate, a first dielectric layer, and a first conductive layer were formed. A conductive substrate, which is an Al foil having a thickness of 120 μm, was prepared. The surface of the Al foil had a porous structure. An Al2O3 film was formed on the surface of the Al foil by anodization. In the anodization, with the Al foil immersed in a 0.3 mol / L aqueous solution of diammonium adipate, a voltage of 7 V was applied with the Al foil as the anode. The thickness of the formed Al2O3 film was 10 nm. A Ti film having a thickness of 50 nm was formed on the Al2O3 film by RF magnetron sputtering to form a first conductive layer. In this way, a capacitor according to Comparative Example 1 having a MIM structure was obtained.
[0093] In the same manner as in Example 1, contact was made using a probe with the conductive substrate as one electrode and the first conductive layer as the other electrode. Impedance measurement was performed using Modulab manufactured by Solartron Analytical. The results are shown in Table 1.
[0094] As shown in Table 1, the capacitance of the capacitor having the MIMIM structure according to Example 1 is higher than the capacitance of the capacitor having the MIM structure according to Comparative Example 1. Since the capacitor according to Example 1 has a MIMIM structure, the specific surface area of the dielectric layer is increased compared to the capacitor according to Comparative Example 1, and as a result, it is considered that the capacitance as a capacitor has increased.
[0095]
Table 1
Industrial Applicability
[0096] The capacitor according to the present disclosure has a MIMIM structure and has few restrictions on size and substrate.
Explanation of Reference Numerals
[0097] 1a, 1b, 1c Capacitors 3 Electric circuit 5 Circuit board 7 Device 10 Base material 10c Conductive part 11 Porous part 12 Dense part 21 First dielectric layer 22 Second dielectric layer 31 First conductor 31e Exposed part 32 Second conductor 35 Conductive adhesive part 41 First terminal 42 Second terminal 50 Case 50r Protective material E1 First exposed part E2 Second exposed part P1 First part P2 Second part P3 Third part P4 Fourth part P5 Fifth part P6 Sixth part M1 First mask M2 Second mask
Claims
1. A base material having conductivity, A first dielectric layer disposed on the base material, A first conductor disposed on the first dielectric layer and having a layer shape, A second dielectric layer disposed on the first conductor, A second conductor disposed on the second dielectric layer, A first terminal electrically connected to the base material or the second conductor, A second terminal electrically connected to the first conductor, A conductive adhesive portion containing silver or a conductive polymer, and comprising: The first conductor includes an exposed portion not covered by the second dielectric layer and the second conductor, The base material is electrically insulated from the first conductor by the first dielectric layer, The second conductor is electrically insulated from the first conductor by the second dielectric layer, The base material includes a conduction portion electrically connected to the second conductor, The first conductor is electrically connected to the second terminal by the conductive adhesive portion, A capacitor.
2. The conduction portion is in contact with the second conductor, The capacitor according to claim 1.
3. The conduction portion is surrounded by the second conductor, The capacitor according to claim 1.
4. The base material includes a porous portion, The first dielectric layer is disposed on the porous portion, The capacitor according to claim 1.
5. The porous portion includes valve metal, The capacitor according to claim 4.
6. The valve metal is aluminum, The capacitor according to claim 5.
7. The porous portion includes a metal sintered body, The capacitor according to claim 4.
8. The metal sintered body includes tantalum, The capacitor according to claim 7.
9. At least one selected from the group consisting of the first dielectric layer and the second dielectric layer contains an inorganic compound, The inorganic compound includes at least one selected from the group consisting of oxides, nitrides, and oxynitrides, The oxide includes at least one selected from the group consisting of hafnium, zirconium, aluminum, tantalum, titanium, silicon, zinc, and niobium, The capacitor according to claim 1.
10. The first conductor includes at least one selected from the group consisting of Ti, W, Mo, Co, Ru, CoSi 2 , NiSi, TiN, TaN, indium tin oxide, ZnO, indium gallium zinc oxide, WO 3 , and TiAlN The capacitor according to claim 1.
11. The second conductor includes at least one selected from the group consisting of a conductive polymer, an electrolyte, a manganese oxide, Ti, W, Mo, Co, Ru, CoSi 2 , NiSi, TiN, TaN, indium tin oxide, ZnO, indium gallium zinc oxide, WO 3 , and TiAlN The capacitor according to claim 1.
12. An electric circuit comprising the capacitor according to any one of claims 1 to 11, An electric circuit.
13. A circuit board comprising the capacitor according to any one of claims 1 to 11, A circuit board.
14. An apparatus comprising the capacitor according to any one of Claims 1 to 11. Apparatus.
15. Forming a first dielectric layer on a conductive substrate; Forming a layer by a first conductor on the first dielectric layer; Forming a second dielectric layer on the first conductor; Forming a second conductor on the second dielectric layer; Exposing a part of the surface of the first conductor to obtain a first exposed portion; Electrically connecting the substrate and the second conductor by a second exposed portion obtained by exposing a part of the surface of the substrate; Electrically connecting the substrate or the second conductor and a first terminal; Electrically connecting the first conductor to a second terminal by a conductive adhesive portion containing silver or a conductive polymer, A method of manufacturing a capacitor.
16. In forming the first dielectric layer and forming the layer by the first conductor, with a first mask disposed at a first portion which is a part of the surface of the substrate, the first dielectric layer is formed on the substrate and the first mask, and the layer is formed by the first conductor on the first dielectric layer. Further comprising removing, together with the first mask, a second portion which is a part of the first dielectric layer formed on the first mask and a third portion which is a part of the first conductor disposed on the second portion. In forming the second dielectric layer, after removing the first mask, with a second mask disposed on a fourth portion which is a part of the first portion and a fifth portion which is a part of the surface of the first conductor, the second dielectric layer is formed on the second mask, the substrate, and the first conductor. In obtaining the first exposed portion and electrically connecting the substrate and the second conductor, a sixth portion which is a part of the second dielectric layer formed on the second mask is removed together with the second mask to obtain the first exposed portion and the second exposed portion. A method of manufacturing a capacitor according to Claim 15.
Citation Information
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