Switching Circuit

Abstract

To suppress erroneous ignition of a switching element and to shorten a period in which load potential is applied to a gate of an object switching element.SOLUTION: In a switching circuit, an object gate control circuit can apply first gate-off potential and second gate-off potential lower than potential of a low potential main terminal to a gate of an object switching element as gate off potential. The object gate control circuit can determine whether forward current flows to a counter diode. The object gate control circuit applies the first gate-off potential to the gate of the object switching element in first timing in which a counter switching element is turned on in a state in which the forward current flows to the counter diode, and applies second gate-off potential to the gate of the object switching element in second timing in which the counter switching element is turned on in a state in which the forward current does not flow to the counter diode.SELECTED DRAWING: Figure 7

Description

Technical Field

[0001] The technology disclosed in this specification relates to a switching circuit.

[0002] The inverter circuit disclosed in Patent Document 1 has two switching elements connected in series between a high-potential wiring and a low-potential wiring. Also, an output wiring is connected to the connection point of the two switching elements. Further, the inverter circuit has a gate control circuit for each switching element. Each gate control circuit controls the gate potential of the corresponding switching element. The gate control circuit switches the switching element by switching the gate potential between a gate-on potential and a gate-off potential. Also, the gate control circuit can apply a first gate-off potential of 0 V or more and a second gate-off potential of less than 0 V as the gate-off potential. At the timing when one of the series-connected switching elements turns on, the gate potential of the other switching element may instantaneously increase due to capacitive coupling. In contrast, each gate control circuit applies the second gate-off potential (i.e., a negative potential) to the gate of the target switching element at the timing when the switching element (hereinafter referred to as the target switching element) to which the gate control circuit is connected is in the off state and the switching element (hereinafter referred to as the opposing switching element) connected in series to the target switching element turns on. Thereby, even when the gate potential of the target switching element increases due to capacitive coupling, the target switching element being erroneously turned on (hereinafter referred to as false arcing) is suppressed. Also, when a negative potential is applied to the gate of the switching element, the switching element is likely to deteriorate. In contrast, each gate control circuit applies the first gate-off potential to the gate of the target switching element during the off period other than the timing when the opposing switching element turns on. Thereby, deterioration of the target switching element is suppressed.

Prior Art Documents

Patent Documents

[0003] Patent Document 1 Japanese Patent Application Laid-Open No. 2019-068691 SUMMARY OF THE INVENTION PROBLEMS TO BE SOLVED BY THE INVENTION

[0004] In this specification, a technique is proposed that can suppress the misfiring of a target switching element and can shorten the period during which a negative potential is applied to the gate of the target switching element. MEANS FOR SOLVING THE PROBLEMS

[0005] In the technique of Patent Document 1, a negative potential is always applied to the gate of the target switching element at the timing when the opposing switching element turns on. However, even when the opposing switching element turns on while a forward current is flowing through the diode connected in parallel with the opposing switching element, the gate potential of the target switching element does not increase due to capacitive coupling, and misfiring of the target switching element does not occur. Therefore, the switching circuit disclosed in this specification has the following configuration.

[0006] The switching circuit disclosed in this specification includes a high-potential wiring, an output wiring, a low-potential wiring, a first switching element having a high-potential main terminal connected to the high-potential wiring, a low-potential main terminal connected to the output wiring, and a gate, a second switching element having a high-potential main terminal connected to the output wiring, a low-potential main terminal connected to the low-potential wiring, and a gate, a first diode having a cathode connected to the high-potential main terminal of the first switching element and an anode connected to the low-potential main terminal of the first switching element, a second diode having a cathode connected to the high-potential main terminal of the second switching element and an anode connected to the low-potential main terminal of the second switching element, a target gate control circuit that changes the potential of the gate of the target switching element between a gate-on potential and a gate-off potential when one of the first switching element and the second switching element is a target switching element and the other is an opposing switching element, and an opposing gate control circuit that changes the potential of the gate of the opposing switching element between a gate-on potential and a gate-off potential. The target gate control circuit and the opposing gate control circuit control the potential of the gate of the target switching element and the potential of the gate of the opposing switching element so that the target switching element and the opposing switching element are alternately turned on. The target gate control circuit can apply a first gate-off potential that is equal to or higher than the potential of the low-potential main terminal of the target switching element and a second gate-off potential that is lower than the potential of the low-potential main terminal of the target switching element as the gate-off potential to the gate of the target switching element. The diode that is connected in parallel to the target switching element among the first diode and the second diode is the target diode. The diode that is connected in parallel to the opposing switching element among the first diode and the second diode is the opposing diode.When the target gate control circuit applies the first gate off potential to the gate of the target switching element at a first timing when the opposing switching element turns on while a forward current is flowing through the opposing diode, and applies the second gate off potential to the gate of the target switching element at a second timing when the opposing switching element turns on while no forward current is flowing through the opposing diode.

[0007] Note that the first switching element and the second switching element may be FETs (field effect transistors) or IGBTs (insulated gate bipolar transistors). Also, the first diode may be a diode provided separately from the first switching element. Further, when the first switching element is an FET, the first diode may be the body diode of the first switching element. Also, the second diode may be a diode provided separately from the second switching element. Further, when the second switching element is an FET, the second diode may be the body diode of the second switching element. Also, in this specification, the gate on potential means the gate potential required to turn on the switching element. That is, the gate on potential means a potential equal to or higher than the gate threshold of the switching element. Also, in this specification, the gate off potential means the gate potential required to turn off the switching element. That is, the gate off potential means a potential lower than the gate threshold of the switching element. Also, in this specification, the forward current means the current flowing through the inside of the diode from the anode toward the cathode.

[0008] In this switching circuit, when the target gate control circuit applies a first gate off potential (i.e., a potential of 0V or higher) to the gate of the target switching element at a first timing when the opposing switching element turns on while a forward current is flowing through the opposing diode, no increase in the gate potential of the target switching element due to capacitive coupling occurs even when the opposing switching element turns on at the first timing. Therefore, no false arcing occurs without applying a negative potential to the gate of the target switching element at the first timing. Also, by applying a first gate off potential of 0V or higher to the gate of the target switching element at the first timing, the period during which a negative potential is applied to the gate of the target switching element can be shortened. As a result, deterioration of the target switching element can be suppressed. Further, in this switching circuit, when the target gate control circuit applies a second gate off potential (i.e., a negative potential) to the gate of the target switching element at a second timing when the opposing switching element turns on while no forward current is flowing through the opposing diode, an increase in the gate potential of the target switching element due to capacitive coupling may occur when the opposing switching element turns on at the second timing. Therefore, false arcing can be suppressed by applying a negative potential to the gate of the target switching element at the second timing. As described above, according to this switching circuit, false arcing of the target switching element can be suppressed, and the period during which a negative potential is applied to the gate of the target switching element can be made shorter than before.

Brief Description of the Drawings

[0009]

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Embodiments for Carrying Out the Invention

[0010] In an example of the switching circuit disclosed in this specification, the target gate control circuit may determine whether a forward current is flowing through the opposing diode based on the direction of the current flowing through the output wiring.

[0011] When current flows in the direction flowing out from the series circuit (i.e., the series circuit of the first switching element and the second switching element) to the output wiring, a forward current flows through the second diode when the first switching element is off. Also, when current flows in the direction flowing into the series circuit to the output wiring, a forward current flows through the first diode when the second switching element is off. Therefore, it is possible to appropriately determine whether or not a forward current is flowing through the antiparallel diode based on the direction of the current flowing through the output wiring.

[0012] In a switching circuit according to an example disclosed in this specification, the target gate control circuit may determine whether or not a forward current is flowing through the antiparallel diode based on the direction of the current flowing through the parallel circuit of the antiparallel switching element and the antiparallel diode.

[0013] If current flows in the direction from the anode to the cathode of the antiparallel diode in the parallel circuit of the antiparallel switching element and the antiparallel diode, a forward current is flowing through the antiparallel diode. Therefore, it is possible to appropriately determine whether or not a forward current is flowing through the antiparallel diode based on the direction of the current flowing through the parallel circuit.

[0014] In a switching circuit according to an example disclosed in this specification, an antiparallel command signal including a turn-on command and a turn-off command for the antiparallel switching element may be input to the target gate control circuit and the antiparallel gate control circuit. The antiparallel gate control circuit may control the potential of the gate of the antiparallel switching element based on the antiparallel command signal. When the target gate control circuit receives the turn-on command in a state where a forward current is flowing through the antiparallel diode, the potential of the gate of the target switching element may be lowered from the first gate-off potential to the second gate-off potential, and then the potential of the gate of the target switching element may be maintained at the second gate-off potential until the turn-on of the antiparallel switching element is completed.

[0015] According to this configuration, the period during which the second gate-off potential (that is, negative potential) is applied to the gate of the target switching element can be made shorter.

[0016] In the switching circuit disclosed in the present specification as an example, the target gate control circuit may determine whether or not the turn-on of the opposing switching element has been completed based on the potential of the gate of the opposing switching element.

[0017] This configuration makes it possible to suitably determine whether or not the opposing switching element has been turned on.

[0018] In an example switching circuit disclosed in the present specification, the target gate control circuit may determine whether or not turn-on of the opposing switching element has been completed based on a voltage between the high potential main terminal and the low potential main terminal of the target switching element.

[0019] This configuration makes it possible to suitably determine whether or not the opposing switching element has been turned on.

[0020] In an example switching circuit disclosed in the present specification, the target gate control circuit may have an increase amount detection circuit that detects an increase amount of the potential of the gate of the target switching element at the second timing, and an increase amount-second gate off potential correction circuit that lowers the second gate off potential as the increase amount detected by the increase amount detection circuit increases.

[0021] According to this configuration, deterioration of the target switching element can be effectively suppressed.

[0022] In an example switching circuit disclosed in the present specification, the increase amount detection circuit may include a peak value hold circuit that holds a peak value of the potential of the gate of the target switching element, and a reset circuit that resets the peak value after the peak value is held and before the next second timing arrives.

[0023] According to this configuration, the increase amount of the potential of the gate of the target switching element at the second timing can be suitably detected.

[0024] A switching circuit according to an example disclosed in this specification may further include a temperature sensor and a temperature-second gate-off potential correction circuit that lowers the second gate-off potential as the temperature detected by the temperature sensor is higher.

[0025] According to this configuration, deterioration of the target switching element can be effectively suppressed.

Example

[0026] The inverter 10 shown in FIG. 1 is mounted on a vehicle. The vehicle is also equipped with a battery 80 and a motor 82. The motor 82 is a three-phase motor. The motor 82 drives the drive wheels of the vehicle to make the vehicle run. The inverter 10 has a high-potential wiring 12, a low-potential wiring 14, and three output wirings 16a to 16c. The high-potential wiring 12 is connected to the positive electrode of the battery 80. The low-potential wiring 14 is connected to the negative electrode of the battery 80. Therefore, the output voltage (i.e., DC voltage) of the battery 80 is applied between the high-potential wiring 12 and the low-potential wiring 14. The output wirings 16a to 16c are connected to the motor 82. The inverter 10 converts the DC power supplied between the high-potential wiring 12 and the low-potential wiring 14 by the battery 80 into three-phase AC power and outputs the three-phase AC power to the output wirings 16a to 16c. The three-phase AC power output by the inverter 10 is supplied to the motor 82 via the output wirings 16a to 16c.

[0027] The inverter 10 has three switching circuits 20. Each switching circuit 20 has a switching element 21 and a switching element 22. The switching elements 21 and 22 are FETs (i.e., field effect transistors). However, the switching elements 21 and 22 may be IGBTs (i.e., insulated gate bipolar transistors). The drain of the switching element 21 is connected to the high potential wiring 12. The source of the switching element 21 is connected to the drain of the switching element 22. The source of the switching element 22 is connected to the low potential wiring 14. Each switching circuit 20 has gate control circuits 25 and 26. The gate control circuit 25 is connected to the gate G21 of the switching element 21. The gate control circuit 25 switches the switching element 21 by controlling the gate potential Vg21 of the switching element 21. The gate control circuit 26 is connected to the gate G22 of the switching element 22. The gate control circuit 26 switches the switching element 22 by controlling the gate potential Vg22 of the switching element 22. Each switching circuit 20 has diodes 23 and 24. The diodes 23 and 24 may be the body diodes of the switching elements 21 and 22, or may be diodes provided separately from the diodes 23 and 24. The diode 23 is connected in parallel with the switching element 21. The anode of the diode 23 is connected to the source of the switching element 21. The cathode of the diode 23 is connected to the drain of the switching element 21. The diode 24 is connected in parallel with the switching element 22. The anode of the diode 24 is connected to the source of the switching element 22. The cathode of the diode 24 is connected to the drain of the switching element 22. Each of the three switching circuits 20 is connected to a corresponding output wiring 16. That is, the output wiring 16a is connected to the switching circuit 20a among the three switching circuits 20. The output wiring 16b is connected to the switching circuit 20b among the three switching circuits 20.The output wiring 16c is connected to the switching circuit 20c among the three switching circuits 20. In each of the three switching circuits 20, the output wiring 16 is connected to the connection point between the source of the switching element 21 and the drain of the switching element 22. By switching each of the switching elements 21 and 22 of each switching circuit 20, three-phase AC power is output to the output wirings 16a to 16c.

[0028] The inverter 10 has current sensors 31 to 33. The current sensor 31 detects the current Iout1 of the output wiring 16a. The current sensor 32 detects the current Iout2 of the output wiring 16b. The current sensor 33 detects the current Iout3 of the output wiring 16c.

[0029] The inverter 10 has a control device 30. A control target value for the motor 82 is input to the control device 30 from the outside. Also, the detected values of the currents Iout1 to Iout3 detected by the current sensors 31 to 33 are input to the control device 30. Based on the control target value for the motor 82, the currents Iout1 to Iout3, etc., the control device 30 calculates signals SG1 and SG2 for the three switching circuits 20. The signal SG1 is a value that commands the switching timing of the switching element 21, and the signal SG2 is a value that commands the switching timing of the switching element 22. The control device 30 calculates different signals SG1 and SG2 for each switching circuit 20. The control device 30 transmits the signals SG1 and SG2 to the corresponding switching circuits 20. Also, the control device 30 calculates a signal CP based on the currents Iout1 to Iout3. The signal CP is a signal indicating the directions of the currents Iout1 to Iout3. That is, the signal CP is a signal indicating whether the current Iout is flowing in the direction from the switching circuit 20 to the motor 82 (hereinafter referred to as the outflow direction) or in the direction from the motor 82 to the switching circuit 20 (hereinafter referred to as the inflow direction). The control device 30 transmits the signal CP indicating the direction of the current Iout1 to the switching circuit 20a, the signal CP indicating the direction of the current Iout2 to the switching circuit 20b, and the signal CP indicating the direction of the current Iout3 to the switching circuit 20c.

[0030] Next, the details of the switching circuit 20 will be described. Since the configurations of the switching circuits 20a to 20c are the same, the switching circuit 20a will be described below. FIG. 2 shows the details of the gate control circuits 25 and 26 included in the switching circuit 20a. In the following description, each potential in the gate control circuit 25 means a potential with reference to the source potential of the switching element 21, and each potential in the gate control circuit 25 means a potential with reference to the source potential of the switching element 22.

[0031] The gate control circuit 25 switches the switching element 21 by changing the gate potential Vg21 of the switching element 21. The gate control circuit 25 has a VCC wiring 43, a source wiring 48, and a DC power supply 46. A potential VCC is applied to the VCC wiring 43. The source wiring 48 is connected to the source of the switching element 21. That is, the potential of the source wiring 48 is 0 V (i.e., the same potential as the source of the switching element 21). Further, the DC power supply 46 outputs a negative potential -VNG lower than 0 V. The gate control circuit 25 changes the gate potential Vg21 among the potential VCC, 0 V, and the negative potential -VNG. The gate threshold value of the switching element 21 (i.e., the minimum gate potential Vg21 required to turn on the switching element 21) is lower than the potential VCC and higher than 0 V. Therefore, the potential VCC is the gate-on potential for turning on the switching element 21, and 0 V and the negative potential -VNG are the gate-off potentials for turning off the switching element 21. The gate control circuit 25 has a gate-on switch 40, a gate-off switch 41, a gate-off switch 42, a gate-on resistor 44, a gate-off resistor 45, and a control IC 47.

[0032] The gate-on switch 40 and the gate-on resistor 44 are connected in series between the VCC wiring 43 and the gate G21. The gate-on switch 40 is composed of a switching element such as an FET. The gate-on switch 40 is controlled by the control IC 47. When the gate-on switch 40 is turned on, a gate current flows from the VCC wiring 43 through the gate-on switch 40 and the gate-on resistor 44 to the gate G21, and the gate G21 is charged. Thereby, the gate potential Vg21 can be raised to the potential VCC.

[0033] The gate-off resistor 45 and the gate-off switch 41 are connected in series between the gate G21 and the source wiring 48. The gate-off switch 41 is composed of a switching element such as an FET. The gate-off switch 41 is controlled by the control IC47. When the gate-off switch 41 is turned on, a gate current flows from the gate G21 through the gate-off resistor 45 and the gate-off switch 41 to the source wiring 48, and the gate G21 is discharged. As a result, the gate potential Vg21 can be reduced to 0V.

[0034] The DC power supply 46 applies a voltage VNG between the positive electrode and the negative electrode. The positive electrode of the DC power supply 46 is connected to the source wiring 48. Therefore, the potential of the negative electrode of the DC power supply 46 is a negative potential -VNG (that is, a potential lower than the source of the switching element 21). The negative electrode of the DC power supply 46 is connected to the gate G21 via the gate-off switch 42. The gate-off switch 42 is composed of a switching element such as an FET. The gate-off switch 42 is controlled by the control IC47. When the gate-off switch 42 is turned on, a negative potential -VNG is applied to the gate G21. Note that the negative potential -VNG can be set to a value that satisfies -VNG = Vgth - Vin·Ciss / Crss. Note that Vgth is the gate threshold value of the switching element 21, Vin is the voltage between the high potential wiring 12 and the low potential wiring 14, Ciss is the input capacitance of the switching element 21, and Crss is the feedback capacitance of the switching element 21.

[0035] As described above, the control IC 47 controls the gate-on switch 40, the gate-off switch 41, and the gate-off switch 42. By controlling these by the control IC 47, the gate potential Vg21 is controlled. Also, the control IC 47 is connected to the gate G21 by the gate potential detection wiring 49 and can detect the gate potential Vg21. Signals CP, SG1, SG2, Son1, and Son2 are input to and output from the control IC 47. The input and output of these signals to and from the control IC 47 are performed via the insulating element 38. As described above, the signals CP, SG1, and SG2 are signals transmitted from the control device 30 and input to the control IC 47. The signal Son1 is a signal indicating whether the switching element 21 is on or off, and is transmitted from the control IC 47 to a control IC 57 described later. The control IC 47 detects the gate potential Vg21 via the gate potential detection wiring 49, determines whether the switching element 21 is on or off based on the detected gate potential Vg21, and transmits the determination result to the control IC 57 as the signal Son1. The signal Son2 is a signal indicating whether the switching element 22 is on or off, and is transmitted from the control IC 57 to the control IC 47.

[0036] The gate control circuit 26 switches the switching element 22 by changing the gate potential Vg22 of the switching element 22. The gate control circuit 26 has a VCC wiring 53, a source wiring 58, and a DC power supply 56. A potential VCC is applied to the VCC wiring 53. The source wiring 58 is connected to the source of the switching element 22. That is, the potential of the source wiring 58 is 0V (i.e., the same potential as the source of the switching element 22). Further, the DC power supply 56 outputs a negative potential -VNG lower than 0V. The gate control circuit 26 changes the gate potential Vg22 among the potential VCC, 0V, and the negative potential -VNG. The gate threshold value of the switching element 22 (i.e., the minimum gate potential Vg22 required to turn on the switching element 22) is lower than the potential VCC and higher than 0V. Therefore, the potential VCC is the gate-on potential for turning on the switching element 22, and 0V and the negative potential -VNG are the gate-off potentials for turning off the switching element 22. The gate control circuit 26 has a gate-on switch 50, a gate-off switch 51, a gate-off switch 52, a gate-on resistor 54, a gate-off resistor 55, and a control IC 57.

[0037] The gate-on switch 50 and the gate-on resistor 54 are connected in series between the VCC wiring 53 and the gate G22. The gate-on switch 50 is composed of a switching element such as an FET. The gate-on switch 50 is controlled by the control IC 57. When the gate-on switch 50 is turned on, a gate current flows from the VCC wiring 53 through the gate-on switch 50 and the gate-on resistor 54 to the gate G22, and the gate G22 is charged. Thereby, the gate potential Vg22 can be raised to the potential VCC.

[0038] The turn-off resistor 55 and the turn-off switch 51 are connected in series between the gate G22 and the source wiring 58. The turn-off switch 51 is composed of a switching element such as an FET. The turn-off switch 51 is controlled by the control IC57. When the turn-off switch 51 is turned on, a gate current flows from the gate G22 through the turn-off resistor 55 and the turn-off switch 51 to the source wiring 58, and the gate G22 is discharged. As a result, the gate potential Vg22 can be reduced to 0V.

[0039] The DC power supply 56 applies a voltage VNG between the positive electrode and the negative electrode. The positive electrode of the DC power supply 56 is connected to the source wiring 58. Therefore, the potential of the negative electrode of the DC power supply 56 is a negative potential -VNG (that is, a potential lower than the source of the switching element 22). The negative electrode of the DC power supply 56 is connected to the gate G22 via the turn-off switch 52. The turn-off switch 52 is composed of a switching element such as an FET. The turn-off switch 52 is controlled by the control IC57. When the turn-off switch 52 is turned on, a negative potential -VNG is applied to the gate G22. Note that the negative potential -VNG can be set to a value that satisfies -VNG = Vgth - Vin·Ciss / Crss. Note that Vgth is the gate threshold of the switching element 22, Vin is the voltage between the high potential wiring 12 and the low potential wiring 14, Ciss is the input capacitance of the switching element 22, and Crss is the feedback capacitance of the switching element 22.

[0040] As described above, the control IC 57 controls the gate-on switch 50, the gate-off switch 51, and the gate-off switch 52. By controlling these by the control IC 57, the gate potential Vg22 is controlled. Further, the control IC 57 is connected to the gate G22 by the gate potential detection wiring 59 and can detect the gate potential Vg22. Signals CP, SG1, SG2, Son1, and Son2 are input to and output from the control IC 57. Input / output of these signals to / from the control IC 57 is performed via the insulating element 38. As described above, the signals CP, SG1, and SG2 are signals transmitted from the control device 30 and input to the control IC 57. The signal Son2 is a signal indicating whether the switching element 22 is on or off and is transmitted from the control IC 57 to the control IC 47. The control IC 57 detects the gate potential Vg22 via the gate potential detection wiring 59, determines whether the switching element 22 is on or off based on the detected gate potential Vg22, and transmits the determination result to the control IC 47 as the signal Son2. The signal Son1 is a signal indicating whether the switching element 21 is on or off and is transmitted from the control IC 47 to the control IC 57 as described above.

[0041] Next, the current path flowing in the switching circuit 20a will be described. The control ICs 47 and 57 control the switching elements 21 and 22 so that they are alternately turned on with a dead time in between. That is, the control ICs 47 and 57 control the switching elements 21 and 22 such that a first on-time in which the switching element 21 is on and the switching element 22 is off, a first dead time in which both the switching elements 21 and 22 are off, a second on-time in which the switching element 22 is on and the switching element 21 is off, and a second dead time in which both the switching elements 21 and 22 are off are repeated in this order. The current path in the switching circuit 20a changes according to the states of the switching elements 21 and 22. Further, the mode of change of the current path in the switching circuit 20a differs according to the direction of the current Iout1 flowing in the output wiring 16a.

[0042] Figure 3 shows the changing pattern of the current path when the direction of the current Iout1 shown in Figure 1 is the outflow direction. Figure 3(a) shows the first on-time, Figure 3(b) shows the first dead time, Figure 3(c) shows the second on-time, and Figure 3(d) shows the second dead time. As shown in Figure 3(a), in the first on-time, since the switching element 21 is on and the switching element 22 is off, the current I flows from the high-potential wiring 12 to the output wiring 16a through the switching element 21. In this state, the potential of the output wiring 16a is substantially equal to the potential of the high-potential wiring 12. Next, in the first dead time (i.e., Figure 3(b)), the switching element 21 turns off. Then, the current stops flowing through the switching element 21. Then, due to the induced voltage generated by the inductance L of the motor 82, the potential of the output wiring 16a decreases, and the diode 24 turns on. Therefore, the current flows from the low-potential wiring 14 to the output wiring 16a through the diode 24. That is, a forward current flows through the diode 24. In this state, the potential of the output wiring 16a is substantially equal to the potential of the low-potential wiring 14. Next, in the second on-time (i.e., Figure 3(c)), the switching element 22 turns on. Then, the current I flows from the low-potential wiring 14 to the output wiring 16a through the parallel circuit of the diode 24 and the switching element 22. That is, when the switching element 22 turns on, the path through which the current I flows branches into the diode 24 and the switching element 22. In other words, even when the switching element 22 turns on, the state where the current I flows from the low-potential wiring 14 to the output wiring 16a does not change, and the potential of the output wiring 16a hardly changes. Therefore, the voltage applied to the switching element 21 hardly changes. For this reason, even when the switching element 22 turns on while a forward current is flowing through the diode 24, there is no risk of the switching element 21 misfiring. Next, in the second dead time (i.e., Figure 3(d)), the switching element 22 turns off. Then, the current stops flowing through the switching element 22. In this state, the current I flows from the low-potential wiring 14 to the output wiring 16a through the diode 24. Next, it becomes the first on-time again (i.e., Figure 3(a)), and the switching element 21 turns on.Then, as described above, the current I flows from the high-potential wiring 12 to the output wiring 16a through the switching element 21, and the potential of the output wiring 16a becomes substantially equal to the potential of the high-potential wiring 12. That is, when the switching element 21 is turned on, the potential of the output wiring 16a rapidly rises from a potential substantially equal to that of the low-potential wiring 14 to a potential substantially equal to that of the high-potential wiring 12. Since the potential of the output wiring 16a rises rapidly in this way, the potential of the drain of the switching element 22 rises rapidly. Then, due to the capacitive coupling between the drain and the gate G22 of the switching element 22, the gate potential Vg22 instantaneously rises. The instantaneous rise of the gate potential Vg22 may cause the switching element 22 to malfunction and arc. That is, when the switching element 21 is turned on while no forward current is flowing through the diode 23, the switching element 22 may malfunction and arc. As described above, when the direction of the current Iout1 is the outflow direction, there is a risk that the switching element 22 may malfunction and arc when the switching element 21 is turned on, while there is no risk that the switching element 21 may malfunction and arc when the switching element 22 is turned on.

[0043] FIG. 4 shows a change mode of a current path when the direction of the current Iout1 shown in FIG. 1 is an inflow direction. FIG. 4(a) shows the first on-time, FIG. 4(b) shows the first dead time, FIG. 4(c) shows the second on-time, and FIG. 4(d) shows the second dead time. As shown in FIG. 4(c), in the second on-time, since the switching element 22 is on and the switching element 21 is off, the current I flows from the output wiring 16a to the low-potential wiring 14 through the switching element 22. In this state, the potential of the output wiring 16a is substantially equal to the potential of the low-potential wiring 14. Next, in the second dead time (i.e., FIG. 4(d)), the switching element 22 turns off. Then, the current stops at the switching element 22. Then, the potential of the output wiring 16a rises due to the induced voltage generated by the inductance L of the motor 82, and the diode 23 turns on. For this reason, the current I flows from the output wiring 16a to the high-potential wiring 12 through the diode 23. That is, a forward current flows through the diode 23. In this state, the potential of the output wiring 16a is substantially equal to the potential of the high-potential wiring 12. Next, in the first on-time (i.e., FIG. 4(a)), the switching element 21 turns on. Then, the current I flows from the output wiring 16a to the high-potential wiring 12 through the parallel circuit of the diode 23 and the switching element 21. That is, when the switching element 21 turns on, the path through which the current I flows branches into the diode 23 and the switching element 21. In other words, even when the switching element 21 turns on, the state in which the current I flows from the output wiring 16a to the high-potential wiring 12 does not change, and the potential of the output wiring 16a hardly changes. Therefore, the voltage applied to the switching element 22 hardly changes. For this reason, even when the switching element 21 turns on while the forward current is flowing through the diode 23, there is no risk of the switching element 22 malfunctioning due to arcing. Next, in the first dead time (i.e., FIG. 4(b)), the switching element 21 turns off. Then, the current stops at the switching element 21. In this state, the current I flows from the output wiring 16 to the high-potential wiring 12 through the diode 23. Next, it becomes the second on-time (i.e., FIG. 4(c)) again, and the switching element 22 turns on.Then, as described above, the current I flows from the output wiring 16a to the low-potential wiring 14 through the switching element 22, and the potential of the output wiring 16a becomes substantially equal to the potential of the low-potential wiring 14. That is, when the switching element 22 is turned on, the potential of the output wiring 16a rapidly decreases from a potential substantially equal to that of the high-potential wiring 12 to a potential substantially equal to that of the low-potential wiring 14. Since the potential of the output wiring 16a rapidly decreases in this way, the potential of the drain of the switching element 21 with respect to the source rapidly increases. Then, due to the capacitive coupling between the drain and the gate G21 of the switching element 21, the gate potential Vg21 instantaneously increases. The instantaneous increase in the gate potential Vg21 may cause the switching element 21 to malfunction and arc. That is, when the switching element 22 is turned on while no forward current is flowing through the diode 24, the switching element 21 may malfunction and arc. As described above, when the direction of the current Iout1 is the inflow direction, there is a risk that the switching element 21 may malfunction and arc when the switching element 22 is turned on, while there is no risk that the switching element 22 may malfunction and arc when the switching element 21 is turned on.

[0044] Next, a method for controlling the gate potentials Vg21 and Vg22 by the switching circuit 20 will be described. FIG. 5 shows the processing executed by the control IC 47. Further, FIG. 6 shows the processing executed by the control IC 57. The control ICs 47 and 57 repeatedly execute the processing of FIGS. 5 and 6 during the operation of the inverter 10.

[0045] First, the case where the direction of the current Iout1 is the outflow direction will be described. When the direction of the current Iout1 is the outflow direction, the control device 30 controls the signal CP to HIGH. FIG. 7 shows the changes in each value when the direction of the current Iout1 is the outflow direction. In FIG. 7, the period Ton1 is the first on-time, the period Td1 is the first dead time, the period Ton2 is the second on-time, and the period Td2 is the second dead time. Also, as described above, the signal SG1 is a value that commands the on-off of the switching element 21, and the signal SG2 is a value that commands the on-off of the switching element 22.

[0046] As shown in FIG. 7, in the second on-time Ton2, signal SG1 is OFF and signal SG2 is ON. Since signal SG1 is OFF, control IC47 determines YES in step S2 of FIG. 5 and executes step S4. Since signal CP is HIGH, control IC47 determines YES in step S4 and executes step S12. In step S12, control IC47 controls gate on-switch 40 to OFF, gate off-switch 41 to ON, and gate off-switch 42 to OFF, thereby controlling gate potential Vg21 to 0V. Also, in the second on-time Ton2, since signal SG2 is ON, control IC57 determines NO in step S52 of FIG. 6 and executes step S64. In step S64, control IC57 controls gate on-switch 50 to ON and gate off-switches 51, 52 to OFF, thereby controlling gate potential Vg22 to potential VCC. Therefore, as shown in FIG. 7, in the second on-time Ton2, gate potential Vg21 is controlled to 0V and gate potential Vg22 is controlled to potential VCC. For this reason, in the second on-time Ton2, switching element 21 is OFF and switching element 22 is ON. As a result, current I flows through the current path shown in FIG. 3(c). In this state, since the potential of output wiring 16a is substantially equal to the potential of low-potential wiring 14, the drain-source voltage Vds21 of switching element 21 is high and the drain-source voltage Vds22 of switching element 22 is low.

[0047] Thereafter, at timing t1, signal SG2 switches from ON to OFF. At timing t1, signal SG1 is maintained at OFF. The period after timing t1 is the second dead time Td2 during which both signal SG1 and signal SG2 are OFF. When signal SG2 switches from ON to OFF, control IC57 determines YES in step S52 of FIG. 6 and executes step S54. Since signal CP is HIGH, control IC57 determines YES in step S54 and executes step S56. Since signal SG1 is OFF, control IC57 determines NO in step S56 and executes step S62. In step S62, control IC57 controls gate-on switch 50 to OFF, gate-off switch 51 to ON, and gate-off switch 52 to OFF. For this reason, gate G22 is discharged via gate-off resistor 55 and gate-off switch 52. Therefore, after timing t1, the gate potential Vg22 drops to 0V and switching element 22 turns off. Control IC57 maintains the gate potential Vg22 at 0V by repeating steps S52, S54, S56, and S62 during the second dead time Td2. Also, control IC47 maintains the gate potential Vg21 at 0V and keeps switching element 21 off in the same manner as the second on-time Ton2 during the second dead time Td2. Therefore, during the second dead time Td2, current I flows through the current path shown in FIG. 3(d). During the second dead time Td2, voltages Vds21 and Vds22 hardly change from the second on-time Ton2.

[0048] Thereafter, at timing t₂, signal SG1 switches from OFF to ON. At timing t₂, signal SG2 is maintained at OFF. That is, the period after timing t₂ is the first on-time Ton1 during which signal SG1 is ON and signal SG2 is OFF.

[0049] When the signal SG1 switches from OFF to ON at timing t2, the control IC47 determines NO in step S2 of FIG. 5 and executes step S14. In step S14, the control IC47 controls the gate-on switch 40 to be on and the gate-off switches 41 and 42 to be off. Therefore, the gate G21 is charged via the gate-on resistor 44 and the gate-on switch 40. Accordingly, after timing t2, the gate potential Vg21 rises. The gate potential Vg21 reaches the potential VCC after a predetermined time has elapsed from timing t2. The control IC47 monitors the gate potential Vg21 via the gate potential detection wiring 49. After timing t2, the control IC47 determines whether or not the turning-on of the switching element 21 is completed based on the gate potential Vg21. The control IC47 can determine that the turning-on of the switching element 21 is completed when the gate potential Vg21 rises to a reference value (for example, a value close to the potential VCC). Also, in another example, the control IC47 can determine that the turning-on of the switching element 21 is completed when the rising rate of the gate potential Vg21 drops below the reference value (that is, when the gate potential Vg21 stabilizes). When the turning-on of the switching element 21 is not completed, the control IC47 outputs LOW as the signal Son1, and when the turning-on of the switching element 21 is completed, the control IC47 outputs HIGH as the signal Son1. In FIG. 7, the control IC47 switches the signal Son1 from LOW to HIGH at timing t3.

[0050] Also, when the signal SG1 switches from OFF to ON at timing t2, the control IC57 determines YES in step S56 and executes step S58. In step S58, the control IC57 determines whether the turn-on of the switching element 21 is completed based on the signal Son1. In the period Ta immediately after timing t2 (i.e., the period Ta between timing t2 and timing t3), the turn-on of the switching element 21 is not completed and the signal Son1 is LOW. Therefore, the control IC57 determines NO in step S58 and executes step S60. In step S60, the control IC57 controls the gate-on switch 50 to OFF, the gate-off switch 51 to OFF, and the gate-off switch 52 to ON, thereby controlling the gate potential Vg22 to the negative potential -VNG. In the period Ta, the control IC57 repeats steps S58 and S60 to maintain the gate potential Vg22 at the negative potential -VNG. Thereafter, when the signal Son1 switches from LOW to HIGH at timing t3, the control IC57 determines YES in step S58 and executes step S62. As described above, in step S62, the control IC57 controls the gate potential Vg22 to 0V. In the first on-time Ton1 after timing t3, the control IC57 repeats steps S52, S54, S56, S58, and S62 to maintain the gate potential Vg22 at 0V. Thus, in the first on-time Ton1, the control IC57 controls the gate potential Vg22 to the negative potential -VNG in the period Ta between timing t2 and timing t3, and controls the gate potential Vg22 to 0V after timing t3.

[0051] When the signal SG1 switches from OFF to ON at timing t2, the switching element 21 turns on during the period Ta. As a result, as described above, the current path changes from the state of FIG. 3(d) to the state of FIG. 3(a), and the potential of the output wiring 16a rises rapidly. For this reason, within the period Ta, the voltage Vds21 drops rapidly and the voltage Vds22 rises rapidly. As a result of the rapid rise of the voltage Vds22, the potential of the gate G22 may instantaneously rise due to the capacitive coupling between the drain and the gate G22 of the switching element 22. That is, as shown in FIG. 7, an instantaneous rise 84 of the gate potential Vg22 may occur during the period Ta. In this embodiment, since the control IC57 controls the gate potential Vg22 to the negative potential -VNG during the period Ta, even if the rise 84 occurs, it is difficult for the gate potential Vg22 to exceed the gate threshold value. Thereby, the misfiring of the switching element 22 is suppressed.

[0052] Thereafter, the signal SG1 switches from ON to OFF at timing t4. At timing t4, the signal SG2 is maintained at OFF. That is, the period after timing t4 is the first dead time Td1 in which both the signal SG1 and the signal SG2 are OFF. When the signal SG1 switches from ON to OFF, the control IC47 determines YES in step S2 of FIG. 5 and executes step S4. Since the signal CP is HIGH, the control IC47 determines YES in step S4 and executes step S12. As described above, in step S12, the control IC47 controls the gate potential Vg21 to 0V. Therefore, the switching element 21 turns off. Also, when the signal SG1 switches from ON to OFF, the control IC57 determines NO in step S56 of FIG. 6 and executes step S62. As described above, in step S62, the control IC57 controls the gate potential Vg22 to 0V. Therefore, the switching element 22 is maintained in the off state. Therefore, at timing t4, the current path switches from the state shown in FIG. 3(a) to the state shown in FIG. 3(b). At this time, since the potential of the output wiring 16a drops rapidly, the voltage Vds21 rises rapidly and the voltage Vds22 drops rapidly.

[0053] Thereafter, at timing t5, signal SG2 switches from OFF to ON. At timing t5, signal SG1 is maintained at OFF. That is, the period after timing t5 is the second on-time Ton2 in which signal SG2 is ON and signal SG1 is OFF. When signal SG2 switches from OFF to ON, control IC57 determines NO in step S52 of FIG. 6 and executes step S64. As described above, in step S64, control IC57 controls the gate potential Vg22 to the potential VCC. Therefore, switching element 22 turns on. Also, even when signal SG2 switches from OFF to ON at timing t5, control IC47 does not change its operation. That is, control IC47 repeatedly executes steps S2, S4, and S12 from the first dead time Td1 to the second on-time Ton2 and controls the gate potential Vg21 to 0V. That is, control IC47 maintains switching element 21 in the OFF state. Therefore, at timing t5, the current path switches from the state shown in FIG. 3(b) to the state shown in FIG. 3(c). As described above, when switching from the current path shown in FIG. 3(b) to the current path shown in FIG. 3(c), the potential of output wiring 16a hardly changes. Therefore, at timing t5, there is no instantaneous rise in the gate potential Vg21. For this reason, even if the gate potential Vg21 is not controlled to a negative potential at timing t5, misfiring of switching element 21 does not occur.

[0054] Next, the case where the direction of current Iout1 is the inflow direction will be described. When the direction of current Iout1 is the inflow direction, control device 30 controls signal CP to LOW. FIG. 8 shows the changes in each value when the direction of current Iout1 is the inflow direction.

[0055] As shown in FIG. 8, during the first on-time Ton1, signal SG1 is ON and signal SG2 is OFF. Since signal SG1 is ON, control IC47 determines NO in step S2 of FIG. 5 and executes step S14. As described above, control IC47 controls gate potential Vg21 to potential VCC in step S14. Also, since signal SG2 is OFF, control IC57 determines YES in step S52 of FIG. 6 and executes step S54. Since signal CP is LOW, control IC57 determines NO in step S54 and executes step S62. As described above, control IC57 controls gate potential Vg22 to 0V in step S62. Therefore, during the first on-time Ton1, switching element 21 is on and switching element 22 is off. As a result, current I flows through the current path shown in FIG. 4(a). In this state, since the potential of output wiring 16a is substantially equal to the potential of high potential wiring 12, voltage Vds21 is low and voltage Vds22 is high.

[0056] Thereafter, at timing t11, signal SG1 switches from ON to OFF. At timing t11, signal SG2 is maintained OFF. The period after timing t11 is the first dead time Td1 during which both signal SG1 and signal SG2 are OFF. When signal SG1 switches from ON to OFF, control IC47 determines YES in step S2 of FIG. 5 and executes step S4. Since signal CP is LOW, control IC47 determines NO in step S4 and executes step S6. Since signal SG2 is OFF, control IC47 determines NO in step S6 and executes step S12. As described above, in step S12, control IC47 controls gate potential Vg22 to 0V. Also, control IC57 maintains gate potential Vg22 at 0V in the same manner as the first on-time Ton1 during the first dead time Td1. Therefore, during the first dead time Td1, current I flows through the current path shown in FIG. 4(b). During the first dead time Td1, voltages Vds21 and Vds22 hardly change from those during the first on-time Ton1.

[0057] Thereafter, at timing t12, signal SG2 switches from OFF to ON. At timing t12, signal SG1 is maintained at OFF. That is, the period after timing t12 is the second on-time Ton2 during which signal SG2 is ON and signal SG1 is OFF.

[0058] When signal SG2 switches from OFF to ON at timing t12, control IC57 determines NO in step S52 of FIG. 6 and executes step S64. In step S64, control IC57 controls gate-on switch 50 to be ON and gate-off switches 51, 52 to be OFF. For this reason, gate G22 is charged via gate-on resistor 54 and gate-on switch 50. Therefore, after timing t12, the gate potential Vg22 rises. The gate potential Vg22 reaches the potential VCC after a predetermined time has elapsed from timing t12. Control IC57 monitors the gate potential Vg22 via gate potential detection wiring 59. After timing t12, control IC57 determines whether or not the turning-on of switching element 22 is completed based on the gate potential Vg22. Control IC57 can determine that the turning-on of switching element 22 is completed when the gate potential Vg22 rises to a reference value (for example, a value close to the potential VCC). Also, in another example, control IC57 can determine that the turning-on of switching element 22 is completed when the rising rate of the gate potential Vg22 drops below the reference value (that is, when the gate potential Vg22 stabilizes). If the turning-on of switching element 22 is not completed, control IC57 outputs LOW as signal Son2, and if the turning-on of switching element 22 is completed, control IC57 outputs HIGH as signal Son2. In FIG. 8, control IC57 switches signal Son2 from LOW to HIGH at timing t13.

[0059] Also, when the signal SG2 switches from OFF to ON at timing t12, the control IC47 determines YES in step S6 and executes step S8. In step S8, the control IC47 determines whether the turn-on of the switching element 22 is completed based on the signal Son2. In the period Tb immediately after timing t12 (i.e., the period Tb between timing t12 and timing t13), the turn-on of the switching element 22 is not completed and the signal Son2 is LOW. Therefore, the control IC47 determines NO in step S8 and executes step S10. In step S10, the control IC47 controls the gate-on switch 50 to be OFF, the gate-off switch 51 to be OFF, and the gate-off switch 52 to be ON, thereby controlling the gate potential Vg21 to the negative potential -VNG. In the period Tb, since the signal Son2 is maintained at LOW, the control IC47 repeats steps S8 and S10 to maintain the gate potential Vg21 at the negative potential -VNG. Thereafter, when the signal Son2 switches from LOW to HIGH at timing t13, the control IC47 determines YES in step S8 and executes step S12. As described above, in step S12, the control IC47 controls the gate potential Vg22 to 0V. In the second on-time Ton2 after timing t13, the control IC47 repeats steps S2, S4, S6, S8, and S12 to maintain the gate potential Vg21 at 0V. Thus, in the second on-time Ton2, the control IC47 controls the gate potential Vg21 to the negative potential -VNG in the period Tb between timing t12 and timing t13, and controls the gate potential Vg21 to 0V after timing t13.

[0060] When the signal SG2 switches from OFF to ON at the timing t12, the switching element 22 turns on during the period Tb. As a result, as described above, the current path changes from the state of FIG. 4(b) to the state of FIG. 4(c), and the potential of the output wiring 16a drops rapidly. For this reason, within the period Tb, the voltage Vds21 rises rapidly and the voltage Vds22 drops rapidly. As a result of the rapid rise of the voltage Vds21, the gate potential Vg21 may instantaneously rise due to the capacitive coupling between the drain and the gate G21 of the switching element 21. That is, as shown in FIG. 8, an instantaneous rise 86 of the gate potential Vg21 may occur during the period Tb. In this embodiment, since the control IC47 controls the gate potential Vg21 to the negative potential -VNG during the period Tb, even if the rise 86 occurs, it is difficult for the gate potential Vg21 to exceed the gate threshold value. Thereby, the misfiring of the switching element 21 is suppressed.

[0061] Thereafter, the signal SG2 switches from ON to OFF at the timing t14. At the timing t14, the signal SG1 is maintained at OFF. That is, the period after the timing t14 is the second dead time Td2 in which both the signal SG1 and the signal SG2 are OFF. When the signal SG2 switches from ON to OFF, the control IC57 determines YES in step S52 of FIG. 6 and executes step S54. Since the signal CP is LOW, the control IC57 determines NO in step S54 and executes step S62. As described above, in step S62, the control IC57 controls the gate potential Vg22 to 0V. Also, when the signal SG2 switches from ON to OFF, the control IC47 determines NO in step S6 of FIG. 5 and executes step S12. As described above, in step S12, the control IC47 controls the gate potential Vg21 to 0V. Therefore, at the timing t14, the current path switches from the state shown in FIG. 4(c) to the state shown in FIG. 4(d). At this time, since the potential of the output wiring 16a rises rapidly, the voltage Vds21 drops rapidly and the voltage Vds22 rises rapidly.

[0062] Thereafter, at timing t15, signal SG1 switches from OFF to ON. At timing t15, signal SG2 is maintained at OFF. That is, the period after timing t15 is the first on-time Ton1 in which signal SG1 is ON and signal SG2 is OFF. When signal SG1 switches from OFF to ON, control IC47 determines NO in step S2 of FIG. 5 and executes step S14. As described above, in step S14, control IC47 controls the gate potential Vg21 to the potential VCC. Also, even when signal SG1 switches from OFF to ON at timing t5, control IC57 does not change its operation. That is, control IC57 repeatedly executes steps S52, S54, and S62 from the second dead time Td2 to the first on-time Ton1 and controls the gate potential Vg22 to 0V. Therefore, at timing t15, the current path switches from the state shown in FIG. 4(d) to the state shown in FIG. 4(a). As described above, when switching from the current path shown in FIG. 4(d) to the current path shown in FIG. 4(a), the potential of output wiring 16a hardly changes. Therefore, at timing t15, there is no instantaneous increase in the gate potential Vg22. For this reason, even if the gate potential Vg22 is not controlled to a negative potential at timing t15, misfiring of switching element 22 does not occur.

[0063] As described above, the gate control circuit 25 suppresses the misfiring of the switching element 21 by applying a negative potential -VNG to the gate G21 at the timing when the switching element 22 turns on while no forward current is flowing through the diode 24 (i.e., the period Tb in FIG. 8). Also, the gate control circuit 25 applies 0 V to the gate G21 at the timing when the switching element 22 turns on while a forward current is flowing through the diode 24 (i.e., the timing t5 in FIG. 7). Even if a negative potential is not applied to the gate G21 at the timing t5, misfiring does not occur. Also, by not applying a negative potential at the timing t5, the stress applied to the switching element 21 can be reduced. Further, the gate control circuit 26 suppresses the misfiring of the switching element 22 by applying a negative potential -VNG to the gate G22 at the timing when the switching element 21 turns on while no forward current is flowing through the diode 23 (i.e., the period Ta in FIG. 7). Also, the gate control circuit 26 applies 0 V to the gate G22 at the timing when the switching element 21 turns on while a forward current is flowing through the diode 23 (i.e., the timing t15 in FIG. 8). Even if a negative potential is not applied to the gate G22 at the timing t15, misfiring does not occur. Also, by not applying a negative potential at the timing t15, the stress applied to the switching element 22 can be reduced.

[0064] Also, as shown in FIG. 8, the gate control circuit 25 reduces the gate potential Vg21 to 0V after the timing t11 when the signal SG1 switches from ON to OFF, and controls the gate potential Vg21 to the negative potential -VNG after the timing t12 when the signal SG2 switches from OFF to ON. In this way, by not applying the negative potential -VNG to the gate G21 during the period from the timing t11 to the timing t12, the stress applied to the switching element 21 can be reduced. Further, the gate control circuit 25 raises the gate potential Vg21 from the negative potential -VNG to 0V after the timing t13 when the turn-on of the switching element 22 is completed. Thereby, the period during which the negative potential -VNG is applied to the gate G21 can be further shortened, and the stress applied to the switching element 21 can be reduced. Also, as shown in FIG. 7, the gate control circuit 26 reduces the gate potential Vg22 to 0V after the timing t1 when the signal SG2 switches from ON to OFF, and controls the gate potential Vg22 to the negative potential -VNG after the timing t2 when the signal SG1 switches from OFF to ON. In this way, by not applying the negative potential -VNG to the gate G22 during the period from the timing t1 to the timing t2, the stress applied to the switching element 22 can be reduced. Further, the gate control circuit 26 raises the gate potential Vg22 from the negative potential -VNG to 0V after the timing t3 when the turn-on of the switching element 21 is completed. Thereby, the period during which the negative potential -VNG is applied to the gate G22 can be further shortened, and the stress applied to the switching element 22 can be reduced.

[0065] As described above, when the switching element 22 turns on with the direction of the current Iout1 being the outflow direction, a current flows in the forward direction through the diode 24. Therefore, the determinations in steps S4 and S6 of FIG. 5 are equivalent to determining whether or not a current is flowing in the forward direction through the diode 24. Also, as described above, when the switching element 21 turns on with the direction of the current Iout1 being the inflow direction, a current flows in the forward direction through the diode 23. Therefore, the determinations in steps S54 and S56 of FIG. 6 are equivalent to determining whether or not a current is flowing in the forward direction through the diode 23. Thus, in the first embodiment, the gate control circuits 25 and 26 determine whether or not a current is flowing in the forward direction through the diodes 23 and 24 based on the direction of the current Iout1 flowing through the output wiring 16a.

[0066] Also, according to the switching circuit 20a of the first embodiment, it is possible to suppress an erroneous arcing at the time of starting up the switching circuit 20a. FIG. 9 shows changes in each value at the time of starting up. In FIG. 9, the timing t0 is the start-up timing of the switching circuit 20a, and the timing tx is the timing at which the signal SG2 first switches from OFF to ON after starting up. In the conventional control, since a negative potential is applied to the gate of the switching element using the turn-off of the switching element as a trigger, it is not possible to control the gate potential Vg21 of the switching element 21 to a negative potential according to the timing tx at which the switching element 22 first turns on after starting up. In contrast, in the switching circuit 20a of the first embodiment, the control IC47 determines NO in step S2, determines NO in step S4, determines YES in step S6, and determines NO in step S8 at the timing tx. Therefore, in step S10, the gate potential Vg21 is controlled to the negative potential -VNG. For this reason, as shown in FIG. 9, the gate potential Vg21 is controlled to the negative potential -VNG during the period Tc immediately after the timing tx. For this reason, it is possible to prevent an erroneous arcing of the switching element 21 at the time of starting up.

[0067] The potential VCC in Example 1 is an example of the gate-on potential. 0V in Example 1 is an example of the first gate-off potential. The negative potential -VNG in Example 1 is an example of the second gate-off potential. Note that in Example 1 and Examples 2 to 5 described below, any value equal to or greater than 0V and less than the gate threshold may be adopted as the first gate-off potential.

[0068] The gate control circuit 25 in Example 1 is an example of the target gate control circuit, and the gate control circuit 26 in Example 1 is an example of the opposing gate control circuit. In this case, the switching element 21 is an example of the target switching element. Also, the drain of the switching element 21 is an example of the high-potential main terminal of the target switching element. Also, the source of the switching element 21 is an example of the low-potential main terminal of the target switching element. Also, the switching element 22 is an example of the opposing switching element. Also, the drain of the switching element 22 is an example of the high-potential main terminal of the opposing switching element. Also, the source of the switching element 22 is an example of the low-potential main terminal of the opposing switching element. Also, the diode 23 is an example of the target diode. Also, the diode 24 is an example of the opposing diode. Also, the timing t5 is an example of the first timing. Also, the period Tb is an example of the second timing. Also, the signal SG2 is an example of the opposing command signal. Also, the switching of the signal SG2 from OFF to ON is an example of the turn-on command. Also, the switching of the signal SG2 from ON to OFF is an example of the turn-off command. The same correspondence can be made in Examples 2 to 5 described below.

[0069] Also, the gate control circuit 26 in the first embodiment can be regarded as an example of the target gate control circuit, and the gate control circuit 25 in the first embodiment can be regarded as an example of the opposing gate control circuit. In this case, the switching element 22 is an example of the target switching element. Also, the drain of the switching element 22 is an example of the high-potential main terminal of the target switching element. Also, the source of the switching element 22 is an example of the low-potential main terminal of the target switching element. Also, the switching element 21 is an example of the opposing switching element. Also, the drain of the switching element 21 is an example of the high-potential main terminal of the opposing switching element. Also, the source of the switching element 21 is an example of the low-potential main terminal of the opposing switching element. Also, the diode 24 is an example of the target diode. Also, the diode 23 is an example of the opposing diode. Also, the timing t15 is an example of the first timing. Also, the period Ta is an example of the second timing. Also, the signal SG1 is an example of the opposing command signal. Also, the switching of the signal SG1 from OFF to ON is an example of the turn-on command. Also, the switching of the signal SG1 from ON to OFF is an example of the turn-off command. Similarly, in the second to fifth embodiments described below, the corresponding associations can be made.

[0070] In Example 1, the control ICs 47 and 57 determined whether or not the turning-on of the switching elements 21 and 22 was completed based on the gate potentials Vg21 and Vg22. However, in a modification of Example 1, as shown in FIG. 10, the switching circuit 20a may have gate potential determination circuits 49x and 59x. The gate potential determination circuit 49x compares the gate potential Vg21 with the reference potential Vref21 by a comparator 49y, and transmits the comparison result to the control IC 57 as a signal Son1. Note that the reference potential Vref21 is set to the gate potential Vg21 when the turning-on of the switching element 21 is completed. The gate potential determination circuit 59x compares the gate potential Vg22 with the reference potential Vref22 by a comparator 59y, and transmits the comparison result to the control IC 47 as a signal Son2. Note that the reference potential Vref22 is set to the gate potential Vg22 when the turning-on of the switching element 22 is completed. Even with this configuration, signals Son1 and Son2 indicating whether or not the turning-on of the switching elements 21 and 22 is completed can be appropriately transmitted to the control ICs 47 and 57.

Example

[0071] The switching circuit 20a2 of Example 2 shown in FIG. 11 detects the completion of the turning-on of the switching elements 21 and 22 in a method different from that of the switching circuit 20a of Example 1. The switching circuit 20a2 of Example 2 has a drain potential detection circuit 49a instead of the gate potential detection wiring 49. Further, the switching circuit 20a2 of Example 2 has a drain potential detection circuit 59a instead of the gate potential detection wiring 59. Also, in the switching circuit 20a2 of Example 2, signals Son1 and Son2 are not transmitted and received between the control IC 47 and the control IC 57. Other configurations of the switching circuit 20a2 of Example 2 are the same as those of the switching circuit 20a of Example 1.

[0072] In the switching circuit 20a2 of Embodiment 2, the drain potential detection circuit 49a detects the voltage Vds21 between the source and drain of the switching element 21. Further, the drain potential detection circuit 49a determines whether the switching element 22 is on or off based on the voltage Vds21. That is, when the switching element 22 turns on at timing t13, the voltage Vds22 becomes a low voltage, and as a result, the voltage Vds21 becomes a high voltage. Therefore, the drain potential detection circuit 49a can determine whether the switching element 22 is on or off depending on whether the voltage Vds21 is equal to or higher than a predetermined value. The determination result by the drain potential detection circuit 49a (that is, the determination result indicating whether the switching element 22 is on or off) is input to the control IC47 as the signal Son2. Therefore, in step S8, the control IC47 can determine whether the turn-on of the switching element 22 is completed based on the signal Son2 input from the drain potential detection circuit 49a.

[0073] Also, in the switching circuit 20a2 of Embodiment 2, the drain potential detection circuit 59a detects the voltage Vds22 between the source and drain of the switching element 22. Further, the drain potential detection circuit 59a determines whether the switching element 21 is on or off based on the voltage Vds22. That is, when the switching element 21 turns on at timing t3, the voltage Vds21 becomes a low voltage, and as a result, the voltage Vds22 becomes a high voltage. Therefore, the drain potential detection circuit 59a can determine whether the switching element 21 is on or off depending on whether the voltage Vds22 is equal to or higher than a predetermined value. The determination result by the drain potential detection circuit 59a (that is, the determination result indicating whether the switching element 21 is on or off) is input to the control IC57 as the signal Son1. Therefore, in step S58, the control IC57 can determine whether the turn-on of the switching element 21 is completed based on the signal Son1 input from the drain potential detection circuit 59a.

[0074] According to the configuration of the second embodiment, since the transmission and reception of the signals Son1 and Son2 between the control ICs 47 and 57 are unnecessary, the configurations of the gate control circuits 25 and 26 can be simplified.

[0075] Note that the drain potential detection circuit 49a may have the configuration shown in FIG. 12 or 13. In FIG. 12, when the voltage Vds21 exceeds a certain value, the diode 49a-1 turns off. Then, the output potential V49a-2 of the current source 49a-2 (i.e., the potential of the plus terminal of the comparator 49a-3) exceeds the reference potential V49a-4 (i.e., the potential of the minus terminal of the comparator 49a-3), and the output signal of the comparator 49a-3 changes. Therefore, by inputting the output signal of the comparator 49a-3 to the control IC 47 as the signal Son2, the control IC 47 can determine whether the voltage Vds21 is equal to or higher than a predetermined value (i.e., whether the turn-on of the switching element 22 is completed). In FIG. 13, the voltage Vds21-2 obtained by dividing the voltage Vds21 by the capacitors 49a-11 and 49a-12 is applied to the plus terminal of the comparator 49a-13. When the voltage Vds21 rises to a certain value, the voltage Vds21-2 exceeds the reference potential V49a-14 (i.e., the potential of the minus terminal of the comparator 49a-13), and the output signal of the comparator 49a-13 changes. Therefore, by inputting the output signal of the comparator 49a-13 to the control IC 47 as the signal Son2, the control IC 47 can determine whether the voltage Vds21 is equal to or higher than a predetermined value (i.e., whether the turn-on of the switching element 22 is completed). Further, the circuits of FIGS. 12 and 13 may be applied to the drain potential detection circuit 59a.

[0076] Also, in a modification of the second embodiment, the drain potential detection circuit 49a can determine that the turn-on of the switching element 22 is completed when the rising speed of the voltage Vds21 drops below a predetermined value (i.e., when the voltage Vds21 stabilizes). Further, the drain potential detection circuit 59a can determine that the turn-on of the switching element 21 is completed when the rising speed of the voltage Vds22 drops below a predetermined value (i.e., when the voltage Vds22 stabilizes).

Embodiment

[0077] The switching circuit 20a3 of Embodiment 3 shown in FIG. 14 determines whether a forward current is flowing through the diodes 23 and 24 in a different way from the switching circuit 20a of Embodiment 1. That is, in Embodiment 1, the control device 30 determines the direction of the current Iout1 flowing through the output wiring 16a and transmits the determination result to the control ICs 47 and 57 as the signal CP. On the other hand, in Embodiment 3, the switching circuit 20 has current detection circuits 27s and 28s. The current detection circuit 27s detects the current flowing through the wiring 27 connecting between the parallel circuit of the switching element 21 and the diode 23 and the high potential wiring 12, and outputs a signal CP1 indicating the direction of the current. That is, the current detection circuit 27s detects the current flowing through the parallel circuit of the switching element 21 and the diode 23 and outputs a signal CP1 indicating the direction of the current. The signal CP1 is transmitted to the control IC 57. Therefore, the control IC 57 can determine whether a forward current is flowing through the diode 23 based on the signal CP1 in step S54. In this case, the control IC 57 determines YES in step S54 when a forward current is flowing through the diode 23 (that is, executes step S56), and determines NO in step S54 when no forward current is flowing through the diode 23. Also, the current detection circuit 28s detects the current flowing through the wiring 28 connecting between the parallel circuit of the switching element 22 and the diode 24 and the output wiring 16a, and outputs a signal CP2 indicating the direction of the current. That is, the current detection circuit 28s detects the current flowing through the parallel circuit of the switching element 22 and the diode 24 and outputs a signal CP2 indicating the direction of the current. The signal CP2 is transmitted to the control IC 47. Therefore, the control IC 47 can determine whether a forward current is flowing through the diode 24 based on the signal CP2 in step S4. In this case, the control IC 47 determines NO in step S4 when a forward current is flowing through the diode 24 (that is, executes step S6), and determines YES in step S4 when no forward current is flowing through the diode 24.

[0078] Note that the determination of whether a forward current is flowing through the diodes 23 and 24 may be performed by a method different from that of the first and third embodiments. For example, the current flowing through the diodes 23 and 24 may be directly detected, or the determination may be made based on the current, voltage, etc. at other positions.

Embodiment

[0079] In the first embodiment, the output potential of the DC power supply 46 was fixed at the negative potential -VNG. In contrast, in the switching circuit 20a4 of the fourth embodiment shown in FIG. 15, the output potential V46 of the DC power supply 46 can be changed. The output potential V46 can be changed within the range of a negative potential and a positive potential. That is, in the fourth embodiment, the gate-off potential applied to the gate G21 of the switching element 21 during the period Tb in FIG. 8 can be changed within the range of a negative potential and a positive potential. Further, in the fourth embodiment, the gate control circuit 25 includes a potential increase amount detection circuit 46a and a power supply potential correction circuit 46b.

[0080] As described above, during the period Tb in FIG. 8, an instantaneous rise 86 in the gate potential Vg21 occurs with the turn-on of the switching element 22. The potential rise amount detection circuit 46a detects the rise amount ΔV of the gate potential Vg21 during the period Tb. For example, when the gate potential Vg21 changes as shown in FIG. 16 during the period Tb, the potential rise amount detection circuit 46a detects the difference between the maximum value of the gate potential Vg21 and the potential V46 as the rise amount ΔV. For example, the potential rise amount detection circuit 46a may be a peak hold circuit shown in FIG. 17. The peak hold circuit includes a diode 46a-1, an operational amplifier 46a-2, a diode 46a-3, a resistor 46a-4, an operational amplifier 46a-5, a capacitor 46a-6, and a switch 46a-7. The gate potential Vg21 is input to the plus terminal of the operational amplifier 46a-2. The anode of the diode 46a-1 is connected to the minus terminal of the operational amplifier 46a-2. The cathode of the diode 46a-1 is connected to the output terminal of the operational amplifier 46a-2. The anode of the diode 46a-3 is connected to the output terminal of the operational amplifier 46a-2. The cathode of the diode 46a-3 is connected to the plus terminal of the operational amplifier 46a-5. One end of the resistor 46a-4 is connected to the minus terminal of the operational amplifier 46a-2. The other end of the resistor 46a-4 is connected to the minus terminal and the output terminal of the operational amplifier 46a-5. The capacitor 46a-6 is connected between the plus terminal of the operational amplifier 46a-5 and the potential V46 (i.e., the negative electrode of the DC power supply 56). The switch 46a-7 is connected between the plus terminal of the operational amplifier 46a-5 and the potential V46. The switch 46a-7 is controlled by the control IC 47 or the like. The peak hold circuit monitors the gate potential Vg21 and outputs the difference between its maximum value and the potential V46 as the rise amount ΔV. The output value of the peak hold circuit can be reset by turning on the switch 46a-7. The control IC 47 turns on the switch 46a-7 to reset the output value of the peak hold circuit after the end of the period Tb and before the next period Tb arrives. Therefore, the peak hold circuit detects the rise amount ΔV for each period Tb. The output value of the peak hold circuit (i.e., the rise amount ΔV) is input to the power supply potential correction circuit 46b.

[0081] The power supply potential correction circuit 46b receives the rise amount ΔV from the potential rise amount detection circuit 46a. Also, the temperature T21 of the switching element 21 is input to the power supply potential correction circuit 46b from a temperature sensor (not shown) incorporated in the switching element 21. Based on the rise amount ΔV and the temperature T21, the power supply potential correction circuit 46b calculates an appropriate gate-off potential Voff in the period Tb, and controls the DC power supply 46 so that the calculated gate-off potential Voff is output. The details of the operation of the power supply potential correction circuit 46b will be described below. The power supply potential correction circuit 46b calculates a predicted value ΔVp of the rise amount ΔV of the gate potential Vg21 in the next period Tb based on the rise amount ΔV in the past period Tb. The predicted value ΔVp may be the same as the rise amount ΔV in the previous period Tb, may be the average value of the rise amounts ΔV in the past several periods Tb, or may be a value calculated by another algorithm. Also, as shown in FIG. 18, the power supply potential correction circuit 46b stores the temperature characteristic C1 of the gate threshold Vgth of the switching element 21. As shown in FIG. 18, generally, the higher the temperature T21 of the switching element, the lower the gate threshold Vgth. When the power supply potential correction circuit 46b calculates the predicted value ΔVp of the rise amount ΔV of the gate potential Vg21, it subtracts the predicted value ΔVp from the temperature characteristic C1 shown in FIG. 18 to calculate the graph C2. Next, the power supply potential correction circuit 46b calculates the optimal gate-off potential Voff from the temperature T21 and the graph C2. When calculating the gate-off potential Voff in this way, the higher the predicted value ΔVp, the lower the gate-off potential Voff, and the higher the temperature T21, the lower the gate-off potential Voff. When the power supply potential correction circuit 46b calculates the gate-off potential Voff, it makes the output potential V46 of the DC power supply 46 coincide with the gate-off potential Voff. Therefore, in the next period Tb, the gate potential Vg21 is controlled to the gate-off potential Voff. Note that, as shown in the graph C2 of FIG. 18, the gate-off potential Voff may be a negative potential or a positive potential. When the gate potential Vg21 in the period Tb is thus controlled to the gate-off potential Voff, even if the gate potential Vg21 rises by the same amount as the predicted value ΔVp, the gate potential Vg21 does not exceed the gate threshold Vgth.Therefore, it is possible to prevent the misfiring of the switching element 21. Further, by controlling the gate potential Vg21 in this manner, the negative potential applied to the gate G21 can be set to the minimum necessary magnitude. Thereby, the stress on the switching element 21 can be reduced. Note that the gate-off potential Voff may be calculated by providing a predetermined margin with respect to the graph C2.

[0082] Also, in the switching circuit 20a4 of the fourth embodiment, the gate control circuit 26 includes a potential rise amount detection circuit 56a and a power supply potential correction circuit 56b. The potential rise amount detection circuit 56a and the power supply potential correction circuit 56b operate substantially in the same manner as the potential rise amount detection circuit 46a and the power supply potential correction circuit 46b. The potential rise amount detection circuit 56a and the power supply potential correction circuit 56b optimize the output potential V56 of the DC power supply 56 (that is, the gate potential Vg22 during the period Ta).

[0083] Note that in the fourth embodiment, the potential V46 is adjusted based on both the predicted value ΔVp and the temperature T21. However, in a modification of the fourth embodiment, the potential V46 may be adjusted based on only one of the predicted value ΔVp and the temperature T21.

Embodiment

[0084] As shown in FIG. 19, in the switching circuit 20a5 of the fifth embodiment, the output potential V46 of the DC power supply 46 and the output potential V56 of the DC power supply 56 are variable. In the fifth embodiment, different from the fourth embodiment, either 0V or the negative potential -VNG is output as the output potential V46, and either 0V or the negative potential -VNG is output as the output potential V56. The output potential V46 is controlled by the control IC 47, and the output potential V56 is controlled by the control IC 57. In the fifth embodiment, at the timing t11 in FIG. 8, the control IC 47 turns on the gate-off switch 41. After that, when the gate potential Vg21 has dropped to 0V, the control IC 47 turns on the gate-off switch 42 and turns off the gate-off switch 41 with the output potential V46 set to 0V. Then, at the timing t12, the control IC 47 sets the output potential V46 to the negative potential -VNG, thereby reducing the gate potential Vg21 to the negative potential -VNG. Then, at the timing t13, the control IC 47 sets the output potential V46 to 0V, thereby raising the gate potential Vg21 to 0V. Thus, in the fifth embodiment, the control IC 47 changes the gate potential Vg21 between 0V and the negative potential -VNG by changing the output potential V46 of the DC power supply 46. Also, the control IC 57 similarly changes the gate potential Vg22 between 0V and the negative potential -VNG by changing the output potential V56 of the DC power supply 56.

[0085] FIG. 20 is a modification of Example 5. In FIG. 20, a potential conversion circuit 46x is provided instead of the DC power supply 46. The potential conversion circuit 46x includes a buffer circuit 46x-1, a capacitor 46x-2, and a diode 46x-3. The anode of the diode 46x-3 is connected to the gate-off switch 42, and the cathode of the diode 46x-3 is connected to the source wiring 48. The output terminal of the buffer circuit 46x-1 is connected to the anode of the diode 46x-3 via the capacitor 46x-2. The output potential of the buffer circuit 46x-1 is controlled by the control IC 47 and is changed between a negative potential and a positive potential. When the gate-off switch 42 is on, when the output potential of the buffer circuit 46x-1 is controlled to be a negative potential, the gate potential Vg21 becomes a negative potential, and when the output potential of the buffer circuit 46x-1 is controlled to be a positive potential, the gate potential Vg21 becomes a positive potential lower than the gate threshold value (i.e., the forward voltage of the diode 46x-3). Also, in FIG. 20, a potential conversion circuit 56x is provided instead of the DC power supply 56. The potential conversion circuit 56x includes a buffer circuit 56x-1, a capacitor 56x-2, and a diode 56x-3. The potential conversion circuit 56x operates in the same manner as the potential conversion circuit 46x.

[0086] Note that a plurality of the above-described Examples 1 to 5 or their modifications may be combined.

[0087] Although the embodiments have been described in detail above, these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above. The technical elements described in this specification or the drawings exhibit technical utility alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. Also, the technology illustrated in this specification or the drawings achieves a plurality of purposes simultaneously, and has technical utility by achieving one of those purposes itself.

Description of Reference Numerals

[0088] 12: High potential wiring, 14: Low potential wiring, 16: Output wiring, 20: Switching circuit, 21: Switching element, 22: Switching element, 23: Diode, 24: Diode, 25: Gate control circuit, 26: Gate control circuit

Claims

1. A switching circuit (20a), comprising: a high potential wiring (12); an output wiring (16a); a low potential wiring (14); a first switching element (21) having a high potential main terminal connected to the high potential wiring, a low potential main terminal connected to the output wiring, and a gate; a second switching element (22) having a high potential main terminal connected to the output wiring, a low potential main terminal connected to the low potential wiring, and a gate; a first diode (23) having a cathode connected to the high potential main terminal of the first switching element and an anode connected to the low potential main terminal of the first switching element; a second diode (24) having a cathode connected to the high potential main terminal of the second switching element and an anode connected to the low potential main terminal of the second switching element; a target gate control circuit (25) that changes the potential of the gate of the target switching element between a gate on potential and a gate off potential when one of the first switching element and the second switching element is a target switching element and the other is an opposing switching element; an opposing gate control circuit (26) that changes the potential of the gate of the opposing switching element between a gate on potential (VCC) and a gate off potential; wherein the target gate control circuit and the opposing gate control circuit control the potential of the gate of the target switching element and the potential of the gate of the opposing switching element so that the target switching element and the opposing switching element are alternately turned on; the target gate control circuit can apply, as the gate off potential, a first gate off potential that is equal to or higher than the potential of the low potential main terminal of the target switching element and a second gate off potential (-VNG) that is lower than the potential of the low potential main terminal of the target switching element to the gate of the target switching element; the diode among the first diode and the second diode that is connected in parallel to the target switching element is a target diode; the diode among the first diode and the second diode that is connected in parallel to the opposing switching element is an opposing diode; At a first timing (t5) when the target gate control circuit turns on the opposing switching element while a forward current is flowing through the opposing diode, the first gate-off potential is applied to the gate of the target switching element. At a second timing (Tb) when the opposing switching element turns on while no forward current is flowing through the opposing diode, the second gate-off potential is applied to the gate of the target switching element. The target gate control circuit determines whether a forward current is flowing through the opposing diode based on the direction of the current flowing through the parallel circuit of the opposing switching element and the opposing diode. A switching circuit. **Claim 2**: A switching circuit (20a), A high-potential wiring (12), An output wiring (16a), A low-potential wiring (14), A first switching element (21) having a high-potential main terminal connected to the high-potential wiring, a low-potential main terminal connected to the output wiring, and a gate, A second switching element (22) having a high-potential main terminal connected to the output wiring, a low-potential main terminal connected to the low-potential wiring, and a gate, A first diode (23) having a cathode connected to the high-potential main terminal of the first switching element and an anode connected to the low-potential main terminal of the first switching element, A second diode (24) having a cathode connected to the high-potential main terminal of the second switching element and an anode connected to the low-potential main terminal of the second switching element, A target gate control circuit (25) that changes the potential of the gate of the target switching element between a gate-on potential and a gate-off potential when one of the first switching element and the second switching element is the target switching element and the other is the opposing switching element, An opposing gate control circuit (26) that changes the potential of the gate of the opposing switching element between a gate-on potential (VCC) and a gate-off potential, Comprises The target gate control circuit and the opposing gate control circuit control the potential of the gate of the target switching element and the potential of the gate of the opposing switching element so that the target switching element and the opposing switching element are alternately turned on. The target gate control circuit can apply, as the gate-off potential, a first gate-off potential that is equal to or higher than the potential of the low-potential main terminal of the target switching element, and a second gate-off potential (-VNG) that is lower than the potential of the low-potential main terminal of the target switching element, to the gate of the target switching element. The target diode is the one of the first diode and the second diode that is connected in parallel to the target switching element. The opposing diode is the one of the first diode and the second diode that is connected in parallel to the opposing switching element. At a first timing (t5) when the opposing switching element turns on while a forward current is flowing through the opposing diode, the target gate control circuit applies the first gate-off potential to the gate of the target switching element. At a second timing (Tb) when the opposing switching element turns on while no forward current is flowing through the opposing diode, the target gate control circuit applies the second gate-off potential to the gate of the target switching element. An opposing command signal (SG2) including a turn-on command and a turn-off command for the opposing switching element is input to the target gate control circuit and the opposing gate control circuit. The opposing gate control circuit controls the potential of the gate of the opposing switching element based on the opposing command signal. When the target gate control circuit receives the turn-on command while a forward current is flowing through the opposing diode, it lowers the potential of the gate of the target switching element from the first gate-off potential to the second gate-off potential, and then maintains the potential of the gate of the target switching element at the second gate-off potential until the turn-on of the opposing switching element is completed. Switching circuit.

3. The switching circuit according to claim 2, wherein the target gate control circuit determines whether the turn-on of the opposing switching element is completed based on the potential of the gate of the opposing switching element.

4. The switching circuit according to claim 2, wherein the target gate control circuit determines whether the turn-on of the opposing switching element is completed based on the voltage between the high-potential main terminal and the low-potential main terminal of the target switching element.

5. A switching circuit (20a), A high-potential wiring (12), Output wiring (16a), Low potential wiring (14), A first switching element (21) having a high potential main terminal connected to the high potential wiring, a low potential main terminal connected to the output wiring, and a gate; A second switching element (22) having a high potential main terminal connected to the output wiring, a low potential main terminal connected to the low potential wiring, and a gate; A first diode (23) having a cathode connected to the high potential main terminal of the first switching element and an anode connected to the low potential main terminal of the first switching element; A second diode (24) having a cathode connected to the high potential main terminal of the second switching element and an anode connected to the low potential main terminal of the second switching element; A target gate control circuit (25) that changes the potential of the gate of the target switching element between a gate-on potential and a gate-off potential when one of the first switching element and the second switching element is a target switching element and the other is an opposing switching element; [[ID=z7]]An opposing gate control circuit (26) that changes the potential of the gate of the opposing switching element between a gate-on potential (VCC) and a gate-off potential; comprising: The target gate control circuit and the opposing gate control circuit control the potential of the gate of the target switching element and the potential of the gate of the opposing switching element so that the target switching element and the opposing switching element are alternately turned on; The target gate control circuit can apply a first gate-off potential that is equal to or higher than the potential of the low potential main terminal of the target switching element and a second gate-off potential (-VNG) that is lower than the potential of the low potential main terminal of the target switching element as the gate-off potential to the gate of the target switching element; The diode among the first diode and the second diode that is connected in parallel to the target switching element is the target diode; The diode among the first diode and the second diode that is connected in parallel to the opposing switching element is the opposing diode; At a first timing (t5) when the opposing switching element turns on while a forward current is flowing through the opposing diode, the target gate control circuit applies the first gate-off potential to the gate of the target switching element, and at a second timing (Tb) when the opposing switching element turns on while no forward current is flowing through the opposing diode, the target gate control circuit applies the second gate-off potential to the gate of the target switching element. The target gate control circuit a rise amount detection circuit (46a) that detects a rise amount of the potential of the gate of the target switching element at the second timing; a rise amount-second gate-off potential correction circuit (46b) that lowers the second gate-off potential as the rise amount detected by the rise amount detection circuit is higher; having a switching circuit. **Claim 6** The rise amount detection circuit a peak value hold circuit that holds a peak value of the potential of the gate of the target switching element; a reset circuit (46b-7) that resets the peak value until the next second timing arrives after the peak value is held; The switching circuit according to claim 5, having.

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