Monolithic signal carrier devices implemented in cryogenic quantum computing applications

Abstract

To provide devices, systems, methods and computer-implemented methods to facilitate transmitting microwave signals to one or more cryogenic stages of a cryogenic refrigerator.SOLUTION: A device 100 comprises: a monolithic signal carrier device comprising a thermal barrier 108 disposed within a ground layer 102 and a signal layer 104; a thermal decoupling device 110 coupled at the thermal barrier 108 to the ground layer 102 and the signal layer 104; and a heat sink 118 coupled to the ground layer 102 and a cryogenic plate 120 of a cryogenic refrigerator.SELECTED DRAWING: Figure 1A

Description

Technical Field

[0001] The present invention relates to a signal carrier device, and more particularly to a monolithic signal carrier device capable of facilitating the transmission of microwave signals to a quantum computing device in a cryogenic cooler. Quantum computing generally uses quantum mechanical phenomena for the execution of arithmetic and information processing functions. Quantum computing can generally be seen in contrast to classical computing that operates in binary using transistors. That is, a classical computer can operate with either a bit value of 0 or 1, while a quantum computer operates with qubits that include a superposition of both 0 and 1, can entangle multiple qubits (qubits), and can use interference.

Background Art

[0002] General-purpose quantum computers (e.g., quantum computing hardware) require many physical qubits (e.g., millions), and error correction schemes require access to all such qubits (e.g., microwave signal transmission to all such qubits). The problem with current state-of-the-art systems is that access to one or more stages (e.g., the mixing chamber stage) of a cryogenic cooler (e.g., a dilution cooler) is limited to the number of connectors that can physically fit through a cryogenic plate that defines the stage of the cryogenic cooler. Existing systems are limited to about 200 ports for input and output, and thus such systems can only facilitate the transmission of about 100 independent microwave signals (e.g., to 100 qubits) between the quantum computing hardware. Another problem with current state-of-the-art systems is that some connection components are required in each cryogenic plate, or between each cryogenic plate, or both, to ensure thermal isolation of such components in each stage of the cryogenic cooler. For example, such existing systems require several partitions (e.g., subminiature version A (SMA) partitions), attenuators, and coaxial cables for each port accessing the quantum computing device in the mixing chamber stage of the cryogenic cooler. SUMMARY OF THE INVENTION

[0003] The following presents a general overview to provide a basic understanding of one or more embodiments of the present invention. This overview is not intended to identify key or critical elements, nor to delineate the scope of any particular embodiment or any scope of the claims. Its sole purpose is to present concepts in a simplified form as a prelude to the more detailed description that follows. In one or more embodiments described herein, a device, system, method, or computer-implemented method, or a combination thereof, that can facilitate the transmission of microwave signals to one or more cryogenic stages of a cryogenic cooler will be described.

[0004] According to one embodiment of the present invention, a device may include a monolithic signal carrier device including thermal barriers disposed within a ground layer and within a signal layer. The device may further include a thermal decoupling device coupled to the ground layer and the signal layer at the thermal barrier. The advantage of this is that a large number (e.g., about 1000 or more) of independent microwave signal transmission paths (e.g., stripline microwave transmission lines) can be provided that can be used to transmit independent microwave signals to each quantum computing device or qubit or both in the mixing chamber stage of a cryogenic cooler.

[0005] The device may further include a heat sink coupled to the ground layer and the cryogenic plate of the cryogenic cooler, and the heat sink thermally couples the ground layer and the cryogenic plate. The heat sink may include a flexible heat sink. The advantage of this is that the device and the cryogenic plate can be expanded and contracted independently of the varying temperatures of each cryogenic stage of the cryogenic cooler.

[0006] According to one embodiment of the present invention, a method may include forming a ground layer and a signal layer in a monolithic signal carrier device. The method may further include forming thermal barriers within the ground layer and within the signal layer. The method may also include coupling a thermal decoupling device to the ground layer and the signal layer at the thermal barrier.

[0007] The method may further include coupling a heat sink to the ground layer and the cryogenic plate of the cryogenic cooler.

[0008] According to another embodiment of the present invention, a device may include a monolithic signal carrier device including thermal barriers disposed within a ground layer and within a signal layer. The device may further include a thermal decoupling device coupled to the ground layer and the signal layer at the thermal barrier. The device may also include a shield coupled to the ground layer. The advantage of this is that the shield can reduce crosstalk between independent microwave signal transmission paths.

[0009] This device can further include a heat sink coupled to the ground layer and the cryogenic plate of the cryogenic cooler, the heat sink thermally coupling the ground layer to the cryogenic plate, and the thermal barrier separating sections of the ground layer thermally coupled to different cryogenic plates.

[0010] According to another embodiment of the present invention, a system can include a cryogenic cooler including cryogenic plates that separate cryogenic stages. The system can further include a monolithic signal carrier device coupled to the cryogenic plates and transmitting a microwave signal across the cryogenic stages to a mixing chamber stage of the cryogenic cooler.

[0011] The ground layer can be coupled to the cryogenic plate by a heat sink that thermally couples the ground layer to the cryogenic plate, and the thermal barrier separates sections of the ground layer thermally coupled to the cryogenic plate.

[0012] According to another embodiment of the present invention, a method can include coupling a monolithic signal carrier device to one or more cryogenic plates of a cryogenic cooler. The method can further include transmitting a microwave signal through the monolithic signal carrier device to one or more cryogenic stages of the cryogenic cooler.

[0013] The method can further include thermalizing the ground layer of the monolithic signal carrier device with one or more cryogenic plates. The method can also include thermalizing the ground layer and the signal layer of the monolithic signal carrier device.

Brief Description of the Drawings

[0014]

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DETAILED DESCRIPTION OF THE INVENTION

[0015] The following detailed description is merely exemplary and is not intended to limit the present invention or its application or uses, or both. Also, it is not intended to be limited by any explicit or implicit information set forth in the above "Background Art" or "Summary of the Invention" sections or "Detailed Description of the Invention" section.

[0016] Next, one or more embodiments of the present invention will be described with reference to the drawings, and like reference numerals are used throughout to refer to like elements. In the following description, for purposes of explanation, many specific details are set forth in order to provide a better understanding of one or more embodiments. However, it is clear that in various cases, one or more embodiments can be practiced without these specific details. Note that the drawings of the present invention are provided for illustrative purposes only, and thus the drawings are not drawn to a uniform scale.

[0017] In view of the above-described problem of accessing one or more stages (e.g., mixing chamber stages) of a cryocooler, which is limited by the number of connectors that can physically fit through the cryoplates that define the stages of the cryocooler, the present invention can be implemented to provide a solution to this problem in the form of a device, system, method, or computer-implemented method, or combination thereof, that can facilitate the transmission of microwave signals to one or more cryocooler stages. An advantage of such a device, system, method, or computer-implemented method, or combination thereof, is that it can be employed to provide a large number (e.g., about 1000 or more) of independent microwave signal transmission lines (e.g., stripline microwave transmission lines) that can be used to transmit independent microwave signals to each quantum computing device and / or qubit in the mixing chamber stage of the cryocooler.

[0018] Also, considering that the above-mentioned problem of current state-of-the-art systems is the need for components at each cryogenic plate, or between each cryogenic plate, or both, to ensure thermal isolation of several connecting components in each stage of a cryocooler, the present invention can be implemented to achieve a solution to this problem in the form of a device, system, method, or computer-implemented method, or combination thereof, that facilitates the transmission of microwave signals via a monolithic signal carrier device to one or more cryogenic stages of a cryocooler. An advantage of such a device, system, method, or computer-implemented method, or combination thereof, is that it can facilitate the transmission of such microwave signals via a monolithic signal carrier device that may extend through multiple stages of a cryocooler without using several components (e.g., Subminiature Version A (SMA) bulkheads, coaxial cables, etc.) employed in state-of-the-art systems, thereby eliminating the need for such components.

[0019] FIG. 1A shows a device 100a that can facilitate the transmission of microwave signals to one or more cryogenic stages of a cryogenic cooler. The device 100a, or components thereof, or both, may include an integrated circuit fabricated in a semiconductor device. For example, the device 100a, or components thereof, or both, may include a monolithic signal carrier device that can be implemented in a cryogenic cooler to facilitate the transmission of microwave signals to one or more cryogenic stages of the cryogenic cooler. For example, the device 100a may include, but is not limited to, a monolithic dielectric circuit board, a monolithic organic multilayer circuit board, a monolithic printed circuit board, or other monolithic signal carrier device, or combinations thereof, that can be implemented in a cryogenic cooler (e.g., a dilution cooler) to facilitate the transmission of microwave signals to one or more cryogenic stages (e.g., a mixing chamber stage) of the cryogenic cooler.

[0020] The embodiments of the present invention illustrated in the various figures disclosed in this specification are for illustrative purposes only. Therefore, it should be understood that the architecture of such embodiments of the present invention is not limited to the systems, devices, or components shown in the figures or combinations thereof. For example, device 100a or its components or both can be coupled (e.g., communicatively, electrically, mechanically, operationally, physically, thermally, etc.) to one or more such external systems, devices, or electrical circuits or combinations thereof so that device 100a can facilitate the transmission of microwave signals between external systems, devices, or electrical circuits or combinations thereof. For example, device 100a or its components or both can be coupled to any external electronic device capable of transmitting microwave signals at one or more frequencies (e.g., single-tone, multi-tone), receiving microwave signals at such one or more frequencies, or both. In this example, such an external electronic device can include a vector network analyzer (VNA) capable of transmitting microwave signals at a single frequency or multiple frequencies via device 100a to a quantum computing device (e.g., quantum computer, quantum processor, quantum hardware, quantum circuit, etc.) in the mixing chamber stage of a cryogenic cooler.

[0021] The fabrication of various embodiments of device 100a, or its components, or both, may include one or more multi-step sequences of photolithography processes, chemical processes, or both, which facilitate the step-by-step fabrication of, for example, electron-based systems, devices, components, or circuits in semiconductor devices, or combinations thereof (such as integrated circuits fabricated in monolithic signal carrier devices). For example, device 100a, or its components, or both, may be fabricated using photolithography, microlithography, nanolithography, nanoimprint lithography, photomasking techniques, patterning techniques, photoresist techniques (such as positive photoresist, negative photoresist, hybrid photoresist, etc.), etching techniques (such as reactive ion etching (RIE), dry etching, wet etching, ion beam etching, plasma etching, laser ablation, etc.), deposition techniques, sputtering techniques, plasma ashing techniques, heat treatments (such as rapid thermal annealing, furnace annealing, thermal oxidation, etc.), physical vapor deposition (PVD), chemical vapor deposition (CVD), atomic layer deposition (ALD), plasma enhanced chemical vapor deposition (PECVD), chemical solution deposition, electroplating, molecular beam epitaxy (MBE), electrochemical deposition (ECD), lift-off techniques, chemical mechanical planarization (CMP), back grinding techniques, or other techniques, or combinations thereof, but not limited to these techniques.

[0022] Fabrication device 100a or its components or both can be fabricated using various materials. For example, fabrication device 100a or its components or both can be fabricated using one or more materials from one or more different material categories including, but not limited to, conductive materials, semiconductor materials, superconducting materials, dielectric materials, polymer materials, organic materials, inorganic materials, non-conductive materials, or other materials or combinations thereof that can be used with one or more of the above-described techniques for fabricating integrated circuits in a monolithic signal carrier device.

[0023] Device 100a can include a first ground layer having a plurality of first ground layer segments 102a, 102b, a signal layer having a plurality of signal layer segments 104a, 104b, or a second ground layer having a plurality of second ground layer segments 106a, 106b, or combinations thereof. The first ground layer segments 102a, 102b, signal layer segments 104a, 104b, or second ground layer segments 106a, 106b, or combinations thereof can include a patterned metal layer incorporated within or on or both within and on device 100a using one or more of the above-described techniques (e.g., photomasking, patterning, photoresist, etching, electroplating, material deposition, planarization, backgrinding, etc.) for fabricating integrated circuits. The first ground layer segments 102a, 102b, signal layer segments 104a, 104b, or second ground layer segments 106a, 106b, or combinations thereof can include materials including, but not limited to, copper, copper alloys (e.g., copper nickel), gold, platinum, palladium, gold alloys (e.g., gold palladium), brass, or any conductive metal or alloy.

[0024] Device 100a may include one or more thermal barriers disposed within a first ground layer, a signal layer, or a second ground layer, or a combination thereof. For example, device 100a may include a thermal barrier 108 between a first ground layer section 102a, 102b, a signal layer section 104a, 104b, or a second ground layer section 106a, 106b, or a combination thereof, and the thermal barrier 108 can thermally isolate such sections of each layer from each other. For example, the thermal barrier 108 can thermally isolate the first ground layer section 102a from the first ground layer section 102b, the signal layer section 104a from the signal layer section 104b, and / or the second ground layer section 106a from the second ground layer section 106b. In some embodiments where device 100a is implemented in a cryogenic cooler, the thermal barrier 108 can provide thermal isolation of the cryogenic stage in such a cryogenic cooler. For example, device 100a can be coupled to one or more cryogenic plates of a cryogenic cooler (e.g., via a heat sink 118 as described hereinafter), in which case such cryogenic plates define the cryogenic stage of the cryogenic cooler. In this example, the thermal barrier 108 can thermally isolate such a cryogenic stage by thermally isolating the first ground layer section 102a from the first ground layer section 102b, the signal layer section 104a from the signal layer section 104b, or the second ground layer section 106a from the second ground layer section 106b, or a combination thereof.

[0025] Device 100a may include a thermal decoupling device 110 coupled to one section of the first ground layer, a first section of the signal layer, and a second section of the signal layer in the thermal barrier 108. For example, as shown in FIG. 1A, device 100a may include a thermal decoupling device 110 (e.g., adjacent to the thermal barrier 108) coupled (e.g., electrically, mechanically, physically, thermally, etc.) to the surfaces of the first ground layer section 102a, the signal layer section 104a, and the signal layer section 104b in the thermal barrier 108. For example, the thermal decoupling device 110 can be epoxy resin adhered to the surface (e.g., the upper surface) of the first ground layer section 102a using, for example, silver epoxy.

[0026] The thermal decoupling device 110 can be coupled to the signal layer sections 104a, 104b by one or more signal vias 112a, 112b or one or more wire bonds 114a, 114b or both. For example, the thermal decoupling device 110 can be coupled to the signal layer section 104a (e.g., electrically, mechanically, physically, thermally, etc.) by the wire bond 114a and the signal via 112a. In this embodiment, the wire bond 114a can couple the thermal decoupling device 110 to the signal via 112a (e.g., electrically, mechanically, physically, thermally, etc.), in which case the signal via 112a can be coupled to the signal layer section 104a (e.g., electrically, mechanically, physically, thermally, etc.) (e.g., as shown in FIG. 1A). In another embodiment, the thermal decoupling device 110 can be coupled to the signal layer section 104b (e.g., electrically, mechanically, physically, thermally, etc.) by the wire bond 114b and the signal via 112b. In this embodiment, the wire bond 114b can couple the thermal decoupling device 110 to the signal via 112b (e.g., electrically, mechanically, physically, thermally, etc.), in which case the signal via 112 can be coupled to the signal layer section 104b (e.g., electrically, mechanically, physically, thermally, etc.) (e.g., as shown in FIG. 1A).

[0027] The thermal decoupling device 110 can include any thermal decoupling device that can be disposed between the signal via 112a and the signal via 112b to enable transitions. For example, the thermal decoupling device 110 can include, but is not limited to, attenuators, low-noise amplifiers, filters, transmission lines, or other thermal decoupling devices or combinations thereof.

[0028] Signal vias 112a, 112b, wire bonds 114a, 114b, or both can be formed using one or more of the aforementioned techniques for fabricating integrated circuits (e.g., photomasking, patterning, photoresist, etching, electroplating, material deposition, planarization, backgrinding, wire bonding, etc.). Signal vias 112a, 112b, wire bonds 114a, 114b, or both can be fabricated using materials including, but not limited to, copper, copper alloys (e.g., copper nickel), gold, platinum, palladium, gold alloys (e.g., gold palladium), brass, aluminum, or any conductive metal or alloy.

[0029] Device 100a can include isolation sections 116 formed in the first ground layer sections 102a, 102b. Such isolation sections 116 can effect the isolation (e.g., electrical, thermal, etc.) of signal vias 112a, 112b from the first ground layer sections 102a, 102b. For example, as shown in FIGS. 1A and 2C, device 100a can include isolation sections 116 formed in the first ground layer sections 102a, 102b such that the isolation sections 116 prevent signal vias 112a, 112b from coupling (e.g., electrically, mechanically, physically, thermally, etc.) to the first ground layer sections 102a, 102b. In this embodiment, the isolation sections 116 can thereby prevent a short circuit (e.g., electrical short circuit, thermal short circuit, etc.) between the first ground layer sections 102a, 102b and the signal layer sections 104a, 104b. As shown in FIGS. 1A and 2C, the isolation sections 116 can be formed in the first ground layer sections 102, 102b such that the isolation sections 116 overlap the thermal barrier 108. As shown in FIG. 2C, the isolation sections 116 can be formed in the first ground layer section 102a such that the thermal decoupling device 110 remains directly coupled to the ground layer section 102a.

[0030] Device 100a may include a heat sink 118 coupled to a first ground layer section 102a. For example, device 100a may include a heat sink 118 coupled (e.g., electrically, mechanically, physically, thermally, etc.) to the first ground layer section 102a as illustrated in FIG. 1A. The heat sink 118 may include a flexible heat sink that allows movement of device 100a caused by thermal contraction or thermal expansion or both. The heat sink 118 may include a thermally conductive heat sink or an electrically conductive heat sink or both. The heat sink 118 can be fabricated using materials including, but not limited to, copper, gold, gold-plated copper, or other materials, or combinations thereof.

[0031] The heat sink 118 may be coupled to the first ground layer section 102a and a cryogenic plate 120 of a cryogenic cooler (not shown in FIG. 1A). For example, the heat sink 118 may be coupled (e.g., electrically, mechanically, physically, thermally, etc.) to the first ground layer section 102a and the cryogenic plate 120 as shown in FIG. 1A. In this embodiment, the heat sink 118 can thermally couple the first ground layer section 102a and the cryogenic plate 120. For example, based on the heat sink 118 being coupled to the first ground layer section 102a and the cryogenic plate 120 as described above, the heat sink 118 can equalize the temperature of the first ground layer section 102a and the temperature of the cryogenic plate 120 (e.g., such components can be in a thermal equilibrium state). The cryogenic plate 120 may include an International Organization for Standardization (ISO) 100 plate. The cryogenic plate 120 may include one of the plates of a dilution cooler, such as a mixing chamber plate.

[0032] The thermal decoupling device 110 can thermally couple the first ground layer section 102a and the signal layer sections 104a and 104b. For example, based on the fact that the thermal decoupling device 110 is coupled to the first ground layer section 102a and the signal layer sections 104a and 104b as described above, the thermal decoupling device 110 can equalize the temperature of the first ground layer section 102a and the temperatures of the signal layer sections 104a and 104b (for example, such components can be in a thermal equilibrium state). Based on the fact that the heat sink 118 is coupled to the cryogenic plate 120 and the first ground layer section 102a, and the thermal decoupling device 110 is coupled to the first ground layer section 102a and the signal layer sections 104a and 104b as described above (for example, as described above), the temperature of the cryogenic plate 120 and the signal layer section 104b can become equal (for example, such components can be in a thermal equilibrium state).

[0033] Device 100a may include material 122 between the first ground layer and the signal layer and between the signal layer and the second ground layer. For example, as shown in FIG. 1A, device 100a may include material 122 between the first ground layer sections 102a, 102b and the signal layer sections 104a, 104b and between the signal layer sections 104a, 104b and the second ground layer sections 106a, 106b. Material 122 may include, but is not limited to, a dielectric, an organic laminate material, silicon, a glass fiber reinforced epoxy laminate material, ceramics, a flame retardant material (such as flame retardant 4 (FR-4)), a polymer (such as polytetrafluoroethylene), or other materials, or combinations thereof. Material 122 may include the thermal barrier 108 or the separation section 116 or both. For example, the thermal barrier 108 or the separation section 116 or both can be sections of material 122 that function as described above (such as thermal separation, electrical separation, etc.), in which case the thermal barrier 108, the separation section 116, and the material 122 are fabricated using the same material.

[0034] The first ground layer sections 102a, 102b can be coupled to the second ground layer sections 106a, 106b. For example, the first ground layer sections 102a, 102b can be coupled (e.g., electrically, thermally, etc.) to the second ground layer sections 106a, 106b by vias (e.g., ground vias 202 illustrated in FIGS. 2A, 2B, 2C, 3, and 5) that can extend through the signal layer sections 104a, 104b. In this embodiment, such vias (e.g., ground vias 202) can couple (e.g., electrically, mechanically, physically, thermally, etc.) the first ground layer sections 102a, 102b to the second ground layer sections 106a, 106b, whereby the first ground layer sections 102a, 102b can be coupled (e.g., electrically, thermally, etc.) to the second ground layer sections 106a, 106b.

[0035] Device 100a, or one or more of its components, or both, may have any dimensions that facilitate the transmission of microwave signals to one or more cryogenic stages of a cryogenic cooler. In one embodiment (e.g., where device 100a includes a printed circuit board fabricated using a dielectric material), device 100a may have a width in the range from about 1 inch (2.54 cm) to about 24 inches (60.96 cm), a length of about 36 inches (91.44 cm), or a thickness in the range from about 5 mils (0.127 mm) to about 400 mils (1.02 cm) (e.g., 1 mil (0.0254 mm) corresponds to 1 / 1000 inch (0.0254 mm)), or dimensions that are a combination thereof. In this embodiment, the first ground layer sections 102a, 102b, signal layer sections 104a, 104b, or the second ground layer sections 106a, 106b, or combinations thereof, may have a thickness of 1.2 mils (0.0305 mm). In this embodiment, the thermal barrier 108 may have a length determined by the length of the thermal decoupling device 110 and that minimizes the lengths of the wire bonds 114a and 114b. In this embodiment, the material 122 may have a thickness in the range from about 5 mils (0.127 mm) to about 30 mils (0.762 mm) between the first ground layer sections 102a, 102b, signal layer sections 104a, 104b, or the second ground layer sections 106a, 106b, or combinations thereof. In this embodiment, such dimensions may facilitate defining the impedance of the microwave transmission line to match the impedance of the input and output coaxial lines (e.g., 50 ohms in this case).

[0036] In another embodiment (e.g., device 100a includes an organic stack fabricated using a dielectric material), the first ground layer segments 102a, 102b, the signal layer segments 104a, 104b, or the second ground layer segments 106a, 106b or combinations thereof may have a thickness of 15 micrometers (μm). In this embodiment, the thermal barrier 108 may have a length determined by the length of the thermal decoupling device 110 and that minimizes the lengths of the wire bonds 114a and 114b. In this embodiment, the material 122 may have a thickness of 33 μm between the first ground layer segments 102a, 102b, the signal layer segments 104a, 104b, or the second ground layer segments 106a, 106b or combinations thereof. In this embodiment, such dimensions may facilitate defining the impedance of the microwave transmission line to match the impedance of the input and output coaxial lines (e.g., 50 ohms in this case).

[0037] FIG. 1B shows a side view of a device 100b that can facilitate the transmission of microwave signals to one or more cryogenic stages of a cryocooler.

[0038] Device 100b may include an exemplary non-limiting alternative embodiment of device 100a, in which case device 100b may include a second signal layer having a plurality of second signal layer segments 124a, 124b, a third ground layer having a plurality of third ground layer segments 126a, 126b, or both. The second signal layer segments 124a, 124b may include the signal layer segments 104a, 104b. The third ground layer segments 126a, 126b may include the first ground layer segments 102a, 102b, the second ground layer segments 106a, 106b, or both. Device 100b may include one or more thermal decoupling devices 110, and at least one of such thermal decoupling devices 110 may be coupled to the second signal layer segments 124a, 124b, the third ground layer segment 126a, or both (e.g., by one or more signal vias 112a, 112b, one or more wire bonds 114a, 114b, etc.) in the same manner as the thermal decoupling device 110 of device 100a may be coupled to the first ground layer segment 102a, the signal layer segments 104a, 104b, or both, as described above with respect to FIG. 1.

[0039] FIGS. 2A, 2B, and 2C show top views of layers 200a, 200b, 200c in a device that can facilitate the transmission of microwave signals to one or more cryogenic stages of a cryocooler.

[0040] Layer 200a (FIG. 2A) may include a top view of the second ground layer sections 106a, 106b of device 100a. In this case, layer 200a may include ground vias 202 that can couple the second ground layer sections 106a, 106b to the first ground layer sections 102a, 102b. For example, as described above with reference to device 100a and FIG. 1A, the first ground layer sections 102a, 102b may be coupled (e.g., electrically, thermally, etc.) to the second ground layer sections 106a, 106b by ground vias 202 that extend through the signal layer sections 104a, 104b (as shown, for example, in FIGS. 2A, 2B, 2C, 3, and 5). In this embodiment, the ground vias 202 can couple (e.g., electrically, mechanically, physically, thermally, etc.) the second ground layer sections 106a, 106b to the first ground layer sections 102a, 102b, thereby coupling (e.g., electrically, thermally, etc.) the first ground layer sections 102a, 102b to the second ground layer sections 106a, 106b to provide ground continuity. In this embodiment, such coupling of the first ground layer sections 102a, 102b to the second ground layer sections 106a, 106b by the ground vias 202 can also prevent one or more undesirable spurious microwave modes or crosstalk or both. The ground vias 202 can be fabricated using materials including, but not limited to, copper, copper alloys (e.g., copper nickel), gold, platinum, palladium, gold alloys (e.g., gold palladium), brass, aluminum, or any conductive metal or alloy.

[0041] Layer 200b (FIG. 2B) may include a top view of another non-limiting, exemplary embodiment of the signal layer sections 104a, 104b of device 100a, where the signal layer sections 104a, 104b of device 200b may include one or more signal lines 204. Device 100a may include one or more stripline / microwave transmission lines including signal lines 204 or ground planes 102A, 102b, 205a, 205b, 106a, 106b or both. Signal line 204 may include a conductive component through which current or an electrical signal or both can flow. For example, signal line 204 may include, but is not limited to, a wire, trace, transmission line, resonant bus, waveguide, or other component or combination of components through which current (e.g., alternating current or direct current or both) or an electrical signal (e.g., a microwave frequency signal) or both can flow. Signal line 204 can be fabricated using materials including, but not limited to, copper, copper alloys (e.g., copper nickel), gold, platinum, palladium, gold alloys (e.g., gold palladium), brass, or any conductive metal or alloy.

[0042] The signal line 204 can have any dimension that can facilitate the transmission of microwave signals to one or more cryogenic stages of the cryogenic cooler. Such dimensions can be defined such that the impedance of the stripline microwave transmission line is matched to the impedance of the input and output coaxial lines (i.e., 50 ohms). In one embodiment (e.g., the device 100a includes a printed circuit board fabricated using a dielectric material), the signal line 204 can have a width in the range of about 5 mils (0.127 mm) to 20 mils (0.508 mm) (e.g., 1 mil (0.0254 mm) corresponds to 1 / 1000 inch (0.0254 mm)). In another embodiment (e.g., the device 100a includes an organic laminate fabricated using a dielectric material), the signal line 204 can have a width in the range of about 10 μm to about 50 μm. Depending on the embodiment, such dimensions can facilitate defining the impedance of the microwave transmission line to match the impedance of the input and output coaxial lines (e.g., 50 ohms in this case).

[0043] In the embodiment of FIG. 1A, the signal layer segments 104a, 104b can include a cross-sectional view of the signal line 204. In the embodiment of FIG. 2B, the signal layer segments 104a, 104b can include ground plane segments 205a, 205b that are not connected to the signal line 204. The ground plane segments 205a, 205b can be coupled (e.g., electrically, physically, thermally, etc.) to the first ground layer segments 102a, 102b, or the second ground layer segments 106a, 106b, or both, by ground vias 202. Such coupling of the ground plane segments 205a, 205b to the first and second ground layer segments 102a, 102b and 106a, 106b by the ground vias 202 can prevent one or more undesirable spurious microwave modes or crosstalk or both. The ground vias 202 can be fabricated using materials including, but not limited to, copper, copper alloys (e.g., copper nickel), gold, platinum, palladium, gold alloys (e.g., gold palladium), brass, aluminum, or any conductive metal or alloy.

[0044] Layer 200c (FIG. 2C) may include a top view of an example of the first ground layer sections 102a, 102b of device 100a. The first ground layer sections 102a, 102b of device 200c may include one or more thermal decoupling devices 110 that can be coupled to the first ground layer section 102a, the signal layer section 104a, and the signal layer section 104b, as described above with reference to FIG. 1A. In the example illustrated in FIG. 2C, the thermal decoupling device 110 can be epoxy bonded to an extension of the first ground layer section 102a that can extend under the thermal decoupling device 110 and within the thermal barrier 108 region.

[0045] FIG. 3 is an orthogonal view of a device 300 that can facilitate the transmission of microwave signals to one or more cryogenic stages of a cryocooler.

[0046] Device 300 may include an example of device 100a. Device 300 may include a thermal decoupling device 110 and one or more thermal decoupling devices 110a, 110b that can be coupled to the first ground layer section 102a, the signal layer section 104a, and the signal layer section 104b, as described above with reference to FIG. 1A. For example, device 300 may include a thermal decoupling device 110a coupled to the first ground layer section 102a, the signal line 204a of the signal layer section 104a, and the signal line 204a of the signal layer section 104b (as illustrated in FIG. 3, for example). In this example, device 300 may further include a thermal decoupling device 110b coupled to the first ground layer section 102a, the signal line 204b of the signal layer section 104a, and the signal line 204b of the signal layer section 104b (as illustrated in FIG. 3, for example).

[0047] For ease of viewing, the embodiment illustrated in FIG. 3 is described above with reference to device 100a and does not include some of the components shown in FIG. 1A. Specifically, the embodiment illustrated in FIG. 3 does not show heat sink 118, cryogenic plate 120, and material 122. It should be understood that the embodiment illustrated in FIG. 3 exemplifies at least two vias 112a spaced 1.5 millimeters (mm) apart, but the present invention is not limited thereto. For example, in some embodiments, via 112a or via 112b or both can be spaced from each other by a distance less than 1.5 mm or greater than 1.5 mm.

[0048] FIGS. 4A and 4B are graphs 400a, 400b that can represent data of microwave signals to be transmitted. Graphs 400a and 400b can show the effect of thermal barrier 108 on microwave performance. Thus, in graphs 400a and 400b, the attenuation by device 110a can be set to 0 decibels (dB), and the attenuation by device 110b can also be set to 0 dB in the same manner.

[0049] Graphs 400a, 400b can include a representation of data obtained by implementing one or more embodiments of the present invention. For example, graphs 400a, 400b can include a representation of data obtained by fabricating device 300 (as described above with reference to FIG. 1A, for example) and simulating the transmission of microwave signals through such fabricated device 300. Graphs 400a, 400b can include a representation of data obtained by performing a high-frequency electromagnetic field simulation of microwave signals transmitted through such fabricated device 300.

[0050] Graph 400a (FIG. 4A) may include a representation of time domain reflectometry (TDR) data obtained by performing a high frequency electromagnetic field simulation of microwave signals transmitted through the fabricated device 300, where the y-axis may represent ohms (Ω) and the x-axis may represent time in nanoseconds (ns). Graph 400a may include plot line 402 or plot line 404 or both, which may represent time domain reflectometry (TDR) data (e.g., impedance data) corresponding to one or more transmission lines of the simulated device 300. For example, plot line 402 or plot line 404 or both may represent impedance data corresponding to signal lines 204a, 204b of device 300. In this example, graph 400a, plot line 402 or plot line 404 or a combination thereof may represent an impedance value of approximately 47 Ω corresponding to signal lines 204a, 204b of device 300, and this impedance value may vary by only a few percent over the period, indicating that the transitions between the transmission line including signal line 204 and ground planes 102a, 102b, 205a, 205b, 106a, 106b, signal vias 112a, 112b, and wire bonds 114a, 114b are well matched to the coaxial input and output lines at an impedance of 50 ohms.

[0051] Graph 400b (FIG. 4B) may include a representation of crosstalk data determined by performing a high frequency electromagnetic field simulation of a microwave signal transmitted through fabricated device 300, where the y-axis may represent decibels (dB) and the x-axis may represent frequency in gigahertz (GHz). Graph 400b may include plot line 406, plot line 408, plot line 410, or plot line 412, or any combination thereof, which may represent data corresponding to one or more components of simulated device 300. For example, plot line 406 may represent transmission, and plot line 408 may represent reflection. In another example, plot line 410 and / or plot line 412 may represent crosstalk that may occur between thermal decoupling devices 110a and 110b of device 300, or crosstalk that may occur between conductive components coupled to thermal decoupling devices 110a, 110b (e.g., signal vias 112a, 112b, wire bonds 114a, 114b, signal lines 204a, 204b, etc.). In this example, graph 400b, plot line 410, and / or plot line 412 may represent a crosstalk value of approximately −40 dB corresponding to device 300. In this example, such a crosstalk value of approximately −40 dB may occur at a frequency of approximately 5 GHz, a frequency commonly used to control superconducting qubits.

[0052] FIG. 5 is an orthogonal view of a device 500 that can facilitate the transmission of microwave signals to one or more cryogenic stages of a cryocooler.

[0053] Device 500 may include an embodiment of device 300, where device 500 may include a shield 502 coupled to first ground layer segments 102 a, 102 b. For example, shield 502 may be coupled (e.g., electrically, mechanically, physically, thermally, etc.) to a surface (e.g., a top surface) of first ground layer segment 102 a or first ground layer segment 102 b, or both.

[0054] The shield 502 may include one or more channels 504a, 504b that may be disposed over one or more thermal decoupling devices 110a, 110b. For example, as shown in FIG. 5, the shield 502 may be coupled to the first ground layer segments 102a, 102b such that channel 504a is disposed over thermal decoupling device 110a and channel 504b is disposed over thermal decoupling device 110b. In this embodiment, based on such coupling of the shield 502 to the first ground layer segments 102a, 102b, channel 504a can electrically isolate a conductive component disposed in channel 504a from a conductive component disposed in channel 504b. For example, channel 504a can electrically isolate thermal decoupling device 110a or a conductive component coupled to thermal decoupling device 110a (e.g., signal vias 112a, 112b, wire bonds 114a, 114b, signal line 204, etc.) or both from thermal decoupling device 110b or a conductive component coupled to thermal decoupling device 110b (e.g., signal vias 112a, 112b, wire bonds 114a, 114b, signal line 204, etc.) or both disposed in channel 504b. In this embodiment, such electrical isolation of such conductive components disposed in channels 504a, 504b can facilitate crosstalk reduction between such components.

[0055] The shield 502 may include a copper-nickel shield, a stainless steel shield, a niobium shield, an aluminum shield, a superconducting shield, or other shields or combinations thereof. The shield 502 may include a machined component that can be fabricated as part of the device 500 using one or more of the above-described techniques for fabricating integrated circuits in semiconductor devices. The shield 502 may be fabricated separately from the device 500 and may include a clamping component that can be coupled (e.g., electrically, mechanically, physically, thermally, etc.) to the device 500 (e.g., to the first ground layer sections 102a, 102b as described above). Based on this coupling of the shield 502 to the first ground layer sections 102a, 102b as described above, it should be understood that the shield 502 can re-establish the ground continuity (e.g., of the first ground layer sections 102a, 102b) without a thermal short.

[0056] FIG. 6 is a graph 600 that may represent data of a microwave signal being transmitted. The graph 600 may illustrate the effects of the thermal barrier 108 and the shield 502 on microwave performance. Thus, in the graph 600, the attenuation by the device 110a can be 0 dB, and the attenuation by the device 110b can likewise be 0 dB.

[0057] The graph 600 may include a representation of data obtained by implementing one or more embodiments of the present invention. For example, the graph 600 may include a representation of data obtained by fabricating the device 500 (as described above with reference to FIG. 1A, for example) and simulating the transmission of microwave signals through such fabricated device 500. For example, the graph 600 may include a representation of data obtained by performing a high-frequency electromagnetic field simulation of microwave signals transmitted through such fabricated device 500.

[0058] Graph 600 may include a representation of crosstalk data determined by performing a high frequency electromagnetic field simulation of a microwave signal transmitted through fabricated device 500, where the y-axis may represent decibels (dB) and the x-axis may represent frequency in gigahertz (GHz). Graph 600 may include plot line 602, plot line 604, plot line 606, and / or plot line 608, which may represent data corresponding to one or more components of simulated device 500. For example, plot line 602 may represent transmission and plot line 604 may represent reflection. In another example, plot line 606 and / or plot line 608 may represent crosstalk that may occur between thermal decoupling devices 110a and 110b of device 500, or crosstalk that may occur between conductive components coupled to thermal decoupling devices 110a, 110b (e.g., signal vias 112a, 112b, wire bonds 114a, 114b, signal lines 204a, 204b, etc.). In this example, graph 600, plot line 606, and / or plot line 608 may represent a crosstalk value of approximately −90 dB corresponding to device 500. In this example, such a crosstalk value of approximately −90 dB may occur at a frequency of approximately 5 GHz, a frequency commonly used to control superconducting qubits.

[0059] FIG. 7 is an orthogonal view of a system 700 that can facilitate transmission of microwave signals to one or more cryogenic stages of a cryocooler.

[0060] System 700 may include one or more monolithic signal carrier devices 702a, 702b coupled to one or more cryogenic plates 120 of a cryocooler via one or more heat sinks 118a, 118b. The monolithic signal carrier devices 702a, 702b may include examples of devices 100a, 100b, 200a, 200b, 200c, or 300 or combinations thereof. For example, the monolithic signal carrier devices 702a, 702b may include an example of device 300, in which case each monolithic signal carrier device 702a, 702b may include one or more thermal decoupling devices 110a, 110n (where n represents the total number of thermal decoupling devices 110) coupled to a first ground layer section 102a, a signal layer section 104a, and a signal layer section 104b as described above with reference to the thermal decoupling device 110 and FIG. 1A.

[0061] FIG. 8 is a top view of a system 800 that can facilitate the transmission of microwave signals to one or more cryogenic stages of a cryocooler.

[0062] System 800 may include an example of system 700, in which case system 800 may include a plurality of monolithic signal carrier devices 702a, 702b, 702c, 702d, 702n (where n represents the total number of monolithic signal carrier devices 702). System 800 may include such a plurality of monolithic signal carrier devices 702a, 702b, 702c, 702d, 702n coupled to one or more cryogenic plates 120 of a cryocooler via a plurality of heat sinks 118a, 118b, 118c, 118d, 118n (where n represents the total number of heat sinks 118).

[0063] FIG. 9 is a side view of a system 900 that can facilitate the transmission of microwave signals to one or more cryogenic stages of a cryocooler.

[0064] System 900 may include an embodiment of system 700 and / or system 800. System 900 may include a cryocooler 902. Cryocooler 902 may include a dilution refrigerator. System 900 may include one or more monolithic signal carrier devices 702a, 702n (where n represents the total number of monolithic signal carrier devices 702) that may extend through one or more cryogenic stages of cryocooler 902. For example, as shown in FIG. 9 , the monolithic signal carrier devices 702a, 702n of system 900 may extend through one or more cryogenic plates 120a, 120b, 120c, 120d, 120e, 120n (where n represents the total number of cryogenic plates 120) of cryocooler 902.

[0065] The monolithic signal carrier devices 702a, 702n of the system 900 may include one or more ground layer sections and / or one or more signal layer sections, and such ground layer sections and / or signal layer sections may be separated by one or more thermal barriers. For example, the monolithic signal carrier devices 702a, 702n of the system 900 may include one or more first ground layer sections 102a, 102b, 102c, 102d, 102n (where n represents the total number of first ground layer sections 102) and / or one or more signal layer sections 104a, 104b, 104c, 104d, 104n (where n represents the total number of signal layer sections 104), and such first ground layer sections 102a, 102b, 102c, 102d, 102n and / or signal layer sections 104a, 104b, 104c, 104d, 104n may be separated by one or more thermal barriers 108 (not shown in FIG. 9).

[0066] The monolithic signal carrier devices 702a, 702n of the system 900 may include one or more thermal decoupling devices coupled to a section of the ground layer or a section of the signal layer or both at a thermal barrier, and the thermal decoupling devices can thermally couple the section of the ground layer and the section of the signal layer. For example, the monolithic signal carrier devices 702a, 702n of the system 900 may include one or more thermal decoupling devices 110 (not shown in FIG. 9) coupled to a first ground layer section 102a, 102b, 102c, 102d, 102n or a signal layer section 104a, 104b, 104c, 104d, 104n or both at the thermal barrier 108, and such thermal decoupling devices 110 can thermally couple the first ground layer section 102a, 102b, 102c, 102d, 102n and the signal layer section 104a, 104b, 104c, 104d, 104n (as described above with reference to FIG. 1A, for example).

[0067] One or more monolithic signal carrier devices 702a, 702n of system 900 may be coupled to one or more cryogenic cold plates 120a, 120b, 120c, 120d, 120e, 120n of cryocooler 902. For example, monolithic signal carrier devices 702a, 702n of system 900 may be coupled (e.g., electrically, mechanically, physically, thermally, etc.) to cryogenic cold plates 120a, 120b, 120c, 120d, 120e, 120n via one or more heat sinks, such as heat sink 118 (not shown in FIG. 9 ). The first ground layer segments 102a, 102b, 102c, 102d, 102n may be coupled to the cryogenic plates 120a, 120b, 120c, 120d, 120e, 120n by heat sinks 118 that may thermally couple such first ground layer segments 102a, 102b, 102c, 102d, 102n to the cryogenic plates 120a, 120b, 120c, 120d, 120e, 120n. The thermal barrier 108 of the monolithic signal carrier device 702a, 702n may separate the first ground layer segments 102a, 102b, 102c, 102d, 102n, which may be thermally coupled to the cryogenic plates 120a, 120b, 120c, 120d, 120e, 120n via heat sinks as described above. The thermal barrier 108 may thermally isolate each such first ground layer section 102a, 102b, 102c, 102d, 102n, which may extend through the cryogenic plates 120a, 120b, 120c, 120d, 120e, 120n.

[0068] The cryogenic plate 120n of the cryogenic cooler 902 can include a mixing chamber stage having one or more quantum computing devices (e.g., a quantum computer, a quantum processor, quantum hardware, a quantum circuit, etc.). The monolithic signal carrier devices 702a, 702n of the system 900 can be coupled (e.g., electrically, mechanically, operationally, physically, etc.) to such a quantum computing device so that the monolithic signal carrier devices 702a, 702n can facilitate the transmission of microwave signals to such a quantum computing device (e.g., via a vector network analyzer (VNA)). For example, one or more signal lines 204 (not shown in FIG. 9) of the monolithic signal carrier devices 702a, 702n can be coupled (e.g., electrically, mechanically, operationally, physically, etc.) to such a quantum computing device so that the monolithic signal carrier devices 702a, 702n or the signal lines 204 or both can facilitate the transmission of microwave signals to such a quantum computing device (e.g., via a vector network analyzer (VNA)).

[0069] The monolithic signal carrier devices of the present disclosure (e.g., device 100a, device 100b, device 300, device 500, monolithic signal carrier devices 702a, 702b, 702c, 702d, 702n, etc.) can be monolithic signal carrier devices related to various technologies. For example, the monolithic signal carrier devices of the present disclosure (e.g., device 100a, device 100b, device 300, device 500, monolithic signal carrier devices 702a, 702b, 702c, 702d, 702n, etc.) can be related to cryogenic technology, cryogenic cooler technology, microwave signal carrier technology, monolithic signal carrier device technology, semiconductor manufacturing technology, printed circuit board technology, quantum computing device technology, quantum circuit technology, qubit (qubit) technology, circuit quantum electrodynamics (circuit QED) technology, quantum computing technology, scalable quantum computing architecture technology, surface code architecture technology, surface code error correction architecture technology, quantum hardware technology, or other technologies or combinations thereof.

[0070] The monolithic signal carrier devices of the present invention (e.g., device 100a, device 100b, device 300, device 500, monolithic signal carrier devices 702a, 702b, 702c, 702d, 702n, etc.) can bring about technical improvements to systems, devices, components, operational steps, or processing steps or combinations thereof related to the various technologies described above. For example, the monolithic signal carrier devices of the present invention can be used to transmit independent microwave signals to each quantum computing device or qubit or both in the mixing chamber stage of a cryogenic cooler. A large number (e.g., about 1000 or more) of independent microwave signal transmission paths (e.g., signal layer sections 104a, 104b, 104c, 104d, 104n, signal lines 204a, 204b, etc.) can be provided. In another example, the monolithic signal carrier devices of the present invention can extend through multiple stages of a cryogenic cooler without using some components (e.g., subminiature version A (SMA) partitions, coaxial cables, etc.) employed in state-of-the-art systems, thereby eliminating the need for such components. In another example, the monolithic signal carrier devices of the present invention can be coupled to one or more cryogenic plates of a cryogenic cooler by a flexible heat sink that allows the monolithic signal carrier device of the present disclosure and the cryogenic plate to expand and contract independently according to the varying temperatures of each cryogenic stage of the cryogenic cooler.

[0071] The monolithic signal carrier device of the present invention can provide technical improvements to processing units associated with quantum computing devices (e.g., quantum processors, quantum hardware, etc.), circuit QED systems, or superconducting quantum circuits, or combinations thereof. For example, as described above, the monolithic signal carrier device of the present invention can increase the number of independent microwave signal transmission paths available for transmitting microwave signals to each quantum computing device in a mixing chamber stage of a cryogenic refrigerator. In this embodiment, such quantum computing devices can include quantum processors, and by increasing the number of independent microwave signals available for transmission to such quantum processors, the monolithic signal carrier device of the present disclosure can facilitate improved performance of such quantum processors (e.g., improved error correction, improved processing time, etc.).

[0072] The monolithic signal carrier device of the present invention may employ hardware and / or software to solve problems that are highly technical in nature, not abstract, and not feasible as a set of mental activities by a human being. For example, the monolithic signal carrier device of the present invention may facilitate the transmission of microwave signals to a quantum computing device in the mixing chamber stage of a cryogenic refrigerator.

[0073] It should be understood that the monolithic signal carrier device of the present invention can use various combinations of electrical components, mechanical components, and circuits that cannot be reproduced in the human brain or performed by humans. For example, the transmission of microwave signals to one or more cryogenic stages of a cryogenic cooler is an operation beyond the capabilities of the human brain. For example, the amount of data transmitted by the monolithic signal carrier device of the present invention over a certain period, the speed at which such data is transmitted, or the type of data transmitted or combinations thereof can be greater, faster, or different, or combinations thereof, than the amount, speed, or type of data or combinations thereof that can be transmitted by the human brain over the same period.

[0074] The monolithic signal carrier device of the present invention can also be fully operable (e.g., fully powered on, fully executed, etc.) for the execution of one or more other functions while also performing the microwave signal transmission process mentioned above. It should be understood that such simultaneous multiple operations are beyond the capabilities of the human brain. It should also be understood that the monolithic signal carrier device of the present invention can contain information that cannot be manually obtained by an entity such as a human user. For example, the type, amount, or diversity of information or combinations thereof that can be transmitted through one or more of the monolithic signal carrier device embodiments described herein can be more complex than the information manually obtained by a human user.

[0075] FIG. 10 is a flowchart of a computer-implemented method 1000 that can facilitate the transmission of microwave signals to one or more cryogenic stages of a cryogenic cooler.

[0076] Method 1000 can be implemented by a computing system (e.g., the operating environment 1200 shown in FIG. 12 and described below), or a computing device (e.g., the computer 1212 shown in FIG. 12 and described below), or both. Such a computing system (e.g., operating environment 1200) or such a computing device (e.g., computer 1212) or both may include one or more processors and one or more memory devices capable of storing executable instructions that, when executed by the one or more processors, can facilitate the execution of the operations described herein, including the operations of method 1000 shown in FIG. 10. By way of non-limiting example, the one or more processors can facilitate the execution of the operations described herein, such as the execution of method 1000, by instructing, or controlling, or both, one or more systems and / or devices capable of performing semiconductor fabrication (e.g., the fabrication of integrated circuits in semiconductor devices).

[0077] At 1002, a ground layer (e.g., the first ground layer or the first ground layer sections 102a, 102b or both of device 100a) and a signal layer (e.g., the signal layer or the signal layer sections 104a, 104b or both of device 100a) in a monolithic signal carrier device (e.g., device 100a, device 100b, device 300, device 500, etc.) are formed (e.g., by computer 1212). At 1004, a thermal barrier (e.g., thermal barrier 108) is formed in the ground layer and the signal layer (e.g., by computer 1212). At 1006, a thermal decoupling device (e.g., thermal decoupling device 110) is coupled to the ground layer (e.g., the first ground layer section 102a) and the signal layer (e.g., the signal layer sections 104a, 104b) in the thermal barrier (e.g., by computer 1212). Depending on the embodiment, such forming steps or coupling steps or both of operations 1002, 1004 or 1006 or combinations thereof can be performed (e.g., by computer 1212) using one or more techniques for fabricating integrated circuits in a semiconductor device (e.g., as described above with reference to FIG. 1A).

[0078] FIG. 11 shows a flowchart of a computer-implemented method 1100 that can facilitate the transmission of microwave signals to one or more cryogenic stages of a cryogenic cooler.

[0079] Method 1100 can be implemented by a computing system (e.g., the operating environment 1200 shown in FIG. 12 and described below), or a computing device (e.g., the computer 1212 shown in FIG. 12 and described below), or both. Such a computing system (e.g., operating environment 1200) or such a computing device (e.g., computer 1212) or both may include one or more processors and one or more memory devices capable of storing executable instructions that, when executed by the one or more processors, facilitate execution of the operations described herein, including the operations of method 1100 shown in FIG. 11. The one or more processors may facilitate execution of the operations described herein, such as execution of method 1100, by instructing or controlling, or both, one or more systems or devices (e.g., a vector network analyzer (VNA)) capable of performing such operations, or both.

[0080] At 1102, couple a monolithic signal carrier device (e.g., devices 100a, 100b, 300, 500, 702a, 702b, 702c, 702d, 702n, etc.) to one or more cryogenic plates (e.g., cryogenic plates 120, 120a, 120b, 120c, 120d, 120e, 120n, etc.) of a cryogenic cooler (e.g., cryogenic cooler 902) (e.g., via heat sinks 118, 118a, 118b, 118c, 118d, 118n, etc.). At 1104, transmit a microwave signal through the monolithic signal carrier device to one or more cryogenic stages (e.g., a mixing chamber) of the cryogenic cooler (e.g., via computer 1212 or a vector network analyzer (VNA), or both, as described above with reference to FIG. 1A).

[0081] For simplicity of explanation, a computer-implemented method is illustrated and described as a series of operations. The innovation is not limited by the illustrated operations or the order of operations or both. For example, the operations may be performed in various orders, or in parallel, or both, and may be performed with other operations not presented or described herein. It should also be understood and appreciated that not all of the illustrated operations may be required to implement the method according to the disclosed subject matter. Further, one skilled in the art will understand and appreciate that the method may alternatively be represented as a series of interrelated states by a state diagram or events. Further, it should be understood that the methods disclosed throughout the following and the entire specification may be stored on a manufactured article to facilitate transferring and transmitting such methods to a computer. As used herein, the term manufactured article is intended to encompass a computer program accessible from any computer-readable device or storage medium.

[0082] To provide context for various aspects of the disclosed subject matter, FIG. 12 and the following description are intended to provide an overview of a suitable environment in which various aspects of the invention may be implemented. FIG. 12 shows a block diagram of an operating environment.

[0083] Referring to FIG. 12, an operating environment 1200 suitable for implementing various aspects of the present disclosure can also include a computer 1212. The computer 1212 can also include a processing unit 1214, a system memory 1216, and a system bus 1218. The system bus 1218 couples system components including, but not limited to, the system memory 1216 to the processing unit 1214. The processing unit 1214 can be any of a variety of available processors. Dual microprocessors and other multiprocessor architectures can also be employed as the processing unit 1214. The system bus 1218 can use any of a variety of available bus architectures, including, but not limited to, Industry Standard Architecture (ISA), Micro Channel Architecture (MCA), Extended ISA (EISA), Intelligent Drive Electronics (IDE), VESA Local Bus (VLB), Peripheral Component Interconnect (PCI), Card Bus, Universal Serial Bus (USB), Advanced Graphics Port (AGP), Firewire (IEEE1394), and Small Computer System Interface (SCSI), a memory bus or memory controller, a peripheral bus or external bus, or a local bus or combinations thereof, and can be any of several types of bus structures including a memory bus or memory controller, a peripheral bus or external bus, or a local bus or combinations thereof.

[0084] System memory 1216 can also include volatile memory 1220 and non-volatile memory 1222. A Basic Input / Output System (BIOS) containing basic routines for transferring information between elements within computer 1212 at startup and the like is stored in non-volatile memory 1222. Computer 1212 can also include removable / non-removable volatile / non-volatile computer storage media. FIG. 12 shows, for example, disk storage 1224. Disk storage 1224 can include, but is not limited to, devices such as magnetic disk drives, floppy (R) disk drives, tape drives, Jaz drives, Zip drives, LS-100 drives, flash memory cards, or memory sticks. Disk storage 1224 can include storage media separately or in combination with other storage media. To facilitate connection of disk storage 1224 to system bus 1218, typically a removable or non-removable interface such as interface 1226 is used. FIG. 12 also illustrates software that serves as an intermediary between the user and the basic computer resources in a suitable operating environment 1200. Such software can include, for example, operating system 1228. Operating system 1228 can be stored on disk storage 1224 and serves to control and allocate the resources of computer 1212.

[0085] System application 1230 utilizes the management of resources by operating system 1228 via program modules 1232 and program data 1234 stored, for example, in system memory 1216 or disk storage 1224. It should be understood that the present disclosure can be implemented with various operating systems or combinations of operating systems. A user inputs commands or information into computer 1212 via input device 1236. Input device 1236 includes, but is not limited to, pointing devices such as a mouse, trackball, stylus, touch pad, keyboard, microphone, joystick, game pad, satellite broadcast receiving antenna, scanner, TV tuner card, digital camera, digital video camera, web camera, etc. These and other input devices are connected to processing unit 1214 by system bus 1208 via interface port 1238. Interface port 1238 includes, for example, serial ports, parallel ports, game ports, and universal serial bus (USB). Output device 1240 uses some of the same types of ports as input device 1236. Thus, for example, a USB port can be used to provide input to computer 1212 and output information from computer 1212 to output device 1240. Among other output devices 1240, output adapter 1242 is shown to illustrate that some output devices 1240, such as monitors, speakers, and printers, require a dedicated adapter. Output adapter 1242 includes, by way of example and not limitation, video cards and sound cards that provide a means of connection between output device 1240 and system bus 1218. Note that other devices or systems of devices or both, such as remote computer 1244, provide both input and output capabilities.

[0086] Computer 1212 can operate in a networked environment using logical connections to one or more remote computers such as remote computer 1244. Remote computer 1244 can be a computer, server, router, network PC, workstation, microprocessor-based device, peer device, or other common network node, and typically can include many or all of the elements described in connection with computer 1212. For simplicity, only memory storage device 1246 is shown with remote computer 1244. Remote computer 1244 is logically connected to computer 1212 via network interface 1248 and then physically connected via communication connection 1250. Network interface 1248 includes wired or wireless or both communication networks such as local area network (LAN), wide area network (WAN), cellular network, etc. LAN technologies include Fiber Distributed Data Interface (FDDI), Copper Distributed Data Interface (CDDI), Ethernet(R), Token Ring, etc. WAN technologies include, but are not limited to, point-to-point links, Integrated Services Digital Communication Network (ISDN) and its variants, packet switched networks, and circuit switched networks such as Digital Subscriber Line (DSL). Communication connection 1250 refers to the hardware / software employed to connect network interface 1248 to system bus 1218. Communication connection 1250 is shown inside computer 1212 for clarity of illustration, but can also be external to computer 1212. The hardware / software for connection to network interface 1248 can include, by way of example only, modems including conventional telephone-grade modems, cable modems, and DSL modems, ISDN adapters, and Ethernet(R) cards, including built-in and external technologies.

[0087] The present invention may be a system, method, apparatus, or computer program product at any possible integrated technical detail level, or a combination thereof. The computer program product may include a computer-readable storage medium (or media) having computer-readable program instructions for causing a processor to implement aspects of the present invention. The computer-readable storage medium can be a tangible device that can hold and store instructions for use by an instruction execution device. The computer-readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination thereof. A non-exhaustive list of more specific examples of the computer-readable storage medium may also include the following. That is, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disk read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy (R) disk, a punch card, or a mechanically encoded device such as a raised structure in a groove in which instructions are recorded, and any suitable combination thereof may be included. As used herein, a computer-readable storage medium should not be construed to be a transitory signal itself, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide or other transmission medium (e.g., an optical pulse through an optical fiber cable), or an electrical signal transmitted via a wire.

[0088] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to respective computing / processing devices, or to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, or a wireless network, or combinations thereof. The network can include copper transmission cables, optical transmission fibers, wireless transmission, routers, firewalls, switches, gateway computers, or edge servers, or combinations thereof. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and transfers the computer-readable program instructions for storage on a computer-readable storage medium within each computing / processing device. The computer-readable program instructions for carrying out the operations of the present invention can be source code or object code written in any combination of one or more programming languages, including assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state-setting data, configuration data for integrated circuits, or object-oriented programming languages such as Smalltalk(R), C++, and procedural programming languages such as the "C" programming language, or similar programming languages. The computer-readable program instructions may be executed entirely on the user's computer, partly on the user's computer as a stand-alone software package, partly on the user's computer and partly on a remote computer, or entirely on the remote computer or server.In the latter scenario, the remote computer can connect to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection can be made to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, to execute aspects of the present invention, an electronic circuit, including, for example, a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), can execute computer-readable program instructions by personalizing the electronic circuit using the state information of the computer-readable program instructions.

[0089] In this specification, aspects of the present invention are described with reference to flowchart diagrams and / or block diagrams of methods, apparatuses (systems), and computer program products according to embodiments of the present invention. It will be understood that each block of the flowchart diagrams and / or block diagrams, and combinations of blocks in the flowchart diagrams and / or block diagrams, can be implemented by computer-readable program instructions. These computer-readable program instructions are provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus so that the instructions executed by the processor of the computer or other programmable data processing apparatus form means for implementing the functions / operations specified in one or more blocks of the flowchart or block diagram or both. These computer-readable program instructions can be stored in a computer-readable storage medium that includes instructions for implementing the aspects of the functions / operations specified in one or more blocks of the flowchart or block diagram or both, and can be stored in the computer-readable storage medium to direct a computer, programmable data processing apparatus, or other device or combinations thereof to function in a particular manner. The computer-readable program instructions can be loaded onto a computer, other programmable apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus, or other device to implement the functions / operations specified in one or more blocks of the flowchart or block diagram or both.

[0090] The flowcharts and block diagrams in the drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagram may represent a module, segment, or portion of one or more executable instructions for implementing the specified logical function. In some alternative implementations, the functions noted in the blocks may occur out of the order noted in the figures. For example, two blocks shown in succession may, in accordance with the functionality involved, actually be executed substantially in parallel, or the blocks may sometimes be executed in the reverse order. It should also be noted that each block of the block diagrams or flowchart diagrams, or combinations of blocks in the block diagrams or flowchart diagrams, can be implemented by a dedicated hardware-based system that performs the specified functions or operations, or implements a combination of dedicated hardware and computer instructions.

[0091] Although the subject matter has been described above in the general context of computer-executable instructions of a computer program product that runs on one or more computers or both, those skilled in the art will understand that the present disclosure can also be implemented in combination with other program modules and can be implemented. Generally, program modules include routines, programs, components, data structures, etc. that perform specific tasks or implement specific abstract data types or both. Also, those skilled in the art will understand that the computer-implemented method of the present invention can be implemented in other computer system configurations including single-processor or multi-processor computer systems, minicomputing devices, mainframe computers, and computers, handheld computing devices (e.g., PDAs, phones), microprocessor-based or programmable consumer or industrial electronic devices. Exemplary embodiments can also be implemented in a distributed computing environment where tasks are performed by remote processing devices connected by a communication network. However, some embodiments, if not all embodiments of the present disclosure, can be implemented on a stand-alone computer. In a distributed computing environment, program modules can be located on both local memory storage devices and remote memory storage devices.

[0092] As used in this application, terms such as "component", "system", "platform", "interface", etc. can refer to, include, or both, a computer-related entity or an entity related to an operative machine with one or more specific functions. Entities disclosed herein can be hardware, a combination of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process running on a processor, a processor, an object, an executable file, a thread of execution, a program, or a computer, or a combination thereof. By way of example, both an application running on a server and the server can be components. One or more components can exist within a process or a thread of execution or both, and a component can exist locally on one computer or be distributed across two or more computers or both. In another example, each component can be executed from various computer-readable media storing various data structures. A component can communicate through a local process or a remote process or both, such as in accordance with signals having one or more data packets (e.g., data from one component interacting with another component within a local system, within a distributed system, or with another system via a network such as the Internet, or a combination thereof). As another example, a component can be an apparatus with specific functions provided by mechanical parts operated by an electrical circuit or an electronic circuit, which is operated by a software application or a firmware application executed by a processor. In such a case, the processor can be an internal or external processor of the apparatus and can execute at least a portion of the software application or the firmware application.As yet another example, the component can be a device that provides a particular function by an electronic component without mechanical parts, in which case the electronic component can include a processor or other means that executes software or firmware that at least partially provides the function of the electronic component. In one aspect, the component can emulate the electronic component, for example, via a virtual machine in a cloud computing system.

[0093] Also, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or". That is, unless otherwise specified or clear from the context, "X adopts A or B" is intended to mean any of the natural inclusive substitutions. That is, "X adopts A or B" is satisfied under any of the above cases when X adopts A, X adopts B, or X adopts both A and B. Also, unless otherwise specified or it is clear from the context that the singular form is indicated, the articles "a" and "an" used in this specification and the accompanying drawings should be broadly construed to mean "one or more". The terms "example" or "exemplary" or both used in this specification are used to mean an example, instance, or illustration. To avoid doubt, the subject matter disclosed in this specification is not limited by such examples. Further, any aspect or design described as "example" or "exemplary" or both in this specification should not necessarily be construed as more preferred or advantageous than other aspects or designs, nor does it mean excluding equivalent exemplary structures and techniques known to those skilled in the art.

[0094] As used herein, the term "processor" can refer to substantially any computing processing unit or device, including but not limited to a single-core processor, a single processor with software multi-threading capabilities, a multi-core processor, a multi-core processor with software multi-threading capabilities, a multi-core processor with hardware multi-threading technology, a parallel platform, and a parallel platform with distributed shared memory. Further, a processor can refer to an integrated circuit, an application-specific integrated circuit (ASIC), a digital signal processor (DSP), a field-programmable gate array (FPGA), a programmable logic controller (PLC), a complex programmable logic device (CPLD), discrete gate or transistor logic, discrete hardware components, or any combination thereof, designed to perform the functions disclosed herein. Additionally, a processor can utilize nanoscale architectures such as, but not limited to, molecular and quantum dot-based transistors, switches, and gates, to optimize the space utilization of a user device or improve performance. A processor can also be implemented as a combination of computing processing units. In the present disclosure, terms such as "store", "storage", "data store", "data storage", "database", and substantially any other information storage component related to the operation and function of a component are used to refer to an entity realized in a "memory component", "memory", or a component including a memory. It should be understood that the memory or memory component or both described herein can be volatile memory or non-volatile memory, or can include both volatile and non-volatile memory.By way of example, and not limitation, non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable ROM (EEPROM), flash memory, or non-volatile random access memory (RAM) (such as ferroelectric RAM (FeRAM)). Volatile memory can include, for example, RAM that can function as an external cache memory. By way of example, and not limitation, RAM is available in many forms such as synchronous RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchlink DRAM (SLDRAM), direct Rambus RAM (DRRAM), direct Rambus dynamic RAM (DRDRAM), and Rambus dynamic RAM (RDRAM). Also, the memory components of the system or computer-implemented method disclosed herein are intended to include these and any other suitable types of memory, but are not limited to including these.

[0095] The above-described content includes only examples of systems and computer-implemented methods. Of course, it is impossible to describe every possible combination of components or computer-implemented methods for the purposes of explaining the present disclosure, but those skilled in the art will understand that many other combinations and substitutions are possible. Also, to the extent that terms such as "include", "has", "possesses", etc. are used in the detailed description, claims, appendices, and accompanying drawings, such terms are intended to be as inclusive as the term "comprising" as interpreted when "comprising" is employed as a transitional term in a claim.

[0096] The descriptions of the various embodiments of the present invention are presented for illustrative purposes and are not intended to be exhaustive. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope of the present invention. The terms used herein are chosen in order to best explain the principles of the present invention, the practical application, or a technical improvement over the technologies found in the marketplace, or to enable those of ordinary skill in the art to understand the present invention.

Claims

1. A device for facilitating the transmission of microwave signals to a quantum computing device in a cryogenic cooler, comprising: a cryogenic plate (120) of the cryogenic cooler; a flexible heat sink (118); a monolithic signal carrier device including heat barriers (108) disposed within a first ground layer (102) and within a signal layer (104); a second ground layer (106), wherein the signal layer is disposed between the first ground layer and the second ground layer; the first ground layer includes first installation layer sections (102a and 102b), separated by a heat barrier; the second ground layer includes second installation layer sections (106a and 106b), separated by a heat barrier; the signal layer includes signal layer sections (104a and 104b), separated by a heat barrier; a separation section (116) formed within the first ground layer section (102a and 102b), providing separation of signal vias from the first ground layer; a material (122) included between the first ground layer and the signal layer and between the signal layer and the second ground layer, the material including a heat barrier and a separation section; a thermal decoupling device (110) coupled to the ground layer at the heat barrier, the thermal decoupling device being coupled to the signal layer section (104a) by a wire bond (114a) and a signal via (112a), or coupled to the signal layer section (104b) by a wire bond (114b) and a signal via (112b); the thermal decoupling device is thermally coupled to the first ground layer or electrically coupled to the signal layer by the wire bond or the signal via; the flexible heat sink (118) is coupled to the first ground layer and the cryogenic plate, the heat sink thermally equilibrating the first ground layer and the cryogenic plate and equalizing the temperature between the cryogenic plate and the signal layer section. A device.

2. The device according to claim 1, wherein the signal layer includes one or more stripline microwave transmission lines.

3. The device according to claim 1, wherein the heat sink includes at least one of a thermally conductive heat sink or an electrically conductive heat sink.

4. The device according to claim 1, wherein the monolithic signal carrier device includes a monolithic dielectric circuit board or a monolithic organic laminated circuit board.

5. The device according to claim 1, further comprising coupling a shield to the ground layer.

6. The shield electrically isolates the thermal decoupling device, thereby facilitating reduction of crosstalk between at least one of the thermal decoupling device, or one or more wire bonds coupling the thermal decoupling device to the signal layer, or the plurality of stripline microwave transmission lines of the signal layer. The device according to claim 5.

7. The shield is selected from the group consisting of a copper-nickel shield, a stainless steel shield, a niobium shield, an aluminum shield, and a superconducting shield. The device according to claim 5.

8. The device according to claim 5, further comprising a heat sink coupled to the ground layer and a cryogenic plate of a cryogenic cooler, the heat sink thermally coupling the ground layer to the cryogenic plate, and the thermal barrier separating sections of the ground layer thermally coupled to different cryogenic plates.

9. A method for facilitating transmission of microwave signals to a quantum computing device in a cryogenic cooler, comprising: forming a cryogenic plate (120) of a cryogenic cooler; forming a flexible heat sink (118); forming a monolithic signal carrier device including a thermal barrier (108) disposed within a first ground layer (102) and within a signal layer (104); forming a second ground layer (106), the signal layer being disposed between the first ground layer and the second ground layer; the first ground layer includes first installation layer sections (102a and 102b) separated by a thermal barrier; the second ground layer includes second installation layer sections (106a and 106b) separated by a thermal barrier; the signal layer includes signal layer sections (104a and 104b) separated by a thermal barrier; a separation section (116) is formed within the first ground layer section (102a and 102b) resulting in separation of signal vias from the first ground layer; a material (122) is included between the first ground layer and the signal layer and between the signal layer and the second ground layer, the material including a thermal barrier and a separation section. The thermal decoupling device (110) is coupled to the ground layer in the thermal barrier, and the thermal decoupling device is coupled to the signal layer section (104a) by wire bonds (114a) and signal vias (112a), and is also coupled to the signal layer section (104b) by wire bonds (114b) and signal vias (112b). The thermal decoupling device is thermally coupled to the first ground layer or electrically coupled to the signal layer by the wire bond or the signal via. The flexible heat sink (118) is coupled to the first ground layer and the cryogenic plate, and the heat sink equalizes the temperature of the first ground layer and the cryogenic plate with the temperature of the signal layer section. Method.

10. The method according to claim 9, further comprising coupling a shield to the ground layer.

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