Chip Resistors

Abstract

This chip resistor comprises a substrate, a pair of top electrodes, a resistor, a pair of rear electrodes, and a pair of side electrodes. The substrate has a top surface, a rear surface, and a pair of side surfaces. The top surface and the rear surface mutually face opposite sides in the thickness direction of the substrate. The pair of side surfaces are separated from each other in one direction orthogonal to the thickness direction and are connected to the top surface and the rear surface. The pair of top electrodes are separated from each other in the one direction and are in contact with the top surface. The resistor is disposed on the top surface and is connected to the pair of top electrodes. The pair of rear electrodes are separated from each other in the one direction and are connected to the rear surface. The pair of rear electrodes are separated from each other in the one direction and are connected to the rear surface. Each of the pair of rear electrodes has a first layer and a second layer. The first layer is in contact with the rear surface. The second layer covers at least a portion of the first layer and is made of a material containing metal particles and synthetic resins.

Description

[Technical Field]

[0001] The present disclosure relates to chip resistors. [Background technology]

[0002] Chip resistors that are surface-mounted on wiring boards for various electronic devices have been widely known. Patent Document 1 discloses an example of a chip resistor. The chip resistor includes an insulating substrate, a pair of upper electrodes and a pair of back electrodes disposed on both ends of the insulating substrate, a resistor electrically connected to the pair of upper electrodes, and a pair of end electrodes that electrically connect the pair of upper electrodes and the pair of back electrodes to each other.

[0003] The chip resistor is mounted on a wiring board via solder. When the chip resistor is in use, heat is generated from the resistive element. This causes thermal stress to act on the solder due to the difference in thermal strain between the pair of back electrodes and the solder. When the magnitude of the thermal stress is relatively large, cracks may occur in the solder if the thermal stress acts repeatedly on the solder. If cracks occur in the solder, there is a risk that the current path between the wiring board and the chip resistor will be obstructed. Therefore, measures are required for the chip resistor to prevent cracks from occurring in the solder due to thermal stress. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2008-53251 Summary of the Invention [Problem to be solved by the invention]

[0005] In view of the above circumstances, the objective of the present disclosure is to provide a chip resistor that can prevent cracks from occurring in the solder interposed between a wiring substrate and a pair of back electrodes when the chip resistor is in use. [Means for solving the problem]

[0006] The chip resistor provided by the present disclosure comprises a substrate having an upper surface and a lower surface facing opposite each other in the thickness direction, and a pair of side surfaces spaced apart in a direction perpendicular to the thickness direction and connected to the upper surface and the lower surface, a pair of upper surface electrodes spaced apart in the one direction and in contact with the upper surface, a resistor disposed on the upper surface and connected to the pair of upper surface electrodes, a pair of lower surface electrodes spaced apart in the one direction and in contact with the lower surface, and a pair of side electrodes in contact with the pair of side surfaces and connected to the pair of upper surface electrodes and the pair of lower surface electrodes, each of the pair of lower surface electrodes having a first layer in contact with the lower surface and a second layer covering at least a portion of the first layer, the second layer being made of a material containing metal particles and a synthetic resin.

[0007] The features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a plan view of a chip resistor according to a first embodiment of the present disclosure. [Figure 2] FIG. 2 is a plan view corresponding to FIG. 1, showing a pair of external electrodes and an upper layer of a protective layer. [Figure 3] FIG. 2 is a bottom view of the chip resistor shown in FIG. [Figure 4] FIG. 4 is a bottom view corresponding to FIG. 3, showing a pair of external electrodes in perspective. [Figure 5] FIG. 2 is a cross-sectional view taken along line VV in FIG. [Figure 6] FIG. 4 is a cross-sectional view of a chip resistor according to a modified example of the first embodiment of the present disclosure. [Figure 7] 2A to 2C are bottom views illustrating the manufacturing process of the chip resistor shown in FIG. [Figure 8] 2A to 2C are bottom views illustrating the manufacturing process of the chip resistor shown in FIG. [Figure 9] 2A to 2C are plan views illustrating a manufacturing process of the chip resistor shown in FIG. [Figure 10] 2A to 2C are plan views illustrating a manufacturing process of the chip resistor shown in FIG. [Figure 11] 2A to 2C are plan views illustrating a manufacturing process of the chip resistor shown in FIG. [Figure 12] 2A to 2C are plan views illustrating a manufacturing process of the chip resistor shown in FIG. [Figure 13] 2A to 2C are plan views illustrating a manufacturing process of the chip resistor shown in FIG. [Figure 14] 2A to 2C are plan views illustrating a manufacturing process of the chip resistor shown in FIG. [Figure 15] FIG. 15 is a cross-sectional view taken along line XV-XV in FIG. [Figure 16] 2A to 2C are cross-sectional views illustrating a manufacturing process of the chip resistor shown in FIG. [Figure 17] 2A to 2C are plan views illustrating a manufacturing process of the chip resistor shown in FIG. [Figure 18] 2A to 2C are cross-sectional views illustrating a manufacturing process of the chip resistor shown in FIG. [Figure 19] FIG. 4 is a cross-sectional view of a chip resistor according to a second embodiment of the present disclosure. [Figure 20] FIG. 20 is a partially enlarged cross-sectional view of FIG. 19. [Figure 21] FIG. 10 is a cross-sectional view of a chip resistor according to a third embodiment of the present disclosure. [Figure 22] FIG. 22 is a partially enlarged cross-sectional view of FIG. 21. [Figure 23] 22A to 22C are plan views illustrating the manufacturing process of the chip resistor shown in FIG. 21. [Figure 24] 22A to 22C are plan views illustrating the manufacturing process of the chip resistor shown in FIG. 21. [Figure 25] FIG. 10 is a cross-sectional view of a chip resistor according to a fourth embodiment of the present disclosure. [Figure 26] FIG. 26 is a partially enlarged cross-sectional view of FIG. 25. [Figure 27] 26 is a plan view illustrating a manufacturing process of the chip resistor shown in FIG. 25. [Figure 28]26 is a plan view illustrating a manufacturing process of the chip resistor shown in FIG. 25. DETAILED DESCRIPTION OF THE INVENTION

[0009] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present disclosure will be described with reference to the accompanying drawings.

[0010] [First embodiment] A chip resistor A10 according to a first embodiment of the present disclosure will be described with reference to Figures 1 to 5. The chip resistor A10 includes a substrate 10, a resistor element 20, a pair of electrodes 30, and a protective layer 40. For ease of understanding, Figure 2 shows a pair of external electrodes 34 (described in detail below) that form part of the pair of electrodes 30, and an upper layer 42 (described in detail below) of the protective layer 40. For ease of understanding, Figure 4 shows a view through the pair of external electrodes 34.

[0011] In the explanation of the chip resistor A10 and the chip resistors A20 to A40 described later, for convenience, the thickness direction of the substrate 10 will be referred to as the "thickness direction z." A direction perpendicular to the thickness direction z will be referred to as the "first direction x." A direction perpendicular to both the thickness direction z and the first direction x will be referred to as the "second direction y."

[0012] The chip resistor A10 is surface-mounted on the wiring board of various electronic devices. The chip resistor A10 functions to limit the current flowing through the wiring board. The chip resistor A10 is a thick-film (metal glaze film) type resistor. As shown in FIG. 1, the chip resistor A10 has a rectangular shape when viewed along the thickness direction z. In this case, the first direction x corresponds to the longitudinal direction of the chip resistor A10. Alternatively, the chip resistor A10 may have a rectangular shape with the second direction y as the longitudinal direction when viewed along the thickness direction z.

[0013] As shown in FIGS. 1, 2, and 5, the substrate 10 is provided with a resistor 20, a pair of electrodes 30, and a protective layer 40. The substrate 10 is insulating. When viewed along the thickness direction, the substrate 10 has a rectangular shape with a pair of peripheral edges along the first direction x as its long sides. When the chip resistor A10 is used, heat is generated from the resistor 20, so the substrate 10 is required to have excellent heat dissipation properties. For this reason, it is desirable that the material of the substrate 10 has relatively high thermal conductivity. In the chip resistor A10, the substrate 10 is made of ceramics containing alumina (Al2O3).

[0014] As shown in FIG. 5, the substrate 10 has an upper surface 11, a rear surface 12, and a pair of side surfaces 13. The upper surface 11 and the rear surface 12 face opposite each other in the thickness direction z. The upper surface 11 faces upward in FIG. 5. The rear surface 12 faces downward in FIG. 5. When the chip resistor A10 is mounted on a wiring board, the rear surface 12 faces the wiring board. The pair of side surfaces 13 are connected to the upper surface 11 and the rear surface 12. As shown in FIGS. 2 and 4, the pair of side surfaces 13 are spaced apart from each other in the first direction x.

[0015] The resistor 20 is disposed on the upper surface 11 of the substrate 10, as shown in FIGS. 1, 2, and 5. When viewed along the thickness direction z, the resistor 20 has a strip shape extending in the first direction x. In the chip resistor A10, the resistor 20 is made of a material containing metal particles and glass. The metal particles are, for example, ruthenium oxide (RuO) or a silver (Ag)-palladium (Pd) alloy.

[0016] As shown in FIGS. 2 and 5, the resistor 20 has a trimming groove 21 formed therein that penetrates the resistor 20 in the thickness direction z. The trimming groove 21 is formed integrally with both the resistor 20 and a lower layer 41 (details of which will be described later) of the protective layer 40 that covers the resistor 20. In the example shown in chip resistor A10, the trimming groove 21 is L-shaped when viewed in the thickness direction z. One end of the resistor 20 in the second direction y is opened by the trimming groove 21. The shape of the trimming groove 21 when viewed along the thickness direction z is not limited to the example shown in chip resistor A10.

[0017] As shown in FIGS. 1 to 5, the pair of electrodes 30 are arranged on the substrate 10 while being spaced apart from each other in the first direction x. The pair of electrodes 30 are connected to the resistor 20 at both ends of the resistor 20 in the first direction x. When the chip resistor A10 is mounted on a wiring board, the pair of electrodes 30 are soldered to the wiring board. As a result, the pair of electrodes 30 form a conductive path between the resistor 20 and the wiring board. As shown in FIG. 5, each of the pair of electrodes 30 includes an upper electrode 31, a back electrode 32, a side electrode 33, and an external electrode 34.

[0018] As shown in Figures 2 and 5, the pair of upper surface electrodes 31 are spaced apart from each other in the first direction x and are in contact with the upper surface 11 of the substrate 10. The pair of upper surface electrodes 31 are connected to both ends of the resistor 20 in the first direction x. This allows the pair of upper surface electrodes 31 to be electrically connected to the resistor 20. Each of the pair of upper surface electrodes 31 is strip-shaped and extends in the second direction y. The pair of upper surface electrodes 31 is made of a material containing silver particles and glass.

[0019] 4 and 5, the pair of back surface electrodes 32 are spaced apart from each other in the first direction x and are in contact with the back surface 12 of the substrate 10. Each of the pair of back surface electrodes 32 has a strip shape extending in the second direction y. As shown in FIG. 5, each of the pair of back surface electrodes 32 has a first layer 321 and a second layer 322.

[0020] As shown in FIG. 5, the first layer 321 is in contact with the upper surface 11 of the substrate 10. In the chip resistor A10, the first layer 321 is made of an insulating material containing synthetic resin. The synthetic resin is, for example, epoxy resin. In the chip resistor A10, the first layer 321 reaches the boundary between one of the pair of side surfaces 13 of the substrate 10 and the rear surface 12.

[0021] As shown in FIG. 5, the second layer 322 covers at least a portion of the first layer 321. In the chip resistor A10, the second layer 322 covers the entire first layer 321. The second layer 322 is made of a material containing metal particles and synthetic resin. This makes the second layer 322 conductive. The metal particles contain silver. The synthetic resin is, for example, epoxy resin.

[0022] As shown in Figures 2, 4, and 5, the pair of side electrodes 33 contact the pair of side surfaces 13 of the substrate 10. The pair of side electrodes 33 are connected to the pair of top surface electrodes 31 and the pair of back surface electrodes 32. As a result, the pair of back surface electrodes 32 are electrically connected to the resistor 20 via the pair of side surface electrodes 33 and the pair of top surface electrodes 31. In the chip resistor A10, the pair of side surface electrodes 33 are made of a metal thin film. The metal thin film is made of an alloy containing nickel (Ni) and chromium (Cr).

[0023] As shown in FIG. 5, each of the pair of side electrodes 33 has an upper surface portion 331, a rear surface portion 332, and a side surface portion 333. As shown in FIGS. 2 and 5, the upper surface portion 331 overlaps the upper surface 11 of the substrate 10 when viewed along the thickness direction z and is in contact with one of the pair of upper surface electrodes 31. As shown in FIGS. 4 and 5, the rear surface portion 332 overlaps the rear surface 12 of the substrate 10 when viewed along the thickness direction z and is in contact with one of the second layers 322 of the pair of rear surface electrodes 32. As shown in FIG. 5, the side surface portion 333 contacts one of the pair of side surfaces 13 of the substrate 10 and one of the pair of upper surface electrodes 31. At both ends of the side surface portion 333 in the thickness direction z, the side surface portion 333 is connected to the upper surface portion 331 and the rear surface portion 332. In the chip resistor A10, the thicknesses of the upper surface portion 331, the rear surface portion 332, and the side surface portion 333 are all uniform.

[0024] 1, 3 and 5, the pair of external electrodes 34 covers the pair of top electrodes 31, the pair of back electrodes 32, and the pair of side electrodes 33. As a result, the pair of external electrodes 34 is electrically connected to all of the pair of top electrodes 31, the pair of back electrodes 32, and the pair of side electrodes 33. In addition, the pair of electrodes 30 is electrically connected to the resistor 20. The pair of external electrodes 34 is made of a plating layer.

[0025] 5, each of the pair of external electrodes 34 has an intermediate portion 341 and an outer portion 342. The intermediate portion 341 covers one of the pair of upper surface electrodes 31, one of the pair of back surface electrodes 32 overlapping the upper surface electrode 31 when viewed along the thickness direction, and one of the pair of side surface electrodes connected to the upper surface electrode 31 and the back surface electrode 32. The intermediate portion 341 contains nickel. The outer portion 342 covers the intermediate portion 341. The outer portion 342 contains tin (Sn).

[0026] 1 and 5, the protective layer 40 covers the resistor 20. The protective layer 40 has a lower layer 41 and an upper layer 42.

[0027] 2 and 5, the lower layer 41 covers a portion of the resistor 20. The resistor 20 protrudes from both ends of the lower layer 41 in the first direction x in the first direction x. The trimming grooves 21 described above are formed in the lower layer 41. The lower layer 41 is made of a material containing glass.

[0028] 1 and 5, upper layer 42 covers a portion of resistor 20 and lower layer 41. Upper layer 42 also covers a portion of upper surface 11 of substrate 10 and a portion of pair of upper electrodes 31. Upper layer 42 is made of a material containing, for example, a black epoxy resin.

[0029] [Modification of the first embodiment] Next, a chip resistor A11, which is a modification of the chip resistor A10, will be described with reference to FIG.

[0030] In the chip resistor A11, the configuration of the pair of side electrodes 33 is different from that of the chip resistor A10 described above.

[0031] In the chip resistor A11, as shown in FIG. 6, each of the top surface portions 331 of the pair of side electrodes 33 bulges in the thickness direction z from one of the surfaces of the pair of top surface electrodes 31. Each of the back surface portions 332 of the pair of side electrodes 33 bulges in the thickness direction z from one of the surfaces of the second layer 322 of the pair of back surface electrodes 32. Each of the side surface portions 333 of the pair of side electrodes 33 bulges in the first direction x from one of the pair of side surfaces 13 of the substrate 10. In the chip resistor A11, the pair of side electrodes 33 is made of a material containing silver particles and a synthetic resin. The synthetic resin is, for example, an epoxy resin.

[0032] Next, an example of a method for manufacturing the chip resistor A10 will be described with reference to Figures 7 to 18. Here, the cross-sectional positions in Figures 16 and 18 are the same as the cross-sectional position in Figure 15.

[0033] First, as shown in FIG. 7 , a sheet-like substrate 81 has an upper surface 811 and a back surface 812 facing opposite each other in the thickness direction z, and a plurality of upper surface electrodes 82 are formed on the upper surface 811. The upper surface 811 is provided with a plurality of primary grooves 81A extending in the second direction y and a plurality of secondary grooves 81B extending in the first direction x. The plurality of primary grooves 81A and the plurality of secondary grooves 81B are both recessed from the upper surface 811 in the thickness direction z. The plurality of primary grooves 81A and the plurality of secondary grooves 81B are also provided on the back surface 812. The positions of the plurality of primary grooves 81A and the plurality of secondary grooves 81B on the back surface 812 correspond to the positions of the plurality of primary grooves 81A and the plurality of secondary grooves 81B on the upper surface 811, respectively. On the upper surface 811 and the rear surface 812, each of the multiple regions 80 defined by the multiple primary grooves 81A and the multiple secondary grooves 81B corresponds to the substrate 10 of the chip resistor A10.

[0034] As shown in FIG. 7 , the multiple top surface electrodes 82 are individually formed in multiple regions 80 located on the top surface 811 of the substrate 81 while being spaced apart from each other in the first direction x. Each of the multiple top surface electrodes 82 is formed to straddle a respective one of the multiple primary grooves 81A. This results in a pair of top surface electrodes 82 that straddles a pair of primary grooves 81A that separate each of the multiple regions 80. The pair of top surface electrodes 82 corresponds to the pair of top surface electrodes 31 of the chip resistor A10. The multiple top surface electrodes 82 are formed by printing a paste containing silver particles and glass frit on the top surface 811 and then firing the paste.

[0035] Next, as shown in FIGS. 8 and 9, a plurality of back surface electrodes 83 are formed in contact with the back surface 812 of the substrate 81. The plurality of back surface electrodes 83 are individually formed in a plurality of regions 80 located on the back surface 812 while being spaced apart from each other in the first direction x. Each of the plurality of back surface electrodes 83 is composed of a first layer 831 and a second layer 832. First, as shown in FIG. 8, each of the plurality of first layers 831 is formed so as to straddle each of the plurality of primary grooves 81A. The plurality of first layers 831 are formed by printing a paste containing an epoxy resin as a main component on the back surface 812 and then thermally curing the paste.

[0036] Next, as shown in FIG. 9 , a plurality of second layers 832 are formed to individually cover the plurality of first layers 831. Each of the plurality of second layers 832 is formed to entirely cover a corresponding one of the plurality of first layers 831. This results in a pair of first layers 831 and a pair of second layers 832 that straddle a pair of primary grooves 81A that define each of the plurality of regions 80. The pair of first layers 831 and the pair of second layers 832 correspond to a pair of back electrodes 32 of the chip resistor A10. The plurality of second layers 832 are formed by individually printing a paste containing epoxy resin as a main agent and silver particles onto the plurality of first layers 831, and then thermally curing the paste. In this manner, a plurality of back electrodes 83 are formed.

[0037] Next, as shown in FIG. 10 , a plurality of resistors 84 are formed in contact with the upper surface 811 of the substrate 81. The resistors 84 are individually formed in a plurality of regions 80 located on the upper surface 811. The resistors 84 in each of the regions 80 correspond to the resistors 20 of the chip resistor A10. In each of the regions 80, both ends of the resistor 84 in the first direction x contact a pair of upper surface electrodes 82. The resistors 84 are formed by printing a paste containing metal particles and glass frit on the rear surface 812 and then firing the paste. The metal particles are ruthenium oxide or a silver-palladium alloy.

[0038] 11, a plurality of lower layers 851 are formed to individually cover the plurality of resistor elements 84. Each of the plurality of lower layers 851 corresponds to the lower layer 41 of the protective layer 40 of the chip resistor A10. The plurality of lower layers 851 are formed by printing glass paste individually on the plurality of resistor elements 84 and then firing the glass paste.

[0039] 12, a plurality of trimming grooves 841 penetrating in the thickness direction z are formed integrally with both the plurality of resistor elements 84 and the plurality of lower layers 851. Each of the plurality of trimming grooves 841 corresponds to the trimming groove 21 in the chip resistor A10. The plurality of trimming grooves 841 are formed by a laser trimming device.

[0040] Each of the multiple trimming grooves 841 is formed by the following procedure. First, a resistance measurement probe is brought into contact with both ends in the first direction x of the resistor 84, on which the trimming groove 841 is to be formed. Next, a groove is formed in the second direction y, starting from one end of the resistor 84 in the second direction y, penetrating both the resistor 84 and the lower layer 851 in the thickness direction z. After the groove is formed until the resistance value of the resistor 84 reaches a value close to a predetermined value (the resistance value of the chip resistor A10), another groove is formed from the end of the groove, this time extending in the first direction x. When the resistance value of the resistor 84 reaches the predetermined value, the formation of the groove is terminated. In this manner, multiple trimming grooves 841 are formed.

[0041] Next, as shown in FIG. 13 , multiple upper layers 852 are formed to cover the multiple resistor elements 84, the multiple lower layers 851, and portions of the multiple upper surface electrodes 82. The multiple upper layers 852 are formed so as to be spaced apart from each other in the first direction x and to form strips extending in the second direction y. The multiple upper layers 852 straddle the multiple secondary grooves 81B formed in the upper surface 811 of the substrate 81. Portions of the upper layer 852 in the multiple regions 80 located on the upper surface 811 correspond to the upper layer 42 of the protective layer 40 of the chip resistor A10. The multiple upper layers 852 are formed by printing a paste whose main component is an epoxy resin that integrally covers the multiple resistor elements 84 and the multiple lower layers 851, and then thermally curing the paste.

[0042] Next, as shown in Fig. 14, the substrate 81 is divided along the multiple primary grooves 81A. This results in multiple strip-shaped substrates 81 extending in the second direction y. Through this process, a pair of side surfaces 813 appears on both ends of the multiple substrates 81 in the first direction x, as shown in Fig. 15. The pair of side surfaces 813 face the first direction x.

[0043] 16, a pair of side electrodes 86 are formed in contact with a pair of side surfaces 813 of the base material 81. The pair of side surfaces 86 are formed so as to be in contact with both the pair of upper surface electrodes 82 and the second layers 832 of the pair of back surface electrodes 83. The pair of side surfaces 86 are formed by depositing a nickel-chromium alloy on the pair of side surfaces 813 and on parts of the pair of upper surface electrodes 82 and the pair of back surface electrodes 83 by sputtering.

[0044] Next, as shown in FIG. 17, the substrate 81 is divided along the secondary grooves 81B. This results in a plurality of individual substrate 81 pieces. The individual substrate 81 corresponds to the substrate 10 of the chip resistor A10. On the individual substrate 81, a pair of upper electrodes 82, a pair of back electrodes 83, a resistor 84, a lower layer 851, an upper layer 852, and a pair of side electrodes 86 are arranged.

[0045] Finally, as shown in FIG. 18 , a pair of external electrodes 87 are formed to individually cover the pair of top electrodes 82, the pair of back electrodes 83, and the pair of side electrodes 86 arranged on the individual substrate 81. The pair of external electrodes 87 corresponds to the pair of external electrodes 34 of the chip resistor A10. Each of the pair of external electrodes 87 is composed of a middle portion 871 and an outer portion 872. The middle portion 871 corresponds to the middle portion 341 of each of the pair of external electrodes 34 of the chip resistor A10. The outer portion 872 corresponds to the outer portion 342 of each of the pair of external electrodes 34 of the chip resistor A10.

[0046] The middle portion 871 and the outer portion 872 are each formed by electrolytic barrel plating. The middle portion 871 is formed by depositing nickel on each of the pair of upper surface electrodes 82, the pair of back surface electrodes 83, and the pair of side surface electrodes 86 exposed from the base material 81. The outer portion 872 is formed by depositing tin on the middle portion 871. Through the above steps, the chip resistor A10 is manufactured.

[0047] Next, the effects of the chip resistor A10 will be described.

[0048] In the chip resistor A10, each of the pair of back electrodes 32 includes a first layer 321 and a second layer 322. The first layer 321 contacts the back surface 12 of the substrate 10. The second layer 322 covers at least a portion of the first layer 321. The second layer 322 is made of a material containing metal particles and synthetic resin. When the chip resistor A10 is mounted on a wiring substrate, the second layer 322 of each of the pair of back electrodes 32 is located closer to the solder than the first layer 321. The Young's modulus of the second layer 322 is relatively smaller than the Young's modulus of the pair of back electrodes 32, which are made of a material containing glass and metal particles. This reduces thermal stress generated in the solder during use of the chip resistor A10. Therefore, the chip resistor A10 makes it possible to prevent cracks from occurring in the solder between the wiring substrate and the pair of back electrodes 32 during use of the chip resistor A10.

[0049] In the chip resistor A10, the first layer 321 of the pair of back electrodes 32 is made of an insulating material containing synthetic resin. Each of the second layers 322 of the pair of back electrodes 32 covers the entire first layer 321. By making each of the pair of back electrodes 32 have a two-layer structure of the first layer 321 and the second layer 322, both of which contain synthetic resin, it is possible to increase the adhesive strength of the pair of back electrodes 32 to the back surface 12 of the substrate 10 and avoid a decrease in the tensile strength of the pair of back electrodes 32, while ensuring the effect of reducing thermal stress generated in the solder.

[0050] In each of the pair of back electrodes 32 of the chip resistor A10, the first layer 321 is insulating, but the second layer 322 is conductive. The second layer 322 covers the entire first layer 321. As a result, in the step of forming the pair of external electrodes 87 shown in FIG. 18, the pair of external electrodes 87 that entirely cover the pair of back electrodes 83 can be formed.

[0051] In the chip resistor A10, the pair of side electrodes 33 are made of a metal thin film, which allows the thickness of each of the pair of side electrodes 33 to be thinner than the thickness of each of the pair of side electrodes 33 made of a material containing silver particles and synthetic resin, as in the chip resistor A11.

[0052] The chip resistor A10 further includes a pair of external electrodes 34 covering the pair of top electrodes 31, the pair of back electrodes 32, and the pair of side electrodes 33. The pair of external electrodes 34 is made of a plating layer. The pair of external electrodes 34 includes a middle portion 341 containing nickel and an outer portion 342 covering the middle portion 341 and containing tin. This allows the solder and the outer portion 342 to form an alloy when the chip resistor A10 is mounted on a wiring board, improving the mountability of the chip resistor A10 to the wiring board. In addition, when the chip resistor A10 is mounted on a wiring board, the middle portion 341 absorbs thermal shock caused by the solder, etc., thereby protecting the pair of top electrodes 31, the pair of back electrodes 32, and the pair of side electrodes 33 from the thermal shock.

[0053] Second Embodiment A chip resistor A20 according to a second embodiment of the present disclosure will be described with reference to Figures 19 and 20. In these figures, elements that are the same as or similar to those in the chip resistor A10 described above are given the same reference numerals, and duplicated explanations will be omitted. Here, the cross-sectional position in Figure 19 is the same as the cross-sectional position in Figure 5.

[0054] In the chip resistor A20, the configuration of the pair of back surface electrodes 32 is different from that of the chip resistor A10 described above.

[0055] 19 and 20 , the first layer 321 is spaced apart in the first direction x from the boundary between either of the pair of side surfaces 13 of the substrate 10 and the rear surface 12 of the substrate 10. Therefore, as shown in FIG. 20 , the rear surface 12 has a region 121 located between the boundary between either of the pair of side surfaces 13 and the rear surface 12 and the first layer 321. Each of the second layers 322 of the pair of rear surface electrodes 32 is in contact with the region 121 of the rear surface 12 of the substrate 10.

[0056] Next, the effects of the chip resistor A20 will be described.

[0057] According to the chip resistor A20, each of the pair of back electrodes 32 has a first layer 321 and a second layer 322. The first layer 321 contacts the back surface 12 of the substrate 10. The second layer 322 covers at least a portion of the first layer 321. The second layer 322 is made of a material containing metal particles and synthetic resin. Therefore, the chip resistor A20 can also prevent cracks from occurring in the solder interposed between the wiring substrate and the pair of back electrodes 32 when the chip resistor A20 is in use.

[0058] In the chip resistor A20, each of the first layers 321 of the pair of back electrodes 32 is spaced in the first direction x from the boundary between one of the pair of side surfaces 13 of the substrate 10 and the back surface 12 of the substrate 10. Each of the second layers 322 of the pair of back surface electrodes 32 is in contact with a region 121 of the back surface 12 located between the boundary between one of the pair of side surfaces 13 and the back surface 12 and the first layer 321. It is known that thermal stress generated in the solder during use of the chip resistor A20 is concentrated particularly near the boundary between one of the pair of side surfaces 13 of the substrate 10 and the back surface 12. This allows the thickness of the first layer 321 to be increased without affecting the dividing process of the base material 81 shown in FIGS. 14 and 15 and while ensuring the effect of reducing thermal stress generated in the solder.

[0059] Third Embodiment A chip resistor A30 according to a third embodiment of the present disclosure will be described with reference to Figures 21 and 22. In these figures, elements that are the same as or similar to those in the chip resistor A10 described above are designated by the same reference numerals, and duplicated explanations will be omitted. The cross-sectional position in Figure 21 is the same as the cross-sectional position in Figure 5.

[0060] In the chip resistor A30, the configuration of the pair of back surface electrodes 32 is different from that of the chip resistor A10 described above.

[0061] The first layer 321 of the pair of rear surface electrodes 32 is conductive. The first layer 321 is made of a material containing silver particles and glass. As shown in FIGS. 21 and 22 , the first layer 321 is spaced apart in the first direction x from the boundary between one of the pair of side surfaces 13 of the substrate 10 and the rear surface 12 of the substrate 10. Therefore, as shown in FIG. 22 , the rear surface 12 has a region 121 located between the boundary between one of the pair of side surfaces 13 and the rear surface 12 and the first layer 321.

[0062] 22, each of the second layers 322 of the pair of back surface electrodes 32 contacts a region 121 on the back surface 12 of the substrate 10. In the chip resistor A20, the second layer 322 covers a portion of the first layer 321. Furthermore, in the chip resistor A30, the second layer 322 bulges out from the back surface 12 in the thickness direction z.

[0063] Next, an example of a method for manufacturing the chip resistor A30 will be described with reference to FIGS.

[0064] The example of the manufacturing method for the chip resistor A30 differs from the example of the manufacturing method for the chip resistor A10 described above in the step of forming the multiple back electrodes 83. Therefore, in the description of the example of the manufacturing method for the chip resistor A30, only the step of forming the multiple back electrodes 83 will be described.

[0065] First, as shown in Fig. 23, each of the multiple first layers 831 is formed spaced apart in the first direction x from the multiple primary grooves 81A of the substrate 81. As a result, a pair of first layers 321 spaced apart from each other in the first direction x is formed in each of the multiple regions 80 located on the rear surface 812 of the substrate 81. A gap 812A, which is part of the rear surface 812, appears between two adjacent first layers 831 that sandwich one of the multiple primary grooves 81A. The multiple first layers 831 are formed by printing a paste containing silver particles and glass frit on the rear surface 812 and then firing the paste.

[0066] Next, as shown in FIG. 24, a plurality of second layers 832 are formed in contact with the plurality of first layers 831. Each of the plurality of second layers 832 is formed so as to cover a portion of each of two adjacent first layers 831 that sandwich one of the plurality of primary grooves 81A therebetween and fill the gap 812A. At this time, in each of the plurality of second layers 832, the portion that overlaps the gap 812A when viewed along the thickness direction z is recessed toward the back surface 812. Each of the plurality of second layers 832 is formed by printing a paste that is mainly made of epoxy resin and contains silver particles into the gap 812A and into the two first layers 831 located next to the gap 812A, and then thermally curing the paste. In this way, a plurality of back surface electrodes 83 are formed.

[0067] Next, the effects of the chip resistor A30 will be described.

[0068] According to the chip resistor A30, each of the pair of back electrodes 32 has a first layer 321 and a second layer 322. The first layer 321 contacts the back surface 12 of the substrate 10. The second layer 322 covers at least a portion of the first layer 321. The second layer 322 is made of a material containing metal particles and synthetic resin. Therefore, the chip resistor A30 can also prevent cracks from occurring in the solder interposed between the wiring substrate and the pair of back electrodes 32 when the chip resistor A30 is in use.

[0069] In the chip resistor A30, the first layer 321 of the pair of back electrodes 32 is made of a conductive material containing glass. The first layer 321 is spaced in the first direction x from the boundary between one of the pair of side surfaces 13 of the substrate 10 and the back surface 12 of the substrate 10. Each of the second layers 322 of the pair of back electrodes 32 contacts a region 121 of the back surface 12 located between the boundary between one of the pair of side surfaces 13 and the back surface 12 and the first layer 321. The inventors of the present disclosure have confirmed that the adhesive strength between the first layer 321 and the second layer 322 of the chip resistor A30 is relatively weak. Therefore, by configuring the first layer 321 and the second layer 322 to contact the back surface 12 of the substrate 10, peeling of the pair of back electrodes 32 from the substrate 10 can be prevented.

[0070] Each of the second layers 322 of the pair of back electrodes 32 covers a portion of the first layer 321 and bulges out from the back surface 12 of the substrate 10 in the thickness direction z. This makes it easier for air bubbles contained in the solder to be pushed out by the second layers 322 when the chip resistor A30 is mounted on a wiring board. This improves the mounting strength of the chip resistor A30 on the wiring board.

[0071] [Fourth embodiment] A chip resistor A40 according to a fourth embodiment of the present disclosure will be described with reference to Figures 25 and 26. In these figures, elements that are the same as or similar to those of the chip resistor A10 described above are designated by the same reference numerals, and duplicated explanations will be omitted. Here, the cross-sectional position in Figure 25 is the same as the cross-sectional position in Figure 5.

[0072] In the chip resistor A40, the configuration of the pair of back surface electrodes 32 is different from that of the chip resistor A10 described above.

[0073] The first layer 321 of the pair of rear surface electrodes 32 is conductive. The first layer 321 is made of a material containing silver particles and glass. As shown in FIGS. 25 and 26 , the first layer 321 is spaced in the first direction x from the boundary between one of the pair of side surfaces 13 of the substrate 10 and the rear surface 12 of the substrate 10. Therefore, as shown in FIG. 26 , the rear surface 12 has a region 121 located between the boundary between one of the pair of side surfaces 13 and the rear surface 12 and the first layer 321.

[0074] 26, each of the second layers 322 of the pair of back surface electrodes 32 contacts the region 121 on the back surface 12 of the substrate 10. In the chip resistor A40, the second layer 322 covers the entire first layer 321.

[0075] Next, an example of a method for manufacturing the chip resistor A40 will be described with reference to FIGS.

[0076] The example of the manufacturing method for the chip resistor A40 differs from the example of the manufacturing method for the chip resistor A10 described above in the process of forming the multiple back surface electrodes 83. Therefore, only the process of forming the multiple back surface electrodes 83 will be described here.

[0077] First, as shown in Fig. 27, each of the multiple first layers 831 is formed spaced apart in the first direction x from the multiple primary grooves 81A of the substrate 81. As a result, a pair of first layers 321 spaced apart from each other in the first direction x is formed in each of the multiple regions 80 located on the rear surface 812 of the substrate 81. A gap 812A, which is part of the rear surface 812, appears between two adjacent first layers 831 that sandwich one of the multiple primary grooves 81A. The multiple first layers 831 are formed by printing a paste containing silver particles and glass frit on the rear surface 812 and then firing the paste.

[0078] Next, as shown in FIG. 28, a plurality of second layers 832 are formed in contact with the plurality of first layers 831. Each of the plurality of second layers 832 is formed so as to entirely cover two adjacent first layers 831 that sandwich one of the plurality of primary grooves 81A therebetween, and to fill the gap 812A. Each of the plurality of second layers 832 is formed by printing a paste that is mainly made of epoxy resin and contains silver particles into the gap 812A and into the two first layers 831 located next to the gap 812A, and then thermally curing the paste. In this manner, a plurality of rear surface electrodes 83 are formed.

[0079] Next, the function and effect of the chip resistor A40 will be described.

[0080] According to the chip resistor A40, each of the pair of back electrodes 32 has a first layer 321 and a second layer 322. The first layer 321 contacts the back surface 12 of the substrate 10. The second layer 322 covers at least a portion of the first layer 321. The second layer 322 is made of a material containing metal particles and synthetic resin. Therefore, the chip resistor A40 can also prevent cracks from occurring in the solder interposed between the wiring substrate and the pair of back electrodes 32 when the chip resistor A40 is in use.

[0081] The present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the present disclosure can be freely modified in various ways.

[0082] Various embodiments of the present disclosure may be defined as follows:

[0083] Supplementary Note 1: A substrate having an upper surface and a back surface facing opposite each other in a thickness direction, and a pair of side surfaces spaced apart from each other in a direction perpendicular to the thickness direction and connected to the upper surface and the back surface; a pair of upper surface electrodes spaced apart from each other in the one direction and in contact with the upper surface; a resistor disposed on the upper surface and connected to the pair of upper surface electrodes; a pair of rear surface electrodes spaced apart from each other in the one direction and in contact with the rear surface; a pair of side electrodes in contact with the pair of side surfaces and connected to the pair of top electrodes and the pair of back electrodes; each of the pair of rear surface electrodes has a first layer in contact with the rear surface and a second layer covering at least a portion of the first layer; The second layer is made of a material containing metal particles and a synthetic resin.

[0084] Supplementary Note 2: The first layer is made of a material that has insulating properties and contains a synthetic resin, 2. The chip resistor of claim 1, wherein the second layer covers the entire first layer.

[0085] Supplementary Note 3: The chip resistor according to Supplementary Note 2, wherein the first layer reaches the boundary between one of the pair of side surfaces and the rear surface.

[0086] Supplementary Note 4: The first layer is spaced in the one direction from a boundary between one of the pair of side surfaces and the back surface, A chip resistor as described in Appendix 2, wherein the second layer is in contact with the boundary between one of the pair of side surfaces and the back surface and an area of the back surface located between the first layer and the boundary.

[0087] Addendum 5. The first layer is made of a material that is electrically conductive and contains glass; 2. The chip resistor according to claim 1, wherein the first layer is spaced apart in the one direction from the boundary between one of the pair of side surfaces and the rear surface.

[0088] Appendix 6. The chip resistor according to Appendix 5, wherein the first layer is made of a material containing silver particles.

[0089] Appendix 7. A chip resistor according to Appendix 5 or 6, wherein the second layer is in contact with the boundary between one of the pair of side surfaces and the back surface, and an area of the back surface located between the first layer and the boundary.

[0090] Appendix 8. The chip resistor according to Appendix 7, wherein the second layer covers a portion of the first layer and bulges from the back surface in the thickness direction.

[0091] Appendix 9. The chip resistor according to Appendix 7, wherein the second layer covers the entire first layer.

[0092] Appendix 10. The chip resistor according to any one of Appendixes 1 to 9, wherein the metal particles include silver.

[0093] Appendix 11. The chip resistor according to any one of Appendixes 1 to 10, wherein the pair of side electrodes are made of a metal thin film.

[0094] Appendix 12. The chip resistor according to Appendix 11, wherein the metal thin film is made of an alloy containing nickel and chromium.

[0095] Appendix 13. A chip resistor according to any one of appendices 1 to 10, wherein the pair of side electrodes are made of a material containing silver particles and synthetic resin.

[0096] Supplementary Note 14. The semiconductor device further includes a pair of external electrodes covering the pair of upper electrodes, the pair of rear electrodes, and the pair of side electrodes; 14. The chip resistor according to any one of claims 1 to 13, wherein the pair of external electrodes are made of plating layers.

[0097] Supplementary Note 15. Each of the pair of external electrodes has a middle portion and an outer portion covering the middle portion; the intermediate portion covers one of the pair of upper surface electrodes, one of the pair of rear surface electrodes overlapping the upper surface electrode when viewed along the thickness direction, and one of the pair of side surface electrodes connected to the upper surface electrode and the rear surface electrode; 15. The chip resistor of claim 14, wherein the intermediate portion includes nickel.

[0098] Appendix 16. The chip resistor of Appendix 15, wherein the exterior comprises tin.

[0099] Appendix 17. A chip resistor according to any one of appendices 1 to 16, wherein the substrate is made of ceramics containing alumina.

Claims

1. a substrate having an upper surface and a back surface facing opposite to each other in a thickness direction, and a pair of side surfaces that are spaced apart from each other in a direction perpendicular to the thickness direction and that are connected to the upper surface and the back surface; a pair of upper surface electrodes spaced apart from each other in the one direction and in contact with the upper surface; a resistor disposed on the upper surface and connected to the pair of upper surface electrodes; a pair of back electrodes spaced apart from each other in the one direction and in contact with the back surface; a pair of side electrodes that are in contact with the pair of side surfaces, respectively, and are connected to the pair of top electrodes and the pair of back electrodes; each of the pair of rear surface electrodes has a first layer in contact with the rear surface and a second layer covering at least a portion of the first layer; the first layer is made of an insulating material containing a synthetic resin, the second layer is made of a material containing metal particles and a synthetic resin, the first layer has a first main portion and a pair of first end portions located on both sides of the first main portion in the one direction, the second layer has a second main portion and a pair of second end portions located on both sides of the second main portion in the one direction, a dimension of each of the pair of first end portions in the thickness direction becomes smaller as the dimension becomes farther away from the first main portion in the one direction, a dimension of each of the pair of second end portions in the thickness direction becomes smaller as the second end portions move away from the second main portion in the one direction, the first layer is spaced apart in the one direction from a boundary between one of the pair of side surfaces and the rear surface, one second end of the pair of second end portions is in contact with a region of the back surface located between a boundary between one of the pair of side surfaces and the back surface and the first layer, A chip resistor, wherein the other of the pair of second ends is entirely overlapped with one of the pair of first ends when viewed in the thickness direction.

2. A chip resistor as described in claim 1, wherein the metal particles include silver.

3. A chip resistor as described in claim 1 or 2, wherein the pair of side electrodes are made of a thin metal film.

4. A chip resistor as described in claim 3, wherein the metal thin film is made of an alloy containing nickel and chromium.

5. A chip resistor as described in claim 1 or 2, wherein the pair of side electrodes are made of a material containing silver particles and synthetic resin.

6. The semiconductor device further comprises a pair of external electrodes covering the pair of upper electrodes, the pair of rear electrodes, and the pair of side electrodes, 6. The chip resistor according to claim 1, wherein the pair of external electrodes are made of plating layers.

7. Each of the pair of external electrodes has a middle portion and an outer portion covering the middle portion, the intermediate portion covers one of the pair of upper surface electrodes, one of the pair of rear surface electrodes overlapping the upper surface electrode when viewed in the thickness direction, and one of the pair of side surface electrodes connected to the upper surface electrode and the rear surface electrode; The chip resistor of claim 6 , wherein the intermediate portion comprises nickel.

8. A chip resistor as described in claim 7, wherein the exterior includes tin.

Images