Chip resistor

Abstract

A chip resistor (1) comprises an insulating substrate (10), a first electrode (20), a second electrode (30), a resistor (16), a first heat transfer layer (40), a second heat transfer layer (41), and an insulating protective layer (43). The first heat transfer layer (40) has greater thermal conductivity than the insulating protective layer (43) and is in contact with the resistor (16) and a first front surface electrode (21). The second heat transfer layer (41) is at a distance from the first heat transfer layer (40). The second heat transfer layer (41) has greater thermal conductivity than the insulating protective layer (43) and is in contact with the resistor (16) and a second front surface electrode (31).

Description

Technical Field

[0001] The present disclosure relates to chip resistors.

Background Art

[0002] Japanese Patent Application Laid-Open No. 2008-277638 (Patent Document 1) discloses a chip resistor including an insulating substrate, an upper surface electrode, a lower surface electrode, an end surface electrode, a resistor, an insulating protective film, and a surface coating film. [[ID=?]]

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the chip resistor of Patent Document 1, the entire resistor is covered with an insulating protective film. Therefore, there is a problem that the temperature at the center of the chip resistor rises excessively during use of the chip resistor, and the short-time overload (STOL) characteristics of the chip resistor are insufficient. The present disclosure has been made in view of the above problems, and an object thereof is to improve the short-time overload (STOL) characteristics of the chip resistor.

Means for Solving the Problems

[0005] It should be noted that there seems to be a mislabeling in the original text where "

先行技術文献

Prior Art Documents

[0006] The chip resistors of this disclosure can improve the short-time overload (STOL) characteristics of the chip resistors. [Brief explanation of the drawing]

[0007] [Figure 1] Figure 1 is a schematic plan view of a chip resistor according to an embodiment. [Figure 2] Figure 2 is a schematic cross-sectional view of the chip resistor of the embodiment along the cross-sectional line II-II shown in Figure 1. [Figure 3] Figure 3 is a schematic cross-sectional view of a chip resistor according to an embodiment mounted on a wiring board. [Figure 4] Figure 4 is a schematic cross-sectional view showing one step in the manufacturing method of a chip resistor according to the embodiment. [Figure 5]Figure 5 is a schematic cross-sectional view showing the next step in the manufacturing method of the chip resistor according to the embodiment, following the step shown in Figure 4. [Figure 6] Figure 6 is a schematic cross-sectional view showing the next step in the manufacturing method of the chip resistor according to the embodiment, following the step shown in Figure 5. [Figure 7] Figure 7 is a schematic cross-sectional view showing the next step in the manufacturing method of the chip resistor according to the embodiment, following the step shown in Figure 6. [Figure 8] Figure 8 is a schematic cross-sectional view showing the next step in the manufacturing method of the chip resistor according to the embodiment, following the step shown in Figure 7. [Figure 9] Figure 9 is a schematic cross-sectional view showing the next step in the manufacturing method of the chip resistor according to the embodiment, following the step shown in Figure 8. [Figure 10] Figure 10 is a schematic cross-sectional view of a chip resistor of the first modified embodiment. [Figure 11] Figure 11 is a schematic cross-sectional view of a chip resistor of a second modified embodiment. [Modes for carrying out the invention]

[0008] Next, the details of the embodiments of this disclosure will be described with reference to the drawings. In the following drawings, identical or corresponding parts will be given the same reference numerals, and their descriptions will not be repeated. At least some of the configurations of the embodiments described below may be combined in any way.

[0009] An embodiment of the chip resistor 1 will be described with reference to Figures 1 and 2. The chip resistor 1 mainly comprises an insulating substrate 10, a first electrode 20, a second electrode 30, a resistor 16, a first heat transfer layer 40, a second heat transfer layer 41, and an insulating protective layer 43. The chip resistor 1 may further comprise a first conductive resin layer 45 and a second conductive resin layer 46. In Figure 1, the insulating protective layer 43 is omitted for illustrative purposes.

[0010] The insulating substrate 10 is an electrical insulator and is formed of an electrical insulating material such as alumina (Al2O3). The insulating substrate 10 includes a first main surface 11, a second main surface 12 opposite to the first main surface 11, a first side surface 13, and a second side surface 14 opposite to the first side surface 13. The first side surface 13 and the second side surface 14 are connected to the first main surface 11 and the second main surface 12, respectively. The first main surface 11 and the second main surface 12 extend along a first direction (x direction) and a second direction (y direction) perpendicular to the first direction. The first direction (x direction) is, for example, the longitudinal direction of the insulating substrate 10. The first direction (x direction) is the direction in which the first electrode 20 and the second electrode 30 are separated from each other. The first direction (x direction) is the direction in which the first side surface 13 and the second side surface 14 are separated from each other. The second direction (y-direction) is, for example, the short-side direction of the insulating substrate 10. The first main surface 11 and the second main surface 12 are separated from each other in the third direction (z-direction), which is perpendicular to the first direction (x-direction) and the second direction (y-direction). The third direction (z-direction) is the thickness direction of the insulating substrate 10.

[0011] Referring to Figure 3, when the chip resistor 1 is mounted on the wiring board 50 (see Figure 3), the first main surface 11 faces the wiring board 50. That is, the first main surface 11 is the mounting surface used when mounting the chip resistor 1 on the wiring board 50. The first main surface 11 is the mounting surface on which the resistor 16 is mounted.

[0012] The resistor 16 has a function of limiting current or detecting current. The resistor 16 is provided on the first main surface 11 of the insulating substrate 10. The resistor 16 includes an end 16e and an end 16f opposite to the end 16e. The end 16e is the proximal end of the resistor 16 with respect to the first side surface 13. The end 16e is in contact with the first front electrode 21. The end 16f is the proximal end of the resistor 16 with respect to the second side surface 14. The end 16f is in contact with the second front electrode 31. The resistor 16 is formed, for example, by printing a paste containing glass frit in an electrical resistance material such as ruthenium oxide (RuO2) or a silver-palladium alloy onto the first main surface 11 of the insulating substrate 10 and firing it.

[0013] The resistor 16 is provided with a trimming groove 17. By forming the trimming groove 17 in the resistor 16, the resistance value of the chip resistor 1 (resistor 16) can be accurately determined. In a plan view of the first main surface 11 of the insulating substrate 10, the trimming groove 17 has, for example, an L shape extending in a first direction (x direction) and a second direction (y direction). The trimming groove 17 may have an I shape extending in the second direction (y direction).

[0014] The first electrode 20 is provided on the first side surface 13 side of the insulating substrate 10. The first electrode 20 is closer to the first side surface 13 than the second side surface 14. The first electrode 20 includes a first front electrode 21. The first electrode 20 may further include a first back electrode 22, a first side electrode 23, and a first metal plating layer 24.

[0015] The first front electrode 21 is provided on the first main surface 11 of the insulating substrate 10. The first front electrode 21 is in contact with the resistor 16. The first front electrode 21 is closer to the first side surface 13 than the resistor 16. The first front electrode 21 is formed, for example, by printing and firing a paste containing silver on the first main surface 11 of the insulating substrate 10.

[0016] The first back electrode 22 is provided on the second main surface 12 of the insulating substrate 10. In a plan view of the first main surface 11 of the insulating substrate 10, the first back electrode 22 overlaps the first front electrode 21. The first back electrode 22 is formed, for example, by printing and firing a paste containing silver on the second main surface 12 of the insulating substrate 10.

[0017] The first side electrode 23 is provided on the first side 13 of the insulating substrate 10, on the first front electrode 21, and on the first back electrode 22. The first side electrode 23 covers the first side 13 of the insulating substrate 10, the first front electrode 21, and the first back electrode 22. The first side electrode 23 includes a first portion formed on the first side 13 of the insulating substrate 10, a second portion overlapping the first main surface 11 of the insulating substrate 10 in a plan view from the thickness direction (z direction) of the insulating substrate 10, and a third portion overlapping the second main surface 12 of the insulating substrate 10 in a plan view from the thickness direction (z direction) of the insulating substrate 10. The first side electrode 23 is electrically connected to the first front electrode 21 and the first back electrode 22. The resistor 16 is electrically connected to the first back electrode 22 through the first front electrode 21 and the first side electrode 23. The first side electrode 23 may be formed of a conductive material that is difficult to vulcanize. The first side electrode 23 is formed of, for example, a Ni-Cr alloy.

[0018] The first metal plating layer 24 is provided on the first front electrode 21, on the first back electrode 22, on the first side electrode 23, on the first heat transfer layer 40, and on the first conductive resin layer 45. The first metal plating layer 24 is in contact with the first front electrode 21, the first back electrode 22, the first side electrode 23, the first heat transfer layer 40, and the first conductive resin layer 45. The end 24e of the first metal plating layer 24 is the distal end of the first metal plating layer 24 from the first side 13 of the insulating substrate 10 in a plan view of the first main surface 11 of the insulating substrate 10. The first metal plating layer 24 includes, for example, a first inner plating layer 25, a first intermediate plating layer 26, and a first outer plating layer 27.

[0019] The first inner plating layer 25 is formed on the first front electrode 21, on the first back electrode 22, on the first side electrode 23, on the first heat transfer layer 40, and on the first conductive resin layer 45. The first inner plating layer 25 is, for example, a copper plating layer.

[0020] The first intermediate plating layer 26 is formed on the first inner plating layer 25 and covers the first inner plating layer 25. The first intermediate plating layer 26 protects the first front electrode 21, the first back electrode 22, the first side electrode 23, and the first inner plating layer 25 from heat and shock. The first intermediate plating layer 26 is, for example, a nickel plating layer.

[0021] The first outer plating layer 27 is formed on the first intermediate plating layer 26 and covers the first intermediate plating layer 26. The first outer plating layer 27 is made of a material to which conductive bonding members 54 (see Figure 3), such as solder, adhere more easily than the first intermediate plating layer 26. The first outer plating layer 27 is, for example, a tin plating layer. The conductive bonding members 54 adhere to the first outer plating layer 27 and the electrical wiring 52 of the wiring board 50 (see Figure 3), and the chip resistor 1 is mounted on the wiring board 50.

[0022] The second electrode 30 is provided on the second side surface 14 side of the insulating substrate 10. The second electrode 30 is closer to the second side surface 14 than to the first side surface 13. The second electrode 30 is away from the first electrode 20 in the first direction (x direction). The second electrode 30 includes a second front electrode 31. The second electrode 30 may further include a second back electrode 32, a second side electrode 33, and a second metal plating layer 34.

[0023] The second front electrode 31 is provided on the first main surface 11 of the insulating substrate 10. The second front electrode 31 is separated from the first front electrode 21 in the first direction (x direction). The second front electrode 31 is in contact with the resistor 16. The second front electrode 31 is proximal to the second side surface 14 relative to the resistor 16. The second front electrode 31 is formed, for example, by printing a silver-containing paste onto the first main surface 11 of the insulating substrate 10 and firing it.

[0024] The second back electrode 32 is provided on the second main surface 12 of the insulating substrate 10. The second back electrode 32 is separated from the first back electrode 22 in the first direction (x direction). In a plan view of the first main surface 11 of the insulating substrate 10, the second back electrode 32 overlaps the second front electrode 31. The second back electrode 32 is formed, for example, by printing a silver-containing paste onto the second main surface 12 of the insulating substrate 10 and firing it.

[0025] The second side electrode 33 is provided on the second side surface 14, the second front electrode 31, and the second back electrode 32 of the insulating substrate 10. The second side electrode 33 covers the second side surface 14, the second front electrode 31, and the second back electrode 32 of the insulating substrate 10. The second side electrode 33 includes a first portion formed on the second side surface 14 of the insulating substrate 10, a second portion that overlaps the first main surface 11 of the insulating substrate 10 in a plan view from the thickness direction (z direction) of the insulating substrate 10, and a third portion that overlaps the second main surface 12 of the insulating substrate 10 in a plan view from the thickness direction (z direction) of the insulating substrate 10. The second side electrode 33 is electrically conductive to the second front electrode 31 and the second back electrode 32. The resistor 16 is electrically conductive to the second back electrode 32 through the second front electrode 31 and the second side electrode 33. The second side electrode 33 may be formed from a conductive material that is resistant to sulfidation. For example, the second side electrode 33 is formed from a Ni-Cr alloy.

[0026] The second metal plating layer 34 is provided on the second front electrode 31, the second back electrode 32, the second side electrode 33, the second heat transfer layer 41, and the second conductive resin layer 46. The second metal plating layer 34 is in contact with the second front electrode 31, the second back electrode 32, the second side electrode 33, the second heat transfer layer 41, and the second conductive resin layer 46. The edge 34e of the second metal plating layer 34 is the distal end of the second metal plating layer 34 from the second side surface 14 of the insulating substrate 10 in a plan view of the first main surface 11 of the insulating substrate 10. The second metal plating layer 34 includes, for example, a second inner plating layer 35, a second intermediate plating layer 36, and a second outer plating layer 37.

[0027] The second inner plating layer 35 is formed on the second front electrode 31, the second back electrode 32, the second side electrode 33, the second heat transfer layer 41, and the second conductive resin layer 46. The second inner plating layer 35 is, for example, a copper plating layer.

[0028] The second intermediate plating layer 36 is formed on the second inner plating layer 35 and covers the second inner plating layer 35. The second intermediate plating layer 36 protects the second front electrode 31, the second back electrode 32, the second side electrode 33, and the second inner plating layer 35 from heat and shock. The second intermediate plating layer 36 is, for example, a nickel plating layer.

[0029] The second outer plating layer 37 is formed on the second intermediate plating layer 36 and covers the second intermediate plating layer 36. The second outer plating layer 37 is made of a material to which conductive bonding members 55 (see Figure 3), such as solder, adhere more easily than the second intermediate plating layer 36. The second outer plating layer 37 is, for example, a tin plating layer. The conductive bonding members 55 adhere to the second outer plating layer 37 and the electrical wiring 53 of the wiring board 50 (see Figure 3), and the chip resistor 1 is mounted on the wiring board 50.

[0030] The first heat transfer layer 40 has a higher thermal conductivity than the insulating protective layer 43. For example, the first heat transfer layer 40 has a thermal conductivity of 1.0 W / (m·K) or higher. The first heat transfer layer 40 may have a thermal conductivity of 3.0 W / (m·K) or higher, or a thermal conductivity of 5.0 W / (m·K) or higher. The first heat transfer layer 40 is in contact with the resistor 16, the first front electrode 21, and the first conductive resin layer 45. The first heat transfer layer 40 may also be in contact with the first metal plating layer 24 (first inner plating layer 25). In a plan view of the first main surface 11 of the insulating substrate 10, the first heat transfer layer 40 includes an end 40e which is the distal end of the first heat transfer layer 40 from the first side surface 13 of the insulating substrate 10.

[0031] In a plan view of the first main surface 11 of the insulating substrate 10, the first heat transfer layer 40 covers, for example, 20% or more of the area of ​​the resistor 16. In a plan view of the first main surface 11 of the insulating substrate 10, the first heat transfer layer 40 may cover 25% or more of the area of ​​the resistor 16, 30% or more of the area of ​​the resistor 16, 35% or more of the area of ​​the resistor 16, or 40% or more of the area of ​​the resistor 16. In a plan view of the first main surface 11 of the insulating substrate 10, the first heat transfer layer 40 covers, for example, less than 50% of the area of ​​the resistor 16.

[0032] In a plan view of the first main surface 11 of the insulating substrate 10, the first heat transfer layer 40 covers at least a portion of the trimming groove 17. In a plan view of the first main surface 11 of the insulating substrate 10, the first heat transfer layer 40 may cover 50% or more of the total length of the trimming groove 17, 60% or more of the total length of the trimming groove 17, 70% or more of the total length of the trimming groove 17, 80% or more of the total length of the trimming groove 17, 90% or more of the total length of the trimming groove 17, or the entire trimming groove 17.

[0033] The first heat transfer layer 40 comprises a binder resin and thermally conductive particles added to the binder resin. The binder resin is formed from epoxy resin, phenolic resin, or a combination thereof. The thermally conductive particles have a higher thermal conductivity than the binder resin. For example, the thermally conductive particles are formed from a material having a thermal conductivity of 5.0 W / (m·K) or higher. The thermally conductive particles may also be formed from a material having a thermal conductivity of 10.0 W / (m·K) or higher, or from a material having a thermal conductivity of 20.0 W / (m·K) or higher. The thermally conductive particles are, for example, metal particles such as silver particles or copper particles, carbon particles, or a combination thereof. The first heat transfer layer 40 is formed, for example, by printing and curing a paste containing the binder resin and thermally conductive particles.

[0034] The first heat transfer layer 40 may be conductive. The first electrical resistivity of the first heat transfer layer 40 is greater than the electrical resistivity of the resistor 16. For example, the first electrical resistivity of the first heat transfer layer 40 is 1000 times or more the electrical resistivity of the resistor 16. The first electrical resistivity of the first heat transfer layer 40 is greater than the electrical resistivity of the first front electrode 21. For example, the first electrical resistivity of the first heat transfer layer 40 is 10000 times or more the electrical resistivity of the first front electrode 21.

[0035] The second heat transfer layer 41 has a higher thermal conductivity than the insulating protective layer 43. The second heat transfer layer 41 has, for example, a thermal conductivity of 1.0 W / (m·K) or higher. The second heat transfer layer 41 may have a thermal conductivity of 3.0 W / (m·K) or higher, or a thermal conductivity of 5.0 W / (m·K) or higher. The second heat transfer layer 41 is in contact with the resistor 16, the second front electrode 31, and the second conductive resin layer 46. The second heat transfer layer 41 may further be in contact with the second metal plating layer 34 (second inner plating layer 35). The second heat transfer layer 41 is separated from the first heat transfer layer 40 in the first direction (x direction). In a plan view of the first main surface 11 of the insulating substrate 10, the second heat transfer layer 41 includes an end 41e which is the distal end of the second heat transfer layer 41 from the second side surface 14 of the insulating substrate 10.

[0036] The shortest distance between the edge 40e of the first heat transfer layer 40 and the edge 41e of the second heat transfer layer 41 is, for example, 300 μm or more. Therefore, even if the first heat transfer layer 40 and the second heat transfer layer 41 are conductive, it can be more reliably prevented that the first heat transfer layer 40 and the second heat transfer layer 41 come into contact and electrically short-circuit each other when forming the first heat transfer layer 40 and the second heat transfer layer 41. In a plan view of the first main surface 11 of the insulating substrate 10, the first heat transfer layer 40 may cover a region of the resistor 16 up to 200 μm from the edge 16e of the resistor 16. The distance between the edge 40e of the first heat transfer layer 40 and the edge 16e of the resistor 16 in the first direction (x direction) may be 200 μm or less. In a plan view of the first main surface 11 of the insulating substrate 10, the second heat transfer layer 41 may cover a region of the resistor 16 up to 200 μm from the edge 16f of the resistor 16. The distance between the edge 41e of the second heat transfer layer 41 and the edge 16f of the resistor 16 in the first direction (x direction) may be 200 μm or less.

[0037] In a plan view of the first main surface 11 of the insulating substrate 10, the second heat transfer layer 41 may cover, for example, 20% or more of the area of ​​the resistor 16. In a plan view of the first main surface 11 of the insulating substrate 10, the second heat transfer layer 41 may cover 25% or more of the area of ​​the resistor 16, 30% or more of the area of ​​the resistor 16, 35% or more of the area of ​​the resistor 16, or 40% or more of the area of ​​the resistor 16. In a plan view of the first main surface 11 of the insulating substrate 10, the second heat transfer layer 41 may cover, for example, less than 50% of the area of ​​the resistor 16. In a plan view of the first main surface 11 of the insulating substrate 10, the second heat transfer layer 41 may be separated from the entire trimming groove 17. The entire trimming groove 17 may be exposed from the second heat transfer layer 41.

[0038] The second heat transfer layer 41 comprises a binder resin and thermally conductive particles added to the binder resin. The binder resin is formed from epoxy resin, phenolic resin, or a combination thereof. The thermally conductive particles have a higher thermal conductivity than the binder resin. For example, the thermally conductive particles are formed from a material having a thermal conductivity of 5.0 W / (m·K) or higher. The thermally conductive particles may also be formed from a material having a thermal conductivity of 10.0 W / (m·K) or higher, or from a material having a thermal conductivity of 20.0 W / (m·K) or higher. The thermally conductive particles are, for example, metal particles such as silver particles or copper particles, carbon particles, or a combination thereof. The second heat transfer layer 41 is formed, for example, by printing and curing a paste containing the binder resin and thermally conductive particles.

[0039] The second heat transfer layer 41 may be conductive. The second electrical resistivity of the second heat transfer layer 41 is greater than the electrical resistivity of the resistor 16. For example, the second electrical resistivity of the second heat transfer layer 41 is 1000 times or more the electrical resistivity of the resistor 16. The second electrical resistivity of the second heat transfer layer 41 is greater than the electrical resistivity of the second front electrode 31. For example, the second electrical resistivity of the second heat transfer layer 41 is 10000 times or more the electrical resistivity of the second front electrode 31.

[0040] The insulating protective layer 43 is provided on the resistor 16. The insulating protective layer 43 electrically insulates the first electrode 20 and the second electrode 30 from each other. Specifically, the insulating protective layer 43 electrically insulates the first front electrode 21 and the second front electrode 31 from each other. The insulating protective layer 43 electrically insulates the first metal plating layer 24 and the second metal plating layer 34 from each other. The insulating protective layer 43 electrically insulates the first heat transfer layer 40 and the second heat transfer layer 41 from each other. The insulating protective layer 43 electrically insulates the first conductive resin layer 45 and the second conductive resin layer 46 from each other. The insulating protective layer 43 is formed of an insulating resin, such as epoxy resin. The insulating protective layer 43 is formed, for example, by printing and curing a paste containing an insulating resin.

[0041] The first conductive resin layer 45 is provided on the first heat transfer layer 40 and the insulating protective layer 43. The first conductive resin layer 45 is in contact with the first heat transfer layer 40 and the insulating protective layer 43. In a plan view of the first main surface 11 of the insulating substrate 10, the first conductive resin layer 45 includes an end 45e which is the distal end of the first conductive resin layer 45 from the first side surface 13 of the insulating substrate 10. The first conductive resin layer 45 has a lower electrical resistivity than the first heat transfer layer 40. The first conductive resin layer 45 has a higher thermal conductivity than the insulating protective layer 43. The first conductive resin layer 45 may have a higher thermal conductivity than the first heat transfer layer 40. The first conductive resin layer 45 may have a higher electrical resistivity than the resistor 16. The first conductive resin layer 45 may have a higher electrical resistivity than the first front electrode 21.

[0042] The first conductive resin layer 45 comprises a binder resin and conductive particles added to the binder resin. The binder resin is formed from epoxy resin, phenolic resin, or a combination thereof. The conductive particles have a lower electrical resistivity than the binder resin. The conductive particles are, for example, metal particles such as silver particles or copper particles. The first conductive resin layer 45 is formed, for example, by printing and curing a paste containing the binder resin and conductive particles.

[0043] The second conductive resin layer 46 is provided on the second heat transfer layer 41 and the insulating protective layer 43. The second conductive resin layer 46 is in contact with the second heat transfer layer 41 and the insulating protective layer 43. The second conductive resin layer 46 is separated from the first conductive resin layer 45 in the first direction (x direction). In a plan view of the first main surface 11 of the insulating substrate 10, the second conductive resin layer 46 includes an end 46e which is the distal end of the second conductive resin layer 46 from the second side surface 14 of the insulating substrate 10. The second conductive resin layer 46 has a lower electrical resistivity than the second heat transfer layer 41. The second conductive resin layer 46 has a higher thermal conductivity than the insulating protective layer 43. The second conductive resin layer 46 may have a higher thermal conductivity than the second heat transfer layer 41. The second conductive resin layer 46 may have a higher electrical resistivity than the resistor 16. The second conductive resin layer 46 may have a higher electrical resistivity than the second front electrode 31.

[0044] The second conductive resin layer 46 comprises a binder resin and conductive particles added to the binder resin. The binder resin is formed from epoxy resin, phenolic resin, or a combination thereof. The conductive particles have a lower electrical resistivity than the binder resin. The conductive particles are, for example, metal particles such as silver particles or copper particles. The second conductive resin layer 46 is formed, for example, by printing and curing a paste containing the binder resin and conductive particles.

[0045] In a plan view of the first main surface 11 of the insulating substrate 10, the edge 45e of the first conductive resin layer 45 may be closer to the edge 41e of the second heat transfer layer 41 than to the edge 40e of the first heat transfer layer 40. In a plan view of the first main surface 11 of the insulating substrate 10, the edge 46e of the second conductive resin layer 46 may be closer to the edge 40e of the first heat transfer layer 40 than to the edge 41e of the second heat transfer layer 41. In a plan view of the first main surface 11 of the insulating substrate 10, the edge 24e of the first metal plating layer 24 may be closer to the edge 41e of the second heat transfer layer 41 than to the edge 40e of the first heat transfer layer 40. In a plan view of the first main surface 11 of the insulating substrate 10, the edge 34e of the second metal plating layer 34 may be closer to the edge 40e of the first heat transfer layer 40 than to the edge 41e of the second heat transfer layer 41.

[0046] Referring to Figure 3, the chip resistor 1 is mounted, for example, on a wiring board 50. Specifically, the wiring board 50 includes an insulating substrate 51 and electrical wiring 52, 53. The first electrode 20 of the chip resistor 1 is joined to the electrical wiring 52 of the wiring board 50 using a conductive bonding member 54 such as solder. The second electrode 30 of the chip resistor 1 is joined to the electrical wiring 53 of the wiring board 50 using a conductive bonding member 55 such as solder.

[0047] An example of a manufacturing method for the chip resistor 1 of this embodiment will be described with reference to Figures 1, 2, and 4 to 9.

[0048] Referring to Figure 4, a first front electrode 21 and a second front electrode 31 are formed on the first main surface 11 of the insulating substrate 10. For example, the first front electrode 21 and the second front electrode 31 are formed by printing a silver-containing paste onto the first main surface 11 of the insulating substrate 10 and firing it. A first back electrode 22 and a second back electrode 32 are formed on the second main surface 12 of the insulating substrate 10. For example, the first back electrode 22 and the second back electrode 32 are formed by printing a silver-containing paste onto the second main surface 12 of the insulating substrate 10 and firing it.

[0049] Referring to Figure 5, a resistor 16 is formed on the first main surface 11 of the insulating substrate 10. The resistor 16 is formed by printing a paste containing glass frit onto an electrical resistance material such as ruthenium oxide (RuO2) or a silver-palladium alloy, and then firing it. Alternatively, the resistor 16 may be formed on the first main surface 11 of the insulating substrate 10, and then the first front electrode 21, the second front electrode 31, the first back electrode 22, and the second back electrode 32 may be formed.

[0050] Referring to Figure 6, a trimming groove 17 is formed in the resistor 16. The trimming groove 17 is formed, for example, by irradiating the resistor 16 with a laser beam. The formation of the trimming groove 17 is completed when the resistance value of the resistor 16 reaches the target resistance value of the chip resistor 1.

[0051] Referring to Figure 7, the first heat transfer layer 40 and the second heat transfer layer 41 are formed. Specifically, the first heat transfer layer 40 is formed by printing a paste containing a binder resin and thermally conductive particles onto the resistor 16 and the first front electrode 21 and curing it. The second heat transfer layer 41 is formed by printing a paste containing a binder resin and thermally conductive particles onto the resistor 16 and the second front electrode 31 and curing it.

[0052] Referring to Figure 8, an insulating protective layer 43 is formed on the resistor 16, the first heat transfer layer 40, and the second heat transfer layer 41. Specifically, the insulating protective layer 43 is formed by printing a paste containing an insulating resin, such as epoxy resin, onto the resistor 16, the first heat transfer layer 40, and the second heat transfer layer 41 and curing it. Then, a first conductive resin layer 45 and a second conductive resin layer 46 are formed. Specifically, the first conductive resin layer 45 is formed by printing a paste containing a binder resin and conductive particles onto the insulating protective layer 43 and the first heat transfer layer 40 and curing it. The second conductive resin layer 46 is formed by printing a paste containing a binder resin and conductive particles onto the insulating protective layer 43 and the second heat transfer layer 41 and curing it.

[0053] Referring to Figure 9, the first side electrode 23 and the second side electrode 33 are formed. Specifically, the first side electrode 23 is formed on the first side surface 13, the first front electrode 21, and the first back electrode 22 of the insulating substrate 10 by a physical vapor deposition (PVD) method such as sputtering. The first side electrode 23 is in contact with the first front electrode 21 and the first back electrode 22, and is electrically conductive to the first front electrode 21 and the first back electrode 22. The second side electrode 33 is formed on the second side surface 14, the second front electrode 31, and the second back electrode 32 of the insulating substrate 10 by a physical vapor deposition (PVD) method such as sputtering. The second side electrode 33 is in contact with the second front electrode 31 and the second back electrode 32, and is electrically conductive to the second front electrode 31 and the second back electrode 32.

[0054] Referring to Figures 1 and 2, a first metal plating layer 24 and a second metal plating layer 34 are formed. The first metal plating layer 24 includes, for example, a first inner plating layer 25, a first intermediate plating layer 26, and a first outer plating layer 27. The second metal plating layer 34 includes, for example, a second inner plating layer 35, a second intermediate plating layer 36, and a second outer plating layer 37.

[0055] Specifically, a first inner plating layer 25 is formed on the first front electrode 21, the first back electrode 22, the first side electrode 23, the first heat transfer layer 40, and the first conductive resin layer 45. A second inner plating layer 35 is formed on the second front electrode 31, the second back electrode 32, the second side electrode 33, the second heat transfer layer 41, and the second conductive resin layer 46. The first inner plating layer 25 and the second inner plating layer 35 are each, for example, copper plating layers. Then, a first intermediate plating layer 26 is formed on the first inner plating layer 25. A second intermediate plating layer 36 is formed on the second inner plating layer 35. The first intermediate plating layer 26 and the second intermediate plating layer 36 are each, for example, nickel plating layers. Then, a first outer plating layer 27 is formed on the first intermediate plating layer 26. A second outer plating layer 37 is formed on the second intermediate plating layer 36. The first outer plating layer 27 and the second outer plating layer 37 are, for example, tin plating layers. In this way, a chip resistor 1 is obtained.

[0056] Referring to Figure 10, in the first modified embodiment, the portion of the first heat transfer layer 40 exposed from the insulating protective layer 43 may all be covered with the first conductive resin layer 45. The first conductive resin layer 45 may be in contact with the first front electrode 21. The first heat transfer layer 40 may be separated from the first metal plating layer 24 (first inner plating layer 25). The portion of the second heat transfer layer 41 exposed from the insulating protective layer 43 may all be covered with the second conductive resin layer 46. The second conductive resin layer 46 may be in contact with the second front electrode 31. The second heat transfer layer 41 may be separated from the second metal plating layer 34 (second inner plating layer 35).

[0057] Referring to Figure 11, in the second modified embodiment, the first conductive resin layer 45 and the second conductive resin layer 46 may be omitted. The first inner plating layer 25 may be formed on the first front electrode 21, the first heat transfer layer 40, the first side electrode 23, and the first back electrode 22. The second inner plating layer 35 may be formed on the second front electrode 31, the second heat transfer layer 41, the second side electrode 33, and the second back electrode 32.

[0058] In the third modified embodiment, the first back electrode 22, the first side electrode 23, the second back electrode 32, and the second side electrode 33 may be omitted. In the third modified embodiment, the first metal plating layer 24 is provided on the first front electrode 21 and on the first heat transfer layer 40, and the second metal plating layer 34 is provided on the second front electrode 31 and on the second heat transfer layer 41. In the third modified embodiment, the first metal plating layer 24 may be further provided on the first conductive resin layer 45. In the third modified embodiment, the second metal plating layer 34 may be further provided on the second conductive resin layer 46.

[0059] The effects of the chip resistor 1 of this embodiment will be explained. The chip resistor 1 of this embodiment comprises an insulating substrate 10, a first electrode 20, a second electrode 30, a resistor 16, a first heat transfer layer 40, a second heat transfer layer 41, and an insulating protective layer 43. The insulating substrate 10 includes a first main surface 11, a first side surface 13, and a second side surface 14 opposite to the first side surface 13. The first side surface 13 and the second side surface 14 are each connected to the first main surface 11. The resistor 16 is provided on the first main surface 11 of the insulating substrate 10. The first electrode 20 is provided on the first side surface 13 side of the insulating substrate 10. The first electrode 20 includes a first front electrode 21 provided on the first main surface 11 of the insulating substrate 10. The second electrode 30 is provided on the second side surface 14 side of the insulating substrate 10 and is separated from the first electrode 20. The second electrode 30 is provided on the first main surface 11 of the insulating substrate 10 and includes a second front electrode 31 that is separated from the first front electrode 21. The resistor 16 is in contact with the first front electrode 21 and the second front electrode 31. The first heat transfer layer 40 has a higher thermal conductivity than the insulating protective layer 43 and is in contact with the resistor 16 and the first front electrode 21. The second heat transfer layer 41 is separated from the first heat transfer layer 40. The second heat transfer layer 41 has a higher thermal conductivity than the insulating protective layer 43 and is in contact with the resistor 16 and the second front electrode 31. The insulating protective layer 43 is provided on the resistor 16. The insulating protective layer 43 electrically insulates the first electrode 20 and the second electrode 30 from each other, and also electrically insulates the first heat transfer layer 40 and the second heat transfer layer 41 from each other.

[0060] The center of the chip resistor 1 (for example, the center of the resistor element 16) is furthest from the first electrode 20 and the second electrode 30. Therefore, when the chip resistor 1 is in use, the temperature of the center of the chip resistor 1 tends to rise. However, the first heat transfer layer 40 and the second heat transfer layer 41 can quickly dissipate the heat from the center of the chip resistor 1 to the outside of the chip resistor 1 (for example, the wiring board 50 (see Figure 3), or the surrounding environment of the chip resistor 1, such as the air surrounding the chip resistor 1). Therefore, when the chip resistor 1 is in use, the rise in temperature of the center of the chip resistor 1 can be suppressed. The short-time overload (STOL) characteristics of the chip resistor 1 may be improved.

[0061] In the chip resistor 1 of this embodiment, the first heat transfer layer 40 and the second heat transfer layer 41 each include a binder resin and thermally conductive particles added to the binder resin.

[0062] The first heat transfer layer 40 and the second heat transfer layer 41 can quickly dissipate the heat from the center of the chip resistor 1 to the outside of the chip resistor 1. Therefore, when the chip resistor 1 is in use, the rise in temperature at the center of the chip resistor 1 can be suppressed. The short-time overload (STOL) characteristics of the chip resistor 1 may be improved.

[0063] In the chip resistor 1 of this embodiment, the binder resin is formed from epoxy resin, phenolic resin, or a combination thereof. The thermally conductive particles are carbon particles, metal particles, or a combination thereof.

[0064] The first heat transfer layer 40 and the second heat transfer layer 41 can quickly dissipate the heat from the center of the chip resistor 1 to the outside of the chip resistor 1. Therefore, when the chip resistor 1 is in use, the rise in temperature at the center of the chip resistor 1 can be suppressed. The short-time overload (STOL) characteristics of the chip resistor 1 may be improved.

[0065] In the chip resistor 1 of this embodiment, the first heat transfer layer 40 and the second heat transfer layer 41 are each conductive.

[0066] Therefore, the conductive first heat transfer layer 40 and the second heat transfer layer 41 tend to have a higher thermal conductivity than the electrically insulating heat transfer layer. The conductive first heat transfer layer 40 and the second heat transfer layer 41 can quickly dissipate the heat from the center of the chip resistor 1 to the outside of the chip resistor 1. When the chip resistor 1 is in use, the rise in temperature at the center of the chip resistor 1 can be suppressed. The short-time overload (STOL) characteristics of the chip resistor 1 can be improved.

[0067] The chip resistor 1 of this embodiment further comprises a first conductive resin layer 45 and a second conductive resin layer 46. The first conductive resin layer 45 has a higher thermal conductivity than the insulating protective layer 43. The second conductive resin layer 46 has a higher thermal conductivity than the insulating protective layer 43 and is separated from the first conductive resin layer 45. The first electrode 20 further includes a first metal plating layer 24. The second electrode 30 further includes a second metal plating layer 34. The first conductive resin layer 45 is provided on the first heat transfer layer 40 and the insulating protective layer 43. The first metal plating layer 24 is provided on the first heat transfer layer 40 and the first conductive resin layer 45. The second conductive resin layer 46 is provided on the second heat transfer layer 41 and the insulating protective layer 43. The second metal plating layer 34 is provided on the second heat transfer layer 41 and the second conductive resin layer 46. In a plan view of the first main surface 11 of the insulating substrate 10, the first end (end 24e) of the first metal plating layer 24 is closer to the third end (end 41e) of the second heat transfer layer 41 than to the second end (end 40e) of the first heat transfer layer 40, and the fourth end (end 34e) of the second metal plating layer 34 is closer to the second end (end 40e) of the first heat transfer layer 40 than to the third end (end 41e) of the second heat transfer layer 41. The first end (end 24e) of the first metal plating layer 24 is the distal end of the first metal plating layer 24 from the first side surface 13 of the insulating substrate 10 in a plan view of the first main surface 11. The second end (end 40e) of the first heat transfer layer 40 is the distal end of the first heat transfer layer 40 from the first side surface 13 of the insulating substrate 10 in a plan view of the first main surface 11. The third end (end 41e) of the second heat transfer layer 41 is the distal end of the second heat transfer layer 41 from the second side surface 14 of the insulating substrate 10 in a plan view of the first main surface 11. The fourth end (end 34e) of the second metal plating layer 34 is the distal end of the second metal plating layer 34 from the second side surface 14 of the insulating substrate 10 in a plan view of the first main surface 11.

[0068] Therefore, in a plan view of the first main surface 11 of the insulating substrate 10, the first metal plating layer 24 is formed closer to the center of the chip resistor 1 than the first heat transfer layer 40, and the second metal plating layer 34 is formed closer to the center of the chip resistor 1 than the second heat transfer layer 41. The first metal plating layer 24 and the second metal plating layer 34 can also quickly dissipate heat from the center of the chip resistor 1 to the outside of the chip resistor 1. When the chip resistor 1 is in use, the rise in temperature at the center of the chip resistor 1 can be suppressed. The short-time overload (STOL) characteristics of the chip resistor 1 can be improved.

[0069] In the chip resistor 1 of this embodiment, in a plan view of the first main surface 11 of the insulating substrate 10, the fifth end (end 45e) of the first conductive resin layer 45 is closer to the third end (end 41e) of the second heat transfer layer 41 than to the second end (end 40e) of the first heat transfer layer 40, and the sixth end (end 46e) of the second conductive resin layer 46 is closer to the second end (end 40e) of the first heat transfer layer 40 than to the third end (end 41e) of the second heat transfer layer 41. The fifth end (end 45e) of the first conductive resin layer 45 is the distal end of the first conductive resin layer 45 from the first side surface 13 of the insulating substrate 10 in a plan view of the first main surface 11. The sixth end (end 46e) of the second conductive resin layer 46 is the distal end of the second conductive resin layer 46 from the second side surface 14 of the insulating substrate 10 in a plan view of the first main surface 11.

[0070] Therefore, in a plan view of the first main surface 11 of the insulating substrate 10, the first conductive resin layer 45 is formed closer to the center of the chip resistor 1 than the first heat transfer layer 40, and the second conductive resin layer 46 is formed closer to the center of the chip resistor 1 than the second heat transfer layer 41. The first conductive resin layer 45 and the second conductive resin layer 46 can also quickly dissipate the heat from the center of the chip resistor 1 to the outside of the chip resistor 1. When the chip resistor 1 is in use, the rise in temperature at the center of the chip resistor 1 can be suppressed. The short-time overload (STOL) characteristics of the chip resistor 1 can be improved.

[0071] In the chip resistor 1 of this embodiment, the insulating substrate 10 includes a second main surface 12 opposite to the first main surface 11. The first electrode 20 includes a first back electrode 22 provided on the second main surface 12 of the insulating substrate 10. The second electrode 30 includes a second back electrode 32 provided on the second main surface 12 of the insulating substrate 10. The first metal plating layer 24 is in contact with the first front electrode 21 and the first back electrode 22. The second metal plating layer 34 is in contact with the second front electrode 31 and the second back electrode 32.

[0072] Therefore, the first back electrode 22 and the second back electrode 32 can also quickly dissipate the heat from the chip resistor 1 to the outside of the chip resistor 1. This can suppress the rise in temperature of the chip resistor 1 when it is in use. The short-time overload (STOL) characteristics of the chip resistor 1 may be improved.

[0073] In the chip resistor 1 of this embodiment, the first metal plating layer 24 includes a first copper plating layer (first inner plating layer 25) in contact with the first front electrode 21. The second metal plating layer 34 includes a second copper plating layer (second inner plating layer 35) in contact with the second front electrode 31.

[0074] Copper has a thermal conductivity of 398 W / (m·K), and the copper plating layer has very high thermal conductivity. Therefore, the first metal plating layer 24 and the second metal plating layer 34 can also quickly dissipate the heat from the center of the chip resistor 1 to the outside of the chip resistor 1. When using the chip resistor 1, the rise in temperature at the center of the chip resistor 1 can be suppressed. The short-time overload (STOL) characteristics of the chip resistor 1 can be improved.

[0075] In the chip resistor 1 of this embodiment, the first electrical resistivity of the first heat transfer layer 40 is 1000 times or more the electrical resistivity of the resistor 16. The second electrical resistivity of the second heat transfer layer 41 is 1000 times or more the electrical resistivity of the resistor 16.

[0076] Therefore, even if the first heat transfer layer 40 and the second heat transfer layer 41 come into contact with the resistor 16, any fluctuations in the resistance value of the chip resistor 1 caused by the first heat transfer layer 40 and the second heat transfer layer 41 can be ignored. The resistance value of the chip resistor 1 (resistor 16) can be precisely determined.

[0077] In the chip resistor 1 of this embodiment, in a plan view of the first main surface 11 of the insulating substrate 10, the first heat transfer layer 40 covers 20% or more of the area of ​​the resistor 16, and the second heat transfer layer 41 also covers 20% or more of the area of ​​the resistor 16.

[0078] Therefore, the first heat transfer layer 40 and the second heat transfer layer 41 can quickly dissipate the heat from the center of the chip resistor 1 to the outside of the chip resistor 1. When the chip resistor 1 is in use, the rise in temperature at the center of the chip resistor 1 can be suppressed. The short-time overload (STOL) characteristics of the chip resistor 1 can be improved.

[0079] In the chip resistor 1 of this embodiment, a trimming groove 17 is provided in the resistor 16. In a plan view of the first main surface 11 of the insulating substrate 10, the first heat transfer layer 40 covers at least a portion of the trimming groove 17.

[0080] By forming a trimming groove 17 in the resistor 16, the resistance value of the chip resistor 1 (resistor 16) can be precisely determined. Furthermore, when current flows through the chip resistor 1, the temperature of the part of the resistor 16 surrounding the trimming groove 17 becomes the highest within the resistor 16. In the chip resistor 1, the first heat transfer layer 40 covers at least a portion of the trimming groove 17. Therefore, the heat generated in the part of the resistor 16 surrounding the trimming groove 17 can be quickly dissipated to the outside of the chip resistor 1.

[0081] In the chip resistor 1 of this embodiment, in a plan view of the first main surface 11 of the insulating substrate 10, the first heat transfer layer 40 covers more than 50% of the total length of the trimming groove 17.

[0082] Therefore, the heat generated in the portion of the resistor 16 surrounding the trimming groove 17 can be dissipated more quickly to the outside of the chip resistor 1.

[0083] In the chip resistor 1 of this embodiment, in a plan view of the first main surface 11 of the insulating substrate 10, the first heat transfer layer 40 covers the entire trimming groove 17.

[0084] Therefore, the heat generated in the portion of the resistor 16 surrounding the trimming groove 17 can be dissipated more quickly to the outside of the chip resistor 1.

[0085] The embodiments and variations thereof disclosed herein should be considered in all respects to be illustrative and not restrictive. The scope of this disclosure is indicated by the claims rather than the foregoing description and is intended to include all modifications within the meaning and scope of the claims equivalents. [Explanation of symbols]

[0086] 1 Chip resistor, 10 Insulating substrate, 11 First main surface, 12 Second main surface, 13 First side surface, 14 Second side surface, 16 Resistor, 16e, 16f ends, 17 Trimming groove, 20 First electrode, 21 First front electrode, 22 First back electrode, 23 First side electrode, 24 First metal plating layer, 24e end, 25 First inner plating layer, 26 First intermediate plating layer, 27 First outer plating layer, 30 Second electrode, 31 Second front electrode, 32 Second back electrode, 33 Second side electrode, 34 Second metal plating layer, 34e end, 35 Second inner plating layer, 36 Second intermediate plating layer, 37 Second outer plating layer, 40 First heat transfer layer, 40e end, 41 Second heat transfer layer, 41e end, 43 Insulating protective layer, 45 First conductive resin layer, 45e end, 46 Second conductive resin layer, 46e end, 50 wiring board, 51 insulating board, 52, 53 electrical wiring, 54, 55 conductive bonding member.

Claims

1. An insulating substrate including a first main surface, a first side surface, and a second side surface opposite to the first side surface, The first electrode provided on the first side surface of the insulating substrate, A second electrode is provided on the second side surface of the insulating substrate and is separated from the first electrode, A resistor provided on the first main surface, The first heat transfer layer, A second heat transfer layer that is separated from the first heat transfer layer, The resistor comprises an insulating protective layer provided on the resistor, The first side and the second side are each connected to the first main surface. The first electrode includes a first front electrode provided on the first main surface, The second electrode includes a second front electrode that is provided on the first main surface and is separated from the first front electrode. The resistor is in contact with the first front electrode and the second front electrode. The first heat transfer layer has a higher thermal conductivity than the insulating protective layer and is in contact with the resistor and the first front electrode. The second heat transfer layer has a higher thermal conductivity than the insulating protective layer and is in contact with the resistor and the second front electrode. The insulating protective layer electrically insulates the first electrode and the second electrode from each other, and also electrically insulates the first heat transfer layer and the second heat transfer layer from each other. The resistor is provided with a trimming groove, A chip resistor in which, in a plan view of the first main surface, the first heat transfer layer covers at least a portion of the trimming groove.

2. The chip resistor according to claim 1, wherein the first heat transfer layer and the second heat transfer layer are each a cured resin containing thermally conductive particles.

3. The chip resistor according to claim 2, wherein the first heat transfer layer and the second heat transfer layer each include a binder resin and the thermally conductive particles added to the binder resin.

4. The binder resin is formed from epoxy resin, phenolic resin, or a combination thereof. The chip resistor according to claim 3, wherein the thermally conductive particles are carbon particles, metal particles, or a combination thereof.

5. The chip resistor according to claim 1, wherein the first heat transfer layer and the second heat transfer layer are each conductive.

6. A first conductive resin layer having a higher thermal conductivity than the aforementioned insulating protective layer, The present invention further comprises a second conductive resin layer having a higher thermal conductivity than the insulating protective layer and being separated from the first conductive resin layer, The first electrode further comprises a first metal plating layer, The second electrode further comprises a second metal plating layer, The first conductive resin layer is provided on the first heat transfer layer and the insulating protective layer, The first metal plating layer is provided on the first heat transfer layer and the first conductive resin layer. The second conductive resin layer is provided on the second heat transfer layer and the insulating protective layer, The second metal plating layer is provided on the second heat transfer layer and the second conductive resin layer, In the plan view of the first main surface, the first end of the first metal plating layer is closer to the third end of the second heat transfer layer than the second end of the first heat transfer layer, and the fourth end of the second metal plating layer is closer to the second end of the first heat transfer layer than the third end of the second heat transfer layer. The first end of the first metal plating layer is the distal end of the first metal plating layer from the first side surface in the plan view of the first main surface. The second end of the first heat transfer layer is the distal end of the first heat transfer layer from the first side surface in the plan view of the first main surface. The third end of the second heat transfer layer is the distal end of the second heat transfer layer from the second side surface in the plan view of the first main surface. The chip resistor according to claim 5, wherein the fourth end of the second metal plating layer is the distal end of the second metal plating layer from the second side surface in the plan view of the first main surface.

7. In the plan view of the first main surface, the fifth end of the first conductive resin layer is closer to the third end of the second heat transfer layer than the second end of the first heat transfer layer, and the sixth end of the second conductive resin layer is closer to the second end of the first heat transfer layer than the third end of the second heat transfer layer. The fifth end of the first conductive resin layer is the distal end of the first conductive resin layer from the first side surface in the plan view of the first main surface. The chip resistor according to claim 6, wherein the sixth end of the second conductive resin layer is the distal end of the second conductive resin layer from the second side surface in the plan view of the first main surface.

8. The insulating substrate includes a second main surface opposite to the first main surface, The first electrode includes a first back electrode provided on the second main surface, The second electrode includes a second back electrode provided on the second main surface, The first metal plating layer is in contact with the first front electrode and the first back electrode. The chip resistor according to claim 6, wherein the second metal plating layer is in contact with the second front electrode and the second back electrode.

9. The first metal plating layer includes a first copper plating layer in contact with the first front electrode. The chip resistor according to claim 6, wherein the second metal plating layer includes a second copper plating layer in contact with the second front electrode.

10. The first electrical resistivity of the first heat transfer layer is 1000 times or more the electrical resistivity of the resistor. The chip resistor according to any one of claims 1 to 9, wherein the second electrical resistivity of the second heat transfer layer is 1,000 times or more the electrical resistivity of the resistor.

11. A chip resistor according to any one of claims 1 to 9, wherein, in the plan view of the first main surface, the first heat transfer layer covers 20% or more of the area of ​​the resistor, and the second heat transfer layer covers 20% or more of the area of ​​the resistor.

12. The chip resistor according to any one of claims 1 to 9, wherein in the plan view of the first main surface, the first heat transfer layer covers 50% or more of the total length of the trimming groove.

13. The chip resistor according to any one of claims 1 to 9, wherein in the plan view of the first main surface, the first heat transfer layer covers the entire trimming groove.

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