Chip communication circuit, method and apparatus based on clock automatic synchronization

Abstract

To provide a chip communication circuit, a method and an apparatus based on automatic clock synchronization.SOLUTION: A method includes the steps of: determining clock synchronization information of the first battery management chip in response to a received control instruction; replacing a chip selection enable signal in the control instruction with a clock synchronization signal carrying the clock synchronization information of the first battery management chip to obtain a new control instruction; and transmitting the new control instruction to other battery management chips so that the other battery management chips perform automatic clock synchronization based on the clock synchronization information carried in the new control instruction, the other battery management chips being battery management chips among the multiple battery management chips except for the first battery management chip, and a daisy chain with a sinusoidal sawtooth waveform being used for isolated communication between different battery management chips, thereby solving the problem of high communication power consumption and unsynchronized clocks of battery management chips in existing daisy chain communication methods.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] This application relates to communication technology, and more particularly to chip communication circuits, methods and apparatus based on clock auto-synchronization. [Background technology]

[0002] Conventional technical solutions for daisy chain communication are all realized by converting general-purpose serial communication into separated differential signal serial communication, and can be mainly divided into two types: for example, converting a universal asynchronous receiver-transmitter (UART) into separated differential signal serial communication, and converting a serial peripheral interface (SPI) into separated differential signal serial communication.

[0003] The entire communication process is that the microcontroller MCU sends data to the battery management chip AFE, where the communication process is mainly divided into two modes: read and write. However, read and write in the daisy chain cannot be performed simultaneously; data must be written first and then read.

[0004] However, the conventional daisy chain communication method described above has the drawbacks of high power consumption during communication, mis-synchronization of the clocks of the battery management chips, and inability to achieve both interference resistance and signal recognition during communication. Summary of the Invention [Problem to be solved by the invention]

[0005] This application solves the problems of high communication power consumption and unsynchronized clocks of each battery management chip in the conventional daisy chain communication method, and provides a chip communication circuit, method and device based on automatic clock synchronization to reduce the power consumption of daisy chain communication, maintain clock synchronization of each battery management chip, and achieve both the technical effects of communication interference resistance and signal recognition. [Means for solving the problem]

[0006] In one aspect, the present application provides a chip communication method based on clock automatic synchronization, the chip communication method comprising: determining clock synchronization information of a first battery management chip in response to a received control command, the control command being sent by the controller to the first battery management chip of the plurality of battery management chips via a serial peripheral interface; replacing the chip select enable signal in the control command with a clock synchronization signal having clock synchronization information of the first battery management chip to obtain a new control command; By transmitting the new control command to the other battery management chips, the other battery management chips can be made to follow the new control command. Included a step of executing automatic clock synchronization based on the clock synchronization information, wherein the other battery management chip is a battery management chip other than the first battery management chip among a plurality of battery management chips, and between different battery management chips Daisy chained communication signals with sawtooth waveforms Using Insulated Communication and performing the steps of:

[0007] In an optional embodiment, the chip communication method further comprises: configuring a scheduling mode parameter of the battery management chip at initialization of each of the battery management chips, the scheduling mode parameter comprising: Balancing On time, Balancing The resting time after Balancing Preparation time before circuit self-diagnosis, Battery status detection line a preparation time before the open circuit self-test, and at least one of a time required to collect the voltage or temperature of the battery; In response to the battery management chip receiving a scheduling mode activation command, repeatedly executing a communication task based on the scheduling mode parameters.

[0008] In another aspect, the present application provides a chip communication circuit based on clock automatic synchronization, the chip communication circuit comprising: a controller used to send control instructions; A plurality of battery management chips including a first battery management chip and other battery management chips other than the first battery management chip, wherein the first battery management chip and the controller are connected via a serial peripheral interface, and different battery management chips are connected to each other via a serial peripheral interface. Daisy chained communication signals with sawtooth waveforms Using Insulated Communication a plurality of battery management chips that perform the In response to the received control command, the first battery management chip determines clock synchronization information of the first battery management chip, replaces the chip select enable signal in the control command with a clock synchronization signal having the clock synchronization information of the first battery management chip, obtains a new control command, and transmits the new control command to another battery management chip, thereby causing the other battery management chip to follow the new control command. Included It is used to perform automatic clock synchronization based on the clock synchronization information.

[0009] In an optional embodiment, the controller is further used to configure, at initialization of each of the battery management chips, a scheduling mode parameter of the battery management chip, and send a scheduling mode activation command to the battery management chip, thereby controlling the battery management chip to repeatedly execute a communication task based on the scheduling mode parameter, wherein the scheduling mode parameter is: Balancing On time, Balancing The resting time after Balancing Preparation time before circuit self-diagnosis, Battery status detection line and at least one of the preparation time before the open circuit self-test, the time required to collect the battery voltage or temperature.

[0010] In an optional embodiment, each time the other battery management chip receives the new control command, the other battery management chip further IncludedIt is used to determine whether the clock synchronization information is the same as the clock information of the other battery management chip, and if it is determined that the clock synchronization information is different from the clock information of the other battery management chip, to perform a calibration process on the clock information of the other battery management chip based on the clock synchronization information, thereby performing automatic clock synchronization.

[0011] In an optional embodiment, the other battery management chip further comprises: if receiving at least two of the new control commands, Included determining whether the clock synchronization information is the same for at least two of the new control commands; Included If it is determined that the clock synchronization information is different, the clock synchronization information is used to perform a calibration process on the clock information of the other battery management chips based on the last received clock synchronization information, thereby performing clock automatic synchronization.

[0012] In another aspect, the present application provides a chip communication device based on clock automatic synchronization, the chip communication device comprising: a determination module used to determine clock synchronization information of a first battery management chip in response to a received control command, the control command being sent by the controller to the first battery management chip of the plurality of battery management chips via a serial peripheral interface; a replacement module used to replace a chip select enable signal in the control command with a clock synchronization signal having clock synchronization information of the first battery management chip to obtain a new control command; By transmitting the new control command to the other battery management chips, the other battery management chips can be made to follow the new control command. Included a synchronization module used to perform automatic clock synchronization based on the clock synchronization information, wherein the other battery management chip is a battery management chip other than the first battery management chip among a plurality of battery management chips, and the different battery management chips are Daisy chained communication signals with sawtooth waveforms Using Insulated Communication and a synchronization module that performs the above.

[0013] In another aspect, the present application provides an electronic device including a processor and a memory coupled to the processor, the memory storing computer-executable instructions, and the processor executing the computer-executable instructions stored in the memory to implement any of the methods described above.

[0014] In another aspect, the present application provides a computer-readable storage medium having stored thereon computer-executable instructions used to implement any of the above methods when executed by a processor.

[0015] In another aspect, the present application provides a computer program product comprising a computer program which, when executed by a processor, implements any of the above methods. [Effects of the Invention]

[0016] In the chip communication circuit, method and device based on clock automatic synchronization provided in the present application, a control command is sent from a controller to a first battery management chip among a plurality of battery management chips via a serial peripheral interface, i.e., communication is performed between the controller and the first battery management chip using the serial peripheral interface, and the other battery management chips are battery management chips other than the first battery management chip among the plurality of battery management chips, and communication is performed between different battery management chips. Daisy chained communication signals with sawtooth waveforms Using Insulated Communication Furthermore, in response to the received control command, the clock synchronization information of the first battery management chip is determined, the chip select enable signal in the control command is replaced with a clock synchronization signal having the clock synchronization information, a new control command is obtained, and the new control command is transmitted to the other battery management chips, thereby causing the other battery management chips to follow the new control command. Included To perform automatic clock synchronization based on clock synchronization information.

[0017] Thus, the present embodiment uses a serial peripheral interface for communication between the controller and the first battery management chip, and a serial peripheral interface for communication between different battery management chips. Daisy chained communication signals with sawtooth waveforms Using Insulated Communication After receiving the control command, the first battery management chip determines the current clock synchronization information, and then replaces the chip select enable signal in the control command with the clock synchronization signal having the clock synchronization information, and obtains a new control command, so that the other following battery management chips can follow the new control command. Included The clock synchronization information can be used to automatically synchronize the clocks. Insulated Communication The daisy chain used for this is a sinusoidal sawtooth wave, which has the advantages of high signal interference resistance and easy recognition. This solves the problems of high communication power consumption and unsynchronized clocks in each battery management chip in the conventional daisy chain communication method, not only reducing the power consumption of daisy chain communication but also maintaining clock synchronization in each battery management chip, achieving both the technical effects of communication interference resistance and signal recognition. [Brief explanation of the drawings]

[0018] The drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application. [Figure 1] 1 is a schematic diagram of the architecture of a chip communication circuit based on clock automatic synchronization provided in an embodiment of the present application; [Figure 2] FIG. 2 is a schematic diagram of the location of writing optional clock synchronization information provided in an embodiment of the present application. [Figure 3] FIG. 2 is a sequence diagram of an optional scheduling mode of operation provided in an embodiment of the present application. [Figure 4] FIG. 10 is a waveform diagram of an optional sinusoidal sawtooth waveform provided in an embodiment of the present application. [Figure 5]FIG. 1 is a circuit diagram illustrating the connection relationship between a controller and a first battery management chip provided in an embodiment of the present application. [Figure 6] 1 is a flowchart of a chip communication method based on clock automatic synchronization provided in an embodiment of the present application; [Figure 7] FIG. 1 is a block diagram of the structure of a chip communication device based on clock automatic synchronization provided in an embodiment of the present application; [Figure 8] 1 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application.

[0019] Specific examples of the present application are shown in the drawings above and described in more detail below. These drawings and written description are not intended to limit the scope of the present concept in any way, but rather to explain the concept to those skilled in the art by reference to specific embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0020] Illustrative embodiments will now be described in detail, examples of which are illustrated in the drawings. Where the following description refers to the drawings, like numerals in different figures represent the same or similar elements unless otherwise noted. The embodiments described in the following illustrative examples do not represent all embodiments consistent with the present application. On the contrary, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.

[0021] The terms used in this application will be interpreted as follows.

[0022] The daisy chain communication mode means connecting devices in a serial communication network like a single daisy chain, hence the name daisy chain.

[0023] Battery management system BMS, commonly known as battery nurse or battery manager, is mainly used to intelligently manage and maintain each battery cell, prevent overcharging and over-discharging of the battery, extend the battery's service life, and monitor the battery status.

[0024] The battery master control unit (BMU) is the core component of the battery management system, which detects the voltage of N series lithium batteries, detects the battery temperature, and automatically controls the battery power. Balancing It has the function of providing a separate CAN communication interface and providing voltage, temperature, monitoring and alarm information to the BMS.

[0025] The battery slave control unit CSC is a monitor attached to a battery cell, and is used to collect battery information of the string and then transmit it to the BMU for processing.

[0026] Bus extenders (General Purpose Input / Output, GPIO) simplify the expansion of IO ports using industry-standard I2C, SMBUS, or SPI interfaces. When a microcontroller or chipset does not have enough IO ports, or when a system requires the adoption of far-end serial communication or control, GPIO products can provide additional control and monitoring functions.

[0027] Battery management chips (Analog Front End, AFE), also known as analog front ends, are used in the new energy industry to collect the voltage and temperature of battery modules and Balancing It is used to diagnose disconnection of the battery collection line, Balancing Functions such as circuit diagnosis can be realized.

[0028] Scheduler Mode is a scheduling mode of the analog front end, which collects the voltage and temperature of the battery module according to specific rules. Balancing Complete control and diagnostic functions.

[0029] Serial Peripheral Interface (SPI) is a synchronous serial communication interface specification for chip communication.

[0030] Master In Slave Out (MISO) is an antenna technology used in wireless communication, for example, in the serial peripheral interface (SPI), which is a channel signal that transmits commands or data from a slave to a master.

[0031] Master Out Slave In (MOSI) is a channel signal that transmits commands or data from a master to a slave.

[0032] A differential line is a signal transmission technology that refers to the differential wiring of differential signals, which uses two parallel wires of equal length to transmit identical signals with a phase difference of 180 degrees, and the two signals have the same amplitude but opposite phase. The signals transmitted on these two wires are differential signals.

[0033] A Universal Asynchronous Receiver / Transmitter (UART), commonly referred to as a UART, is an asynchronous receiver / transmitter that is part of computer hardware. It converts transmitted data between serial and parallel communication. A UART is a chip that converts parallel input signals to serial output signals and is typically integrated into the connection of other communication interfaces.

[0034] Conventional technical solutions for daisy chain communication are all realized by converting general-purpose serial communication into separated differential signal serial communication, and can be mainly divided into two types: for example, converting a universal asynchronous receiver-transmitter (UART) into separated differential signal serial communication, and converting a serial peripheral interface (SPI) into separated differential signal serial communication.

[0035] The first method is an asynchronous communication method in which the battery main control unit (BMU) transmits and receives data via a serial port. After the microcontroller (MCU) transmits data, the battery management chip (AFE) converts the serial signal into a differential signal designed like a daisy chain. The differential signal is transmitted in stages through the AFEs until it reaches the last AFE, which then sends the data that the MCU needs to read to the previous AFE, and so on to the first AFE. The first AFE receives the data, converts it into serial communication, and transmits it to the MCU.

[0036] The second method communicates via SPI, with the MCU as the master and the AFE as the slave. The communication process strictly follows the SPI sequence, and the AFE transmits data to the MCU at the next SPI clock signal SCK after the MCU sends it. The waveform on the daisy chain is specially designed to convert the 4-wire SPI signal into a 2-wire differential signal for transmission. In this method, the baud rate of the daisy chain is designed to be twice the SPI baud rate to meet the SPI sequence between the MCU and the first AFE or Transfer.

[0037] To solve the above problems, the embodiments of the present application add a configurable automatic scheduling system to the battery management chip, a multi-chip automatic clock synchronization technology, and realize a daisy-chain physical layer solution for the multi-chip automatic clock synchronization technology.

[0038] In this embodiment, an automatic scheduling system, Scheduler System, is added to the existing battery management chip AFE. In this mode, the Scheduler collects voltage, temperature, configures bus extension device GPIO, Balancing On, BalancingThe scheduler system can automatically schedule functions such as power-off, fault diagnosis, etc. Here, the controller MCU must first configure the scheduler system and then turn it on. Because the configuration units and specific sequences in the scheduling can have various combinations, this application only takes the following one combination as an example, but the method in this embodiment can be applied to all other automatic scheduling systems.

[0039] Example 1 The technical solution of the present application and how it solves the above problems will be described in detail in the following specific examples. The following specific examples can be combined with each other, and the same or similar concepts or processes may be omitted in some examples. The following examples will be described with reference to the drawings.

[0040] The chip communication method based on automatic clock synchronization provided in the present application has been made to solve the above-mentioned problems of the prior art. The chip communication method based on automatic clock synchronization can be applied to the schematic diagram of the architecture of a chip communication circuit based on automatic clock synchronization shown in Figure 1. As shown in Figure 1, the chip communication circuit based on automatic clock synchronization: It includes a controller (eg, the microcontroller shown in FIG. 1) that is used to send control instructions.

[0041] Optionally, the control command is an ISO-SPI command, which is a register read or write command sent to the battery management chip AFE, such as a voltage collection command, a sampling result read command, Balancing instruction, Balancing It may be a stop order or the like.

[0042] In an optional embodiment, for example, when the MCU needs to read the voltage data of the battery cell, it sends a voltage collection command to the AFE, and the MCU waits for the AFE to complete the sampling, and then the MCU sends a sampling result read command to the AFE and reads the corresponding result. Balancing The AFE sends the command Balancing and the MCU Balancing A stop command is sent and the AFE Balancing The fault diagnosis function also uses a similar mechanism, and in the whole process, the MCU plays a scheduling role and controls the stopping and starting of the AFE function.

[0043] The plurality of battery management chips (battery management chip 1, battery management chip 2, battery management chip 3, ... battery management chip n) include a first battery management chip 1 and other battery management chips (for example, battery management chip 2, battery management chip 3, ... battery management chip n) other than the first battery management chip, and the first battery management chip and the controller are connected via a serial peripheral interface, and the different battery management chips are Daisy chained communication signals with sawtooth waveforms Using Insulated Communication Do the following.

[0044] The first battery management chip responds to the received control command by determining clock synchronization information of the first battery management chip, replacing the chip select enable signal in the control command with a clock synchronization signal having the clock synchronization information of the first battery management chip, and obtaining a new control command, in which other data in the original control command remains unchanged and is transmitted to the subsequent battery management chip, and the subsequent battery management chip obtains clock synchronization information from the clock synchronization signal (also called synchronization signal), obtains control information from the other data, and transmits the new control command to the other battery management chip, thereby causing the other battery management chip to follow the new control command. Included It is used to perform automatic clock synchronization based on the clock synchronization information.

[0045] Figure 1 shows the hardware connection interface between the microcontroller MCU and multiple battery management chips AFE, and between the first battery management chip AFE1 and other subsequent battery management chips AFE. As for the connection method of the entire system, the microcontroller MCU and the first battery management chip AFE1 communicate via SPI, and the first battery management chip AFE1 and the second battery management chip AFE2, and all subsequent battery management chips communicate using a daisy chain, which is specifically a sine sawtooth waveform. Insulated Communication Do the following.

[0046] In an optional embodiment, each battery management chip AFE generally includes an ADC sampling module, Balancing It includes a control module, a fault diagnosis module, a register module and a data storage module. The ADC sampling module is mainly used for cell voltage sampling, cell temperature sampling and total voltage sampling of the battery pack. Balancing Control modules are active and passive Balancing The fault diagnosis module detects voltage collection line breakage and Balancing It is used for fault diagnosis such as detecting broken wires and battery overprotection, the register module is used to configure the AFE, and the data storage module is used to store sampling results and system state information.

[0047] In an embodiment of the present application, a first battery management chip among the plurality of battery management chips receives a control command sent from a controller MCU, analyzes the control command, and determines a chip select enable signal in the control command, and determines a waveform of the chip select enable signal CS as shown in FIG. 2 . According to the falling edge and rising edge of the waveform of the chip select enable signal, the clock synchronization information automatically generated by the first battery management chip connected to the MCU is replaced with the chip select enable signal in the form of a clock synchronization signal; Daisy chained communication signals with sawtooth waveformsA new control command is transmitted to other battery management chips among the plurality of battery management chips via the control signal until the new control command is transmitted to the last battery management chip, and thus automatic sequence synchronization can be realized among the plurality of battery management chips.

[0048] In the present embodiment, the different battery management chips Insulated Communication The daisy chain used to perform this is a sinusoidal sawtooth wave, which has the advantage of being highly resistant to signal interference and is also easy to recognize.

[0049] In an optional embodiment, the controller is further used to configure scheduling mode parameters of the battery management chips when initializing each of the battery management chips, and to send a scheduling mode activation command to the battery management chips, thereby controlling the battery management chips to repeatedly execute communication tasks based on the scheduling mode parameters.

[0050] In one example, the scheduling mode parameter is: Balancing On time, Balancing The resting time after Balancing Preparation time before circuit self-diagnosis, Battery status detection line and at least one of the preparation time before the open circuit self-test, the time required to collect the battery voltage or temperature.

[0051] In the present embodiment, when the battery management chip is initialized, voltage collection, temperature collection, GPIO configuration, passive Balancing Scheduling mode parameters such as fault diagnosis can be configured, and then a reduction command can be used to make the battery management chip collect data according to the configured manner.

[0052] The sequence diagram of the operation of the optional scheduling mode as shown in Figure 3 is optimized and designed according to the actual operating situation in order to reduce the power consumption of communication between the battery management chips. As shown in Figure 3, the battery management chip state of the battery management chip can be divided into an operating state and a standby state, the diagnostic mode state of the battery management chip can be divided into an on state and an off state, and the normal mode state of the battery management chip can be divided into an on state and an off state. In Figure 3, the commands executed in the operating state of the battery management chip are voltage sampling, even channel Balancing , Balancing Stop, Voltage Sampling, Odd Channels Balancing , Balancing Commands to be executed in the operating state of the battery management chip after a standby state, including but not limited to, stop, etc., are executed on the even channel. Balancing (Pre-sampling, Voltage Sampling), Odd Channel Balancing This may include, but is not limited to, (pre-sampling, voltage sampling), open circuit detection (pre-sampling, voltage sampling). As shown in FIG. 3, after the chip configuration setting, Balancing The register action line is sampled and the corresponding Balancing It can also execute a processing command, after which it samples the voltage pre-sampling register and Balancing A stop command can be executed and a corresponding sampling command can be executed by sampling the voltage sampling register.

[0053] In one example, after setting the above scheduling mode parameters, the MCU sends a command to start the scheduling mode Scheduler System, and the battery management chip may repeatedly execute the scheduling according to the configuration time of the initialization parameters according to the scheduling period. The voltage and temperature information collected at each stage is automatically stored in a register, for example, the voltage and temperature information in the normal collection mode is stored, BalancingThe voltage information may be stored as a data source for realizing the diagnostic function in the circuit self-diagnosis process, and the voltage information (data source for realizing the diagnostic function) in the open circuit self-diagnosis process of the battery collection line may be stored. In the embodiment of the present application, when the battery management chip is initialized, voltage collection, temperature collection, GPIO configuration, passive Balancing By configuring function parameters such as fault diagnosis and then issuing a reduced command to have the battery management chip collect data according to the configured method, the number of communication messages can be reduced by 60% and communication power consumption can be reduced by 60% compared to when the MCU alone sends the above commands to achieve these functions.

[0054] According to the embodiment of the present application, the MCU can collect the battery voltage, temperature, and passively monitor the battery using reduced instructions. Balancing and diagnostic functions, reducing the number of commands sent by the MCU message, thereby reducing the communication power consumption by 60%. Multi-chip clock automatic synchronization technology can ensure the collection synchronization of all batteries <1ms (assuming the MCU sends a command to the battery management chip at least every 1s), and the different battery management chips in the solution of this application can be synchronized. Insulated Communication The daisy chain used to perform this is a sinusoidal sawtooth wave, which has the advantage of being highly resistant to signal interference and is also easy to recognize.

[0055] In an optional embodiment, each battery unit has a plurality of battery slave control units CSC to monitor the cell voltage and temperature information of each battery cell or battery pack therein, and the CSC can also report the collected related information to the battery control unit BMU, and then the CSC can monitor the cell voltage and temperature information according to the command of the BMU. Balancing Execute.

[0056] In an optional embodiment, each time the other battery management chip receives a new control command, the other battery management chip further IncludedIt is determined whether the clock synchronization information and the self-clock information are the same, and if it is determined that the clock synchronization information and the self-clock information are different, a calibration process is performed on the self-clock information based on the clock synchronization information, and the self-clock information is used to execute automatic clock synchronization.

[0057] In another optional embodiment, the other battery management chip further comprises: if receiving at least two new control commands, Included Determine whether the clock synchronization information is the same and whether it is the same for at least two new control commands. Included If it is determined that the clock synchronization information is different, a calibration process is performed on the own clock information based on the last received clock synchronization information, and the calibration process is used to perform automatic clock synchronization.

[0058] In the embodiment of the present application, the clock automatic synchronization daisy chain communication method is provided, and the controller MCU can control the battery management chip to collect the battery voltage, temperature, and passively control the battery by using reduced instructions. Balancing and diagnostic functions, and can ensure that the collection synchronization of all batteries is less than 1 ms (assuming the MCU sends a control command to the battery management chip at most once every other second), reducing the number of control commands sent by the MCU message and reducing communication power consumption by 60%.

[0059] In an optional embodiment, the daisy-chain communication technology of the embodiment of the present application adds a sequence automatic synchronization design. After the first battery management chip receives a control command from the controller, the data analyzer in the first battery management chip can analyze the control command to determine the chip select enable signal in the control command, and determine the waveform of the chip select enable signal CS as shown in FIG. 2. Based on the falling edge and rising edge of the waveform of the chip select enable signal, the clock synchronization information automatically generated by the first battery management chip connected to the MCU can be replaced with the chip select enable signal in the form of a clock synchronization signal at, but not limited to, 0xAA, 0x55 (0xAA, 0x55 are just examples) shown in FIG. 2, to obtain a new control command.

[0060] In the present embodiment, between different battery management chips Daisy chained communication signals with sawtooth waveforms Using Insulated Communication In one example, the waveform diagram of a sine sawtooth waveform is as shown in FIG. 4, and the correspondence between pulses, levels, and waveforms in FIG. 4 is as shown in Table 1 below, where the design for level is Vp2=2*Vp1, and the design for time is t2=2*t1.

[0061] [Table 1]

[0062] In an optional embodiment, as shown in FIG. 5, an optional circuit schematic diagram for illustrating the connection relationship between the controller and the first battery management chip indicates that in the embodiment of the present application, the controller MCU is the master, and the battery management chip is the slave, where SPI is the serial peripheral interface, MISO is the master-receive-slave-transmit signal line of the SPI, MOSI is the master-transmit-slave-receive signal line of the SPI, SCK is the clock signal line of the SPI, CS is the chip select enable line of the SPI, TX is transmit, RX is receive, SP is the high side of the daisy-chain differential communication, SM is the low side of the daisy-chain differential communication, and SS is the CS signal of the SPI.

[0063] Still as shown in FIG. 5, the controller and the first battery management chip each include a data transmission analyzer, a two-stage parallel current generator, a data analyzer, and a sequence controller. Here, the data transmission analyzer is used to convert the data bit 0 or 1 into a three-level sawtooth pulse with half the pulse width t1. The two-stage parallel current generator is used to generate a three-level 0V, Vp1, and Vp2 sawtooth waveform. The data analyzer is used to detect a pulse with a pulse width t1 from the data received by the master port and timing controller, trigger a comparator to compare the input voltage with two reference voltages Vp1 and Vp2, and determine whether it is data 0 or 1. The sequence controller is used to control the sequence synchronization among multiple battery management chips.

[0064] The master controller also includes a system synchronization signal generator for filling the front and rear ends of the data area with a 16-bit synchronization clock synchronization signal and sending it to the slave port, where each data bit has a pulse width of half t2, and uses a two-stage current generator to generate a three-stage sawtooth waveform that modulates the data bits.

[0065] The slave battery management chip includes a system synchronization signal analyzer that detects pulses with a pulse width of t2 from the data received by the master port and timing controller, and triggers a two-level voltage comparator to determine whether the data is 0 or 1 when it finds half the pulse width t2.

[0066] Conventional MCU controls the battery management chip by sending messages to collect voltage, temperature, configure GPIO, Balancing On, Balancing The MCU sends related commands such as power-off, fault diagnosis control, etc. to control the battery management chip, which requires a large number of commands. In the embodiment of the present application, these commands can be reduced by configuring automatic scheduling function parameters. The MCU only configures the scheduling function parameters for these functions during initialization, pre-sets the behavior and sequence of these scheduling function parameters, and only needs to periodically read the data stored in the battery management chip.

[0067] According to the embodiment of the present application, the MCU can collect the voltage of the battery, the temperature, and the passive Balancing and diagnostic functions, reducing the number of commands sent by the MCU message, thereby reducing the communication power consumption by 60%. Multi-chip clock automatic synchronization technology can ensure the collection synchronization of all batteries <1ms (assuming the MCU sends a command to the battery management chip at least every 1s), and the different battery management chips in the solution of this application can be synchronized. Insulated Communication The daisy chain used to perform this is a sinusoidal sawtooth wave, which has the advantage of being highly resistant to signal interference and is also easy to recognize.

[0068] Example 2 The embodiments of the present application further provide an embodiment of a chip communication method based on automatic clock synchronization. FIG. 6 is a flowchart of the chip communication method based on automatic clock synchronization provided in the embodiments of the present application. As shown in FIG. 6, the method includes the following steps S101 to S103.

[0069] In S101, in response to a received control command, the clock synchronization information of the first battery management chip is determined.

[0070] In S102, the chip select enable signal in the control command is replaced with a clock synchronization signal having clock synchronization information of the first battery management chip, and a new control command is obtained.

[0071] In S103, the new control command is transmitted to the other battery management chips, so that the other battery management chips can follow the new control command. Included Automatic clock synchronization is performed based on the clock synchronization information.

[0072] In one example, the control command is transmitted from the controller to a first battery management chip among the plurality of battery management chips via a serial peripheral interface, and the control command is transmitted between the different battery management chips. Daisy chained communication signals with sawtooth waveforms Using Insulated Communication Do the following.

[0073] Optionally, the other battery management chip is a battery management chip other than the first battery management chip of a plurality of battery management chips.

[0074] Unlike the conventional sine wave or square wave (sine wave has a relatively high interference resistance, but is difficult to analyze and recognize by the chip, which can easily cause waveform misjudgment, while square wave is easy to recognize, but has low interference resistance and is prone to waveform distortion), in the embodiment of this application, between different battery management chips Daisy chained communication signals with sawtooth waveforms Using Insulated Communication It has the advantages of high interference resistance and easy recognition, and has relatively high practical value and innovation.

[0075] In an embodiment of the present application, after the first battery management chip among the plurality of battery management chips receives a control command sent from the controller MCU, it supplements the control command with its own clock synchronization information by replacing the chip select enable signal CS in the control command, and can transmit the new control command to other battery management chips among the plurality of battery management chips through a daisy chain until it is transmitted to the last battery management chip.

[0076] The daisy chain communication technology of the embodiment of the present application adds an automatic sequence synchronization design, which not only reduces the power consumption of daisy chain communication, but also maintains clock synchronization among each battery management chip, achieving both communication interference resistance and signal recognition technical effects.

[0077] More importantly, there is a need for different battery management chips. Insulated Communication The daisy chain used for this is a sinusoidal sawtooth wave, which has the advantages of high signal interference resistance and easy recognition. This solves the problems of high communication power consumption and clock asynchronous between each battery management chip in the conventional daisy chain communication method, not only reducing the power consumption of daisy chain communication but also maintaining clock synchronization between each battery management chip, achieving both the technical effects of communication interference resistance and signal recognition.

[0078] In the present embodiment, the controller and the first battery management chip communicate using a serial peripheral interface, and the other battery management chips communicate using a serial peripheral interface. Daisy chained communication signals with sawtooth waveforms Using Insulated Communication After receiving the control command, the first battery management chip determines the current clock synchronization information, and then replaces the chip select enable signal in the control command with the clock synchronization signal having the clock synchronization information, and obtains a new control command, so that the other following battery management chips can follow the new control command. IncludedThe clock synchronization information can be used to automatically synchronize the clocks, which not only solves the problems of high communication power consumption and clock synchronization issues in the conventional daisy-chain communication method, but also reduces the power consumption of the daisy-chain communication, while maintaining clock synchronization in the battery management chips, achieving both interference resistance and signal recognition technology.

[0079] Conventional MCU controls the battery management chip by sending messages to collect voltage, temperature, configure GPIO, Balancing On, Balancing The battery management chip controls the battery management chip by sending related commands such as turning off the battery, controlling fault diagnosis, etc., which requires a large number of commands. In the embodiment of the present application, these commands can be reduced by configuring automatic scheduling function parameters. The MCU configures the scheduling function parameters for these functions only during initialization, and by pre-setting the behavior and sequence of these scheduling function parameters, it only needs to periodically read the data stored in the battery management chip.

[0080] In an optional embodiment, the above chip communication method based on clock automatic synchronization further includes the following method steps before determining the clock synchronization information of the first battery management chip in response to the received control command:

[0081] When each of the battery management chips is initialized, the scheduling mode parameters of the battery management chips are configured.

[0082] In response to receiving a scheduling mode activation command, the battery management chip repeatedly executes a communication task based on the scheduling mode parameters.

[0083] In one example, the scheduling mode parameter is: Balancing On time, Balancing The resting time after Balancing Preparation time before circuit self-diagnosis, Battery status detection lineand at least one of the preparation time before the open circuit self-test, the time required to collect the battery voltage or temperature.

[0084] In one example, after setting the above scheduling mode parameters, the MCU sends a command to start the scheduling mode Scheduler System, and the battery management chip may repeatedly execute the scheduling according to the configuration time of the initialization parameters according to the scheduling period. The voltage and temperature information collected at each stage is automatically stored in a register, for example, the voltage and temperature information in the normal collection mode is stored, Balancing Voltage information during the circuit self-diagnosis process (data source for realizing the diagnostic function) may be stored. In the embodiment of the present application, when the battery management chip is initialized, voltage collection, temperature collection, GPIO configuration, passive Balancing By configuring function parameters such as fault diagnosis and then issuing a reduced command to have the battery management chip collect data according to the configured method, the number of communication messages can be reduced by 60% and communication power consumption can be reduced by 60% compared to when the MCU alone sends the above commands to achieve these functions.

[0085] According to the embodiment of the present application, the MCU can collect the voltage of the battery, the temperature, and the passive Balancing and diagnostic functions, reducing the number of commands sent by the MCU message, thereby reducing the communication power consumption by 60%. Multi-chip clock automatic synchronization technology can ensure the collection synchronization of all batteries <1ms (assuming the MCU sends a command to the battery management chip at least every 1s), and the different battery management chips in the solution of this application can be synchronized. Insulated Communication The daisy chain used to perform this is a sinusoidal sawtooth wave, which has the advantage of being highly resistant to signal interference and is also easy to recognize.

[0086] In an optional embodiment, the other battery management chip is instructed to follow the new control command. Included The step of performing automatic clock synchronization based on the clock synchronization information includes the following steps:

[0087] Each time the other battery management chip receives the new control command, Included The clock synchronization information and the self clock information are compared to see if they are the same.

[0088] If it is determined that the clock synchronization information and the local clock information differ, a calibration process is performed on the local clock information based on the clock synchronization information, and automatic clock synchronization is performed.

[0089] In an optional embodiment, each time another battery management chip receives a new control command, it Included The clock synchronization information and the own clock information are compared to see if they are the same, and if it is determined that the clock synchronization information and the own clock information are different, a calibration process is performed on the own clock information based on the clock synchronization information, and automatic clock synchronization is performed.

[0090] In an optional embodiment, the method further comprises the following steps:

[0091] When the other battery management chip receives the new control command at least twice, the other battery management chip responds to the new control command at least twice. Included The clock synchronization information is compared to see if it is the same.

[0092] At least two of the above new control orders Included If it is determined that the clock synchronization information is different, a calibration process is performed on the self-clock information based on the last received clock synchronization information, and automatic clock synchronization is performed.

[0093] In another optional embodiment, if the other battery management chip receives at least two new control commands, the other battery management chip may Included Compare whether the clock synchronization information is the same or not, and then execute at least two new control commands. IncludedIf it is determined that the clock synchronization information is different, a calibration process is performed on the own clock information based on the last received clock synchronization information, and automatic clock synchronization is performed.

[0094] In the embodiment of the present application, the clock automatic synchronization daisy chain communication method is provided, and the controller MCU can control the battery management chip to collect the battery voltage, temperature, and passively control the battery by using reduced instructions. Balancing and diagnostic functions, and can ensure that the collection synchronization of all batteries is less than 1 ms (assuming the MCU sends a control command to the battery management chip at most once every other second), reducing the number of control commands sent by the MCU message and reducing communication power consumption by 60%.

[0095] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) related to this application are all information and data authorized by the user or fully authorized by each party, and the collection, use and processing of related data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and a corresponding operation portal must be provided for the user to select permission or denial.

[0096] Example 3 According to one or more embodiments of the present application, a chip communication device based on clock automatic synchronization is provided. FIG. 7 is a structural block diagram of a chip communication device based on clock automatic synchronization provided in the embodiments of the present application. As shown in FIG. 7, the chip communication device: a determination module 601 used to determine clock synchronization information of a first battery management chip in response to a received control command, the control command being sent by the controller to the first battery management chip of the plurality of battery management chips via a serial peripheral interface; a replacement module 602, which is used to write clock synchronization information of the first battery management chip into the control instruction according to the chip select enable signal, and obtain a new control instruction; By transmitting the new control command to the other battery management chips, the other battery management chips can be made to follow the new control command. Included a synchronization module 603 used to perform clock automatic synchronization based on the clock synchronization information, and the other battery management chips are battery management chips other than the first battery management chip among a plurality of battery management chips, and the different battery management chips are Daisy chained communication signals with sawtooth waveforms Using Insulated Communication and a synchronization module 603 for performing the above.

[0097] According to one or more embodiments of the present application, the chip communication device further comprises: a configuration module used to configure a scheduling mode parameter of the battery management chip at the initialization of each of the battery management chips, the scheduling mode parameter comprising: Balancing On time, Balancing The resting time after Balancing Preparation time before circuit self-diagnosis, Battery status detection line a configuration module including at least one of a preparation time before an open circuit self-test, a time required to collect a battery voltage or a temperature; an execution module used to repeatedly execute a communication task based on the scheduling mode parameters in response to the battery management chip receiving a scheduling mode activation command.

[0098] According to one or more embodiments of the present application, the synchronization module comprises: Each time the other battery management chip receives the new control command, Included a comparison unit used to compare whether the clock synchronization information and the local clock information are the same; and a synchronization unit used to perform a calibration process on the self-clock information based on the clock synchronization information to perform automatic clock synchronization if it is determined that the clock synchronization information and the self-clock information are different.

[0099] According to one or more embodiments of the present application, the chip communication device further comprises: When the other battery management chip receives the new control command at least twice, the other battery management chip responds to the new control command at least twice. Included a comparison module used to compare whether the clock synchronization information is the same; At least two of the above new control orders Included and a post-calibration synchronization module, which is used to perform a calibration process on the self-clock information based on the last received clock synchronization information to perform clock automatic synchronization if it is determined that the clock synchronization information is different.

[0100] In an exemplary embodiment, the present invention includes a processor and a memory coupled to the processor, the memory storing computer-executable instructions; There is further provided an electronic device in which the processor executes computer-executable instructions stored in the memory to implement any of the methods described above.

[0101] In an exemplary embodiment, embodiments of the present application further provide a computer-readable storage medium having stored thereon computer-executable instructions used to implement any of the above methods when executed by a processor.

[0102] In an exemplary embodiment, embodiments of the present application further provide a computer program product including a computer program that, when executed by a processor, implements any of the above methods.

[0103] To realize the above embodiment, the embodiment of the present application further provides an electronic device. Referring to Figure 8, a schematic diagram of the structure of an electronic device 700 adapted to realize the embodiment of the present application is shown, and the electronic device 700 may be a terminal device or a server.

[0104] 8, electronic device 700 may include a processing unit (e.g., a central processing unit, a graphics processing unit) 701 that can perform various appropriate operations and processes based on programs stored in a read only memory (abbreviated as ROM) 702 or programs loaded from a storage device 708 into a random access memory (abbreviated as RAM) 703. RAM 703 further stores various programs and data necessary for the operation of electronic device 700. Processing unit 701, ROM 702, and RAM 703 are interconnected via a bus 704. An input / output (I / O) interface 705 is also connected to bus 704.

[0105] Typically, input devices 706, including, for example, a touch panel, touchpad, keyboard, mouse, camera, microphone, accelerometer, gyroscope, etc.; output devices 707, including, for example, a liquid crystal display (LCD), speaker, vibrator, etc.; storage devices 708, including, for example, a magnetic tape, hard disk, etc.; and communication devices 709, can be connected to the I / O interface 705. The communication devices 709 enable wireless or wired communication between the electronic device 700 and other devices to exchange data. While FIG. 8 illustrates the electronic device 700 with various devices, it should be understood that not all of the devices shown need be implemented or included. Alternatively, more or fewer devices may be implemented or included.

[0106] In particular, according to embodiments of the present application, the processes described above with reference to the flowcharts may be implemented as a computer software program. For example, embodiments of the present application include a computer program product including a computer program loaded onto a computer-readable medium, the computer program including program code for performing the methods illustrated in the flowcharts. In such embodiments, the computer program may be downloaded and installed from a network via the communication device 709, or installed from the storage device 708, or installed from the ROM 702. When executed by the processing device 701, the computer program performs the functions defined in the methods of the embodiments of the present application.

[0107] The computer-readable medium in this application may be a computer-readable signal medium, a computer-readable storage medium, or any combination of the above. The computer-readable storage medium may be, but is not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or any combination thereof. More specific examples of computer-readable storage media include, but are not limited to, an electrical connection having one or more leads, a portable computer magnetic disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), optical fiber, a compact disc read-only memory (CD-ROM), an optical storage element, a magnetic storage element, or any suitable combination of the above. In this application, a computer-readable storage medium may be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, device, or device. In this application, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, into which computer-readable program code is loaded. Such propagated data signals may take a variety of forms, including, but not limited to, electromagnetic signals, optical signals, or any suitable combination of the above. A computer-readable signal medium may be any computer-readable medium other than a computer-readable storage medium, which may transmit, propagate, or transmit a program for use in or in conjunction with an instruction execution system, apparatus, or device. The program code contained in the computer-readable medium may be transmitted by any suitable medium, including, but not limited to, wire, optical cable, RF (radio frequency), etc., or any suitable combination thereof.

[0108] The computer-readable medium may be included in the electronic device, or may exist independently of the electronic device.

[0109] The computer-readable medium has one or more programs loaded thereon, which, when executed by the electronic device, cause the electronic device to perform the methods described in the above embodiments.

[0110] Computer program code for carrying out the operations of the present application can be written in one or more programming languages, or any combination thereof, including object-oriented programming languages such as Java, Smalltalk, and C++, as well as conventional process-oriented programming languages such as "C" or similar programming languages. The program code can run entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet by an Internet Service Provider).

[0111] The flowcharts and block diagrams in the figures illustrate possible system architectures, functions, and operations of systems, methods, and computer program products according to various embodiments of the present application. In this regard, each block in the flowcharts or block diagrams may represent a module, program segment, or portion of code, which includes one or more executable instructions for implementing a given logical function. It should also be noted that in some alternative implementations, the functions depicted in the blocks may be performed out of the order depicted in the figures. For example, two blocks shown in succession may be executed substantially in parallel, or may be executed in the reverse order, depending on the functionality. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented by a dedicated hardware-based system that performs a given function or operation, or by a combination of dedicated hardware and computer instructions.

[0112] The units according to the embodiments of the present application may be implemented in the form of software or hardware, and the names of the units do not necessarily limit the units themselves.

[0113] The functions described herein above may be performed, at least in part, by one or more hardware logic components, including, but not limited to, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard components (ASSPs), systems on chips (SOCs), complex programmable logic devices (CPLDs), and the like.

[0114] In the context of this application, a machine-readable medium may be a tangible medium that can contain or store a program for use in or in connection with an instruction execution system, apparatus, or device. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of machine-readable storage media include an electrical connection using one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), optical fiber, a compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0115] Other embodiments of the present application will be readily apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any modifications, uses, or adaptations of the present application which follow the general principles of the present application and include means well known or commonly employed in the art that are not disclosed herein. It is intended that the specification and examples be considered as exemplary only, with the true scope and spirit of the present application being indicated by the following claims.

[0116] It will be understood that the present application is not limited to the exact construction described above and shown in the drawings, and that various modifications and changes can be made without departing from the scope thereof, which is limited only by the appended claims.

Claims

1. In a chip communication circuit based on clock automatic synchronization, the chip communication circuit comprises: a controller used to send control instructions; a plurality of battery management chips including a first battery management chip and other battery management chips other than the first battery management chip, wherein the first battery management chip and the controller are connected via a serial peripheral interface, different battery management chips are connected by a daisy chain, and perform insulated communication using a communication signal with a sawtooth waveform; the first battery management chip responds to the received control command by determining clock synchronization information of the first battery management chip, replacing a chip select enable signal in the control command with a clock synchronization signal having the clock synchronization information of the first battery management chip to obtain a new control command, and transmitting the new control command to another battery management chip, thereby causing the other battery management chip to perform clock automatic synchronization based on the clock synchronization information included in the new control command.

2. 2. The chip communication circuit of claim 1, wherein the controller is further configured to configure scheduling mode parameters of the battery management chips when initializing each of the battery management chips and send a scheduling mode start command to the battery management chips, thereby controlling the battery management chips to repeatedly execute communication tasks based on the scheduling mode parameters, and the scheduling mode parameters include at least one of a balancing on time, a rest time after balancing, a preparation time before a self-test of a balancing circuit, a preparation time before an open circuit self-test of a battery status detection line, and a time required to collect a battery voltage or a temperature.

3. 2. The chip communication circuit according to claim 1, wherein the other battery management chip further determines whether the clock synchronization information included in the new control command is the same as the clock information of the other battery management chip each time the other battery management chip receives the new control command, and if it determines that the clock synchronization information is different from the clock information of the other battery management chip, performs a calibration process on the clock information of the other battery management chip based on the clock synchronization information, thereby performing automatic clock synchronization.

4. The chip communication circuit according to any one of claims 1 to 3, characterized in that, when the other battery management chip receives at least two of the new control commands, it further determines whether the clock synchronization information included in the at least two of the new control commands is the same, and if it determines that the clock synchronization information included in the at least two of the new control commands is different, it performs a calibration process on the clock information of the other battery management chip based on the last received clock synchronization information, thereby performing automatic clock synchronization.

5. determining clock synchronization information of a first battery management chip in response to a received control command, the control command being sent by the controller to the first battery management chip of the plurality of battery management chips via a serial peripheral interface; replacing a chip select enable signal in the control command with a clock synchronization signal having clock synchronization information of the first battery management chip to obtain a new control command; a step of transmitting the new control command to another battery management chip, causing the other battery management chip to perform automatic clock synchronization based on the clock synchronization information included in the new control command, wherein the other battery management chip is a battery management chip other than the first battery management chip among a plurality of battery management chips, the different battery management chips are connected by a daisy chain, and insulated communication is performed using a communication signal with a sawtooth waveform.

6. configuring scheduling mode parameters of the battery management chips when initializing each of the battery management chips, the scheduling mode parameters including at least one of a balancing on time, a rest time after balancing, a preparation time before a self-test of a balancing circuit, a preparation time before an open circuit self-test of a battery status detection line, and a time required to collect a battery voltage or a temperature; 6. The chip communication method of claim 5, further comprising: in response to the battery management chip receiving a scheduling mode activation command, repeatedly executing a communication task based on the scheduling mode parameters.

7. a determination module used to determine clock synchronization information of a first battery management chip in response to a received control command, the control command being sent by the controller to the first battery management chip of the plurality of battery management chips via a serial peripheral interface; a replacement module used to replace a chip select enable signal in the control command with a clock synchronization signal having clock synchronization information of the first battery management chip to obtain a new control command; a synchronization module used to transmit the new control command to another battery management chip, thereby causing the other battery management chip to perform automatic clock synchronization based on the clock synchronization information included in the new control command, wherein the other battery management chip is a battery management chip other than the first battery management chip among a plurality of battery management chips, and the different battery management chips are connected by a daisy chain and perform isolated communication using a communication signal with a sinusoidal sawtooth waveform.

8. a processor and a memory coupled to the processor; the memory stores computer-executable instructions; 7. An electronic device, characterized in that the processor executes computer-executable instructions stored in the memory to implement the chip communication method according to claim 5 or 6.

9. A computer-readable storage medium having stored thereon computer-executable instructions that are used to implement the chip communication method according to claim 5 or 6 when executed by a processor.

10. A computer program product which, when executed by a processor, implements the chip communication method according to claim 5 or 6.

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