RF power amplifier, chip and communication terminal

Abstract

The present invention discloses an RF power amplifier, a chip, and a communication terminal. The RF power amplifier includes a power amplification circuit, an output matching circuit, a power detection circuit, and a bias comparison circuit. The output power of the main signal path is detected by the power detection circuit, and an equivalent voltage proportional to the output power is obtained and input to the bias comparison circuit. The value of the equivalent voltage is adjusted by the bias comparison circuit and compared with a control voltage to provide a bias voltage and / or collector voltage to the power amplification circuit. This forms a closed-loop circuit, allowing the RF power amplifier to maintain stable operation of gain and output power under different power levels.

Description

[Technical Field]

[0001] The present invention relates to an RF power amplifier, and also to an integrated circuit chip including the RF power amplifier and a corresponding communication terminal, which belong to the RF integrated circuit technical field. [Background technology]

[0002] RF power amplifiers are essential components in wireless communication applications, amplifying the power of the modulated RF signal output by a transceiver to meet the RF signal power requirements for wireless communication. Due to the performance requirements of wireless communication, RF power amplifiers must perform power control. In addition, process deviations will cause the gain of RF power amplifiers to change, resulting in changes in output power.

[0003] In the prior art, the power control methods of RF power amplifiers mainly include the following two: The first is a power control method based on closed-loop control. This power control method mainly controls the input power of the RF power amplifier to control the final output power of the RF power amplifier. Furthermore, this power control method uses the same bias voltage to generate a required output power, so if the required output power of the RF power amplifier is small, the RF power amplifier will have a current surplus, resulting in unnecessary waste.

[0004] The second is a power control method based on open-loop control. This power control method mainly controls the voltage to control the final output power of the RF power amplifier. In this power control method, the magnitude of the output power of the control voltage controlling the RF power amplifier cannot be known, so the control voltage cannot accurately control the bias voltage of the RF power amplifier circuit, and further, the output power of the RF power amplifier cannot be accurately controlled. Summary of the Invention [Problem to be solved by the invention]

[0005] The main technical problem that the present invention seeks to solve is that of providing an RF power amplifier.

[0006] Another technical problem to be solved by the present invention is to provide an integrated circuit chip including the above RF power amplifier and a corresponding communication terminal. [Means for solving the problem]

[0007] To achieve the above objectives, the present invention adopts the following technical solutions: According to a first aspect of an embodiment of the present invention, there is provided an RF power amplifier comprising a power amplifier circuit, an output matching circuit, a power detection circuit, and a bias comparison circuit. and the output matching circuit and output load to form a main signal path of the RF power amplifier, an input terminal of the power detection circuit is connected to a specific node on the main signal path, an output terminal of the power detection circuit is connected to an input terminal of the bias comparison circuit, and the bias comparison circuit has N low-dropout linear regulators, where N is a positive integer determined by the number of collector voltages required by the power amplifier circuit, and the input terminals of the low-dropout linear regulators are respectively input with a preset control voltage and connected to the output terminals of the power detection circuit, and each of the low-dropout linear regulators The output terminal of the power amplifier circuit Noko Connected to the receptor terminal.

[0008] The output power on the main signal path is detected by the power detection circuit to obtain an equivalent voltage proportional to the output power, and the equivalent voltage is input to the bias comparison circuit, after which the Operation Based on the conditions, the value of the equivalent voltage is adjusted to obtain one or more branch equivalent voltages.

[0009] The equivalent voltage of each of the branches is In each of the low dropout linear regulators, The control voltage and respectively comparison And , the control voltage is The branch equivalent voltage is equal to the RF power amplifier Needed in until the power amplifier circuit The collector terminal of The collector voltage is continuously supplied and controlled so that the output power of the RF power amplifier is stable under different power levels.

[0010] Preferably, the power detection circuit includes a coupler and an envelope detector, wherein an input terminal of the coupler is connected to an output terminal of the power amplifier circuit via the output matching circuit, and a through output terminal of the coupler is The aforementioned The coupler is connected to an output load, and the coupled output terminal of the coupler is connected to an input terminal of the envelope detector, the output terminal of which is connected to the input terminal of the bias comparison circuit.

[0011] Preferably, the coupler is replaced by a capacitor.

[0012] Preferably, the envelope detector comprises a first resistor, a second resistor, a third resistor, a first diode, a fourth resistor, and a first capacitor, wherein the first resistor and the second resistor are connected between a power supply and ground, the third resistor is connected between the anode of the first diode and a common node of the first resistor and the second resistor, and the cathode of the first diode is connected to the ground via a parallel network of the fourth resistor and the first capacitor.

[0014] Preferably, each of the low-dropout linear regulators includes a fifth resistor, a sixth resistor, an operational amplifier, a PMOS transistor, and a seventh resistor. The fifth resistor and the sixth resistor are connected between a third node and ground, and the positive input terminal of the operational amplifier is connected to a common node between the fifth resistor and the sixth resistor. The inverting input terminal of the operational amplifier is connected to an external baseband circuit, and the output terminal of the operational amplifier is connected to the gate of the PMOS transistor. The source of the PMOS transistor is connected to a power supply, and the drain of the PMOS transistor is connected to ground via the seventh resistor.

[0015] Preferably, the power amplifier circuit includes a single-stage or multi-stage amplifier circuit and a bias circuit corresponding to each single-stage amplifier circuit, and each single-stage amplifier circuit is connected to the corresponding bias circuit.

[0016] Preferably, the specific node on the main signal path includes an amplifier circuit in any one stage of the power amplifier circuit, a first node, and a second node.

[0017] According to a second aspect of an embodiment of the present invention, there is provided an integrated circuit chip comprising the RF power amplifier described above.

[0018] According to a third aspect of an embodiment of the present invention, there is provided a communication terminal including the RF power amplifier described above.

[0019] In the RF power amplifier provided by the embodiment of the present invention, the output power on the main signal path is detected by a power detection circuit, and an equivalent voltage proportional to the output power is obtained and input to a bias comparison circuit. The value of the equivalent voltage is adjusted by the bias comparison circuit and compared with a control voltage to adjust the value of the power amplification circuit. The collector terminal of In this way, a closed loop is formed, so that the RF power amplifier can maintain stable operation of gain and output power under different power levels. [Brief explanation of the drawings]

[0020] [Figure 1] 1 is a circuit block diagram of an RF power amplifier provided according to an embodiment of the present invention; [Figure 2] FIG. 1 is a circuit block diagram of an RF power amplifier using a power detection circuit composed of an envelope detector and a coupler. [Figure 3] FIG. 2 is a circuit schematic diagram of an envelope detector in an RF power amplifier provided according to an embodiment of the present invention. [Figure 4] FIG. 2 is a diagram illustrating the relationship between the input power and the output DC voltage of the envelope detector in the RF power amplifier provided by the embodiment of the present invention. [Figure 5] 2 is a circuit schematic diagram of a bias comparison circuit in an RF power amplifier provided according to an embodiment of the present invention; [Figure 6] 1 is a schematic circuit diagram of an RF power amplifier using a two-stage amplifier circuit. [Figure 7]2 is a schematic circuit diagram of an RF power amplifier using a two-stage amplifier circuit. [Figure 8] 1 is a diagram showing the relationship between the collector voltage and the output power of a power amplifier circuit in an RF power amplifier provided by an embodiment of the present invention. [Figure 9] FIG. 2 is a structural block diagram of a communication terminal according to an embodiment of the present invention; DETAILED DESCRIPTION OF THE INVENTION

[0021] The technical contents of the present invention will be described in more detail below in combination with the accompanying drawings and specific embodiments.

[0022] As shown in FIG. 1, an RF power amplifier provided according to an embodiment of the present invention includes a power amplifier circuit 5, an output matching circuit 2, a power detection circuit 3, and a bias comparison circuit 4. The power amplifier circuit 5, the output matching circuit 2, and the output load 9 are connected in sequence to form the main signal path of the RF power amplifier, amplifying the input RF signal to meet the power required for communication with a base station. The input terminal of the power detection circuit 3 is connected to specific nodes on the main signal path (as shown in FIG. 1, a first node 7 located between the power amplifier circuit 5 and the output matching circuit 2, and a second node 8 located between the output matching circuit 2 and the output load 9). The output terminal of the power detection circuit 3 is connected to an input terminal of the bias comparison circuit 4, and the output terminal of the bias comparison circuit 4 is connected to the bias terminal and / or collector terminal of the power amplifier circuit 5.

[0023] The power on the main signal path is detected by a power detection circuit 3 to obtain an equivalent voltage proportional to the power of the main signal path. The equivalent voltage is then input to a bias comparison circuit 4, which then adjusts the value of the equivalent voltage based on the different bias conditions required for different bias terminals of the power amplifier circuit 5 to obtain one or more branch equivalent voltages. Each branch equivalent voltage is compared with a control voltage 1 previously input to the bias comparison circuit 4 by an external baseband circuit. The power amplifier circuit 5 generates a bias voltage 6 and / or collector voltage whose potential difference between the control voltage and the branch equivalent voltage changes in the opposite direction until the generated bias voltage and / or collector voltage becomes equal to the control voltage. The control voltage corresponds to the output power level of the RF power amplifier, thereby stably controlling the output power of the RF power amplifier under different power levels.

[0024] The control voltage pre-input to the bias comparison circuit 4 by the external baseband circuit corresponds to the output power level of the RF power amplifier, i.e., one output power level corresponds to one control voltage. The baseband circuit has multiple pre-set control voltages corresponding to the output power levels of the RF power amplifier. The value of the control voltage provided by the baseband circuit for the RF power amplifier is determined based on the actual output power required by a communication terminal (such as a mobile phone) when exchanging information with a base station. That is, by setting different control voltages, the RF power amplifier can obtain different output powers. For example, suppose a mobile phone communicates with a base station. When the mobile phone is close to the base station, the output power required for exchanging information with the base station is relatively small. The base station feeds back the output power required for exchanging information with the mobile phone to the mobile phone, and the mobile phone supplies a control voltage corresponding to the required output power level to the RF power amplifier via the baseband circuit.

[0025] 2, in one embodiment of the present invention, the power detection circuit 3 includes a coupler 31 and an envelope detector 30. The input terminal of the coupler 31 is connected to the output terminal of the power amplifier circuit 5 via the output matching circuit 2, and the through output terminal 8 of the coupler 31 is connected to the output load 9. The coupled output terminal 32 of the coupler 31 is connected to the input terminal of the envelope detector 30, and the output terminal of the envelope detector 30 is connected to the input terminal of the bias comparison circuit 4.

[0026] The coupler 31 detects the output power at a specific position on the main signal path of the RF power amplifier, which is composed of the power amplification circuit 5, the output matching circuit 2, and the output load 9, and generates a coupled power. The coupled power has a certain proportional relationship with the output power of the RF power amplifier. For example, the output power at a specific position on the main signal path of the RF power amplifier detected by the coupler 31 and the generated coupled power are 1 percent of the output power of the RF power amplifier.

[0027] Connecting the coupler 31 to the second node 8 on the main signal path has less impact on the output power of the power amplifier circuit 5 than connecting it to the first node 7, and the power detected by the coupler 31 at the second node 8 is closer to the final output power. Therefore, connecting the coupler 31 to the second node 8 on the main signal path not only ensures that the impact of the RF signal on the main signal path is small, but also preferably makes the power detected by the power detection circuit 3 closer to the final output power of the amplifier circuit. Here, the coupling coefficient of the coupler 31 is generally greater than 20 dB, which allows the output power at a specific position on the main signal path to be detected and also reduces the loss of the output power of the power amplifier circuit 5.

[0028] Also, by replacing the coupler with a capacitor, it is possible to detect the output power at a specific location on the main signal path of the RF power amplifier.

[0029] The envelope detector 30 receives the coupled power output from the coupled output terminal 32 of the coupler 31 and derives an equivalent voltage 33 proportional to the coupled power. As shown in FIG. 3 , the envelope detector 30 includes a first resistor 307, a second resistor 308, a third resistor 310, a first diode 302, a fourth resistor 304, and a first capacitor 305. The first resistor 307 and the second resistor 308 are connected between a power supply and ground and provide a bias voltage to the first diode 302 through a voltage divider. The third resistor 310 is connected between the anode 301 of the first diode 302 and a common node 309 of the first resistor 307 and the second resistor 308 and provides an appropriate bias current to the first diode 302. The cathode 303 of the first diode 302 is connected to ground via a parallel network of the fourth resistor 304 and the first capacitor 305. The fourth resistor 304 serves as a load for the first diode 302, providing a DC state for the first diode 302 and providing a power-to-voltage conversion gain for the first diode 302. The first capacitor 305 is used as a filter capacitor for the first diode 302 to obtain the DC portion of the output voltage of the first diode 302. Through the fourth resistor 304 and the first capacitor 305, the coupled power output by the coupler 31 can be converted into a pre-amplified equivalent voltage, which is proportional to the coupled power. Here, the coupled power output by the coupler 31 is input to the anode 301 of the first diode 302 through a capacitor 306. After converting the coupled power output by the coupler 31 into a pre-amplified equivalent voltage, the envelope detector 30 uses a common node 303 between the fourth resistor 304 and the first capacitor 305 as the output terminal of the envelope detector 30 and inputs it to the bias comparison circuit 4. As shown in FIG. 4, when the input power at the anode 301 of the first diode 302 (the coupled power output by the coupler 31) changes from −15 dBm to 10 dBm, the DC voltage at the cathode 303 of the first diode 302 (the pre-amplified equivalent voltage corresponding to the coupled power) changes from 0.3 V to 1.35 V.

[0030] As shown in FIG. 5 , in one embodiment of the present invention, the bias comparison circuit 4 includes N low-dropout linear regulators, where N is a positive integer and is determined by the number of actual bias voltages and collector voltages required by the power amplifier circuit 5. Each low-dropout linear regulator includes a fifth resistor 402, a sixth resistor 403, an operational amplifier 406, a PMOS transistor 408, and a seventh resistor 411. The connection relationship and operating principle of each low-dropout linear regulator are as follows: The fifth resistor 402 and the sixth resistor 403 are connected between the third node 401 and ground. Based on the operating state of the power amplifier circuit 5, the fifth resistor 402 and the sixth resistor 403 divide the equivalent voltage output from the power detection circuit 3 at a specific ratio to obtain a branch equivalent voltage. The positive input terminal of the operational amplifier 406 is connected to a common node 404 between the fifth resistor 402 and the sixth resistor 403, and receives, via the common node 404, a branch equivalent voltage obtained by the voltage division action of the fifth resistor 402 and the sixth resistor 403. The inverting input terminal of the operational amplifier 406 is connected to an external baseband circuit and receives a control voltage corresponding to the actual output power level required by the RF power amplifier. The output terminal of the operational amplifier 406 is connected to the gate of a PMOS transistor 408, whose source 409 is connected to the power supply and whose drain 410 is connected to ground via a seventh resistor 411.

[0031] The bias comparator circuit 4 operates by inputting the equivalent voltage 33 output by the power detection circuit 3 (the equivalent voltage 33 is proportional to the output power detected by the power detection circuit 3) to the operational amplifier 406 of each low-dropout linear regulator. Based on the operating state of the power amplifier circuit 5, each low-dropout linear regulator copies the equivalent voltage output from the power detection circuit 3 at a specific ratio through the voltage division action of the fifth resistor 402 and the sixth resistor 403 to obtain a branch equivalent voltage. The operational amplifier 406 compares the branch equivalent voltage with the control voltage 1 previously input to its inverting input terminal. The drain 410 of the PMOS transistor 408 generates a voltage via the seventh resistor 411, which supplies the bias voltage and / or collector voltage to the power amplifier circuit 5. The value of the seventh resistor 411 can be selected from various values as needed.

[0032] Because the power amplifier circuit 5 includes one or more amplifier stages and a corresponding bias circuit for each amplifier stage, the operating state of each low-dropout linear regulator based on the power amplifier circuit 5 can refer to the operating state of a specific amplifier stage in the power amplifier circuit 5. That is, each low-dropout linear regulator copies the equivalent voltage output by the power detection circuit 3 at a specific ratio through the voltage dividing action of the fifth resistor 402 and the sixth resistor 403 based on the operating state of a specific amplifier stage in the power amplifier circuit 5, thereby obtaining a branch equivalent voltage. That is, each low-dropout linear regulator supplies a bias voltage and / or collector voltage to a corresponding amplifier stage in the power amplifier circuit 5, and the output power of the corresponding amplifier stage can be controlled via the bias voltage or collector voltage. Therefore, multiple low-dropout linear regulators can be used to provide bias voltages and / or collector voltages to corresponding multi-stage amplifier circuits in the power amplifier circuit 5.

[0033] Each low-dropout linear regulator forms a closed-loop control with the power amplifier circuit 5, the output matching circuit 2, and the power detection circuit 3, so that each low-dropout linear regulator continuously receives the equivalent voltage output by the power detection circuit 3. The low-dropout linear regulator dynamically adjusts the received equivalent voltage each time to obtain a branch equivalent voltage, compares the branch equivalent voltage with a control voltage, and supplies a bias voltage and / or collector voltage to the corresponding specific stage amplifier circuit of the power amplifier circuit 5 until the corresponding branch equivalent voltage of each low-dropout linear regulator becomes equal to the control voltage. Furthermore, the control voltage corresponds to the output power level of the RF power amplifier, and controls the output power of the RF power amplifier to be stable under different power levels.

[0034] The output matching circuit 2 realizes impedance matching with an external antenna, so that the power amplifier circuit 5 can input an RF signal to the antenna and transmit the RF signal to a base station via the antenna. The output matching circuit 2 includes a series inductor and a parallel capacitor, i.e., the inductor is connected in front of the first node 7 and the second node 8, and the capacitor is connected between the second node 8 and ground.

[0035] The following will take the example of a power amplifier circuit 5 using two amplifier stages and corresponding bias circuits for the two amplifier stages. It is common to detect the output power of the second node 8 and supply a collector voltage to a specific amplifier stage of the power amplifier circuit 5, or to supply a bias voltage and a collector voltage to each amplifier stage. The operating principle of the RF power amplifier provided in the embodiment of the present invention and the structure of each amplifier stage and the corresponding bias circuit will be described.

[0036] As shown in FIG. 6 , the first-stage amplifier circuit of the power amplifier circuit 5 includes a first triode 502. The collector of the first triode 502 is connected to one end of a first inductance 509, which serves as a load for the first-stage amplifier circuit. The other end of the first inductance 509 is connected to ground via a second capacitor 510, which serves as a bypass capacitor for the first-stage amplifier circuit. A common end 511 between the first inductance 509 and the second capacitor 510 can be considered AC ground. One end of an eighth resistor 505 and the collector of the second triode 504 are connected to a node 508. The other end of the eighth resistor 505 is connected to the base electrode of the second triode 504, which is connected to ground via a second diode 506 and a third diode 507. The emitter of the second triode 504 is connected to the base electrode of the first triode 502 via a ninth resistor 503 and supplies a bias current to the first triode 502. Here, an eighth resistor 505, the second triode 504, a second diode 506, a third diode 507, and the ninth resistor 503 constitute a bias circuit corresponding to a first-stage amplifier circuit. The collector of the first triode 502 is connected to the base electrode of a third triode 513 via a third capacitor 512. The first-stage amplifier circuit receives an RF signal via the capacitor 501 and inputs the RF signal to the second-stage amplifier circuit via the third capacitor 512. Similarly, one end of a second inductance 520 is connected to the collector of the third triode 513 as a load for the third triode 513. The other end of the second inductance 520 is connected to ground via a fourth capacitor 521, which is used as a bypass capacitor for the second stage amplifier circuit, and a common end 522 of the second inductance 520 and the fourth capacitor 521 can be regarded as AC ground. One end of the tenth resistor 516 and the collector of the fourth triode 515 are connected to a node 519, and the other end of the tenth resistor 516 is connected to the base electrode of the fourth triode 515 and is also connected to ground via a fourth diode 517 and a fifth diode 518.The emitter of the fourth triode 51 is connected to the base electrode of the third triode 513 via an eleventh resistor 514 to supply a bias current to the third triode 513. The collector of the third triode 513 is output to an output load via an output matching circuit 2.

[0037] The power detection circuit 3 detects the output power of the second node 8 to obtain an equivalent voltage 526 proportional to the output power, and the equivalent voltage 526 is input to the bias comparison circuit 4. The bias comparison circuit 4 obtains a bias voltage 529 by comparing the equivalent voltage 526 with a control voltage 1 previously input to the bias comparison circuit 4. The bias voltage 529 is connected to a common node 522 between the second inductance 520 and the fourth capacitor 521, and provides a collector voltage for the second-stage amplifier circuit. The output power of the power amplifier circuit is controlled by the collector voltage.

[0038] As shown in FIG. 7 , the output power of the second node 8 is detected by the power detection circuit 3 to obtain an equivalent voltage 526 proportional to the output power. The equivalent voltage 526 is then input to four low-dropout linear regulators in the bias comparison circuit 4. The two low-dropout linear regulators adjust the equivalent voltages based on the operating state of the first-stage amplifier circuit of the power amplifier circuit 5 to obtain two branch equivalent voltages. The two low-dropout linear regulators compare the corresponding branch equivalent voltages with the control voltage and generate bias voltages 534 and collector voltages 533 corresponding to the first-stage amplifier circuit via nodes 508 and 511 until the generated bias voltages and collector voltages equal the corresponding branch equivalent voltages. The other two low-dropout linear regulators also adjust the equivalent voltages based on the operating state of the second-stage amplifier circuit of the power amplifier circuit 5 to obtain two branch equivalent voltages. The two low-dropout linear regulators compare the corresponding branch equivalent voltages with the control voltages, respectively, and generate bias voltages 532 and collector voltages 531 corresponding to the second-stage amplifier circuit via nodes 519 and 522, respectively, until the generated bias voltages and collector voltages make the corresponding branch equivalent voltages equal to the control voltages.

[0039] As shown in Fig. 8, when the collector voltage provided by the bias comparison circuit 4 of the second stage amplifier circuit changes from 0.4 V to 3.4 V, the output power of the power amplifier circuit changes from 11 dBm to 35 dBm. Therefore, Fig. 4 and Fig. 8 show that the power amplifier circuit can obtain different output powers by setting different control voltages.

[0040] In an RF power amplifier provided according to an embodiment of the present invention, a power detection circuit detects the output power on the main signal path, obtains an equivalent voltage proportional to the output power, and inputs it into a bias comparison circuit. The value of the equivalent voltage is adjusted by the bias comparison circuit and compared with a control voltage to provide a bias voltage and / or collector voltage to the power amplifier circuit. In this way, a closed-loop circuit is formed, achieving the goal of stably controlling the output power of the power amplifier circuit. Furthermore, by detecting the output power on the main signal path, the operating states of the amplifier circuits at each stage can be adjusted, thereby suppressing changes in the operating state of the RF power amplifier due to process variations and reducing the impact of changes in input power on the operating state of the RF power amplifier. Therefore, the RF power amplifier can maintain stable operation of gain and output power under different power levels.

[0041] The RF power amplifier provided by the embodiment of the present invention can also be used in an integrated circuit chip, the specific structure of which will not be described in detail herein.

[0042] The RF power amplifier can also be used in a communication terminal as an important component of a communication part, as shown in Figure 9. The communication terminal referred to here refers to computer equipment including mobile phones, laptops, tablet PCs, car computers, etc. that support various communication standards such as GSM, EDGE, WiFi, and 4G / 5G that can be used in a mobile environment. The technical solutions provided by the embodiments of the present invention are also applicable to cases where other communication parts, such as a communication base station, are used.

[0043] 9 is a structural block diagram of a communication terminal according to an embodiment of the present invention. Referring to FIG. 9, a communication terminal 800 may include one or more components: a processing component 802, a memory 804, a power supply component 806, an input / output (I / O) interface 812, a sensor component 814, and a communication component 816.

[0044] The processing component 802 generally controls the overall operation of the communication terminal 800. The processing component 802 may include one or more processors 820 that execute commands to complete all or some of the steps of the above methods. The processing component 802 may also include one or more modules that facilitate interaction between the processing component 802 and other components.

[0045] The memory 804 is configured to store various types of data to support the operation of the communication terminal 800. Examples of such data include commands for any application programs or methods operating on the communication terminal 800. The memory 804 may be implemented with any type of volatile or non-volatile storage device, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk, or optical disk, or a combination thereof.

[0046] The power component 806 provides power to the various components of the communications terminal 800. The power component 806 may include a power management system, one or more power sources, and other components associated with the generation, management, and distribution of power to the communications terminal 800. The I / O interface 812 provides an interface between the processing component 802 and a peripheral interface module, which may be a keyboard, scroll wheel, buttons, etc.

[0047] The sensor component 814 includes one or more sensors for providing various aspects of state assessment to the communication terminal 800. In some embodiments, the sensor component 814 includes an acceleration sensor, a gyro sensor, a magnetic sensor, a pressure sensor, or a temperature sensor, etc.

[0048] The communication component 816 is configured to facilitate wired or wireless communication between the communication terminal 800 and another device, preferably a 4G / 5G access module. The communication terminal 800 can access wireless networks based on various communication standards, such as GSM, EDGE, WiFi, 4G / 5G, or a combination thereof.

[0049] The RF power amplifier, chip and communication terminal provided by the embodiments of the present invention have been described in detail above. Any obvious modifications made thereto by those skilled in the art without departing from the essential content of the present invention shall fall within the scope of protection of the claims of the present invention.

Claims

1. 1. An RF power amplifier comprising: The power amplifier circuit includes an output matching circuit, a power detection circuit, and a bias comparison circuit. the power amplifier circuit, the output matching circuit, and an output load are connected in this order to form a main signal path; an input terminal of the power detection circuit is connected to a node on the main signal path; an output terminal of the power detection circuit is connected to an input terminal of the bias comparison circuit; the bias comparison circuit includes N low-dropout linear regulators, where N is a positive integer determined by the number of collector voltages required by the power amplifier circuit, the input terminals of the low-dropout linear regulators each receive a preset control voltage and are connected to the output terminal of the power detection circuit, and the output terminals of the low-dropout linear regulators are connected to the collector terminals of the power amplifier circuit; The output power of the main signal path is detected by the power detection circuit to obtain an equivalent voltage proportional to the output power, and the equivalent voltage is input to the bias comparison circuit, and then, in each of the low-dropout linear regulators, the value of the equivalent voltage is adjusted according to the working state of the power amplification circuit to obtain one or more branch equivalent voltages; each of the branch equivalent voltages is compared with the control voltage in each of the low-dropout linear regulators, and a collector voltage continues to be supplied to the collector terminal of the power amplifier circuit until the control voltage becomes equal to the branch equivalent voltage and corresponds to an output power level required by the RF power amplifier.

2. 2. The RF power amplifier according to claim 1, wherein the power detection circuit comprises a coupler and an envelope detector, an input terminal of the coupler is connected to the output terminal of the power amplification circuit via the output matching circuit, a through output terminal of the coupler is connected to the output load, a coupled output terminal of the coupler is connected to the input terminal of the envelope detector, and an output terminal of the envelope detector is connected to the input terminal of the bias comparison circuit.

3. 3. The RF power amplifier of claim 2, wherein the coupler is replaced by a capacitor.

4. 3. The RF power amplifier of claim 2, wherein the envelope detector comprises a first resistor, a second resistor, a third resistor, a first diode, a fourth resistor, and a first capacitor, the first resistor and the second resistor being connected between a power supply and ground, the third resistor being connected between an anode of the first diode and a common node of the first resistor and the second resistor, and the cathode of the first diode being connected to the ground through a parallel network of the fourth resistor and the first capacitor.

5. 2. The RF power amplifier according to claim 1, wherein each of the low-dropout linear regulators comprises a fifth resistor, a sixth resistor, an operational amplifier, a PMOS transistor, and a seventh resistor, the fifth resistor and the sixth resistor being connected between a third node and ground, a positive input terminal of the operational amplifier being connected to a common node between the fifth resistor and the sixth resistor, an inverting input terminal of the operational amplifier being connected to an external baseband circuit, an output terminal of the operational amplifier being connected to a gate of the PMOS transistor, a source of the PMOS transistor being connected to a power supply, and a drain of the PMOS transistor being connected to ground via the seventh resistor.

6. 2. The RF power amplifier according to claim 1, wherein the power amplifier circuit comprises one or more amplifier circuits and bias circuits corresponding to each of the single-stage amplifier circuits, and each of the single-stage amplifier circuits is connected to a corresponding one of the bias circuits.

7. 7. The RF power amplifier according to claim 6, wherein the specific node on the main signal path includes an amplifier circuit of any one stage of the power amplifier circuit, a first node, and a second node.

8. 1. An integrated circuit chip comprising:

8. An integrated circuit chip comprising an RF power amplifier according to claim 1.

9. A communication terminal, A communication terminal comprising the RF power amplifier according to any one of claims 1 to 7.

Images