Low noise amplifier and radio frequency chip

Abstract

The utility model relates to the technical field of wireless communication, and provides a low noise amplifier and a radio frequency chip, comprising an input matching circuit, a power amplification circuit and an output matching circuit which are electrically connected in sequence, the power amplification circuit comprises a first MOS tube and a second MOS tube, the grid electrode of the first MOS tube is used as the input end of the power amplification circuit and is connected to the output end of the input matching circuit, the source electrode of the first MOS tube is grounded, the drain electrode of the first MOS tube is connected with the source electrode of the second MOS tube, and the drain electrode of the second MOS tube is used as the output end of the power amplification circuit and is connected to the input end of the output matching circuit; the low-noise amplifier further comprises an inductance switching circuit capable of being combined into different inductance values, and the source electrode of the first MOS tube is connected with the inductance switching circuit in series and then is grounded. According to the low-noise amplifier, switching of various inductance values of the source electrode inductor can be achieved, and higher flexibility is brought to compromise of indexes of low-gain gears.

Description

TECHNICAL FIELD

[0001] The utility model relates to wireless communication technical field especially relates to a kind of low noise amplifier and radio frequency chip. BACKGROUND

[0002] In wireless communication system, low noise amplifier is the key component for realizing radio frequency signal wireless transmission. As a key link in receiver, the performance of low noise amplifier directly affects the overall performance (gain, power consumption, noise figure, linearity, area, etc.) of receiver. In intelligent terminal application, with the change of input signal strength, the gain, noise figure, IIP3 (third-order intermodulation intercept input power) required by low noise amplifier are also different. The increase of source inductance has many advantages for low gain position design, such as large gain reduction degree, small noise figure deterioration, large IIP3 improvement degree, etc. The switching of source inductance is also widely used in low noise amplifier design.

[0003] Currently, there are two main designs for inductance switching: one is to directly separate two inductances, and the other is to nest two inductances in the same plane. However, the former occupies a large area and has three inductance values; the latter occupies a small area, but only two inductance values can be switched. Therefore, the existing inductance switching is troublesome, and the flexibility of gain position design is poor. In the face of the growing demand for low cost in the market, how to balance the cost and the performance of each gain position is an important part of low noise amplifier design. SUMMARY

[0004] In view of the above problems of the prior art, the utility model provides a low noise amplifier to solve the problem of troublesome source inductance switching and large area occupation of the existing low noise amplifier.

[0005] To solve the above technical problems, the utility model adopts the following technical solutions:

[0006] In a first aspect, the utility model provides a low noise amplifier, which comprises an input matching circuit, a power amplifier circuit and an output matching circuit connected in sequence. The power amplifier circuit comprises a first MOS tube and a second MOS tube. The gate of the first MOS tube is connected to the output of the input matching circuit as the input of the power amplifier circuit. The source of the first MOS tube is grounded. The drain of the first MOS tube is connected to the source of the second MOS tube. The gate of the second MOS tube is used to connect the logic control signal input by the external logic control circuit. The drain of the second MOS tube is connected to the input of the output matching circuit as the output of the power amplifier circuit.

[0007] The low noise amplifier further comprises an inductance switching circuit capable of combining into different inductance values, the source of the first MOS transistor is connected to ground through the inductance switching circuit in series, the input end of the inductance switching circuit is used for connecting the external logic control circuit, and the output end of the inductance switching circuit is connected to the source of the first MOS transistor, so that the inductance switching circuit is controlled by the external logic control circuit to realize the switching of different inductance values connected to the source of the first MOS transistor.

[0008] Preferably, the inductance switching circuit comprises a first inductor, a second inductor, a first switch tube and a second switch tube.

[0009] The control end of the first switch tube and the control end of the second switch tube are used as the input end of the inductance switching circuit, the first end of the first switch tube and the first end of the second switch tube are connected to ground respectively, the second end of the first switch tube is used for connecting to the first end of the first inductor, the second end of the second switch tube is used for connecting to the first end of the second inductor, the second end of the first inductor and the second end of the second inductor are connected and used as the output end of the inductance switching circuit, and the conduction or disconnection of the first switch tube and the second switch tube is controlled by the external logic control circuit to realize the switching of the inductance value connected to the source of the first MOS transistor.

[0010] Preferably, the first switch tube is a third MOS tube, the second switch tube is a fourth MOS tube, the gate of the third MOS tube is the control end of the first switch tube, the gate of the fourth MOS tube is the control end of the second switch tube, the source of the third MOS tube is the first end of the first switch tube, the source of the fourth MOS tube is the first end of the second switch tube, the drain of the third MOS tube is the second end of the first switch tube, and the drain of the fourth MOS tube is the second end of the second switch tube.

[0011] Preferably, the first inductor is formed into a first coil layer by winding a wire, the second inductor is formed into a second coil layer by winding a wire, the first coil layer is stacked above the second coil layer and spaced from each other, the first end of the first coil layer is used as the first end of the first inductor, and the second end of the first coil layer is used as the second end of the first inductor; the first end of the second coil layer is used as the first end of the second inductor, the second end of the second coil layer is used as the second end of the second inductor, and the second end of the first coil layer is connected to the second end of the second coil layer.

[0012] Preferably, the orthographic projection of the first coil layer to the direction of the second coil layer at least partially or completely falls into the range of the second coil layer.

[0013] Preferably, the first coil layer comprises a first ring and at least one second ring, an inner connecting segment, an outer connecting segment and an extension segment arranged in sequence from inside to outside; the second coil layer comprises a plurality of third rings arranged in sequence from inside to outside; an end of the first ring serves as a second end of the first coil layer, an end of the innermost third ring in the second coil layer serves as a second end of the second coil layer, the outer connecting segment connects the second end of the first coil layer and the second end of the second coil layer; each second ring corresponds to a position of the outer connecting segment to form a breakage, the extension segment extends outward from the outer connecting segment and passes through the breakage; the number of the outer connecting segments matches the number of the second rings, each outer connecting segment communicates with the breakage of one of the second rings and is insulated from the extension segment.

[0014] Preferably, the low-noise amplifier further comprises a first capacitor, a first end of the first capacitor is connected to the gate of the first MOS tube, and a second end of the first capacitor is connected to the source of the first MOS tube.

[0015] Preferably, the input matching circuit comprises a third inductor and a second capacitor, a first end of the third inductor serves as an input end of the input matching circuit, a second end of the third inductor is connected to a first end of the second capacitor, and a second end of the second capacitor serves as an output end of the input matching circuit.

[0016] Preferably, the output matching circuit comprises a fourth inductor and a third capacitor, a first end of the fourth inductor is used for connecting a power supply, a second end of the fourth inductor is connected to a first end of the third capacitor and serves as an input end of the output matching circuit, and a second end of the third capacitor serves as an output end of the output matching circuit.

[0017] In the second aspect, the utility model embodiment provides a radio frequency chip, comprising the low-noise amplifier as described above.

[0018] Compared with the related art, in the embodiment of the utility model, through the input matching circuit, power amplifier circuit and output matching circuit are electrically connected in proper order, power amplifier circuit includes first MOS pipe and second MOS pipe, the gate of first MOS pipe is connected to the output of input matching circuit as the input of power amplifier circuit, the drain of first MOS pipe connects the source of second MOS pipe, the gate of second MOS pipe is used for connecting the logic control signal of external logic control circuit input, the drain of second MOS pipe is connected to the input of output matching circuit as the output of power amplifier circuit;Low noise amplifier still includes inductance switching circuit that can be combined into different inductance value, the source of first MOS pipe is connected after the series connection inductance switching circuit and ground;The input of inductance switching circuit is used for connecting external logic control circuit, the output of inductance switching circuit connects the source of first MOS pipe, and the switching of different inductance value of the source of first MOS pipe is realized by external logic control circuit control inductance switching circuit;It can realize the switching of multiple inductance value in smaller area, and the size of source inductance is important to the balance of the four major indicators of IIP3, current, NF (noise factor) and gain of each gain position of low noise amplifier. More inductance value selection brings greater flexibility to the index design of each gain position. BRIEF DESCRIPTION OF DRAWINGS

[0019] The above and other aspects of the present utility model will become more apparent and more readily appreciated from the following detailed description, taken in conjunction with the accompanying drawings, in which:

[0020] Figure 1 The circuit structure block diagram of the low noise amplifier provided for the embodiment of the present utility model is shown in the figure;

[0021] Figure 2 The inductance three-dimensional structure schematic diagram of the inductance switching circuit of the low noise amplifier provided for the embodiment of the present utility model is shown in the figure;

[0022] Figure 3 The top view of Figure 2

[0023] Figure 4 The inductance value of different frequencies when the switch tube S1 and switch tube S2 of the low noise amplifier provided for the embodiment of the present utility model are opened simultaneously is shown in the figure;

[0024] Figure 5 The inductance value of different frequencies when the switch tube S1 of the low noise amplifier provided for the embodiment of the present utility model is opened and the switch tube S2 is closed is shown in the figure;

[0025] Figure 6 The inductance value of different frequencies when the switch tube S1 of the low noise amplifier provided for the embodiment of the present utility model is closed and the switch tube S2 is opened is shown in the figure. ​

[0026] Wherein, 100, low noise amplifier, 1, input matching circuit, 2, power amplifier circuit, 3, output matching circuit, 4, inductance switching circuit, 41, first coil layer, 411, first ring, 412, second ring, 413, inner connecting section, 414, outer connecting section, 415, extension section; 42, second coil layer, 421, third ring, 5, break. DETAILED DESCRIPTION

[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used in the description herein is for describing particular embodiments only and is not intended to be limiting upon the application; the terms "comprising," "including," and "having," and variations thereof, as used in enrolling and claims herein, are intended to be inclusive in a manner similar to the term "comprising" when employed as such term is employed in the patent law; the terms "first," "second," and "third," and the like, as used in the description herein, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order.

[0028] Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase "in an embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are they necessarily all directed to the same embodiments, alternative or alternative embodiments.

[0029] The technical solutions in the embodiments of the present application will be apparently and completely described in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0030] Embodiment one

[0031] Please refer to Figures 1-6As shown, the utility model embodiment provides a kind of low noise amplifier 100, including input matching circuit 1, power amplifier circuit 2 and output matching circuit 3 that are electrically connected in turn.The input matching circuit 1 is used to access radio frequency signal, the power amplifier circuit 2 is used to amplify the radio frequency signal, the output matching circuit 3 is used to match the radio frequency signal after amplification and output to load.The power amplifier circuit 2 includes first MOS tube M1 and second MOS tube M2, the gate of the first MOS tube M1 is connected as the input end of the power amplifier circuit 2 to the output end 1 of the input matching circuit, the source of the first MOS tube M1 is grounded, the drain of the first MOS tube M1 is connected the source of the second MOS tube M2, the gate of the second MOS tube M2 is used to connect the logic control signal input by external logic control circuit, the drain of the second MOS tube M2 is connected as the output end of the power amplifier circuit 2 to the input end of the output matching circuit 3.

[0032] The low noise amplifier 100 further includes inductance switching circuit 4 that can be combined into different inductance values, the source of the first MOS tube M1 is grounded after being connected in series with the inductance switching circuit 4;The input end of the inductance switching circuit 4 is used to connect the external logic control circuit, the output end of the inductance switching circuit 4 is connected the source of the first MOS tube M1, and the inductance switching circuit 4 is controlled by the external logic control circuit to realize the switching of different inductance values accessed to the source of the first MOS tube M1.By the external logic control circuit output control signal, the inductance switching circuit 4 is controlled to adjust inductance value, so that the low noise amplifier 100 can realize the switching of multiple inductance values in smaller area, and the size of source inductance is important for balancing the four indexes of IIP3, current, NF and gain of each gain position of the low noise amplifier 100.More inductance value selection brings greater flexibility to the index design of each gain position.

[0033] In the embodiment, the inductance switching circuit 4 includes first inductance L1, second inductance L2, first switch tube S1 and second switch tube S2.The control end of the first switch tube and the control end of the second switch tube are commonly used as the input end of the inductance switching circuit, the first end of the first switch tube and the first end of the second switch tube are grounded respectively, the second end of the first switch tube is used to be connected to the first end of the first inductance, the second end of the second switch tube is used to be connected to the first end of the second inductance, the second end of the first inductance and the second end of the second inductance are connected and used as the output end of the inductance switching circuit;The inductance value switching accessed to the source of the first MOS tube is realized by controlling the conduction or disconnection of the first switch tube and the second switch tube respectively by the external logic control circuit.

[0034] Specifically, the first inductor L1 and the second inductor L2 are connected via the first switch S1 and the second switch S2, respectively, as follows: Figure 4 As shown, when the first switch S1 and the second switch S2 are turned on simultaneously, there is coupling between the first inductor L1 and the second inductor L2, which can cancel out most of the inductance value. At this time, the total inductance of the source inductor is at its minimum. Simultaneously, a difference in inductance value can also exist between the first inductor L1 and the second inductor L2. For example... Figure 5 As shown, when the first switch S1 is on and the second switch S2 is off, the total inductance of the source inductors is equal to the inductance value of the first inductor L1. Figure 6 As shown, when the second switch S2 is on and the first switch S1 is off, the total inductance of the source inductors is equal to the inductance value of the second inductor L2. Therefore, by designing the sizes of the first inductor L1 and the second inductor L2, the inductance values ​​of these three inductors can be controlled separately. This allows for switching between three inductance values ​​within a compact area, meeting increasingly stringent performance requirements under a wider range of gain levels, without increasing the area required.

[0035] In this embodiment, the first switch S1 is a third MOS transistor, and the second switch S2 is a fourth MOS transistor. The gate of the third MOS transistor is the control terminal of the first switch S1, and the gate of the fourth MOS transistor is the control terminal of the second switch S2. The source of the third MOS transistor is the first terminal of the first switch S1, and the source of the fourth MOS transistor is the first terminal of the second switch S2. The drain of the third MOS transistor is the second terminal of the first switch S1, and the drain of the fourth MOS transistor is the second terminal of the second switch S2.

[0036] Specifically, the gates of the first switch S1 and the second switch S2 serve as the input terminals of the inductor switching circuit 4 and are respectively connected to the external logic control circuit. The source of the first switch S1 is connected to the source of the second switch S2 and grounded. The drain of the first switch S1 is connected to the first terminal of the first inductor L1, and the drain of the second switch S2 is connected to the first terminal of the second inductor L2. The second terminals of the first inductor L1 and the second inductor L2 are connected and serve as the output terminals of the inductor switching circuit 4.

[0037] In the embodiment, the first inductor L1 is formed by winding a wire to form a first coil layer 41, the second inductor L2 is formed by winding a wire to form a second coil layer 42, and the first coil layer 41 is stacked above the second coil layer 42 and spaced apart from each other. The first end (port 2) of the first coil layer 41 serves as the first end of the first inductor L1, and the second end (port 1) of the first coil layer 41 serves as the second end of the first inductor L1. The first end (port 3) of the second coil layer 42 serves as the first end of the second inductor L2, and the second end of the second coil layer 42 serves as the second end of the second inductor L2. The second end of the first coil layer 41 is connected to the second end of the second coil layer 42.

[0038] Specifically, the second end of the first coil layer 41 is connected to the source of the first MOS tube M1, the first end of the first coil layer 41 is connected to the upper end of the first switch tube S1, and the first end of the second coil layer 42 is connected to the upper end of the second switch tube S2. When the two switches are opened at the same time, the upper and lower coil layers are coupled to cancel part of the inductance, at which time the inductance is smallest. The inductance can be adjusted by the coupling area of the upper and lower coil layers. When the second switch tube S2 is opened and the first switch tube S1 is closed, the first coil layer 41 works, and the inductance is medium. When the second switch tube S2 is opened and the first switch tube S1 is closed, the second coil layer 42 works, and the inductance is largest. Therefore, by controlling the switches in different ways, three different inductances can be switched. Thus, the low-noise amplifier 100 improves the performance of the low-gain gear, and brings greater flexibility to the compromise of various indicators of the low-gain gear.

[0039] In the embodiment, the orthographic projection of the first coil layer 41 in the direction of the second coil layer 42 at least partially or completely falls within the range of the second coil layer 42. By designing the size and overlapping area of the two first coil layers 41 and the second coil layer 42, the inductance of the three inductors can be controlled respectively.

[0040] In the embodiment, the first coil layer 41 comprises a first ring 411 and at least one second ring 412, an inner connecting segment 413, an outer connecting segment 414 and an extension segment 415 arranged in sequence from inside to outside; the second coil layer 42 comprises a plurality of third rings 421 arranged in sequence from inside to outside. The end of the first ring 411 is the second end of the first coil layer 41, the end of the innermost third ring 421 in the second coil layer 42 is the second end of the second coil layer 42, and the outer connecting segment 414 connects the second end of the first coil layer 41 and the second end of the second coil layer 42. Each second ring 412 corresponds to the position of the outer connecting segment 414 to form a break 5, and the extension segment 415 extends outward from the outer connecting segment 414 and passes through the break 5. The number of the outer connecting segments 414 matches the number of the second rings 412, each outer connecting segment 414 connects the break 5 of one of the second rings 412 and is insulated from the extension segment 415. The installation space is saved.

[0041] In the embodiment, the low noise amplifier 100 further comprises a first capacitor C1, a first end of the first capacitor C1 is connected to the gate of the first MOS transistor M1, and a second end of the first capacitor C1 is connected to the source of the first MOS transistor M1. The first capacitor C1 can realize impedance and resonance functions.

[0042] In the embodiment, the input matching circuit 1 comprises a third inductor L3 and a second capacitor C2, a first end of the third inductor L3 is used as an input end of the input matching circuit 1, a second end of the third inductor L3 is connected to a first end of the second capacitor C2, and a second end of the second capacitor C2 is used as an output end of the input matching circuit 1. The third inductor L3 and the second capacitor C2 can perform direct current isolation and impedance matching adjustment on the input radio frequency signal, so that the radio frequency signal output by the input matching circuit 1 has good performance.

[0043] In the embodiment, the output matching circuit 3 comprises a fourth inductor L4 and a third capacitor C3, a first end of the fourth inductor L4 is used for connecting a power supply VDD, a second end of the fourth inductor L4 is connected to a first end of the third capacitor C3 and is used as an input end of the output matching circuit 3, and a second end of the third capacitor C3 is used as an output end of the output matching circuit 3. The output radio frequency signal is matched and adjusted and then output to a load.

[0044] Embodiment two

[0045] The embodiment of the utility model provides a kind of radio frequency chip, including low noise amplifier 100 as above mentioned.The radio frequency chip can realize the switching of multiple inductance in smaller area, and the size of source inductance is important to the balance of four indexes of IIP3, current, NF and gain of radio frequency chip each gain position.The more inductance value selection brings greater flexibility to the index design of each gain position.

[0046] It should be noted that the various embodiments described above with reference to the drawings are merely intended to illustrate the present application and not to limit the scope of the present application, and those skilled in the art should understand that modifications or equivalent replacements made to the present application without departing from the spirit and scope of the present application shall be covered within the scope of the present application. In addition, unless the context indicates otherwise, the word in singular form includes the word in plural form, and vice versa. In addition, unless specifically stated, all or part of any embodiment can be used in conjunction with all or part of any other embodiment.

Claims

1. A low noise amplifier, comprising an input matching circuit, a power amplifier circuit and an output matching circuit connected in sequence; the power amplifier circuit comprises a first MOS tube and a second MOS tube, a gate of the first MOS tube is connected to an output of the input matching circuit as an input of the power amplifier circuit, a source of the first MOS tube is grounded, a drain of the first MOS tube is connected to a source of the second MOS tube, a gate of the second MOS tube is used for connecting a logic control signal input by an external logic control circuit, and a drain of the second MOS tube is connected to an input of the output matching circuit as an output of the power amplifier circuit; characterized in that, the low noise amplifier further comprises an inductance switching circuit capable of being combined into different inductance values, the source of the first MOS tube is connected to the ground through the inductance switching circuit in series; an input of the inductance switching circuit is used for connecting the external logic control circuit, an output of the inductance switching circuit is connected to the source of the first MOS tube, and the inductance switching circuit is controlled by the external logic control circuit to realize switching of different inductance values connected to the source of the first MOS tube. The inductance switching circuit comprises a first inductance, a second inductance, a first switch tube and a second switch tube.

2. The low noise amplifier of claim 1, wherein, A control end of the first switch tube and a control end of the second switch tube are used as the input of the inductance switching circuit, a first end of the first switch tube and a first end of the second switch tube are grounded respectively, a second end of the first switch tube is used for connecting to a first end of the first inductance, a second end of the second switch tube is used for connecting to a first end of the second inductance, a second end of the first inductance and a second end of the second inductance are connected and used as the output of the inductance switching circuit; the first switch tube and the second switch tube are controlled by the external logic control circuit to realize switching of inductance values connected to the source of the first MOS tube. The first switch tube is a third MOS tube, and the second switch tube is a fourth MOS tube; a gate of the third MOS tube is the control end of the first switch tube, and a gate of the fourth MOS tube is the control end of the second switch tube; a source of the third MOS tube is the first end of the first switch tube, and a source of the fourth MOS tube is the first end of the second switch tube; a drain of the third MOS tube is the second end of the first switch tube, and a drain of the fourth MOS tube is the second end of the second switch tube.

3. The low noise amplifier of claim 2, wherein, The first inductance is formed by winding a first coil layer by a wire, the second inductance is formed by winding a second coil layer by a wire, the first coil layer is stacked above the second coil layer and spaced from each other, a first end of the first coil layer is used as the first end of the first inductance, and a second end of the first coil layer is used as the second end of the first inductance; a first end of the second coil layer is used as the first end of the second inductance, and a second end of the second coil layer is used as the second end of the second inductance, and the second end of the first coil layer is connected to the second end of the second coil layer.

4. The low noise amplifier of claim 3, wherein, ​ 5. The low noise amplifier of claim 4, wherein, The first coil layer is at least partially or completely projected onto the second coil layer.

6. The low noise amplifier of claim 4, wherein, The first coil layer comprises a first ring and at least one second ring, an inner connecting segment, an outer connecting segment and an extension segment arranged from inside to outside; the second coil layer comprises a plurality of third rings arranged from inside to outside; the end of the first ring is the second end of the first coil layer, the end of the innermost third ring in the second coil layer is the second end of the second coil layer, the outer connecting segment connects the second end of the first coil layer and the second end of the second coil layer; each second ring corresponds to the position of the outer connecting segment to form a break, the extension segment extends outward from the outer connecting segment and passes through the break; the number of the outer connecting segments matches the number of the second rings, each outer connecting segment connects the break of one of the second rings and is insulated from the extension segment.

7. The low noise amplifier of claim 3, wherein, The low noise amplifier further comprises a first capacitor, a first end of the first capacitor is connected to the gate of the first MOS tube, and a second end of the first capacitor is connected to the source of the first MOS tube.

8. The low noise amplifier of claim 1, wherein, The input matching circuit comprises a third inductor and a second capacitor, a first end of the third inductor is used as an input end of the input matching circuit, a second end of the third inductor is connected to a first end of the second capacitor, and a second end of the second capacitor is used as an output end of the input matching circuit.

9. The low noise amplifier of claim 1, wherein, The output matching circuit comprises a fourth inductor and a third capacitor, a first end of the fourth inductor is used for connecting a power supply, a second end of the fourth inductor is connected to a first end of the third capacitor and used as an input end of the output matching circuit, and a second end of the third capacitor is used as an output end of the output matching circuit.

10. A radio frequency chip, characterized by The low noise amplifier comprises the low noise amplifier according to any one of claims 1-9. The low noise amplifier comprises the low noise amplifier according to any one of claims 1-9.

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