Signal Chain with Embedded Power Management

Abstract

To provide a system for processing a signal in a signal chain having distributed embedded power management of a component of the signal chain.SOLUTION: A system includes an input circuit that produces a measurement signal in response to an impulse, and the measurement signal exhibits a characteristic of the impulse. In addition, the system includes a signal conversion circuit coupled to the input circuit to convert the measurement signal into a digital signal according to a timing condition for capturing a sample of the measurement signal. The signal conversion circuit includes: a control circuit that supplies electric power to the input circuit based on the timing condition; and a sampling circuit that captures the sample of the measurement signal in response to an indicator signal generated by a sensor circuit.SELECTED DRAWING: Figure 1A

Description

[Technical Field]

[0001] This document relates generally, but not exclusively, to data acquisition circuits and, more particularly, to power management in data acquisition circuits. [Background technology]

[0002] A data acquisition system may include an electronic signal chain having circuitry that acquires analog signals indicative of a physical condition and converts these analog signals to digital signals for processing or analysis. An example of such a signal chain is described in U.S. Patent No. 9,083,369 B2, entitled "Split-path data acquisition signal chain," and issued to Michael Coln and Lalinda D. Fernando on July 14, 2015. The 9,083,369 B2 patent discusses a data acquisition system having a signal chain that includes a sensor circuit that generates an analog signal based on a measured physical condition, a signal conditioning circuit that converts the analog signal into a form suitable for processing by a data conversion circuit such as a digital-to-analog converter, a conversion circuit that converts the conditioned signal into a digital signal, and a signal processing circuit that further processes the digital signal. Some data acquisition systems may include signal offset cancellation components, such as an auto-zeroing circuit or a chopping circuit. An example of such an offset cancellation circuit is discussed in U.S. Patent No. 7,834,685 B1, entitled "Chopped auto-zeroed ping-pong amplifier and related apparatus, system, and method," which was granted to Michiel Antonius Petrus Pertijs on November 16, 2010. The 7,834,685 B1 patent discusses an apparatus having two or more amplifier stages, where at least one amplifier stage operates in an auto-zeroing phase while at least one other amplifier stage operates in an amplifying phase. Summary of the Invention [Means for solving the problem]

[0003] A system for processing signals in a signal chain having distributed embedded power management of components of the signal chain may include an input circuit that generates a measurement signal in response to a stimulus, the measurement signal being indicative of a characteristic of the stimulus. Additionally, the system may include a signal conversion circuit coupled to the input circuit for converting the measurement signal to a digital signal according to a timing condition for taking a sample of the measurement signal. The signal conversion portion may include a control circuit that provides power to the input circuit based on the timing condition, and a sampling circuit that takes a sample of the measurement signal in response to an indicator signal generated by a sensor circuit.

[0004] A system for processing signals in a signal chain having distributed embedded power management of components of the signal chain may include a sensor circuit that generates a measurement signal indicative of a physical quantity, a conditioning circuit coupled to an output of the sensor circuit to provide a conditioned measurement signal according to an input circuit reference, and a conversion circuit coupled to the conditioning circuit to convert samples of the conditioned measurement signal into a digital signal. The conversion circuit may include a first control circuit that, in response to providing a control signal to the conditioning circuit, supplies a control signal to the control circuit and powers off the conversion circuit, and a second control circuit that, in response to the conditioning circuit providing the conditioned measurement signal, powers on the conversion circuit.

[0005] A method of operating a signal chain having distributed embedded power management of components may include providing a first control signal from a signal conversion circuit to a signal conditioning circuit, the first control signal providing power to the signal conditioning circuit to generate a measurement signal. The method may further include powering off the signal conversion circuit in response to the first control signal being asserted, obtaining a second control signal from the signal conditioning circuit in response to the signal conditioning circuit generating the measurement signal, and powering on the signal conversion circuit to obtain a sample of the measurement signal in response to receiving the second control signal.

[0006] This Summary is intended to provide an overview of the subject matter of this patent application. It is not intended to provide an exclusive or exhaustive description of the invention. The Detailed Description is included to provide further information regarding this patent application. [Brief explanation of the drawings]

[0007] [Figure 1A] 1 illustrates an example of a signal chain with embedded power management integrated into signal conditioning and data conversion circuits.

[0008] [Figure 1B] 1 illustrates an example of electronic signals associated with the operation of a signal chain having embedded power management incorporated into signal conditioning and data conversion circuits.

[0009] [Figure 2] 1 shows an example of a signal chain with embedded power management incorporated into the conversion circuitry.

[0010] [Figure 3A] 1 illustrates an example signal chain with embedded power management and signal offset cancellation components to reduce offsets in conditioning and conversion circuits.

[0011] [Figure 3B] 1 illustrates an example signal chain with embedded power management and auto-zeroing signal offset cancellation components to reduce offsets in conditioning and conversion circuits.

[0012] [Figure 4A] 1 illustrates an example signal chain with embedded power management and signal offset cancellation components to reduce offsets in the sensor and conversion circuitry.

[0013] [Figure 4B] 1 illustrates an example signal chain with embedded power management and auto-zeroing signal offset cancellation components to reduce offsets in the sensor and conversion circuitry.

[0014] [Figure 5A] 1 illustrates example electronic signals associated with the operation of a signal chain having embedded power management incorporated into a conversion circuit or signal conditioning circuit for analog offset cancellation.

[0015] [Figure 5B] 1 illustrates example electronic signals associated with the operation of a signal chain having power management integrated into signal conditioning circuits and data conversion circuits for digital offset cancellation.

[0016] [Figure 6] 1 illustrates an example of a handshake circuit for implementing a protocol for power management in a signal chain with embedded power management.

[0017] [Figure 7] 1 illustrates an example process for operating a signal chain with embedded power management.

[0018] [Figure 8A] 1 illustrates an example of a signal chain with embedded power management integrated into data conversion circuitry and signal conditioning circuitry with selectable bandwidth.

[0019] [Figure 8B] 1 illustrates an example of electronic signals associated with the operation of a signal chain having embedded power management incorporated into data conversion circuits and signal conditioning circuits with selectable bandwidth.

[0020] The drawings, which are not necessarily drawn to scale, may include like numerals that describe like components in different drawings. Like numerals with different subscripts may represent different instances of like components. The drawings illustrate generally, by way of example, but not by way of limitation, various embodiments discussed in this document. DETAILED DESCRIPTION OF THE INVENTION

[0021] The present disclosure includes techniques for embedded or distributed power management and offset cancellation in electronic signal chains (hereinafter “signal chain(s)”). Such techniques may include signal chains in which sensors, signal conditioning, or data conversion circuits are configured to implement a protocol or signaling scheme whereby the data conversion circuit can synchronize the power-on or power-off times of the signal conditioning circuit or sensor circuit according to the sample time of the data conversion circuit. Such techniques also include signal chains in which sensors, signal conditioning, or data conversion circuits are configured to implement a protocol or signaling scheme whereby the signal conditioning circuit can synchronize the power-on or power-off times of the signal conditioning circuit with the power-on and power-off times of the signal conditioning circuit. The techniques may help enable higher resolution or finer granularity of power management, such as by reducing the power-on time of each component in the signal chain. The techniques may also help facilitate signal offset cancellation in the data conversion circuit without requiring the use of low-pass filters required to attenuate switching artifacts of the offset cancellation algorithm in the signal conditioning circuit.

[0022] As used herein, power management includes techniques for cutting off or reducing power to one or more components of a system when the system or component is inactive, when the component or system is not being used to produce a useful signal or result, etc. Power consumption can be reduced by reducing or minimizing the system's power-on time or power-on duty cycle. A microcontroller or other centrally located control circuit can implement power management in a data acquisition system's signal chain. Such centralized or microcontroller-based power management techniques may include simultaneously power cycling all components of the signal chain to manage power consumption. However, such an approach can result in suboptimal power management because the signal chain component with the longest power-on or settling time determines or sets the minimum duration of the power-on duty cycle. This may result in one or more faster components, such as components with shorter power-on or settling times, being used while not actively being used to perform work or generate useful data or signals. In one example, a fast-settling, low-resistance strain gauge sensor placed in the same signal chain as a signal conditioning circuit (hereinafter, the conditioning circuit), such as an amplifier with a slow settling time, may provide power for the entire time it takes for the amplifier to settle. Additionally, these signal chains may use filters that may have long startup times to perform noise and offset cancellation within the conditioning circuit or data conversion circuit, resulting in additional power waste. For example, conditioning circuits typically use these filters to filter transients generated by chopping or auto-zeroing switches before the conditioning circuit's output is sampled by the data converter. Furthermore, such microcontrollers do not have access to the data converter's internal sampling timing controls and must add extra timing margin to the power control signals, potentially resulting in additional energy usage.

[0023] Embodiments of the present disclosure are based on the inventors' recognition that within a signal chain, a data conversion circuit (hereinafter, a conversion circuit) has timing information indicating the exact time it needs the conditioning circuit to provide a conditioned signal, and the conditioning circuit has timing information indicating the exact time its output is settled and ready for sensor information. The power-on time for each circuit in the signal chain can be minimized or eliminated by implementing a handshake protocol between the conditioning circuit and the conversion circuit, and between the conditioning circuit and the sensor circuit, using the timing information available to the conversion circuit and the conditioning circuit to synchronize or sequence the operation or power-on time of each circuit.

[0024] Embodiments of the present disclosure may include techniques (e.g., devices, systems, and methods) for improving power management in a signal chain and facilitating signal offset cancellation through embedded or distributed synchronization or ordering (hereinafter, "synchronization") of the operation of components of the signal chain. In one example, a microcontroller may be configured with computer-executable code or one or more circuits that configure a conversion circuit to capture and digitize one or more samples of an analog signal. Configuring the conversion circuit may include setting a conversion circuit sample rate or sample time to obtain one or more samples. To obtain each of the one or more samples, the conversion circuit may be configured to activate or power a conditioning circuit and to power down and wait for the conditioning circuit to indicate that its output has settled or is ready to be sampled by the conversion circuit. The data conversion or conditioning circuit may be configured to synchronize operation of the sensor circuit with operation of the conditioning circuit, such as by powering up the sensor circuit immediately after powering up the conditioning circuit or in coordination with powering up the conditioning circuit. The conditioning circuit may be further configured to provide a signal to the conversion circuit to capture a sample of the conditioning circuit's output after, or in response to, the output of the conditioning circuit settling. The conditioning circuit and sensor circuit may then be powered off, such as after a short delay after the sample moment or sample time. The conversion circuit may be configured to power on, capture, and digitize a sample of the conditioning circuit's output in response to receiving a signal from the conditioning circuit. The conversion circuit may be further configured to power off after, or in response to, digitizing the sample. The conversion circuit may be further configured to alert or wake up the microcontroller in response to the conversion circuit having one or more digital samples ready to be sent to the controller.

[0025] In another example of the present disclosure, the signal chain can be configured to cancel signal offsets between the conditioning circuit and the conversion circuit, such as through a chopping operation, whereby the conversion circuit captures first and second samples of the conditioning circuit's output, sums the two samples in the charge domain, and digitizes the result of the summation. The path of each sample through the signal chain can be selected or configured such that the signal offset in the first sample is negative or opposite in polarity to the signal offset in the second sample, thereby canceling the offsets through the summation.

[0026] In another example of the present disclosure, a signal chain can be configured to cancel signal offsets between a signal conditioning circuit and a data conversion circuit through a chopping operation, whereby the conversion circuit captures first and second samples of the output of the conditioning circuit, digitizes each sample, and sums the two digitized samples in the digital domain. As previously mentioned, the path of each sample through the signal chain can be selected or configured such that the signal offset in the first sample is negative or opposite in polarity to the signal offset in the second sample, thereby canceling the offsets through the summation.

[0027] In another example, the offset cancellation technique described above can be modified so that the conversion circuit captures a first sample having the analog signal and the signal offset, and a second sample having only the signal offset, and then offset cancellation is achieved by summing the two samples as described above.

[0028] As used herein, powering off a circuit includes disconnecting the circuit from a power source or reducing the power consumption of the circuit, such as by stopping or inhibiting the operation of one or more sub-circuits of the circuit, such as by turning off one or more transistors or other switching devices of the sub-circuit.

[0029] FIG. 1A illustrates an example of a signal chain 100 with embedded power management integrated into conditioning circuit 110 and conversion circuit 115. Signal chain 100 can be used within an electronic data acquisition system to acquire or process digitized samples of analog signals indicative of or containing information about a physical condition, such as an environmental, physiological, mechanical, or electronic measurement. In one example, such a physical condition includes heart rate, pressure, mechanical stress, velocity, acceleration, fluid flow, or any other suitable measurable physical quantity. Signal chain 100 includes, in various examples, a sensor circuit 105, a conditioning circuit 110, a conversion circuit 115, and a controller circuit 120. One or more components or circuits of signal chain 100 can be configured to communicate with another component of the signal chain using any suitable data or signal communication technique. In one example, one or more components of signal chain 100 can use a data or signal communication interface to communicate with another component or system according to a specified communication protocol, such as any of the communication protocols or handshake protocols described herein. In one example, the data communication interface includes a single-ended signaling interface, a differential signaling interface, or a multi-bit data communication bus. In some examples, one or more components of signal chain 100 are coupled to power supply 145 through power rails 150 (e.g., a positive rail) and 155 (e.g., a negative rail or a ground rail) to obtain a power supply configuration.

[0030] The sensor circuit 105 may include one or more circuits configured to receive an input signal or stimulus indicative of a physical condition and convert the received input signal, such as an analog voltage or current signal, indicative of the physical condition into an electrical signal (hereinafter, a "measurement signal"). In one example, the sensor circuit 105 includes a sensor device 125 and associated power or control circuitry, such as a switching circuit 160. The sensor device 125 may include any electrical, mechanical, optical, acoustic, or field (e.g., electric, magnetic, or gravitational) sensitive device configured to detect or measure a physical condition. The switching circuit 160 may include a controllable electronic switch, such as a transistor circuit or an electromechanical switch circuit. The switching circuit may be configured to receive a control signal 162 and power on the sensor circuit 105 in response to the control signal (e.g., based on initially receiving the control signal or based on a specified first signal value of the control signal). Powering on the sensor circuit 105 may include coupling the sensor device 125 to the positive power rail 150 or the negative power rail 155 of the power supply 145, such as activating the sensor circuit to generate a measurement signal indicative of a physical condition. In one example, the switching circuit 160 is configured to power off the sensor circuit 105 in response to the control signal 162 (e.g., based on receiving the control signal a second time or based on a second signal value of the control signal). In one example, the control signal 162 is obtained from the conditioning circuit 110 through a point-to-point electrical connection to the conditioning circuit or through a data communication bus having one or more electrical channels. The control signal 162 may include any signal that can be controllably switched between at least two electrical states. In one example, the control signal 162 includes a voltage or current having one or more specified magnitudes, a signal having one or more specified frequencies, or one or more quantized, digital, or binary values.

[0031] The sensor circuit is configured to generate a measurement signal, such as a differential signal 168, indicative of a physical condition during power-on and provide the measurement signal to the conditioning circuit 110.

[0032] Conditioning circuit 110 includes one or more circuits configured to receive a measurement signal from a sensor circuit, such as sensor circuit 105, and condition the measurement signal according to the input signal specifications or requirements of a data converter. In one example, the conditioning circuit conditions the measurement signal by adjusting one or more electrical characteristics of the measurement signal (e.g., voltage or current amplitude, signal frequency, or pulse rise time, fall time, or width) to convert the measurement signal into a conditioned measurement signal. The adjusted electrical characteristics of the conditioned measurement signal are within a range suitable for a converter or sampling circuit, such as conversion circuit 115. In one example, conditioning circuit 110 includes a buffer circuit, such as differential amplifier circuit 135, and switching circuit 164. Differential amplifier circuit 135 may include any suitable amplifier circuit configured with an input stage that receives the output of sensor circuit 105 as differential measurement signal 168 and an output stage that provides conditioned differential output signal 130.

[0033] In one example, the differential amplifier circuit 135 or the adjustment circuit 110 includes one or more amplifier control circuits that use the control signal 174 to implement a handshake or synchronization protocol with the conversion circuit 115. For example, the amplifier control circuit can determine that the output of the amplifier circuit 135 has settled by determining that switching noise or fast transient events present at the amplifier output have attenuated or decreased below a threshold signal level (e.g., a threshold voltage or current level). In another example, the amplifier control circuit determines whether the output of the amplifier circuit 135 has settled based on or using a preprogrammed reference value that indicates the settling time of the amplifier output. In one example, the preprogrammed reference value includes a preprogrammed timer or a preprogrammed delay used as a reference that indicates the settling time. The amplifier control circuit then activates the control signal 174 to signal the conversion circuit that the output of the amplifier circuit 135 or the adjustment circuit 110 is ready to be sampled. The amplification control circuitry may also operate in coordination with the switching circuitry 164, as discussed with respect to FIG. 6, to disable or power off the amplification circuitry 135 or the conditioning circuitry 110 in response to the control signal 174 being provided and after a short delay (e.g., a delay corresponding to the set or hold time of the conversion circuitry 115).

[0034] The switching circuit 164 may include a controllable electronic switch, such as a transistor circuit or an electromechanical switch circuit, or any other circuit configured to receive a control signal 174, such as from the conversion circuit 115, and adjust the operating state of the conditioning circuit (e.g., powered on, powered off, low power, or normal operating state) to affect the power efficiency or power consumption of the conditioning circuit. In one example, in response to receiving the control signal or in response to the value of the control signal, the switching circuit 164 powers on the conditioning circuit 110 or the amplification circuit 135, such as by coupling the conditioning circuit 110 to the positive power rail 150 or the negative power rail 155 of the power supply 145, to operate the conditioning circuit to regulate or adjust the measurement signal 168 as described herein. In another example, the switching circuit 164 is also configured to power off the amplification circuit 135 in response to the control signal 174 (e.g., based on receiving the control signal a second time or based on a second signal value of the control signal). In yet another example, the switching circuit 164 is not configured to disconnect or decouple the power source 145 from the regulation circuit 110, but rather is configured with one or more gating circuits, drive circuits, or control circuits to power on, power off, or otherwise adjust the operating state of the regulation circuit in response to receiving a control signal or in response to the value of the control signal using any suitable technique.

[0035] In one example, the amplifier circuit 135 includes a sensor control circuit (not shown) that generates a control signal 162. The sensor control circuit is configured to actuate the control signal 162 to operate the switching circuit 160 to power on the sensor circuit 105, such as by actuating the control signal 162 to couple the sensor circuit to the power supply 145 after powering on or starting up the conditioning circuit 110. The sensor control circuit is further configured to power off the sensor circuit 105 in synchronization with or in response to the conditioning circuit 110 being powered off, such as by actuating the control signal 162 to operate the switching circuit 160 to disconnect or decouple the sensor circuit from the power supply 145.

[0036] In another example, the conditioning circuit 110 includes one or more auto-zeroing or chopping circuits, such as the electronic rectifiers described in the discussion of Figures 3A, 3B, 4A, and 4B, for canceling signal offsets at the input of the differential input to the conversion circuit 110. The auto-zeroing or chopping circuits are controllable to provide offset cancellation through actuation of a chop signal 174, such as described in the discussion of Figures 3A, 3B, 4A, and 4B.

[0037] Conversion circuit 115 includes one or more circuits configured to receive an electrical signal indicative of a conditioned measurement signal, such as the conditioned differential signal generated by conditioning circuit 110, and obtain one or more digital samples of the electrical signal. The digital samples of the electrical signal may include a sequence of discrete voltages or one or more digital values indicative of an electrical characteristic of the electrical signal. In one example, conversion circuit 115 generates a set of discrete voltages indicative of a binary or binary-encoded fractional representation of the magnitude of the voltage or current corresponding to the measurement signal generated by sensor circuit 105 or the conditioned measurement signal generated by conditioning circuit 110. In another example, conversion circuit 115 generates a set of digital samples as a set of discrete electrical pulses indicative of a binary or binary-encoded fractional representation of the frequency of the measurement signal generated by sensor circuit 105 or the frequency of the conditioned measurement signal generated by conditioning circuit 110.

[0038] The conversion circuit 115 may include a sampling circuit, such as an analog-to-digital conversion (ADC) circuit 140, and a control circuit 192. The conversion circuit 115 may further include a switching circuit 170. In some examples, the controller circuit 192 is a sub-circuit of the sampling circuit or the ADC circuit 140.

[0039] Sampling circuitry or ADC circuitry 140 may include one or more circuits configured to obtain digital samples of the electrical signals described herein.

[0040] Switching circuit 170 is an embodiment of switching circuit 164 and may include a controllable electronic switch or other switching circuit, such as a transistor circuit or an electromechanical switch circuit, configured to receive a control signal from control circuit 192 and, in response to the control signal, power on conversion circuit 110 or ADC circuit 140, such as by coupling to positive power rail 150 or negative power rail 155 of power supply 145, to operate the conversion circuit to obtain one or more digital samples of the electrical signal. In one example, switching circuit 170 is configured to power off conversion circuit 115 or ADC circuit 140 in response to the control signal (e.g., based on a second signal value of the control signal).

[0041] The control circuit 192 includes one or more circuits configured to interface with one or more components of the signal chain 100 to operate the conversion circuit 115 and implement or perform the techniques described herein. In one example, the control circuit 192 includes one or more programmable combinational circuits or sequential digital logic circuits, such as a microcontroller, a programmable gate array, or a state machine. In another example, the control circuit 192 is configured to interface with the controller circuit 120 or the ADC circuit 140 to obtain configuration information for the conversion circuit 115, such as by software or one or more specially configured circuits. The configuration information includes electronic data or other digital signals that indicate or specify the sampling configuration of the conversion circuit 115. In one example, the configuration information specifies the number of digital samples the conversion circuit 115 is configured to acquire, the sample rate of the conversion circuit, the frequency at which samples are acquired, the sample moment (e.g., absolute or relative sampling time) of the conversion circuit, or any other timing, configuration, or state information that is useful for determining when the conversion circuit should be powered off, such as to perform a sampling operation, or to conserve power or battery life. In one example, the control circuit 192 is coupled to the power source 145 or another power source independent of the operation of the switching circuit 170, such that the control circuit can remain powered when the switching circuit 170 operates to power off the conversion circuit 115.

[0042] Control circuit 192 is configured to determine, based on a preprogrammed sample moment obtained from conversion circuit 115, that the conversion circuit is ready to capture or obtain a digital sample of the electrical signal. In response to determining that conversion circuit 115 is ready to obtain a digital sample, control circuit 192 is further configured to generate a control signal, such as control signal 174, to power on conditioning circuit 110. After powering on conditioning circuit 110, control circuit 192 is additionally configured to generate a control signal to activate switching circuit 170 to power off the conversion circuit. Control circuit 192 is further configured to receive a control signal (or status signal) from conditioning circuit 110 indicating that an electrical signal, such as a conditioned measurement signal, is available at the output of the conditioning circuit for sampling, and, in response to receiving the control signal, to generate another control signal to activate switching circuit 170 to power on conversion circuit 115 or activate the conversion circuit to obtain a digital sample. The control circuit 192 is further configured to generate a chop signal or auto-zero phase signal (hereinafter rectification signal 172) to synchronize the converter sample cycle with the operation of the chopping or auto-zeroing electronic rectifier described in the discussion of Figures 3-4.

[0043] The controller circuit 120 may include a microprocessor, microcontroller, digital signal processor, programmable gate array, or any other suitable logic or computing circuit configured to receive one or more digital samples of an electrical signal, such as a conditioned measurement signal generated by the conversion circuit 115. In one example, the controller circuit 120 includes control logic and memory. The control logic is configured, via one or more hardware circuits or computer-executable code or software, to cause the controller circuit 120 to operate the conversion circuit 115 to obtain the digital samples and store the digital samples in memory, such as for further processing by the controller circuit 120 or for provision to another circuit or system. In one example, operating the conversion circuit 115 to obtain the digital samples includes configuring one or more circuits of the conversion circuit 115 to specify a sample rate, sample moment, sample resolution, sample size, or any other parameters useful for enabling operation of the conversion circuit. In another example, operating the conversion circuit 115 includes causing the conversion circuit to begin sampling and digitization operations, such as by activating a conversion start pin or input of the conversion circuit. The controller circuit 120 may also include one or more circuits configured to power off the controller or place the controller in a lower or reduced power state in response to or after activating the conversion circuit 115. The controller circuit 120 may include another circuit that powers on the controller in response to the controller receiving a signal from the conversion circuit 115 indicating that digital samples are available for transfer or processing.

[0044] In one example of the operation of the signal chain 100, the controller circuit 120 interfaces with the conversion circuit 115 or the control circuit 192 to configure the conversion circuit to acquire one or more sets of digital samples at a specified sample rate and at one or more specified sample moments. The controller circuit 120 may then enter a low-power or power-down mode until the conversion circuit signals that the digital samples are ready to be sent to the controller circuit. For each digital sample, the control circuit 192 may activate the switching circuit 170 to power on the conversion circuit 115 in response to determining that the conversion circuit is ready to capture or acquire the digital sample, such as based on a programmed sample rate or sample moment. The conversion circuit 115 or the control circuit 192 activates the switching circuit 164 to power on the conditioning circuit 110. The conversion circuit then automatically powers down after a short delay. In one example, the switching circuit 160 is activated by the conditioning circuit 110 to power on the sensor circuit 105 in response to the regulated power-on or in response to another timing condition. In another example, switching circuit 160 is actuated by conversion circuit 115 or by control circuit 192 to power on sensor circuit 105 in response to conditioning circuit 110 being powered on or in response to another timing condition. Conditioning circuit 110 obtains a measurement signal from sensor circuit 105 and generates a conditioned measurement signal on differential output 130. Conditioning circuit 110, or an amplifier control circuit disposed within the conditioning circuit, monitors differential output 130 to determine when the output has settled and, in response to determining that the output has settled, provides control signal 174 to signal conversion circuit 115 to take a sample of the output. After a delay or at least a short delay, such as one nanosecond, conditioning circuit 110 and sensor circuit 105 power down. In one example, the conditioning circuit automatically powers down itself and sensor circuit 105. In another example, conversion circuit 115 powers down conditioning circuit 110 and sensor circuit 105 after a short delay from a designated sample moment.The conversion circuit 115 is powered on in response to receiving a control signal 174 from the conditioning circuit 110, captures the digitized samples, and then powers off. In some examples, the conversion circuit 115 activates the controller circuit 120 after a specified number of digital samples are ready to be transferred from the converter to the controller.

[0045] 1A and the remaining figures and associated discussion illustrate and describe sensor signal 168, the output of conditioning circuit 130, or other similar or corresponding signals, is a differential signal, which may, in various examples, be a single-ended signal. In such examples, one signal line, or one end of the illustrated differential signal, is or can be held or maintained at a constant electrical signal level, such as by being connected to ground, a reference voltage, or a common-mode voltage.

[0046] 1B illustrates an example of signals associated with the operation of a signal chain, such as signal chain 100, having embedded power management incorporated into a signal conditioning circuit, such as conditioning circuit 110, and a conversion circuit, such as conversion circuit 115. In one example, FIG. 1B illustrates signals generated by one or more components of signal chain 100 during operation. As shown in FIG. 1B, CHOP signal 176 is an example of converter signal 172, start / sample signal 178 (hereinafter sample signal 178) is an example of switching circuit control signal 174, sensor enable signal 180 is an example of switching circuit control signal 162, and converter active signal 182 provides an indication of whether conversion circuit 115 is active or powered on.

[0047] 1B, sample signal 178 is activated or driven to a logic high voltage, such as by conversion circuit 115, to power off conditioning circuit 110 at time T1. The conditioning circuit activates during time span 184 between times T1 and T2. At time T2, sensor enable signal 180 powers on sensor circuit 105, either by conditioning circuit 110 or conversion circuit 115. During time span 186 between times T2 and T3, sensor circuit 105 provides a measurement signal to conditioning circuit 110, which then generates a conditioned measurement signal, waits until its output settles at T3, and activates sample signal 178 on the falling edge of converter circuit 115 to capture or acquire digital samples. At time T3, conversion circuit 115 powers on and captures digital samples, as indicated by converter active signal 182. The conversion circuitry is active during time span 188 between T3 and T4 to acquire digital samples. The sensor circuitry 105 is active during time span 186, and the conditioning circuitry 110 is active during time span 190.

[0048] FIG. 2 shows an example of signal chain 200 with embedded power management incorporated into conversion circuit 210. Signal chain 200 is an example of signal chain 100 in which conditioning circuit 110 and conversion circuit 115 have been replaced with conditioning circuit 205 and conversion circuit 210. Conditioning circuit 205 is an example of conditioning circuit 110 modified to decouple or disconnect the conditioning circuit from the control terminal of switching circuit 160. Conversion circuit 210 is an example of conversion circuit 115 modified so that conversion circuit, or control circuit 192, is coupled or connected to the control terminal of switching circuit 160. Operation of signal chain 200 is identical to operation of signal chain 100, except that switching circuit 160 is actuated by conversion circuit 210, such as through actuation of control signal 215, to power on or off sensor circuit 105. In one example, conversion circuit 210 actuates control signal 215 to synchronize operation of sensor circuit 105 with operation of conditioning circuit 205, as discussed in FIGS. 1A and 1B. In another example, the conversion circuit 210 activates the control signal 215 to power on or off operation of the sensor circuit 105 according to one or more other specified timing conditions.

[0049] FIG. 3A shows an example of a signal chain 300 with embedded power management and chopping signal offset cancellation components for reducing the conditioning circuit and conversion circuit offsets. FIG. 3B shows an example of a signal chain 340 with embedded power management and auto-zeroing signal offset cancellation components for reducing the conditioning circuit and conversion circuit offsets. Signal chains 300 and 345 are examples of signal chain 100 in which conditioning circuit 110 and conversion circuit 115 are replaced with conditioning circuit 305 and conversion circuit 310. Conditioning circuit 305 is an example of conditioning circuit 110 modified to include electronic rectification circuit 315 at the input to the conditioning circuit. Conversion circuit 210 is an example of conversion circuit 110 modified to include electronic rectification circuit 320 at the input to the conversion circuit. In one example, electronic rectification circuit 315 (FIG. 3A), or connection switch 345 (FIG. 3B), and electronic rectifier 320 are components of amplifier circuit 135 and ADC circuit 140, respectively. In Figure 3A, the conversion circuit 310 switches the electronic rectifier circuit 315 and the electronic rectifier 320 through activation of the rectification signal 325. In Figure 3B, the conversion circuit 310 switches the connector switch 345 and the electronic rectifier 320 through activation of the rectification signal 325.

[0050] In operation, signal chain 300 operates identically to signal chain 100, except that conversion circuit 310 captures two digital samples for each digital sample of the electrical signal it is configured to acquire. In an example where signal chain 300 is configured to use chopping techniques to cancel signal offsets, as shown in FIG. 3A , conversion circuit 310 captures first and second analog samples for each digital sample of the electrical signal it is configured to acquire via controller circuit 120. The first analog sample is taken with rectifiers 315 and 320 in the non-inverting position and includes a sample of the electrical signal and the sum of the first signal offset developed while the electronic signal was conducted along a first path through conditioning circuit 305 and conversion circuit 310. After acquiring the first digital sample, conversion circuit 310 synchronously switches electronic rectifier circuit 315 and electronic rectifier 320 to the inverting position to acquire a second digital sample. The second analog sample includes the sum of a second sample of the electrical signal and a second offset developed while the electronic signal was conducted along a second path through the conditioning circuit 305 and the conversion circuit 310. In one example, the first and second offsets have substantially similar or identical amplitudes and opposite polarities. In another example, as shown in FIG. 3B , when the signal chain 300 is configured to cancel the signal offset using an auto-zeroing technique, the conversion circuit 310 captures first and second analog samples for each digital sample of the electrical signal that the conversion circuit is configured to acquire via the controller circuit 120. The first analog sample includes only the first offset developed while the electronic signal was conducted along the first path through the conditioning circuit 305 and the conversion circuit 310 and in the absence of a signal. In the first configuration, the connection switch 345 is configured to disconnect the sensor circuit 105 and zero both the input(s) of the signal conditioning circuit 135, while the rectifier 320 inverts the output(s) of the conditioning circuit.The second analog sample is obtained after synchronously switching the connection switch 345 and the electronic rectifier so that the sensor signal 168 is transmitted to the conditioning circuit 305, and includes the sum of a sample of the electrical signal and a second signal offset developed while the electronic signal is conducted along a second path through the conditioning circuit 305 and the conversion circuit 310.

[0051] In some examples, the sequence or order of obtaining any of the first and second samples described herein is arbitrary and, therefore, can be ensured from the sequence or order described in this disclosure.

[0052] The two analog samples are then combined by adding or subtracting the samples. In one example, each sample may be stored as a charge on a capacitor and then combined in the charge domain before the sum is sampled by the conversion circuit 310. In another example, the samples are digitized and then combined (e.g., added or subtracted in the digital domain). These techniques cancel out signal offsets contributed by the conditioning circuitry, thermocouples formed by manufacturing imperfections in the signal conditioning circuitry, or wiring between the data converter and the conditioning circuitry.

[0053] FIG. 4A shows an example of a signal chain 400 with embedded power management and chopping signal offset cancellation components to reduce sensor and conversion circuit offsets. FIG. 4B shows an example of a signal chain 435 with embedded power management and auto-zeroing signal offset cancellation components to reduce sensor and conversion circuit offsets. Signal chains 400 and 435 are examples of signal chain 100 in which sensor circuit 105 and conversion circuit 115 are replaced with sensor circuit 405 and conversion circuit 410. In FIG. 4A, sensor circuit 405 is an example of sensor circuit 105 modified to include an electronic rectifier circuit 415 at the power input to the sensor circuit. Conversion circuit 410 is an example of conversion circuit 110 modified to include an electronic rectifier circuit 420 at the input to the conversion circuit. In one example, electronic rectifier circuit 415 (FIG. 4A) and electronic rectifier 420 are components of sensor device 125 and ADC circuit 140, respectively. Conversion circuit 410 switches electronic rectifier circuit 415 and electronic rectifier 420 through activation of rectifier signal 425. Chain 400 operates identically to signal chain 300, except that in this configuration, the sensor circuit and signal converter offsets are disabled. Signal chain 435 operates similarly to signal chain 345, except that before the first analog sample is captured, the physical condition or input (e.g., pressure or weight) being measured is removed from sensor 125 while rectifier switch 420 is in the inverted position. Additionally, before the second analog sample is captured, the physical condition or input is applied to sensor 125 while rectifier switch 420 is in the non-inverted position.

[0054] 5A illustrates example electronic signals associated with the operation of a signal chain having embedded power management incorporated into a signal conditioning circuit or a conversion circuit for analog offset cancellation. In one example, FIG. 5A illustrates signals generated by one or more components of the signal chain 300 or 400 during operation. As shown in FIG. 5A, the chop / AZ signal 505 is an example of the rectifier signal 325 or 425, the start / sample signal 510 is an example of the switching circuit control signal 174, the sensor enable signal 515 is an example of the switching circuit control signal 162, and the converter active signal 520 provides an indication of whether the conversion circuit 310 or 410 is active or powered on.

[0055] 5A , the chop / AZ signal 505 is activated or driven high at time T1 to select a first configuration of the electronic rectifier for taking a first sample of the measurement signal in the conversion circuit 310 or 410, as described herein. Additionally, the start / sample signal 510 is activated or driven high at time T1 to power on the conditioning circuit 110 or 305. The conditioning circuit 110 or 305 activates during the time span 525 between times T1 and T2. When the signal chain 300 or 400 is configured to cancel signal offsets using chopping, the sensor enable signal 515 is activated at time T2 and remains high until time T4, powering on the sensor circuit 105 or 405 and keeping the sensor on long enough to take two samples of the measurement signal. When the signal chain 300 or 400 is configured to use auto-zeroing to cancel the signal offset, the sensor enable signal 515 is activated at either time T2 or T3 and remains until either time T3 or T4, respectively, long enough to obtain one sample of the measurement signal, such as to power on the sensor circuit 105 or 405. During the time span 530 between times T2 and T3, or the time span 535 between T3 and T4, the sensor circuit provides the measurement signal to the conditioning circuit 110 or 305. At time T3, a first sample of the conditioned measurement signal generated by the conditioning circuit 110 or 305 is obtained in the analog domain, such as by storing the sample as a charge on a first capacitor. The first sample for the chopping signal chain includes a sample of the conditioned measurement signal and the sum of the first signal offset. The first sample for the auto-zeroing signal chain includes a sample of the first signal offset without the conditioned measurement signal. At time T4, a second sample of the conditioned measurement signal is obtained in the analog domain, such as by storing the sample as a charge on a second capacitor. The second sample for the chopping signal chain includes the sum of the sample of the conditioned measurement signal and a second signal offset, as described herein.The second sample for the auto-zeroing signal chain includes a sum of a sample of the conditioned measurement signal and a second signal offset, as described herein. The conversion circuit is also powered on at T4 to obtain a digital sample of the sum of the first and second samples during time span 540. Additionally, at time T4, the conditioning circuit and sensor circuit are powered off, as indicated by the low transitions of start / sample signal 510 and sensor enable signal 515.

[0056] 5B illustrates example electronic signals associated with the operation of a signal chain having power management integrated into the conversion circuitry or signal conditioning circuitry for digital offset cancellation. In one example, FIG. 5B illustrates signals generated by one or more components of the signal chain 300 or 400 during operation. As shown in FIG. 5B, the chop / AZ signal 555 is an example of the rectifier signal 325 or 425, the start / sample signal 560 is an example of the switching circuit control signal 174, the sensor enable signal 565 is an example of the switching circuit control signal 162, and the converter active signal 570 provides an indication of whether the conversion circuit 310 or 410 is active or powered on.

[0057] 5B , chop / AZ signal 555 is activated or driven high at time T1 to select a first configuration of the electronic rectifier for the first sample, as described herein. Additionally, start / sample signal 560 is activated or driven high at time T1 to power on conditioning circuit 110 or 305. The conditioning circuit activates during time span 575 between times T1 and T2. When signal chain 300 or 400 is configured to use chopping to cancel signal offset, sensor enable signal 565 is activated at time T2 and remains high until time T4, powering on sensor circuit 105 or 405 and keeping the sensor on long enough to take two samples of the conditioned measurement signal in the digital domain. When signal chain 300 or 400 is configured to use auto-zeroing to cancel signal offsets, sensor enable signal 565 is activated at either time T2 or T3 and remains high until either time T3 or T4, respectively, to power on sensor circuit 105 or 405 long enough to obtain one sample of the conditioned measurement signal in the analog domain. During time span 580 between times T2 and T3, or time span 585 between T3 and T4, the sensor circuit provides the measurement signal to the conditioning circuit. At time T3, a first sample of the conditioned measurement signal is obtained in the digital domain by powering on the converter circuit to capture a digital sample and then powering it off, as indicated by pulse 572 in converter active signal 570. The first sample for the chopping signal chain includes a sample of the conditioned measurement signal and the sum of the first signal offset. The first sample for the auto-zeroing signal chain includes a sample of the first signal offset without the conditioned measurement signal. At time T3, the electronic rectifiers are synchronously switched, such as shown by the chop / AZ signal 555, to shunt the electrical path through which the measurement signal reaches the input of the conversion circuit.At time T4, a second sample of the conditioned measurement signal is obtained in the digital domain by powering on the conversion circuitry to capture a digital sample, then powering it off as indicated by pulse 574 in converter active signal 570. The second sample for the chopping signal chain includes a sum of the conditioned measurement signal sample and a second signal offset as described herein. The second sample for the auto-zeroing signal chain includes a sum of the conditioned measurement signal sample and a second signal offset as described herein. The conversion circuitry is also powered on at T4 to acquire a digital sample of the first and summed samples during time span 590. Additionally, at time T4, the conditioning circuitry and sensor circuitry are powered off as indicated by the low transitions of start / sample signal 560 and sensor enable signal 565. At time T5, the first and second digital samples are summed in the digital domain to cancel the signal offset.

[0058] FIG. 6 shows an example of a handshake circuit 600 for implementing a protocol for power management in a signal chain with embedded power management. The handshake circuit 600 is an example of a single-wire handshake interface between a conditioning circuit, such as conditioning circuit 110 or 305, and a conversion circuit, such as conversion circuit 115, 310, or 410. In one example, the conditioning circuit is an amplifier circuit, such as differential amplifier 13, and the conversion circuit is an ADC circuit, such as ADC 140. The handshake circuit 600 includes an amplifier control circuit 605 and an ADC control circuit 610. In one example, the amplifier control circuit 605 is a subcircuit of the amplifier control circuit described in the discussion of FIG. 1A, and the ADC control circuit is a subcircuit of control circuit 192. The amplifier control circuit includes a combinational logic circuit 615 (e.g., a logical OR gate), a delay circuit 625, a combinational logic circuit 630 (e.g., a logical AND gate), a switching circuit 645, and a weak keeper circuit 640. In another example, the ADC control circuit 610 includes a weak keeper circuit 650, a switching circuit 655, a combinational logic circuit 660 (e.g., logic and gates), inverting buffers 670 and 680, and a delay circuit 675. The delay circuit 625 or 675 may include one or more circuits configured to buffer the delay of the passage of an electrical signal from one node to another node in the circuit. The keeper circuit 640 or 650 may include one or more circuits configured to weakly hold a node at a low or high value, such as when the node is not being driven by an external circuit. The switching circuit 645 or 655 is an example of the switching circuit 164 or 170, as shown in FIG. 1.

[0059] In operation, the ADC control circuit 610 is configured to activate the amplifier control circuit 605 to power on the amplifier circuit and respond to an ADC signal that it is ready to acquire digital samples of the conditioned measurement signal. The amplifier control circuit 605 is configured to signal the ADC circuit that the amplifier output has settled and is ready to be sampled by the ADC. The amplifier control circuit 605 is further configured to disable the amplifier after a short delay, as specified by the delay circuit 625, after signaling the ADC circuit that the amplifier output has settled.

[0060] In one example, ADC control circuit 610 receives a start signal 665, such as from a start-of-conversion pin of the ADC circuit. The logic high voltage on start signal 665 is primed with an initial logic low voltage on signal 690 (e.g., control signal 174 in FIG. 1A), activating combinational logic circuit 660 to close switching circuit 655, thereby coupling the positive power rail VDD to signal 690. Furthermore, the logic high voltage on start signal 665 enables keeper 650 to maintain the high voltage on signal 690. After a short delay, during which the inversion of buffer 670 and delay circuit 675 is determined, the output of combinational logic circuit 660 is driven low, opening switching circuit 655 and decoupling or disconnecting signal 690 from the positive power rail VDD. Signal 690 is maintained at a high voltage by keeper 650. The high voltage on signal 690 powers on the amplifier circuit by driving amplifier enable signal 620 high through the high output of combinational logic signal 615. After the amplifier circuit's output settles, a monitor circuit within the amplifier control circuit provides a sample signal 635 indicating that the amplifier's output is ready for sampling. The high voltage on sample signal 635 drives the output of combinational logic circuit 630 high, enabling keeper 640 to maintain the voltage of signal 690. The high output on combinational logic circuit 630 closes switching circuit 645, thereby coupling signal 690 to the ground power rail. In addition, the high voltage on sample signal 635 enables keeper 640 to maintain a low voltage on signal 690. The low voltage on signal 690 drives sample signal 685, thereby powering on or signaling the ADC circuit to sample the amplifier's output. After a short delay determined by delay circuit 625 and combinational logic circuit 630, switching circuit 645 is actuated to open by the low output on combinational logic circuit, thereby decoupling or disconnecting signal 690 from the ground power rail. However, signal 690 is weakly held low by keeper 640. The amplifier is also disabled or powered on after a short delay determined by delay circuit 625 when chop signal 620 is low.

[0061] 7 shows an example set of processes 700 for operating a signal chain with embedded power management. In one example, one or more operations of process 700 are performed or carried out by one or more components of a signal chain, such as any of the signal chains described herein. In one example, one or more operations of process 700 are performed by a signal conditioning circuit, such as conditioning circuit 110, a data conversion circuit, such as conversion circuit 115, or a handshake circuit, such as handshake circuit 600.

[0062] At 705, a first control signal is provided to a signal conditioning circuit, such as conditioning circuit 110 (FIG. 1). In one example, the control signal is provided by a data conversion circuit, such as to enable or provide power to the signal conditioning circuit, allowing the signal conditioning circuit to generate a measurement signal (e.g., a conditioned measurement signal). In various examples, enabling or providing power to the signal conditioning circuit includes having the control signal activate a switching circuit, such as switching circuit 164, to couple a power input of the signal conditioning circuit to a power rail of a power supply, such as power supply 145. In other examples, enabling or providing power to the signal conditioning circuit includes activating an enable pin or terminal of the conditioning circuit to activate one or more internal circuits of the signal conditioning circuit to enable or provide power to the signal conditioning circuit.

[0063] At 710, the data conversion circuitry is powered off or placed in a low power mode with a short delay after providing the control signal to the signal conditioning circuitry.

[0064] At 715, a second control signal is obtained from the signal conditioning circuit to indicate that the output of the signal conditioning circuit has settled and is ready to be sampled by the data conversion circuit, etc. In one example, the second controller signal is generated by a control circuit or monitoring circuit response in response to a stable or settled measurement signal being produced at the output of the signal conditioning circuit.

[0065] At 720, in response to receiving the second control signal, the data conversion circuitry is powered on and activated to acquire digital samples of the measurement signal generated by the signal conditioning circuitry. In some examples, the data conversion circuitry is automatically powered off after acquiring the digital samples. Process 700 may include any other operations suitable for implementing the techniques described herein. In one example, process 700 includes one or more operations for canceling offset signal noise using one or more of the auto-zeroing or chopping techniques described herein. In another example, process 700 includes one or more operations for operating a signal conditioning circuit or a data conversion circuit to synchronize the operation of a sensor circuit, such as sensor circuit 105, with the operation of the signal conditioning circuit or another timing condition.

[0066] 8A shows an example of a signal chain 800 with embedded power management integrated into a data conversion circuit and a signal conditioning circuit with selectable bandwidth. Signal chain 800 is an example of signal chain 100 in which conditioning circuit 110 and conversion circuit 115 have been replaced with conditioning circuit 805 and conversion circuit 810.

[0067] Conditioning circuit 805 is an example of conditioning circuit 110 modified to include one or more filtering or bandwidth-configuring circuits that configure the conditioning circuit by adjusting or varying the signal bandwidth of the conditioning circuit between at least two bandwidth configurations. In one embodiment, such bandwidth configurations include a low-bandwidth configuration, such as for processing low-frequency signals, such as direct current (DC) signals, and a high-bandwidth configuration, such as for processing signals having desired or target frequency components above or within a threshold frequency. Signal conditioning circuit 805 in its low-bandwidth configuration may consume less power than the signal conditioning circuit in its high-bandwidth configuration. In one example, the reduced power consumption is achieved by reducing the bias current of one or more transistors in the signal conditioning circuit. This may result in a higher spectral noise density of the signal processed through conditioning circuit 805, but the reduced noise bandwidth maintains the signal-to-noise ratio. Signal conditioning circuit 805 in its high-bandwidth configuration may have a reduced startup or power-down time, such as due to a stronger bias current used to drive the internal transistors.

[0068] In one example, the signal conditioning circuit 805 includes a control pin or input for receiving a control signal, such as control signal 815, to operate a filtering or bandwidth configuration circuit that selects between at least two bandwidth configurations.

[0069] Conversion circuit 810 is an example of conversion circuit 115 that has been modified to include one or more circuits that are programmable or configurable to control the signal filter characteristics of signal converter 805, for example, to configure the signal conditioning circuit for low bandwidth or high bandwidth operation, such as by providing control signals 815. Conversion circuit 810 can also be modified to include one or more filtering or bandwidth configuration circuits that configure the conversion circuit to adjust or change the signal bandwidth of the conversion circuit between at least two bandwidth configurations, such as those described for signal conditioning circuit 805.

[0070] The operation of signal chain 200 is identical to that of signal chain 100, except that conversion circuit 810 can activate control signal 815 to configure the signal conditioning circuit for a low bandwidth or a high bandwidth. In one example, conversion circuit 810 activates control signal 815 to configure signal conditioning circuit 805 in a low bandwidth configuration while the conditioning circuit is powering up or powering down, such as to reduce power-up or power-down time, thereby increasing the rate at which the conditioning circuit can be power cycled. In another example, conversion circuit 810 activates control signal 815 to configure signal conditioning circuit 805 in a high bandwidth configuration after power-up, for example, in situations where the signal to the conditioning circuit is a low frequency or DC signal. In yet another example, conversion circuit 810 adjusts the filtering or bandwidth configuration of signal conditioning circuit 805, or the signal bandwidth or sample rate of the conversion circuit, to control power efficiency or perform power management of signal chain 800.

[0071] In another example of the operation of signal chain 800, while signal conditioning circuit 805 is operating in a low-bandwidth configuration (e.g., a low-power configuration), the spectral noise density of the conditioning circuit increases. Conditioning circuit 805 compensates for the higher spectral noise density by enabling additional internal analog filtering of an input signal, such as input signal 168. Conversion circuit 810 may provide further compensation by capturing oversampling of the output of signal conditioning circuit 805 and enabling digital filtering of the captured samples. This may result in reduced power consumption in the conditioning circuit power, but may result in increased power consumption in conversion circuit 810 due to, for example, the additional samples captured and used to facilitate the digital filtering. Conversion circuit 810 is configured or configurable to obtain a target balance or trade-off between the reduced power consumption of signal conditioning circuit 805 and the increased power consumption of the conversion circuit. In one example, conversion circuit 810 is configured to obtain the target balance by synchronizing an internal settling timer with the settling time of signal conditioning circuit 805 and through control of the oversampling ratio for the conversion circuit's digital filter and the conditioning circuit's bandwidth configuration.

[0072] The above modifications or improvements to the signal conditioning circuit 805 or the conversion circuit 810 may be incorporated into any of the signal chains described herein.

[0073] FIG. 8B illustrates example electronic signals associated with the operation of a signal chain having power management integrated into a data conversion circuit and a signal conditioning circuit with selectable bandwidth. In one example, FIG. 8B illustrates signals generated by one or more components of signal chain 800 during operation. As shown in FIG. 8B, BW signal 820 is an example of a control signal 815 driven by conversion circuit 810 to configure signal conditioning circuit 805 into a high-bandwidth mode during power-up 184 and power-down 825, as described herein. In one example, control signal 815 is activated (e.g., driven high or low) at time T2′ after sensor circuit 105 is enabled and settles after a power cycle. The remaining signals illustrate the operation of signal chain 800, which corresponds to the operation of signal chain 100, as described in the discussion of FIG. 1B. Various Examples

[0074] Example 1 is a system for processing signals in a signal chain having distributed embedded power management of components of the signal chain, the system comprising: an input circuit that generates a measurement signal in response to a stimulus, the measurement signal being indicative of a characteristic of the stimulus; a signal conversion circuit coupled to the input circuit for converting the measurement signal into a digital signal according to a timing condition for capturing samples of the measurement signal; a control circuit that provides power to the input circuit based on the timing condition; and a sampling circuit that captures samples of the measurement signal in response to an indication signal generated by a sensor circuit.

[0075] In Example 2, the subject matter of Example 1 includes: the input circuit comprises a conditioning circuit configured to condition an output signal obtained from the sensor circuit to generate the measurement signal; and the control circuit configured to provide power to the conditioning circuit according to a timing condition.

[0076] In Example 3, the subject matter of Example 2 includes the regulation circuit being configured to provide power to the sensor circuit in response to a timing condition of the regulation circuit.

[0077] In Example 4, the subject matter of Examples 1-3 includes: the input circuit comprises a sensor circuit configured to generate the measurement signal; and the control circuit is configured to interface with the sensor device to provide an output signal that generates the measurement signal.

[0078] In Example 5, the subject matter of Example 4 includes the control circuit providing power to the sensor circuit according to a timing condition.

[0079] In Example 6, the subject matter of Examples 1-5 includes, wherein the control circuit is configured to power off the signal conversion circuit in response to providing power to the input circuit.

[0080] In Example 7, the subject matter of Examples 1-6 includes, wherein the control circuit is configured to, in response to receiving the conditioned measurement signal from the conditioning circuit, power on the signal conversion circuit and capture a sample of the measurement signal.

[0081] In Example 8, the subject matter of Examples 1-7 includes the following: the measurement signal includes a first signal having a first polarity and a second signal having a second polarity; and the system further includes a first switching circuit controllable by the conversion circuit to switch the first signal and the second signal between a first input and a second input of the signal conversion circuit.

[0082] In Example 9, the subject matter of Example 8 includes an input circuit configured to condition the output signal obtained from the sensor circuit to generate the measurement signal, and a first switching circuit coupled to one or more inputs of the conditioning circuit.

[0083] In Example 10, the subject matter of Examples 8 and 9 includes, wherein the input circuit comprises a sensor circuit configured to generate the measurement signal, and wherein the first switching circuit is coupled to first and second power supply terminals of the sensor circuit.

[0084] In Example 11, the subject matter of Examples 8 to 10 includes, wherein the signal conversion circuit further comprises a second switching circuit controllable by the conversion circuit to switch the first input and the second input of the conversion circuit to the corresponding first input and the second input of the sampling circuit.

[0085] In Example 12, the subject matter of Examples 1-11 includes wherein the timing condition comprises a settling time of the measurement signal at the input of the signal conversion circuit.

[0086] Example 13 is a system for processing signals in a signal chain having distributed embedded power management of components of the signal chain, comprising: a sensor circuit that generates a measurement signal indicative of a physical quantity; a conditioning circuit coupled to an output of the sensor circuit to provide an conditioned measurement signal according to an input circuit reference; and a conversion circuit coupled to the conditioning circuit to convert samples of the conditioned measurement signal into a digital signal, wherein the conversion circuit comprises a first control circuit that powers on the control circuit and powers off the conversion circuit in response to a control signal being provided to the conditioning circuit; and a second control circuit that powers on the conversion circuit in response to the conditioning circuit providing the conditioned measurement.

[0087] In Example 14, the subject matter of Example 13 includes the conversion circuit comprising a third control circuit providing a second control signal that selectively configures the adjustment circuit to have the first signal bandwidth or the second signal bandwidth.

[0088] In Example 15, the subject matter of Examples 13 and 14 includes, wherein the first control circuit is configured to provide a control signal to power on the sensor.

[0089] In Example 16, the subject matter of Examples 13-15 includes the system further comprising a commuter circuit, the commuter circuit having an input coupled to the output of the sensor circuit for receiving the measurement signal and an output coupled to the input of the conditioning circuit for providing the measurement signal to the conditioning circuit, and the conversion circuit further comprising a third control circuit that activates the rectifier circuit to determine electrical paths of the first and second samples of the measurement signal through the conditioning circuit.

[0090] In Example 17, the subject matter of Example 16 includes further comprising an analog summing circuit that combines the first and second samples of the measurement signal to remove or reduce a signal offset in the first and second samples.

[0091] In Example 18, the subject matter of Examples 16 and 17 includes the system further comprising a digital summing circuit that combines the first and second samples of the measurement signal to remove or reduce a signal offset in the first and second samples.

[0092] Example 19 is a method of operating a signal chain having distributed embedded power management of components, the method including: providing a first control signal from a signal conversion circuit to a signal conditioning circuit, the first control signal providing power to the signal conditioning circuit to generate a measurement signal; powering off the signal conversion circuit in response to verifying the first control signal; obtaining a second control signal from the signal conditioning circuit in response to the signal conditioning circuit generating the measurement signal; and powering on the signal conversion circuit and obtaining a sample of the measurement signal in response to receiving the second control signal.

[0093] In Example 20, the subject matter of Example 19 includes powering off the signal conditioning circuitry in response to obtaining the sample of the measurement signal.

[0094] Example 21 is at least one machine-readable medium comprising instructions that, when executed by a processing circuit, cause the processing circuit to perform operations to implement any of Examples 1-20.

[0095] Example 22 is an apparatus equipped with means for carrying out any one of Examples 1 to 20.

[0096] The twenty-third embodiment is a system for implementing any one of the first to twentieth embodiments.

[0097] Example 24 is a method for carrying out any one of Examples 1 to 20.

[0098] The above detailed description includes references to the accompanying drawings, which form a part of the detailed description. The drawings show, by way of illustration, specific embodiments in which the invention may be practiced. These embodiments are also commonly referred to as "examples." Such examples may include components in addition to those shown or described. However, the inventors also contemplate examples in which only those components shown or described are provided. Furthermore, the inventors also contemplate examples using any combination or permutation of those components (or one or more aspects thereof) shown or described with respect to a particular example (or one or more aspects thereof), or any other example (or one or more aspects thereof) shown or described herein. In the event of an inconsistent usage between this document and any document incorporated by reference, the usage in this document controls.

[0099] As used herein, the terms "a" or "an" are used, as is common in patent documents, to include one or more than one, regardless of other instances or uses of "at least one" or "one or more." As used herein, the term "or" is used to refer to a non-exclusive "or," such that "A or B" includes "A but not B," "B but not A," and "A and B," unless otherwise specified. As used herein, the terms "including" and "in which" are used as the plain-English equivalents of the respective terms "comprising" and "wherein." Also, in the following claims, the terms "including" and "comprising" are intended to be open-ended, i.e., systems, devices, articles, compositions, formulations, or processes that include elements in addition to those recited after such terms in a claim are still considered to be within the scope of that claim. Moreover, in the following claims, the terms "first," "second," and "third," etc., are used merely as labels and are not intended to impose numerical requirements on their objects.

[0100] The example methods described herein can be at least partially implemented on a machine or computer. Some examples may include computer-readable or machine-readable media encoded with instructions operable to configure an electronic device to perform a method such as described in the examples above. An implementation of such a method may include code, such as microcode, assembly language code, or higher-level language code. Such code may include computer-readable instructions for performing various methods. The code may form part of a computer program product. Furthermore, in one example, the code may be tangibly stored on one or more volatile, non-transitory, or non-volatile tangible computer-readable media, such as during execution or at other times. Examples of these tangible computer-readable media include, but are not limited to, hard disks, removable magnetic disks, removable optical disks (e.g., compact disks and digital video disks), magnetic cassettes, memory cards or sticks, random access memory (RAM), read-only memory (ROM), and the like.

[0101] The above description is intended to be illustrative, not limiting. For example, the above examples (or one or more aspects thereof) can be used in combination with each other. Other embodiments will be apparent to those of ordinary skill in the art upon reviewing the above description. The Abstract is provided in accordance with 37 C.F.R. §1.72(b) to allow the reader to quickly ascertain the nature of the technical disclosure. The Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. Additionally, in the above Detailed Description, various features may be grouped together to streamline the disclosure. This should not be construed as intending that any unclaimed disclosed feature is essential to any claim. Rather, inventive subject matter may lie in less than all features of a particular disclosed embodiment. Accordingly, the following claims are incorporated into the Detailed Description as examples or embodiments, with each claim standing on its own as a separate embodiment, and such embodiments can be combined with each other in various combinations or permutations. The scope of the invention should be determined with reference to the appended claims, along with the full range of equivalents to which such claims are entitled. [Explanation of symbols]

[0102] 100 signals 105 Sensor Circuit 110 Adjustment circuit 115 Conversion circuit 120 Controller Circuit 125 Sensor Devices 130 differential output signal 135 Amplifier circuit 140 ADC circuit 145 Power supply 150 Power Rail 155 Power Rail 160 Switching Circuit

Claims

1. 1. A system for processing signals in a signal chain having distributed embedded power management of components of the signal chain, comprising: an input circuit for generating a measurement signal in response to a stimulus, the measurement signal being indicative of a characteristic of the stimulus; a signal conversion circuit coupled to the input circuit for converting the measurement signal into a digital signal in accordance with timing requirements for capturing samples of the measurement signal, the signal conversion circuit providing a first control signal to a conditioning circuit to generate an conditioned measurement signal using the measurement signal from the input circuit, and obtaining a second control signal from the conditioning circuit in response to generating the conditioned measurement signal by the conditioning circuit; a control circuit that controls power to the conditioning circuit based on the timing condition, the control circuit being configured to power off the signal conversion circuit in response to providing the first control signal and further configured to power on the signal conversion circuit in response to receiving the second control signal; a sampling circuit for capturing the sample of the measurement signal in response to receiving the second control signal; and a signal conversion circuit comprising:

2. 2. The system of claim 1, wherein the input circuit comprises the conditioning circuit and is configured to condition an output signal obtained from a sensor circuit to generate the conditioned measurement signal, and the control circuit is configured to provide power to the conditioning circuit in accordance with the timing condition.

3. The system of claim 2 , wherein the conditioning circuit is configured to provide power to the sensor circuit in response to a timing requirement of the conditioning circuit.

4. 10. The system of claim 1, wherein the input circuitry comprises a sensor circuitry configured to generate the measurement signal, and the control circuitry is configured to interface with a sensor device to provide an output signal to generate the measurement signal.

5. The system of claim 4 , wherein the control circuitry is configured to control power to the sensor circuitry according to the timing conditions.

6. The system of claim 1 , wherein the control circuitry is configured to power off the signal conversion circuitry in response to providing power to the input circuitry.

7. 2. The system of claim 1, wherein the control circuit is configured to power on the signal conversion circuit and capture the sample of the measurement signal in response to receiving the conditioned measurement signal from the conditioning circuit.

8. the measurement signal includes a first signal having a first polarity and a second signal having a second polarity; 2. The system of claim 1, further comprising a first switching circuit controllable by the signal conversion circuit to switch the first signal and the second signal between a first input and a second input of the signal conversion circuit.

9. 9. The system of claim 8, wherein the input circuit configured to condition an output signal is derived from a sensor circuit to generate the measurement signal, and the first switching circuit is coupled to one or more inputs of the conditioning circuit.

10. 9. The system of claim 8, wherein the input circuit comprises a sensor circuit configured to generate the measurement signal, and the first switching circuit is coupled to first and second power supply terminals of the sensor circuit.

11. 9. The system of claim 8, wherein the signal conversion circuit further comprises a second switching circuit controllable by the signal conversion circuit to switch the first and second inputs of the signal conversion circuit to corresponding first and second inputs of the sampling circuit.

12. The system of claim 1 , wherein the timing condition comprises a settling time of the measurement signal at the input of the signal conversion circuit.

13. 1. A system for processing signals in a signal chain having distributed embedded power management of components of the signal chain, comprising: a sensor circuit including or coupled to a sensor that generates a measurement signal indicative of a physical quantity; a conditioning circuit coupled to an output of the sensor circuit for generating an adjusted measurement signal according to an input circuit standard; a signal conversion circuit coupled to the conditioning circuit for converting samples of the conditioned measurement signal into a digital signal, the signal conversion circuit comprising: a first control circuit that provides a first control signal from the signal conversion circuit and that powers on the adjustment circuit and powers off the signal conversion circuit in response to providing the first control signal to the adjustment circuit; a second control circuit that provides a second control signal from the adjustment circuit to the signal conversion circuit to power on the signal conversion circuit in response to the adjustment circuit providing a second control signal corresponding to generating the adjusted measurement signal; and a signal conversion circuit comprising:

14. 14. The system of claim 13, wherein the signal conversion circuit comprises a third control circuit that provides a second control signal that selectively configures the conditioning circuit to have a first signal bandwidth or a second signal bandwidth.

15. The system of claim 13 , wherein the first control circuit is configured to provide the first control signal to power on the sensor.

16. The system further comprising a rectifier circuit, the rectifier circuit comprising: an input coupled to an output of the sensor circuit for receiving the measurement signal; an output coupled to the input of a conditioning circuit for providing the measurement signal to the conditioning circuit; 14. The system of claim 13, wherein the signal conversion circuitry comprises a third control circuitry that operates the rectification circuitry to determine electrical paths of the first and second samples of the measurement signal through the conditioning circuitry.

17. 17. The system of claim 16, further comprising an analog summing circuit that combines the first and second samples of the measurement signal to remove and reduce signal offset in the first and second samples.

18. 17. The system of claim 16, further comprising a digital summing circuit that combines the first and second samples of the measurement signal to remove and reduce signal offset in the first and second samples.

19. 1. A method of operating a signal chain having distributed embedded power management of components, comprising: providing a first control signal from a signal conversion circuit to a signal conditioning circuit, the first control signal providing power to the signal conditioning circuit to generate a measurement signal; powering off the signal conversion circuit in response to providing the first control signal; obtaining a second control signal from the signal conditioning circuit in response to the signal conditioning circuit generating an conditioned measurement signal using the measurement signal; in response to receiving the second control signal, powering on the signal conversion circuitry and obtaining a sample of the conditioned measurement signal.

20. 20. The method of claim 19, further comprising powering off the signal conditioning circuitry in response to obtaining the sample of the conditioned measurement signal.

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