Semiconductor package with cooling structure and manufacturing method thereof

Abstract

To provide a semiconductor package with cooling structure capable of installing coolant introduction / discharge pipes without porting a seal part between a housing of a sealed container, in which a semiconductor chip on a wiring board is stored, and the wiring board.SOLUTION: The present invention relates to a semiconductor package 10 with cooling structure comprising: a wiring board 1 on which a semiconductor chip 4 is mounted; a dam 8 which is a partition wall formed so as to surround an entire circumference of an area, where the semiconductor chip is mounted, on the wiring board; and a housing 7 which is adhered with the dam via a sealant 13, thereby forming a sealed space 16 including the semiconductor chip. Openings through which introduction / discharge pipes 12 capable of introducing and discharging a coolant cooling the semiconductor chip and the wiring board into and from the sealed space are provided in at least two locations in the dam, and the openings and the outer sides of the introduction / discharge pipes are sealed by the sealant in such a manner that airtightness can be kept in the sealed space.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a semiconductor package having a cooling structure for a semiconductor chip. [Background technology]

[0002] In semiconductor integrated circuits, as wiring becomes finer and denser, the operating speed increases, resulting in an increase in the number of transistors, which in turn increases power consumption. Most of the power consumed by semiconductor integrated circuits is converted into thermal energy, which leads to an increase in heat generation and a rise in temperature. If the semiconductor integrated circuit does not dissipate heat sufficiently, a large current will flow as the temperature rises, which will cause a temperature rise known as thermal runaway. Furthermore, if this high temperature condition continues for a long time, it will accelerate the deterioration of the semiconductor, leading to a shorter lifespan.

[0003] In order to dissipate heat from the semiconductor chip that generates heat due to this operation, various cooling methods have been devised for the semiconductor chip. As shown in Figure 5, the semiconductor package 10' has a mechanism for dissipating heat from the lid 7, which is a metal cover (also called a housing) that is in physical contact with the semiconductor chip 4 mounted on the wiring board 1 via a highly thermally conductive material 17 such as silver paste. Heat is also dissipated from the metal terminals (ball pads 3 and solder bumps 2) on the motherboard side of the semiconductor package 10'.

[0004] On the other hand, an underfill 5 and a wiring substrate 1, which have poor thermal conductivity, are provided below the semiconductor chip 4. If heat is not sufficiently removed from above the semiconductor chip 4, heat will accumulate in and around the semiconductor chip 4, causing the temperature of the semiconductor chip 4 to rise and eventually leading to thermal runaway.

[0005] Since there are limitations to the heat dissipation that relies on the heat transfer of metals in the first stage, there is a technology that uses a circulating refrigerant as a heat dissipation mechanism to further improve heat dissipation efficiency.

[0006] As a prior art technique for cooling such heat generating elements such as semiconductor chips, Patent Document 1 discloses a cooling device for a heat generating element, which is characterized by comprising a sheet having at least a portion thereof flexible and arranged so as to be in contact with the surface of the semiconductor chip which is the heat generating element, a flow path through which a refrigerant flows formed in an area of ​​the sheet opposite the heat generating element, and a pressure adjustment means for adjusting the pressure in the sealed area of ​​the sheet on the heat generating element side.

[0007] Cooling mechanisms that use refrigerants require a tight seal structure to prevent refrigerant leakage and are limited in planar size, but the flow path must be tall enough to ensure the required amount of refrigerant flows.

[0008] In this cooling device, a housing (same as the lid 7) is provided around the semiconductor chip mounted on the substrate, and a coolant such as a gas or liquid is introduced into and discharged from the housing through inlet / outlet pipes parallel to the plane of the substrate. By covering the semiconductor chip with a sheet, it is possible to cool the semiconductor chip without the coolant coming into direct contact with the semiconductor chip. In this technology, to form the coolant inlet / outlet pipes inside the housing, it was necessary to drill holes through the seal that bonds the housing to the substrate. This required special processing, which increased the number of steps. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] Japanese Patent Application Publication No. 7-36871 Summary of the Invention [Problem to be solved by the invention]

[0010] In view of the above circumstances, the present invention aims to provide a semiconductor package with a cooling structure and a manufacturing method thereof, in which a partition for ensuring the flow of refrigerant is made of resin to ensure freedom of shape while ensuring sufficient partition height. [Means for solving the problem]

[0011] As a means for solving the above problems, a first aspect of the present invention provides a wiring substrate on which a semiconductor chip is mounted, a dam, which is a partition wall formed so as to surround the entire periphery of an area of ​​the wiring board on which the semiconductor chip is mounted; a housing that is bonded to the dam via a sealing material to form a sealed space containing the semiconductor chip, the dam is provided with at least two openings through which inlet / outlet pipes pass, allowing a coolant for cooling the semiconductor chip and the wiring board to be introduced into and discharged from the sealed space; The opening and the outside of the inlet / outlet pipe are sealed with a sealing material so that the sealed space can be kept airtight, which is a semiconductor package with a cooling structure.

[0012] The second aspect is a wiring board on which a semiconductor chip is mounted, a dam, which is a partition wall formed so as to surround the entire periphery of an area of ​​the wiring board on which the semiconductor chip is mounted; a housing that is bonded to the dam via a sealing material to form a sealed space containing the semiconductor chip, the dam is provided with at least two openings through which inlet / outlet pipes pass, allowing a coolant for cooling the semiconductor chip and the wiring board to be introduced into and discharged from the sealed space; the opening and the outside of the inlet / outlet pipe are sealed with a sealing material so that the sealed space can be kept airtight; an underfill is provided on the wiring substrate side of the opening to fill a gap between the semiconductor chip and the wiring substrate; This is a semiconductor package with a cooling structure, characterized in that the underfill and the sealing material are tightly attached to each other, thereby sealing the opening and the outside of the inlet / outlet pipe in a manner that maintains airtightness.

[0013] A third aspect is a method for manufacturing a semiconductor package with a cooling structure according to the first or second aspect, comprising: forming the dam, which has at least two of the openings, around an area where the semiconductor chip is mounted on the surface of the wiring board on which the electrode pattern is formed; forming a resist pattern having openings at least at portions corresponding to the electrode patterns in the area; placing solder in the opening; forming solder bumps from the solder by heat treatment; removing the resist pattern; mounting a semiconductor chip via the solder bumps; filling a gap between the semiconductor chip and the wiring substrate with underfill; placing the inlet / outlet tube in the opening; forming a sealant on the dam and the inlet / outlet pipe, and then pressing the housing together and curing the sealant and the underfilm by heat treatment; The present invention relates to a method for manufacturing a semiconductor package with a cooling structure, and

[0014] A fourth aspect is a method for manufacturing a semiconductor package with a cooling structure according to the second aspect, comprising: The manufacturing method of a semiconductor package with a cooling structure according to the third aspect is characterized in that the process of filling the gap between the semiconductor chip and the wiring substrate with underfill further comprises a process of adhering underfill to the wiring substrate side of the opening.

[0015] A fifth aspect is the method for producing a semiconductor package with a cooling structure according to the third or fourth aspect, characterized in that the resist pattern is a resist pattern formed using a dry film resist. [Effects of the Invention]

[0016] According to the semiconductor package with cooling structure of the present invention, in order to secure a space for filling with a refrigerant around a semiconductor chip mounted on a wiring substrate, a dam and sealant are formed to surround the semiconductor chip to secure a volume of space while maintaining a housing located above the semiconductor chip, thereby enabling a semiconductor package to be provided that can be made tall and that can circulate a sufficient amount of refrigerant for temperature control of the semiconductor chip. Furthermore, because the dam is made of photosensitive resin, it is possible to remove the resin from the location where the piping components for inlet and outlet of the refrigerant are to be installed, making it easy to install a refrigerant circulation path and providing a semiconductor package that can be produced with good workability. [Brief explanation of the drawings]

[0017] [Figure 1] FIG. 1 is a cross-sectional view illustrating a semiconductor package according to the present invention. [Figure 2] 1A to 1C are cross-sectional explanatory views illustrating a method for manufacturing a semiconductor package according to the present invention. [Figure 3] 1A to 1C are cross-sectional explanatory views illustrating a method for manufacturing a semiconductor package according to the present invention. [Figure 4] 1A to 1C are cross-sectional explanatory views illustrating a method for manufacturing a semiconductor package according to the present invention. [Figure 5] FIG. 1 is a cross-sectional view illustrating a conventional semiconductor package. DETAILED DESCRIPTION OF THE INVENTION

[0018] <Semiconductor package with cooling structure> The semiconductor package with a cooling structure of the present invention will be described with reference to the drawings.

[0019] FIG. 1 is a diagram showing a cross section of a semiconductor package 10 with a cooling structure of the present invention, which comprises a wiring board 1 on which a semiconductor chip 4 is mounted, a dam 8 which is a partition formed so as to surround the entire periphery of the area on the wiring board 1 on which the semiconductor chip 4 is mounted, and a housing 7 (shown as a lid 7 in FIG. 1) which is bonded to the dam 8 via a sealing material 13 to form an airtight space 16 containing the semiconductor chip 4.

[0020] The sealed space 16 is a space formed by a container that introduces and discharges a coolant that cools the semiconductor chip 4. The container is a sealed space formed by the wiring substrate 1, the dam 8, the sealant 13, and the housing (or lid) 7. The semiconductor chip 4 is disposed inside the space. A coolant is introduced from outside the sealed space 16, and when the coolant comes into contact with the heated semiconductor chip 4, heat is transferred to the coolant by thermal conduction, and the temperature of the coolant rises. The semiconductor chip 4 can be cooled by discharging the heated coolant to the outside of the sealed space 16.

[0021] The dam 8 has at least two openings 6 (see FIG. 2(b)) through which inlet / outlet pipes 12 pass, which can introduce and discharge a coolant that cools the semiconductor chip 4 and the wiring board 1 into and from the sealed space 16.

[0022] By forming the opening 6 in the dam 8, the inlet / outlet pipe 12 can be placed in the opening, eliminating the need to drill holes in the dam 8. This is because the opening 6 can be formed in the dam 8 by not forming the dam 8 in the area where the opening 6 will be located when the dam 8 is formed.

[0023] Furthermore, by arranging the inlet / outlet pipes 12 in at least two locations, one inlet / outlet pipe 12 can be used to introduce the refrigerant and the other inlet / outlet pipe 12 can be used to discharge the refrigerant. If the inlet / outlet pipe 12 is arranged in only one location, it is not impossible to introduce and discharge the refrigerant, but it is difficult to do so smoothly. However, by providing the inlet / outlet pipes 12 in two or more locations, it becomes easier to introduce and discharge the refrigerant smoothly.

[0024] The opening 6 and the outside of the inlet / outlet pipe 12 are sealed with a sealant 13 so as to maintain airtightness of the sealed space 16. Therefore, the space at the opening 6 between the inlet / outlet pipe 12 and the wiring board 1 side, the dam 8, and the lid 7 is filled with the sealant 13. An adhesive capable of maintaining airtightness can be used for the sealant 13.

[0025] Furthermore, in the opening 6, an underfill 5 is provided on the wiring board 1 side of the opening 6 to fill the gap between the semiconductor chip 4 and the wiring board 1, and a sealant 13 is provided on the housing 7 side of the opening 6, and the underfill 5 and the sealant 13 are in close contact with each other to seal the opening 6 and the outside of the inlet / outlet pipe 12 in a manner that maintains airtightness.

[0026] (Semiconductor chip) The semiconductor chip 4 is assumed to be a semiconductor chip on which an integrated circuit is formed, but is not particularly limited to this. Typical semiconductor chips that generate a lot of heat are semiconductor devices that perform arithmetic processing, such as CPUs (Central Processing Units) and MPUs (Micro Processor Units). To enable high-speed arithmetic processing, semiconductor devices that perform arithmetic processing have made high-speed operation possible by miniaturizing the gate length of transistors, thereby achieving higher clock frequencies. Furthermore, as functionality has increased, the scale of integrated circuits has progressed, increasing the number of transistor elements. As a result, the power consumption of the semiconductor chip 4 has increased.

[0027] (wiring board) The wiring board 1 is assumed to be a thin multilayer wiring board known as an interposer, but is not limited to this. An interposer is an electrode pitch conversion board that compensates for the difference between the pitch of pad electrodes on a semiconductor chip 4 and the pitch of pad electrodes on a motherboard or the like. Fig. 1 shows an example of a semiconductor package 10 in which a semiconductor chip 4 is BGA (Ball Grid Array) mounted on a wiring board 1, and the wiring board 1 is also BGA-mounted on a printed wiring board such as a motherboard.

[0028] There is no particular limitation on the material of the wiring board 1. For example, it may be a resin-based multilayer wiring board made of an insulating resin layer and a metal wiring layer such as copper, or it may be a ceramic-based multilayer wiring board using a ceramic such as alumina instead of an insulating resin layer. Furthermore, it may be a silicon interposer in which a silicon wafer is used as the wiring board and a semiconductor chip is mounted on it.

[0029] (dam) The dam 8 is a partition wall formed so as to surround the entire periphery of the area where the semiconductor chip 4 is mounted on the wiring board 1, and is a component for realizing the sealed space 16. The material of the dam 8 is There is no particular limitation on the material as long as it can maintain the airtightness of the sealed space 16. For example, solder resist used in printed wiring boards can be suitably used. Either photosensitive or non-photosensitive solder resist may be used. In the case of photosensitive solder resist, a dam of the desired shape can be formed by a normal photolithography method. In the case of non-photosensitive solder resist, a dam of the desired shape can be formed by using a technique such as screen printing or transfer printing.

[0030] (closed space) The sealed space 16 is an empty space sealed by the wiring board 1, the dam 8, and the lid (housing) 7 adhered to the dam 8 by a sealing material 13 formed on the top of the partition wall that is the dam 8. The semiconductor chip 4 is cooled by introducing a refrigerant for cooling the semiconductor chip 4 into this sealed space 16 and then discharging it.

[0031] (Introduction / Discharge pipe) The inlet / outlet pipes 12 are pipes arranged in openings 6 (see FIG. 2(b)) for the inlet / outlet pipes formed in at least two places in the dam 8 that constitutes the sealed space 16. There are no particular limitations on the type of pipes as long as they are made of a material that has chemical and mechanical durability that allows a refrigerant, which will be described later, to be introduced into and discharged from the sealed space 16. For example, pipes made of stainless steel such as SUS304 and SUS316 can be suitably used. Pipes made of various polymeric materials can also be used.

[0032] (sealing material) The sealing material 13 need not be particularly limited as long as it is a material that can bond the housing 7 (shown as the lid 7 in FIG. 1) and the dam 8 described below, can maintain airtightness, and has chemical durability and stability against the refrigerant described below when exposed to the refrigerant. For example, an acrylic resin that hardens when blocked from air can be used.

[0033] Furthermore, it is desirable to use a material that can maintain airtightness between the inside and outside of the sealed space 16 by bonding the opening 6 formed in the dam 8 to the outside of the inlet / outlet pipe 12 arranged at the opening 6, and that has heat resistance of 100°C or higher. Examples of such materials include various resin-based adhesives.

[0034] As the resin-based adhesive, adhesives made of a variety of resins can be used, but any adhesive that satisfies the above-mentioned functions can be used, and for example, various commercially available resin-based adhesives can be suitably used.

[0035] (underfill) A liquid thermosetting resin material that has been conventionally used as an underfill can be suitably used as the underfill 5. For example, a one-component epoxy resin can be used.

[0036] (housing) The housing (or lid) 7 is preferably made of a material that has sufficient mechanical strength to withstand deformation or breakage due to the pressure applied when introducing a refrigerant (described later) into the sealed space 16, and is also durable enough to withstand chemical changes even when in contact with the refrigerant. For example, various stainless steels and metal materials that are not as chemically stable as stainless steels can be used, such as metal materials with a chemically stable plated or painted film. The housing 7 may have a recessed portion as shown in the cross-sectional shape of FIG. 1, or may be simply plate-shaped.

[0037] (refrigerant) The coolant is not particularly limited as long as it is a liquid substance that is electrically insulating, does not chemically react with the semiconductor chip 4, underfill 5, housing 7, inlet / outlet pipe 12, wiring board 1, sealant 13, and dam 8, and has high insulating properties. For example, Fluorinert (Fluorinert is a registered trademark of 3M) can be used.

[0038] <Method of manufacturing semiconductor package with cooling structure> Next, a method for manufacturing a semiconductor package with a cooling structure will be described.

[0039] 2(a) to (d), 3(e) to (h), and 4(i) to (j) show the steps of manufacturing the semiconductor package with a cooling structure of the present invention.

[0040] The manufacturing procedure for the semiconductor package with cooling structure of the present invention includes the following steps: a first step of forming the dam with at least two openings on the surface of the wiring board on which the electrode pattern is formed, around the area where the semiconductor chip is mounted; a second step of forming a resist pattern with openings at least in the portions of the area corresponding to the electrode pattern; a third step of placing solder in the openings; a fourth step of forming solder bumps from the solder by heat treatment; a fifth step of removing the resist pattern; a sixth step of mounting the semiconductor chip via the solder bumps; a seventh step of filling the gap between the semiconductor chip and the wiring board with underfill; an eighth step of placing inlet / outlet pipes in the openings; and a ninth step of forming a sealing material on the dam and the inlet / outlet pipes, and then crimping the housing and hardening the sealing material and underfill by heat treatment.

[0041] At this time, a photosensitive dry film resist was used as the resist that would form the resist pattern with openings in the areas corresponding to the electrode pattern.In addition to the dry film resist, a liquid photosensitive resist can also be used as the resist that would form the resist pattern.

[0042] (1st step) This is a process of forming a dam 8 with at least two openings 6 around the area where the semiconductor chip is mounted on the surface of the wiring board 1 shown in Fig. 2(a) where the electrode pattern 3 (shown as ball pads 3 in Fig. 2(a)) is formed (see Fig. 2(b)). Usually, the dam 8 (solder resist) is formed along the peripheral edge of the wiring board 1.

[0043] (2nd process) This is a step of forming a resist pattern 9 having openings 11 for solder mounting in areas corresponding to ball pads 3, which are electrode patterns in the area where the semiconductor chip is mounted, as shown in Figure 2(c). Specifically, for example, a photosensitive dry film resist is laminated using a laminator onto the surface of the wiring board 1 on which the dam 8 is formed. Next, the resist pattern 9 is formed by exposure and development using a photomask provided with light-shielding or light-transmitting areas so that the desired resist shape is formed.

[0044] (3rd step) 2(d), this is a step of placing solder paste 17 or solder balls in the solder mounting opening 11. The solder paste 17 is aligned with the solder mounting opening 11 and formed by screen printing. Alternatively, instead of using solder paste, it is also possible to place solder balls of a size that matches the size of the solder mounting opening 11 in the solder mounting opening 11.

[0045] (4th step) This is a step in which the solder paste 17 and solder balls formed in the third step are heated and melted to form the solder bumps 2. The heating for melting the solder was carried out using a reflow furnace.

[0046] (5th step) 3(e) is a step of mounting the semiconductor chip 4 via the solder bumps 2. In the fifth step, the electrodes (not shown) of the semiconductor chip 4 are aligned with the positions of the solder bumps 2 on the substrate, and then the semiconductor chip 4 is placed on the substrate. In this state, the substrate is heated to a temperature above the melting point of the solder bumps 2, thereby completing the soldering of the substrate and the semiconductor chip 4, and the semiconductor chip 4 is mounted on the substrate.

[0047] (6th step) 3(f) is a step of filling the gap between the semiconductor chip 4 and the wiring board 1 with underfill 5. The filled underfill 5 is heated and cured.

[0048] (7th step) 3(g) is a step of placing the inlet / outlet pipe 12 in the opening 6. The inlet / outlet pipe 12 may be placed in the opening 6 by hand, or may be placed using an automatic placement means such as a robot arm.

[0049] (8th step) The eighth step shown in FIG. 4(h) is a step of forming a seal material 13 on the dam 8 and the inlet / outlet pipe 12.

[0050] (9th step) The ninth step shown in FIG. 4(i) is a step of pressing the housing (lid) 7 and hardening the sealing material.

[0051] Through the above steps, the semiconductor package 10 with a cooling structure of the present invention is manufactured. [Explanation of symbols]

[0052] 1. Wiring board 2. Solder bumps 3. Electrode pattern (or ball pad) 4. Semiconductor chip 5. Underfill 6... (for inlet / outlet pipe) opening 7. Lid (or housing) 8. Dam 9. Resist pattern 10, 10´···Semiconductor package 11. Solder mounting opening 12. Inlet / outlet pipe (inlet pipe or outlet pipe) 13. Sealing material 14. High thermal conductivity materials 15. Sealing material 16...space 17. Solder paste

Claims

1. a wiring board on which a semiconductor chip is mounted; a dam, which is a partition wall formed so as to surround the entire periphery of an area of ​​the wiring board on which the semiconductor chip is mounted; a housing that is bonded to the dam via a sealing material to form a sealed space containing the semiconductor chip, the dam is provided with at least two openings through which inlet / outlet pipes pass, allowing a coolant for cooling the semiconductor chip and the wiring board to be introduced into and discharged from the sealed space; The semiconductor package with a cooling structure is characterized in that the opening and the outside of the inlet / outlet pipe are sealed with a sealant so that the sealed space can be kept airtight.

2. An underfill is provided on the wiring substrate side of the opening to fill a gap between the semiconductor chip and the wiring substrate, 2. The semiconductor package with cooling structure according to claim 1, characterized in that the underfill and the sealing material are tightly attached to each other, thereby sealing the opening and the outside of the inlet / outlet pipe so as to maintain airtightness.

3. 2. A method for manufacturing a semiconductor package with a cooling structure according to claim 1, comprising: forming the dam, which has at least two of the openings, around an area where the semiconductor chip is mounted on the surface of the wiring board on which the electrode pattern is formed; forming a resist pattern having openings at least at portions corresponding to the electrode patterns in the area; placing solder in the opening; forming solder bumps from the solder by heat treatment; removing the resist pattern; mounting a semiconductor chip via the solder bumps; filling a gap between the semiconductor chip and the wiring substrate with underfill; disposing the inlet / outlet pipes in the two openings; forming a sealant on the dam and the inlet / outlet pipe, and then crimping the housing and curing the sealant and the underfill by heat treatment; 10. A method for manufacturing a semiconductor package with a cooling structure, comprising:

4. 3. A method for manufacturing a semiconductor package with a cooling structure according to claim 2, comprising: forming the dam, which has at least two of the openings, around an area where the semiconductor chip is mounted on the surface of the wiring board on which the electrode pattern is formed; forming a resist pattern having openings at least at portions corresponding to the electrode patterns in the area; placing solder in the opening; forming solder bumps from the solder by heat treatment; removing the resist pattern; mounting a semiconductor chip via the solder bumps; filling a gap between the semiconductor chip and the wiring substrate with underfill; disposing the inlet / outlet pipes in the two openings; forming a sealant on the dam and the inlet / outlet pipe, and then crimping the housing and curing the sealant and the underfill by heat treatment; It is equipped with A method for manufacturing a semiconductor package with a cooling structure, characterized in that the process of filling the gap between the semiconductor chip and the wiring substrate with underfill further comprises a process of attaching underfill to the wiring substrate side of the opening.

5. 5. The method for manufacturing a semiconductor package with a cooling structure according to claim 3, wherein the resist pattern is formed using a dry film resist.

Images