Semiconductor element drive circuit and power conversion device

Abstract

A driving circuit (100) comprises: a gate driving circuit (2) that individually drives one of two semiconductor elements (5a, 5b) connected in series; and a short circuit detection circuit (3) that detects an arm short circuit of the semiconductor elements (5a, 5b). The short circuit detection circuit (3) is provided with a voltage application circuit (34A) to which a main terminal voltage is applied, and a short circuit determination circuit (31) which determines whether or not there is an arm short circuit. The voltage application circuit (34A) is provided with a first resistor (50) that comprises a plurality of resistance elements, a first capacitor (51) that comprises a plurality of capacitance elements (55) which are respectively connected in parallel with the resistance elements of the first resistor (50), and a second capacitor (52) that comprises a plurality of capacitance elements (56) which are connected in series. The second capacitor (52) is disposed closer than the first capacitor (51) to a bus bar (7), which is a noise source.

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor element drive circuit that drives a semiconductor element provided in a power conversion circuit that is a main circuit of a power conversion device, and to the power conversion device. [Background technology]

[0002] A power conversion circuit has arms, each consisting of at least two semiconductor elements connected in series, for the number of phases. If the power conversion circuit is a two-level power conversion circuit, each arm consists of two semiconductor elements connected in series, and if the power conversion circuit is a three-level power conversion circuit, each arm consists of four semiconductor elements connected in series. These power conversion circuits may suffer from arm short circuits. An arm short circuit in a two-level power conversion circuit is a phenomenon in which both semiconductor elements in the upper and lower arms are accidentally turned on at the same time. Also, an arm short circuit in a three-level power conversion circuit is a phenomenon in which three adjacent semiconductor elements out of four semiconductor elements connected in series are accidentally turned on at the same time.

[0003] When an arm short circuit occurs, a large short-circuit current flows through each semiconductor element of the short-circuited arm, which can damage the semiconductor elements. For this reason, a general power conversion device is provided with a short-circuit detection circuit to detect arm short circuits. Patent Document 1 listed below discloses a structure in which a gate substrate equipped with a short-circuit detection circuit is directly attached to a module that houses multiple semiconductor elements. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 2017-92789 Summary of the Invention [Problem to be solved by the invention]

[0005] A power conversion circuit is a noise source that generates noise due to the switching operation of semiconductor elements. In power conversion devices with a relatively large rated capacity, electrical wiring called a bus bar is commonly used to connect the semiconductor elements of the power conversion circuit to a smoothing capacitor, which is a DC power supply source. When the power conversion circuit is viewed as a noise source, noise current generated from the noise source may flow into a short-circuit detection circuit via the bus bar and parasitic capacitance, causing the short-circuit detection circuit to malfunction. In particular, when the short-circuit detection circuit is configured to be located near the semiconductor elements of the power conversion circuit, as in Patent Document 1, the possibility of malfunction increases.

[0006] The present disclosure has been made in view of the above, and has an object to provide a drive circuit for a semiconductor element that can reduce the possibility of a short circuit detection circuit malfunctioning. [Means for solving the problem]

[0007] To solve the above-mentioned problems and achieve the object, the present disclosure provides a semiconductor element drive circuit comprising: a gate drive circuit that individually drives one semiconductor element in an arm composed of at least two semiconductor elements connected in series and applies a gate voltage to the semiconductor element to drive the semiconductor element; and a short-circuit detection circuit that detects an arm short circuit based on the main terminal voltage of the semiconductor element. The short-circuit detection circuit comprises a voltage application circuit to which the main terminal voltage is applied; and a short-circuit determination circuit that determines whether an arm short circuit exists based on the main terminal voltage applied through the voltage application circuit. The voltage application circuit comprises a first resistor consisting of one resistance element or multiple resistance elements connected in series; a first capacitor consisting of multiple capacitance elements connected in parallel to each resistance element in the first resistor; and a second capacitor consisting of one capacitance element or multiple capacitance elements connected in series. The second capacitor is located closer to a noise source than the first capacitor. [Effects of the Invention]

[0008] The semiconductor element drive circuit according to the present disclosure has the effect of reducing the possibility of the short circuit detection circuit malfunctioning. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a schematic circuit diagram illustrating the connection relationship between a drive circuit according to a first embodiment and a semiconductor element to be driven. [Figure 2] FIG. 1 is a diagram showing an example of a power conversion device to which a drive circuit according to a first embodiment is applied; [Figure 3] FIG. 1 is a diagram showing an example of the basic configuration of a gate drive circuit and a short-circuit detection circuit for explaining a drive circuit according to a first embodiment; [Figure 4] FIG. 4 is a diagram illustrating a displacement current that is a problem in the drive circuit shown in FIG. 3. [Figure 5] FIG. 1 is a circuit diagram illustrating the circuit configuration of a voltage application circuit according to a first embodiment and the connection relationship with other components. [Figure 6] FIG. 1 is a schematic diagram illustrating the positional relationship between the voltage application circuit according to the first embodiment and other components; [Figure 7] FIG. 3 is a cross-sectional view showing a more detailed configuration of the first and second capacitors according to the first embodiment. [Figure 8] FIG. 10 is a diagram illustrating features related to the shapes of the first and second wiring patterns in the second embodiment. [Figure 9] FIG. 10 is a diagram illustrating the features of the arrangement of the first and second capacitors in the third embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] A semiconductor device drive circuit (hereinafter referred to as "drive circuit" as appropriate) and a power conversion device according to embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. In the following description, multiple components of the same type will be indicated by subscripted symbols, but when there is no need to distinguish between the individual components, the subscripts will be omitted as appropriate.

[0011] Embodiment 1 1 is a schematic circuit diagram illustrating the connection relationship between a drive circuit according to embodiment 1 and a semiconductor element to be driven. Drive circuit 100 according to embodiment 1 individually drives one semiconductor element 5 in an arm made up of series-connected semiconductor elements 5a and 5b. Series-connected semiconductor elements 5a and 5b are connected across smoothing capacitor 1, which is a DC power supply source, and perform an operation of opening and closing the flow of DC power supplied from smoothing capacitor 1, i.e., an operation of switching between supplying and cutting off power.

[0012] The circuit section in which the smoothing capacitor 1 exists is called a DC link section. The DC link section has a DC terminal P1 drawn from the upper potential side of the smoothing capacitor 1 and a DC terminal N1 drawn from the lower potential side of the smoothing capacitor 1.

[0013] The collector (C) of semiconductor element 5a is connected to DC terminal P1 by bus bar 7a, and the emitter (E) of semiconductor element 5b is connected to DC terminal N1 by bus bar 7b. Bus bars 7a and 7b are electrical wiring for electrically connecting semiconductor elements 5a and 5b to smoothing capacitor 1. The emitter of semiconductor element 5a is connected to the collector of semiconductor element 5b, and the connection point is connected to AC terminal AC1 by bus bar 7c.

[0014] The two semiconductor elements 5a, 5b connected as described above constitute a two-level, one-phase power conversion circuit. The two-level, one-phase power conversion circuit selects one potential from two levels of potentials, consisting of the potentials of the DC terminal P1 and the DC terminal N1, through the switching operations of the semiconductor elements 5a, 5b, and outputs the selected potential to the AC terminal AC1. Although not shown, the power conversion circuit may be a three-level power conversion circuit. In the case of a three-level power conversion circuit, an intermediate potential terminal is present in the DC link unit. The three-level, one-phase power conversion circuit selects one potential from three levels of potentials, consisting of the potentials of the DC terminal P1, the intermediate potential terminal, and the DC terminal N1, through the switching operations of the four semiconductor elements 5 connected in series, and outputs the selected potential to the AC terminal AC1.

[0015] Each drive circuit 100 is connected to the collector, gate, and emitter of a semiconductor element 5. Drive circuit 100a drives semiconductor element 5a of the upper arm, and drive circuit 100b drives semiconductor element 5b of the lower arm. While FIG. 1 illustrates a case where semiconductor elements 5a and 5b are IGBTs (insulated gate bipolar transistors), semiconductor elements other than IGBTs may be used. Another example of semiconductor elements 5a and 5b is MOSFETs (metal oxide semiconductor field effect transistors). While FIG. 1 illustrates a configuration in which a diode is connected in anti-parallel to each IGBT, if semiconductor element 5 is a MOSFET, a body diode of the MOSFET may be used instead. Although FIG. 1 illustrates semiconductor elements 5a and 5b as single elements, each of semiconductor elements 5a and 5b may be configured with multiple elements connected in parallel.

[0016] The drive circuit 100a includes a gate drive circuit 2a, a short-circuit detection circuit 3a, and a control unit 4a. Similarly, the drive circuit 100b includes a gate drive circuit 2b, a short-circuit detection circuit 3b, and a control unit 4b. The gate drive circuit 2 applies a drive voltage between the gate and emitter of the semiconductor element 5 to drive the semiconductor element 5. The short-circuit detection circuit 3 detects arm short circuits of the semiconductor elements 5a and 5b based on the collector-emitter voltage of the semiconductor element 5. In this document, the drive voltage applied between the gate and emitter is referred to as the "gate voltage" as appropriate, and the collector-emitter voltage is referred to as the "collector voltage" as appropriate. Furthermore, in this document, the collector voltage is sometimes referred to as the "main terminal voltage." The control unit 4 controls the drive of the semiconductor element 5 and, when the short-circuit detection circuit 3 detects an arm short circuit of the semiconductor elements 5a and 5b, turns off the semiconductor element 5 to be controlled.

[0017] FIG. 2 is a diagram illustrating an example of a power conversion device to which the drive circuit according to the first embodiment is applied. In FIG. 2, components identical or equivalent to those in FIG. 1 are denoted by the same reference numerals. In addition to the semiconductor elements 5a and 5b described above, FIG. 2 also illustrates a set of series-connected semiconductor elements 5c and 5d and a set of series-connected semiconductor elements 5e and 5f. Drive circuit 100c drives semiconductor element 5c, drive circuit 100d drives semiconductor element 5d, drive circuit 100e drives semiconductor element 5e, and drive circuit 100f drives semiconductor element 5f. These six semiconductor elements 5a to 5f are three-phase bridge-connected to form a three-phase inverter circuit, which is connected to motor 6 via bus bars 7c to 7e. The three-phase inverter circuit converts DC power supplied from smoothing capacitor 1 via bus bars 7a and 7b into three-phase AC power for supply to motor 6. While FIG. 2 illustrates an example in which semiconductor elements 5a to 5f are IGBTs, they may also be MOSFETs or the like.

[0018] The drive circuit 100 according to the first embodiment detects arm short circuits of the semiconductor elements 5a and 5b using a collector voltage detection method. The collector voltage detection method is a method for detecting arm short circuits based on the collector voltage of the semiconductor element 5.

[0019] FIG. 3 is a diagram showing an example of the basic configuration of a gate drive circuit and a short-circuit detection circuit used to explain the drive circuit according to the first embodiment. FIG. 3 shows an example of a circuit using a collector voltage detection method, in which the short-circuit detection circuit 3 includes a short-circuit protection unit 30 and a voltage application circuit 34. The short-circuit protection unit 30 also includes a short-circuit determination circuit 31, a current amplifier circuit 32, and a high-voltage determination circuit 33. In FIG. 3, the gate drive circuit 2 and the short-circuit determination circuit 31 are mounted on the mother board 14, while the current amplifier circuit 32, the high-voltage determination circuit 33, and the voltage application circuit 34 are mounted on the daughter board 24. The mother board 14 and the daughter board 24 are different boards. In addition, the voltage application circuit 34 shown in FIG. 3 only shows components necessary for explaining the basic operation of the drive circuit 100. Note that the configuration in FIG. 3 is merely an example and is not limited to this mounting example. For example, the short-circuit determination circuit 31 may be mounted on the daughter board 24.

[0020] The gate drive circuit 2 mainly comprises a gate-on switch 21, a gate-off switch 22, and a control circuit 23. The connection point between the gate-on switch 21 and the gate-off switch 22 is electrically connected to the gate of the semiconductor element 5 via a current amplifier circuit 32. The voltage application circuit 34 comprises a first resistor 50 and a first capacitor 51. The first resistor 50 is a single resistance element or an assembly of multiple resistance elements connected in series. The first capacitor 51 is an assembly of multiple capacitance elements connected in parallel to each resistance element in the first resistor 50. When the first resistor 50 is composed of a single resistance element, the first capacitor 51 is also composed of a single capacitance element.

[0021] 3 shows a configuration in which the short circuit detection circuit 3 includes the short circuit determination circuit 31, the current amplifier circuit 32, the high voltage determination circuit 33, and the voltage application circuit 34, but if the collector voltage Vce is high when the arm is short-circuited, it is also possible to omit the current amplifier circuit 32 and the high voltage determination circuit 33. In this case, the output of the voltage application circuit 34 is directly applied to the short circuit determination circuit 31.

[0022] Next, the operation of the gate drive circuit 2 will be described. First, when turning on the semiconductor element 5, the control unit 4 turns on the gate-on switch 21 and turns off the gate-off switch 22 via the control circuit 23. At this time, a voltage Vp is applied to the gate of the semiconductor element 5 from the gate drive circuit 2. This turns on the semiconductor element 5. Furthermore, when turning off the semiconductor element 5, the control unit 4 turns off the gate-on switch 21 and turns on the gate-off switch 22 via the control circuit 23. At this time, a voltage of 0V is applied to the gate of the semiconductor element 5 from the gate drive circuit 2. This turns off the semiconductor element 5.

[0023] Next, the operation of the short-circuit detection circuit 3 will be described. First, the collector voltage Vce of the semiconductor element 5 is constantly applied to the voltage application circuit 34. If an arm short circuit occurs while the semiconductor element 5 is in the gate-on state, the collector voltage Vce rises. The raised collector voltage Vce is applied to the high-voltage determination circuit 33 via the voltage application circuit 34. When the collector voltage Vce is applied to the high-voltage determination circuit 33, the current amplifier circuit 32 operates, causing an amplified current to flow, charging a detection capacitor (not shown) in the short-circuit determination circuit 31. When the voltage across the detection capacitor exceeds the reference voltage, the short-circuit determination circuit 31 generates an arm short-circuit detection signal and outputs it to the control unit 4. In this way, the short-circuit determination circuit 31 determines whether or not an arm short circuit exists based on the collector voltage Vce applied via the voltage application circuit 34. Upon receiving the detection signal, the control unit 4 outputs a gate-off command to the control circuit 23 to gate off the semiconductor element 5. The control circuit 23 gates off the semiconductor element 5 in accordance with the gate-off command.

[0024] FIG. 4 is a diagram illustrating a displacement current that is a problem in the drive circuit shown in FIG. 3. FIG. 4 shows the displacement current, which flows into the short-circuit protection unit 30 via the parasitic capacitance 36 between the bus bar 7 and the short-circuit detection circuit 3, and its path, with the bus bar 7 serving as a noise source. The bus bar 7 here refers to at least one of the bus bars 7a to 7e. This also applies to the following figures. When such a displacement current flows, the transistor of the high-voltage determination circuit 33 turns on, which in turn turns on the transistor of the current amplifier circuit 32, causing an amplified current to flow, potentially causing the short-circuit determination circuit 31 to malfunction. Therefore, some measure must be taken to prevent the short-circuit determination circuit 31 from malfunctioning. Therefore, in the first embodiment, the short-circuit detection circuit 3 is configured as shown in FIGS. 5 and 6.

[0025] Fig. 5 is a circuit diagram illustrating the circuit configuration of the voltage application circuit of embodiment 1 and the connection relationship with other components. Fig. 6 is a schematic diagram illustrating the positional relationship with other components in the voltage application circuit of embodiment 1. In Fig. 5, the voltage application circuit 34 shown in Figs. 3 and 4 is replaced with a voltage application circuit 34A. Note that in Figs. 5 and 6, components that are the same as or equivalent to those in Fig. 4 are designated by the same reference numerals.

[0026] 5, the voltage application circuit 34A of the first embodiment includes the first resistor 50 and the first capacitor 51 shown in FIGS. 3 and 4, and further includes a second capacitor 52. The second capacitor 52 is composed of one capacitance element or multiple capacitance elements connected in series. The first capacitor 51 and the second capacitor 52 have the same number of capacitance elements. The capacitance value of the second capacitor 52 is larger than the capacitance value of the first capacitor 51.

[0027] A connection point between one end of the first capacitor 51 and one end of the second capacitor 52 is electrically connected to the collector of the semiconductor element 5. One end of the first capacitor 51 is also connected to one end of the first resistor 50. The other end of the first capacitor 51 is electrically connected to the short circuit determination circuit 31 via the high voltage determination circuit 33. The other end of the second capacitor 52 is connected to a GND (ground) terminal 58. Note that the other end of the second capacitor 52 may be connected to a portion having the same potential as the GND terminal 58 instead of the GND terminal 58.

[0028] 5 and 6, the first resistor 50 and the first capacitor 51 are mounted on the first main surface 41 of the daughter board 24, and the second capacitor 52 is mounted on the second main surface 42, which is the surface opposite to the first main surface 41. The first main surface 41 faces the side where the power module 80 housing the semiconductor device 5 is located, and the second main surface 42 faces the side where the bus bar 7, which is a noise source, is located. With this configuration, the parasitic capacitance 36 is dominated by that formed between the bus bar 7 and the second capacitor 52. This makes it possible to increase the capacitive coupling between the bus bar 7 and the second capacitor 52 while reducing the capacitive coupling between the bus bar 7 and the first capacitor 51.

[0029] FIG. 7 is a cross-sectional view showing a more detailed configuration of the first and second capacitors in the first embodiment. As shown in FIG. 7, capacitance elements 55 constituting first capacitor 51 and capacitance elements 56 constituting second capacitor 52 are formed in opposing positions on the front and back of daughter board 24. The capacitance elements 55 of first capacitor 51 are electrically connected to each other by a first wiring pattern 61, and the capacitance elements 56 of second capacitor 52 are electrically connected to each other by a second wiring pattern 62. Of first wiring pattern 61, wiring pattern 63 at the lower left of the drawing is electrically connected to high-voltage determination circuit 33. Of second wiring pattern 62, wiring pattern 64 at the upper left of the drawing is electrically connected to GND terminal 58. Shared wiring pattern 65 on the right side of the drawing penetrates daughter board 24 and is formed on both the front and back of daughter board 24. One end is electrically connected to capacitance elements 55 and 56, and the other end is electrically connected to the collector of semiconductor element 5.

[0030] Since the first capacitor 51 and the second capacitor 52 are formed as described above, most of the displacement current that can flow via the parasitic capacitance 36 flows into the GND terminal 58 via the capacitance element 56 and the second wiring pattern 62. This reduces the displacement current that attempts to flow into the high voltage determination circuit 33 via the first capacitor 51. Therefore, by using the voltage application circuit 34A of the first embodiment, the possibility of the short circuit detection circuit 3 malfunctioning can be reduced.

[0031] When forming the first capacitor 51 and the second capacitor 52, it is desirable to form the capacitance elements 55 of the first capacitor 51 so that they have the same capacitance value, and to form the capacitance elements 56 of the second capacitor 52 so that they have the same capacitance value. By forming them in this manner, the potential difference between the capacitance elements 55, 56 at opposing positions on the front and back of the daughter board 24 can be made substantially zero, making it possible to extremely reduce the displacement current that attempts to flow into the high-voltage determination circuit 33 via the first capacitor 51.

[0032] Alternatively, instead of the above configuration, the capacitance elements 55, 56 may be formed at opposing positions on the front and back of the daughter board 24 so that the capacitance ratio, which is the ratio of the capacitance values ​​between the two capacitance elements 55, 56, is equal. The capacitance ratio here refers to the ratio of the capacitance value of one capacitance element 56 of the second capacitor 52 to the capacitance value of one capacitance element 55 of the first capacitor 51. Naturally, the capacitance ratio will be a value greater than 1.

[0033] 5 and 7 show an example in which the first capacitor 51 is mounted on the first main surface 41 of the daughter board 24 and the second capacitor 52 is mounted on the second main surface 42, which is the surface opposite the first main surface 41, but the present invention is not limited to this mounting example. The essential point is that the first capacitor 51 should have a structure that can reduce the effect of displacement current that can flow via parasitic capacitance 36 more than conventional structures, and any structure that can achieve this is acceptable. Therefore, it can be said that the structure should be such that the second capacitor 52 is located closer to the noise source than the first capacitor 51.

[0034] As described above, the semiconductor device drive circuit according to the first embodiment includes a gate drive circuit that individually drives one semiconductor device in an arm composed of at least two semiconductor devices connected in series and applies a gate voltage to the semiconductor device to drive the semiconductor device, and a short-circuit detection circuit that detects an arm short circuit based on the main terminal voltage of the semiconductor device. The short-circuit detection circuit includes a voltage application circuit to which the main terminal voltage is applied and a short-circuit determination circuit that determines whether or not an arm short circuit exists based on the main terminal voltage applied through the voltage application circuit. The voltage application circuit includes a first resistor consisting of one resistance element or multiple resistance elements connected in series, a first capacitor consisting of multiple capacitance elements connected in parallel to each resistance element in the first resistor, and a second capacitor consisting of one capacitance element or multiple capacitance elements connected in series. The second capacitor is located closer to the noise source than the first capacitor. The semiconductor device drive circuit configured in this manner can redirect most of the displacement current that attempts to flow into the short-circuit detection circuit via parasitic capacitance between the bus bar and the short-circuit detection circuit to a GND circuit (not shown) via the second capacitor. This reduces the displacement current that tends to flow into the voltage application circuit via the first capacitor, thereby reducing the possibility of the short circuit detection circuit malfunctioning.

[0035] Embodiment 2 In the second embodiment, desirable shapes of the first wiring pattern 61 and the second wiring pattern 62 described in the first embodiment will be described with reference to Fig. 8. Fig. 8 is a diagram for explaining the characteristics of the shapes of the first and second wiring patterns in the second embodiment.

[0036] The upper part of FIG. 8 shows an example of a shape according to the second embodiment, in which the area of ​​the second wiring pattern 62 is larger than the area of ​​the first wiring pattern 61. The lower part of FIG. 8 shows an example of a comparative example, in which the area of ​​the second wiring pattern 62 is smaller than the area of ​​the first wiring pattern 61. In the comparative example, the structure is susceptible to noise intrusion from a noise source. In contrast, in the second embodiment, the area of ​​the second wiring pattern 62 is larger than the area of ​​the first wiring pattern 61, so that noise directed toward the first wiring pattern 61 is blocked by the second wiring pattern 62. Therefore, applying the structure of the second embodiment to the drive circuit 100 according to the first embodiment can further reduce the possibility of malfunction of the short-circuit detection circuit 3.

[0037] As described above, in the semiconductor element drive circuit according to the second embodiment, the capacitance elements of the first and second capacitors are electrically connected by wiring patterns, and the area of ​​the wiring patterns on the second main surface at opposing positions on the front and back of the substrate is configured to be larger than the area of ​​the wiring patterns on the first main surface. With this semiconductor element drive circuit configured in this manner, noise directed toward the wiring patterns formed on the first main surface is shielded by the wiring patterns formed on the second main surface, further reducing the possibility of malfunction of the short circuit detection circuit.

[0038] Embodiment 3 In the third embodiment, a desirable arrangement example of the first capacitor 51 and the second capacitor 52 described in the first embodiment will be described with reference to Fig. 9. Fig. 9 is a diagram for explaining the characteristics of the arrangement of the first and second capacitors in the third embodiment.

[0039] The left side of FIG. 9 shows an example of an arrangement of the third embodiment, in which the arrangement direction of the capacitance elements of the first capacitor 51 and the second capacitor 52 is a first direction, and the capacitance elements of the first capacitor 51 and the second capacitor 52 are shifted from each other in a second direction perpendicular to the first direction. The right side of FIG. 9 shows an example of a comparative example, in which the capacitance elements of the first capacitor 51 and the second capacitor 52, which are arranged in the first direction, are overlapped in the second direction. The first capacitor 51 and the second capacitor 52 generate heat due to operation of the semiconductor device 5. Therefore, in the comparative example, the capacitance elements of the first capacitor 51 and the second capacitor 52 are susceptible to the influence of thermal interference. In contrast, in the third embodiment, the capacitance elements of the first capacitor 51 are shifted from each other with respect to the capacitance elements of the second capacitor 52, thereby reducing the influence of thermal interference compared to the comparative example. This makes it possible to prevent the life span of the first capacitor 51 and the second capacitor 52 from being shortened.

[0040] As described above, in the semiconductor device drive circuit according to the third embodiment, when the arrangement direction of the capacitance elements of the first and second capacitors is defined as a first direction, the capacitance elements of the first and second capacitors are arranged to be offset from each other in a second direction perpendicular to the first direction. With this semiconductor device drive circuit configured in this manner, the effects of thermal interference on the capacitance elements of the first and second capacitors can be reduced compared to when the capacitance elements are arranged overlapping each other. Therefore, by using the semiconductor device drive circuit according to the third embodiment, it is possible to suppress a decrease in the lifespan of the first and second capacitors.

[0041] The configurations shown in the above embodiments are merely examples, and may be combined with other known technologies, or different embodiments may be combined with each other. It is also possible to omit or modify parts of the configurations as long as they do not deviate from the gist of the invention. Various aspects of the present disclosure are summarized below as appendices. [Appendix 1] A semiconductor element drive circuit comprising: a gate drive circuit that individually drives one semiconductor element in an arm formed of at least two semiconductor elements connected in series, and applies a gate voltage to the semiconductor element to drive the semiconductor element; and a short circuit detection circuit that detects an arm short circuit based on a main terminal voltage of the semiconductor element, The short circuit detection circuit a voltage application circuit to which the main terminal voltage is applied; a short circuit determination circuit that determines whether or not the arm is short-circuited based on the main terminal voltage applied through the voltage application circuit; Equipped with The voltage application circuit includes: a first resistor consisting of one resistive element or a plurality of resistive elements connected in series; a first capacitor comprising a plurality of capacitance elements connected in parallel to each resistance element of the first resistor; a second capacitor consisting of one capacitance element or multiple capacitance elements connected in series; Equipped with The second capacitor is disposed closer to the noise source than the first capacitor. A semiconductor element drive circuit comprising: [Appendix 2] A connection point between one end of the first capacitor and one end of the second capacitor is electrically connected to a main terminal of the semiconductor element, the other end of the first capacitor is electrically connected to the short circuit determination circuit, and the other end of the second capacitor is connected to a ground terminal or a portion having the same potential as the ground terminal. 2. A semiconductor element drive circuit according to claim 1. [Appendix 3] The capacitance value of the second capacitor is greater than the capacitance value of the first capacitor. 3. A semiconductor element drive circuit according to claim 1 or 2. [Appendix 4] the first capacitor is mounted on a first main surface of a substrate, and the second capacitor is mounted on a second main surface opposite to the first main surface; The second main surface faces the side where the noise source is present. 4. A semiconductor element drive circuit according to any one of claims 1 to 3. [Appendix 5] the first and second capacitors each having a plurality of capacitance elements; The first and second capacitors have the same number of capacitance elements, and the capacitance elements are formed at opposing positions on the front and back of the substrate. 5. A semiconductor element drive circuit according to claim 4. [Appendix 6] the capacitance values ​​of the capacitance elements of the first capacitor are equal; The capacitance values ​​of the capacitance elements of the second capacitor are equal. 6. A semiconductor element drive circuit according to claim 5. [Appendix 7] The ratio of the capacitance value of one capacitance element of the second capacitor to the capacitance value of one capacitance element of the first capacitor, which is the ratio of the capacitance values ​​of two capacitance elements at opposing positions on the front and back of the substrate, is equal and the capacitance ratio is a value greater than 1. 6. A semiconductor element drive circuit according to claim 5. [Appendix 8] the capacitance elements of the first and second capacitors are electrically connected by a wiring pattern; At opposing positions on the front and back of the substrate, the area of ​​the wiring pattern on the second main surface is larger than the area of ​​the wiring pattern on the first main surface. 8. A semiconductor element drive circuit according to any one of claims 5 to 7. [Appendix 9] When the arrangement direction of the capacitance elements of the first and second capacitors is defined as a first direction, the capacitance elements of the first and second capacitors are arranged to be shifted from each other in a second direction perpendicular to the first direction. 9. A semiconductor element drive circuit according to any one of claims 5 to 8. [Appendix 10] The noise source is a bus bar, which is an electrical wiring for electrically connecting the semiconductor element and a DC power supply source that supplies DC power to the semiconductor element. 10. A semiconductor element drive circuit according to any one of claims 1 to 9. [Appendix 11] The short circuit determination circuit is mounted on a different substrate from the voltage application circuit. 11. A semiconductor element drive circuit according to any one of claims 1 to 10. [Appendix 12] The substrate is a daughter substrate and the different substrate is a mother substrate. 12. The semiconductor element drive circuit according to claim 11. [Appendix 13] The short circuit determination circuit is mounted on the mother board together with the gate drive circuit. 13. The semiconductor element drive circuit according to claim 12. [Appendix 14] A power conversion device comprising the semiconductor element drive circuit according to any one of appendices 1 to 13. [Explanation of symbols]

[0042] 1 smoothing capacitor, 2, 2a, 2b gate drive circuit, 3, 3a, 3b short circuit detection circuit, 4, 4a, 4b control unit, 5, 5a to 5f semiconductor element, 6 motor, 7, 7a, 7b, 7c, 7d, 7e bus bar, 14 mother board, 21 gate on switch, 22 gate off switch, 23 control circuit, 24 daughter board, 30 short circuit protection unit, 31 short circuit judgment circuit, 32 current amplification circuit, 33 high voltage judgment circuit, 34, 34A voltage application circuit, 36 parasitic capacitance, 41 first main surface, 42 second main surface, 50 first resistor, 51 first capacitor, 52 second capacitor, 55, 56 capacitance element, 58 GND terminal, 61 first wiring pattern, 62 second wiring pattern, 63, 64 wiring pattern, 65 shared wiring pattern, 80 Power module, 100, 100a~100f drive circuit.

Claims

1. A semiconductor element drive circuit including: a gate drive circuit that individually drives one semiconductor element in an arm formed of at least two semiconductor elements connected in series, and applies a gate voltage to the semiconductor element to drive the semiconductor element; and a short circuit detection circuit that detects an arm short circuit based on a main terminal voltage of the semiconductor element, The short circuit detection circuit a voltage application circuit to which the main terminal voltage is applied; a short circuit determination circuit that determines whether or not the arm is short-circuited based on the main terminal voltage applied through the voltage application circuit; Equipped with The voltage application circuit includes: a first resistor consisting of one resistive element or a plurality of resistive elements connected in series; a first capacitor comprising a plurality of capacitance elements connected in parallel to each resistance element of the first resistor; a second capacitor consisting of one capacitance element or multiple capacitance elements connected in series; Equipped with a connection point between one end of the first capacitor and one end of the second capacitor is electrically connected to a main terminal of the semiconductor element, the other end of the first capacitor is electrically connected to the short circuit determination circuit, and the other end of the second capacitor is connected to a ground terminal or a portion having the same potential as the ground terminal; The second capacitor is disposed closer to the noise source than the first capacitor. A semiconductor element drive circuit comprising:

2. The capacitance value of the second capacitor is greater than the capacitance value of the first capacitor.

2. The semiconductor device drive circuit according to claim 1.

3. the first capacitor is mounted on a first main surface of a substrate, and the second capacitor is mounted on a second main surface opposite to the first main surface; The second main surface faces the side where the noise source is present.

2. The semiconductor device drive circuit according to claim 1.

4. the first and second capacitors each having a plurality of capacitance elements; The first and second capacitors have the same number of capacitance elements, and the capacitance elements are formed at opposing positions on the front and back of the substrate.

4. The semiconductor device drive circuit according to claim 3.

5. the capacitance values ​​of the capacitance elements of the first capacitor are equal; The capacitance values ​​of the capacitance elements of the second capacitor are equal.

5. The semiconductor device drive circuit according to claim 4.

6. The ratio of the capacitance value of one capacitance element of the second capacitor to the capacitance value of one capacitance element of the first capacitor, which is the ratio of the capacitance values ​​of two capacitance elements at opposing positions on the front and back of the substrate, is equal and the capacitance ratio is a value greater than 1.

5. The semiconductor device drive circuit according to claim 4.

7. the capacitance elements of the first and second capacitors are electrically connected by a wiring pattern; At opposing positions on the front and back of the substrate, the area of ​​the wiring pattern on the second main surface is larger than the area of ​​the wiring pattern on the first main surface.

5. The semiconductor device drive circuit according to claim 4.

8. When the arrangement direction of the capacitance elements of the first and second capacitors is defined as a first direction, the capacitance elements of the first and second capacitors are arranged to be shifted from each other in a second direction perpendicular to the first direction.

5. The semiconductor device drive circuit according to claim 4.

9. The noise source is a bus bar, which is an electrical wiring for electrically connecting the semiconductor element and a DC power supply source that supplies DC power to the semiconductor element.

2. The semiconductor device drive circuit according to claim 1.

10. The short circuit determination circuit is mounted on a different substrate from the voltage application circuit.

2. The semiconductor device drive circuit according to claim 1.

11. The substrate is a daughter substrate and the different substrate is a mother substrate.

11. The semiconductor device drive circuit according to claim 10.

12. The short circuit determination circuit is mounted on the mother board together with the gate drive circuit.

12. The semiconductor device drive circuit according to claim 11.

13. A power conversion device comprising the semiconductor device drive circuit according to any one of claims 1 to 12.

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