Circuit layout wiring method, device, equipment, and computer program

Abstract

This application discloses a wiring method, an apparatus, a device, a storage medium and a product for a circuit layout, and relates to the field of micro-nano processing technology. The wiring method for a circuit layout includes the steps of: acquiring position information of at least one wiring point in the circuit layout from wiring plan information of the circuit layout (41); calculating a bend start position and a bend radius corresponding to each of the at least one wiring point based on the position information (42); and generating a wiring path passing through the at least one wiring point based on the bend start position and the bend radius (43), in which the wiring path starts bending at the bend start position with the bend radius. The above solution expands the application scene of automatic wiring algorithms.

Description

[Technical Field]

[0001] (CROSS-REFERENCE TO RELATED APPLICATIONS) This application claims priority to a Chinese patent application filed on September 30, 2022, bearing application number 202211210801.1 and entitled "Circuit layout wiring method, device, equipment, storage medium and product," the entire contents of which are incorporated herein by reference.

[0002] The embodiments of the present application relate to the field of micro-nano processing technology, and in particular to a wiring method, device, equipment, storage medium and product for circuit layout. [Background technology]

[0003] In micro-nano processing technology, automatic wiring refers to the placement of lines in the design process, where circuit layout is automatically performed by software.

[0004] In the related art, automatic wiring algorithms typically divide a wiring area into several meshes or rectangular areas, and control wiring paths to be placed along the mesh lines or to pass through the passing rectangular areas, thereby connecting components or solder joints within the wiring area.

[0005] However, the wiring paths obtained by the above-mentioned related art solutions are straight paths in the horizontal and vertical directions, and usually have large curvatures at the bends, which does not meet some chip design requirements that require wiring with small curvatures, and affects the applicability of the above-mentioned automatic routing algorithms. Summary of the Invention

[0006] The embodiments of the present application provide a circuit layout routing method, device, equipment, storage medium and product, which allows small curvature bends to occur in the routing path during automatic routing, thereby broadening the application range of automatic routing algorithms.

[0007] According to one aspect of an embodiment of the present application, there is provided a method for wiring a circuit layout executed by a computer device, the method for wiring a circuit layout comprising: acquiring position information of at least one wiring point in the circuit layout from wiring plan information of the circuit layout; calculating a bend start position and a bend radius corresponding to each of the at least one wiring point based on the position information; generating a wiring path that passes through the at least one wiring point based on the bend start position and the bend radius, wherein the wiring path starts bending at the bend start position with the bend radius.

[0008] According to one aspect of an embodiment of the present application, there is provided a wiring device for a circuit layout, the wiring device for the circuit layout comprising: a first obtaining module configured to obtain position information of at least one wiring point in a circuit layout from wiring plan information of the circuit layout; a second acquisition module configured to calculate a bend start position and a bend radius corresponding to each of the at least one wiring point based on the position information; and a path generation module configured to generate a wiring path that passes through the at least one wiring point based on the bend start position and the bend radius, wherein the wiring path starts bending at the bend start position with the bend radius.

[0009] In one possible implementation, the at least one wiring point includes n wiring points, where n is greater than or equal to 2 and n is an integer; The second acquisition module: Obtain the array order of the n wiring points; obtaining auxiliary frames for the n wiring points based on the arrangement order of the n wiring points and position information of the n wiring points, the auxiliary frames for the n wiring points not overlapping with each other, the auxiliary frames being U-shaped frames, the opening direction of the auxiliary frames being the same as the wire extension direction at the wiring points, and the center of the auxiliary frame being located on an extension line from the wiring points; The method is configured to calculate a bending start position and a bending radius corresponding to each of the n wiring points based on the auxiliary frames of each of the n wiring points; Here, the bending start position of the wiring point is obtained based on the offset amount between the center of the auxiliary frame of the wiring point and the wiring point, and the bending radius of the wiring point is obtained based on the side length of the auxiliary frame of the wiring point.

[0010] In one possible implementation, the offset amount for each of the n wiring points increases in order according to the sequence.

[0011] In one possible implementation, the side length of the auxiliary frame of each of the n wiring points increases according to the arrangement order.

[0012] In one possible implementation form, the second acquisition module is configured to acquire auxiliary frames for each of the n wiring points based on the arrangement order of the n wiring points, position information of the component in the extension direction of the n wiring points, and position information of the n wiring points.

[0013] In one possible implementation form, the second obtaining module is configured to sort the positions of the n wiring points according to the reverse direction of the bending direction, and obtain an arrangement order of the n wiring points.

[0014] In one possible implementation form, the first acquisition module is configured to traverse the position information of each of the wiring points in the wiring plan information and acquire position information of n wiring points; Here, the bending direction of the n wiring points is the same, and the position information of any two adjacent wiring points among the n wiring points satisfies a specified condition.

[0015] In one possible implementation, the specified condition is: The difference between the abscissas of any two adjacent wiring points is less than a first difference threshold, and the difference between the ordinates of any two adjacent wiring points is less than a second difference threshold.

[0016] In one possible implementation, the path generation module: obtaining a bending angle of the first wiring point based on a bending start position of the first wiring point, a bending radius of the first wiring point, and position information of a target wiring point corresponding to the first wiring point, the first wiring point being any one of at least one wiring point; The wiring path of the first wiring point is generated based on the bending start position of the first wiring point, the bending radius of the first wiring point, and the bending angle of the first wiring point.

[0017] Further provided is a chip product, said chip product including at least one wiring point; The at least one wiring point has a bend start position and a bend radius in each wiring path, and the wiring path bends from the bend position at the bend radius.

[0018] Further, a computer device is provided, the computer device including a processor and a memory, wherein at least one computer instruction is stored in the memory, and the at least one computer instruction is loaded and executed by the processor to realize the above-mentioned circuit layout wiring method.

[0019] Also provided is a computer-readable storage medium having at least one computer instruction stored therein, the at least one computer instruction being loaded and executed by a processor to implement the above circuit layout wiring method.

[0020] Also provided is a computer program product or a computer program, the computer program product or the computer program including computer instructions stored in a computer-readable storage medium, the computer instructions being read by a processor of a computing device from the computer-readable storage medium, and the processor executing the computer instructions to cause the computing device to perform the circuit layout wiring method described above.

[0021] The technical solutions provided by the embodiments of the present application include at least the following beneficial effects:

[0022] According to the position information of at least one wiring point, an initial bending position at the start of bending of the wiring point and a bending radius corresponding to the bending curvature are obtained, and the bending of the wiring path is controlled based on the obtained initial bending position and bending radius, thereby realizing control over the bending curvature of the wiring path in the automatic routing process, allowing the automatic routing algorithm to be applied to automatic routing of chips with bending curvature requirements, thereby expanding the application scenarios of the automatic routing algorithm. [Brief explanation of the drawings]

[0023] [Figure 1] 1 is a schematic diagram of an application scene of a superconducting quantum chip according to an embodiment of the present application; [Figure 2] FIG. 1 is a schematic diagram of classic autorouting according to the present application. [Figure 3] 1 is a schematic diagram of a CPW line according to the present application. [Figure 4] 1 is a flowchart of a method for routing a circuit layout according to an embodiment of the present application. [Figure 5] 1 is a schematic diagram of a dense region according to the present application. [Figure 6] 1 is a schematic diagram of a simulated CPW wiring according to the present application; [Figure 7] 1 is a flowchart of a method for routing a circuit layout according to an embodiment of the present application. [Figure 8]8 is a schematic diagram showing rearrangement of wiring points according to the embodiment shown in FIG. 7. FIG. [Figure 9] FIG. 8 is a schematic diagram of offset setting according to the embodiment shown in FIG. 7. [Figure 10] FIG. 8 is a schematic diagram of the bending radius according to the embodiment shown in FIG. 7. [Figure 11] FIG. 8 is a schematic diagram of a wiring path according to the embodiment shown in FIG. 7. [Figure 12] FIG. 8 is a process flow diagram of the automatic wiring algorithm according to the embodiment shown in FIG. 7. [Figure 13] 1 is a schematic diagram of a wiring path of a chip product according to an embodiment of the present application; [Figure 14] 1 is a structural block diagram of a wiring device for a circuit layout according to an embodiment of the present application; [Figure 15] FIG. 1 is a structural schematic diagram of a computer device according to an embodiment of the present application; DETAILED DESCRIPTION OF THE INVENTION

[0024] Before introducing and explaining the embodiments of the present application, some nouns related to the present application will first be explained and explained.

[0025] 1) Superconducting quantum chip: The CPU of a superconducting quantum computer. A quantum computer is a device that performs calculations using the principles of quantum mechanics. Based on the superposition and entanglement of quantum mechanics, quantum computers have relatively strong parallel processing capabilities and can solve some computationally difficult problems for classical computers. Due to the zero-resistance properties of superconducting qubits and a manufacturing process similar to that of integrated circuits, quantum computing systems built using superconducting qubits are one of the systems currently expected to realize the most practical quantum computing.

[0026] 1, a schematic diagram of an application scenario of a superconducting quantum chip according to an embodiment of the present application is shown. As shown in FIG. 1, the application scenario may be a superconducting quantum computing platform, which includes a quantum computing device 11, a dilution refrigerator 12, a control device 13, and a computer 14.

[0027] The quantum computing device 11 is a circuit that operates on physical qubits, and the quantum computing device 11 may be realized as a quantum chip, such as a superconducting quantum chip that is near absolute zero. The dilution refrigerator 12 is used to provide an absolute zero environment for the superconducting quantum chip.

[0028] Control device 13 is used to control quantum computing device 11, and computer 14 is used to control control device 13. For example, a coded quantum program is compiled into instructions via software in computer 14 and sent to control device 13 (e.g., an electronic / microwave control system), which then converts the instructions into electronic / microwave control signals to input into dilution refrigerator 12 to control the superconducting qubits at a temperature below 10 mK. The readout process is the reverse, with the readout waveform being transmitted to quantum computing device 11.

[0029] 2) Electronic Design Automation (EDA): A design method in the electronics field that uses computer software (auxiliary design software) to carry out design work in the electronics field and realize design automation. It includes processes such as functional design, functional verification, layout, and wiring of integrated circuit chips. The software tools used in these processes are collectively called EDA tools.

[0030] 3) Automatic routing: Using software to automatically place lines in circuit and chip designs and connect components according to rules and requirements. This is often used in large-scale and ultra-large-scale integrated circuit designs, and is part of that process, usually performed after layout is complete.

[0031] 4) Layout: Also known as circuit layout, it is a design drawing that explains how components in a circuit are laid out, placed, and connected. It is a description of the planar geometry of the actual physical situation of the circuit. The layout design must comply with constraints such as manufacturing process, timing, area, and power consumption. The layout design file contains information about the shape, area, and location of each hardware unit on the chip.

[0032] 5) Component: A general term for elements and devices, such as resistors, capacitors, inductances, and other electronic parts and components in a circuit.

[0033] 6) Coplanar Waveguide (CPW): A microwave planar transmission line with excellent performance and easy processing, consisting of a central conductor on a substrate and coplanar ground planes on both sides. It is used to transmit microwave signals. CPW technology is widely used in superconducting quantum chips.

[0034] 7) Radius of curvature: The radius of curvature is the reciprocal of the curvature and is represented by R. For a curve, the radius of curvature is equal to the arc radius of the curve closest to the point.

[0035] 8) Topology: A branch of science that studies topological spaces. It developed from geometry and set theory and primarily studies the properties of geometric figures or spaces that remain constant even when continuously transformed. It studies concepts including space, dimension, and transformation. In topology, only the positional relationships between objects are considered, not the size of the shapes. Topological wiring is a wiring method based on topological structures and topological networks.

[0036] 9) Pad: A pad is a location on a circuit board for connecting electronic components and traces, usually by soldering the component pins to the circuit board. In classical circuits, pads are usually polygonal copper plates, but in superconducting quantum chips, the shape and structure of the pads are different.

[0037] Classical autorouting performs single-line layout in a geometric format. Referring to FIG. 2, a schematic diagram of classic autorouting according to the present application is shown. For example, mesh routing in classic autorouting employs a checkerboard-style grid to cover the entire routing area. As shown in FIG. 2(a), components on the layout are placed on the mesh like go stones, and routing is performed along the straight mesh lines in the horizontal and vertical directions. Shape routing in classic autorouting has been improved from mesh routing. As shown in FIG. 2(b), shape routing uses shapes such as rectangles instead of meshes to divide the routing area into several rectangular regions, and the routing path passes through the rectangles sequentially. All of these geometric routing algorithms require auxiliary positioning functions and use the geometric coordinates and geometric properties of components to determine the routing path.

[0038] On the other hand, the traditional routing methods described above are sequential, requiring wiring one by one, which increases the difficulty of the later stages of the routing process, reduces routing efficiency, and can lead to long wiring lines. As current circuit designs become increasingly complex, automatic routing tools based on mesh and geometric methods are becoming increasingly limited. On the other hand, traditional automatic routing algorithms do not take into account the physical characteristics of chip design requirements, such as the need for small curvatures in chips (e.g., quantum chips, specifically superconducting quantum chips). Therefore, when addressing chips with more complex layouts, the routing algorithms may generate lines with bend radii that do not meet the design requirements, and they are unable to customize the curvature radius of chip lines.

[0039] Taking superconducting quantum chips as an example, as the number of physical quantum bits in a quantum chip increases, the number of signal lines for bit control and readout, etc., also increases. Due to chip size and layout space limitations, signal lines are often densely arranged in some areas. In superconducting quantum chips, signal lines are typically implemented using coplanar waveguides (CPWs). Referring to Figure 3, a schematic diagram of a CPW line according to the present application is shown. As shown in Figure 3(a), the CPW line structure consists of a central conductor on a substrate and ground lines on both sides. Both the central conductor and the ground lines are made of thin metal films. Therefore, when microwaves propagate through the CPW, the electric field is distributed in the air, the substrate, and the metal layer. Unlike signal lines in classic chips, when the CPW line path is significantly curved, as shown in Figure 3(b), the resulting potential difference generates parasitic modes in the circuit, which then couple with the CPW mode and significantly affect the circuit's transmission characteristics. Therefore, the routing algorithms and rules of classical EDA cannot be directly applied to the automatic routing of superconducting quantum chips.

[0040] Regarding the above problem, referring to Figure 4, a flowchart of a wiring method for a circuit layout according to an embodiment of the present application is shown. Each step of the method may be performed by a computer device. The method may include the following steps:

[0041] In step 41, position information of at least one wiring point in the circuit layout is obtained from wiring plan information of the circuit layout.

[0042] Optionally, a wire point is an end point of a wire path in the circuit layout, or a wire point is a node along which a wire path passes in the circuit layout.

[0043] Here, the wiring point may be a node of a pin of a component or a solder joint in a circuit layout, or the wiring point may be a node of an extension line of a pin of a component or a solder joint. A wiring path can be set between two wiring points.

[0044] In step 42, a bend start position and a bend radius corresponding to each of the at least one wiring point are calculated based on the position information.

[0045] Here, the bending radius can refer to the radius of a circle on which an arc formed by bending a wiring path is located.

[0046] In some embodiments, an auxiliary frame is set starting from the position where the wiring point is located in the wiring extension direction of the wiring point, the auxiliary frame is a U-shaped frame, the opening direction of the auxiliary frame is the same as the wiring extension direction at the wiring point, the center of the auxiliary frame is located on an extension line from the wiring point, the midpoint of the connection line between the center of the auxiliary frame and the wiring point is the bending start position, and the side length of the auxiliary frame is the bending radius.

[0047] Generally, a pair of wiring points may not be directly connected via horizontal or vertical lines, or there may be other components or solder joints between the pair of wiring points, so that the wiring path between the pair of wiring points needs to undergo one or more bends. In the embodiment of the present application, based on the position of at least one wiring point, the wiring point can determine the start position and bend radius of the bend in the subsequent wiring path, thereby enabling to control the bend area of ​​the subsequent wiring path.

[0048] In step 43, a wiring path passing through at least one wiring point is generated based on the bend start position and the bend radius, and the wiring path starts bending at the bend start position with the bend radius.

[0049] Each of the at least one wiring point corresponds to one wiring route, and for example, if there are n wiring points, n wiring routes can be generated.

[0050] In some embodiments, after determining the bend start position and bend radius corresponding to each of at least one wiring point on the subsequent wiring path, the subsequent wiring path behind the wiring point extends to the bend start position and then starts to bend at the bend radius, thereby obtaining each wiring path of the at least one wiring point. As can be seen from the above, the solution provided in the embodiments of the present application obtains the bend initial position of the bend start of the above wiring point and the bend radius corresponding to the bend curvature, based on the position information of at least one wiring point, and controls the bend of the wiring path based on the obtained bend initial position and bend radius, thereby realizing control of the bend curvature of the wiring path in the automatic routing process, allowing the automatic routing algorithm to be applied to automatic routing of chips with bend curvature requirements, thereby broadening the application scenario of the automatic routing algorithm.

[0051] Based on the solution shown in Figure 4 above, the automatic wiring software / tool ​​can traverse the position information of each wiring point in the wiring plan information to determine the dense areas of wiring points in the circuit layout, control the curvature of the wiring path of the wiring points in the dense areas, and reduce the amount of calculation required for automatic wiring.

[0052] Specifically, in a superconducting quantum chip, due to limitations of factors such as layout size and space, there may occur a situation where multiple sets of CPW lines are densely arranged in some locations, and the area where the CPW lines are densely arranged may be called a dense area. Figure 5 shows a schematic diagram of a dense area according to the present application.

[0053] The solution provided by the embodiment of the present application is based on the superconducting quantum chip pad and pin connection algorithm, and adds the setting of the position of the U-shaped frame (represented as "airport") and the runway order, thereby achieving the goal of reducing the large wiring curvature in dense areas.

[0054] Specifically, a U-shaped frame can be placed at the end of the connecting line of the CPW in the dense area to guide the direction of the bending arc of the CPW. The radius of the arc can be positively correlated with the side length of the U-shaped frame (e.g., half the side length of the U-shaped frame). Therefore, the size of the U-shaped frame can be adjusted according to actual needs. The larger the required radius of curvature, the larger the size of the U-shaped frame.

[0055] The above algorithm can be visualized as a passenger plane taking off from an airport runway. Figure 6 shows a schematic diagram of the CPW wiring simulation performed at an airport according to the present application. As shown in Figure 6, the "airport" is a U-shaped frame in the actual wiring, the "runway" inside the airport is a fixed CPW wiring route, and the "passenger plane" 61 is the head of the wiring procession. After arriving at the end of the runway, the passenger plane takes off and turns according to a preset arc route, making small curvature bends according to the automatic wiring.

[0056] 7, a flowchart of a method for wiring a circuit layout according to an embodiment of the present application is shown. Each step of the method may be performed by a computer device. The method may include the following steps:

[0057] In step 701, position information of at least one wiring point in the circuit layout is obtained from wiring plan information of the circuit layout.

[0058] In one possible implementation, the circuit layout may be that of a quantum chip, for example, that of a superconducting quantum chip.

[0059] The solutions shown in the embodiments of this application may operate on a single wiring point, or on two or more wiring points.

[0060] Here, when processing is performed on two or more wiring points, the position information of the at least one wiring point includes position information of n wiring points, where n is greater than or equal to 2, and n is an integer.

[0061] In this case, in some possible implementation forms, the step of acquiring position information of at least one wiring point in the circuit layout from the wiring plan information of the circuit layout includes: The method may include a step of traversing the position information of each wiring point in the wiring plan information and acquiring the position information of n wiring points.

[0062] Here, the bending direction of the n wiring points is the same, and the position information of any two adjacent wiring points among the n wiring points satisfies a specified condition.

[0063] In some possible implementations, the above specified conditions are: The difference between the abscissas of any two adjacent wiring points is less than a first difference threshold, and the difference between the ordinates of any two adjacent wiring points is less than a second difference threshold.

[0064] In an embodiment of the present application, the automatic wiring software / tool ​​can determine areas of high density of wiring points in the circuit layout by traversing the position information of each wiring point in the wiring plan information, and can control the curvature of the wiring path of the wiring points in the high density areas.

[0065] Specifically, in a superconducting quantum chip, due to limitations of factors such as layout size and space, there may occur a situation where multiple sets of CPW lines are densely arranged in some locations, and the densely arranged areas of CPW lines may be called dense areas. Figure 6 shows a schematic diagram of a dense area according to an embodiment of the present application.

[0066] Assuming that the number of wiring points (terminals) in the circuit layout is t and t∈T, each wiring point t i The U-shaped frame generated by p(t i ) is written.

[0067] A set of points A∈T, i.e., A is a proper subset of T, and ∀t i ∈A and p(t i )∩p(tk ) is a non-empty set for all t k For both, t k If ∈A, then we say that the point set A is complete.

[0068] t i The point set A(t i ) to t i Define it as the smallest complete subset in T that contains

[0069] Let N be the number of points in a dense region A, and let ∀t i ∈A(t), A(t i ) = A(t).

[0070] For points t1 and t2, p(t i )∩p(t k Whether |x1-x2|<2*neighborhood1 and |y1-y2|<2*neighborhood2 can be determined based on whether the difference between the horizontal and vertical coordinates of t1 and t2 is less than twice the neighborhood parameter.

[0071] Here, the above 2*neighborhood1 is a first difference threshold, and the above 2*neighborhood2 is a second difference threshold. The above neighborhood1 and neighborhood2 may be the same or different.

[0072] Optionally, the first and second difference thresholds may be set to different parameter values.

[0073] In the process of traversing the position information of each wiring point in the wiring plan information, if the difference in abscissas between the coordinates of a wiring point obtained in the traverse and the coordinates of a wiring point obtained in the previous traverse is less than a first difference threshold, the difference in ordinates between the wiring points is less than a second difference threshold, and the bending directions of the two are the same, then the wiring point obtained in the current traverse is added to the point set corresponding to the wiring point obtained in the previous traverse. In this manner, one or more point sets can be traversed and obtained from the wiring plan information, that is, corresponding to one or more dense areas. Then, the wiring points in any one point set can be obtained as the at least one wiring point, and the position information of the at least one wiring point can be obtained.

[0074] For example, referring to the bottom set of wiring CPW lines in Figure 5 above, four CPW lines are divided into two sets, and the upper two CPW lines have a different bending direction from the lower two CPW lines. Correspondingly, the computer equipment can divide these four CPW lines into two independent dense areas (i.e., the upper two CPW lines constitute one dense area and the lower two CPW lines constitute another dense area), and subsequent processing can be performed respectively.

[0075] Here, the bending direction can be determined by the positional relationship between the wiring point and the end point of the wiring path of the wiring point.

[0076] Here, the bending direction refers to a direction perpendicular to the extension direction of the current wiring point. For example, if the extension direction of the current wiring point is forward, the bending direction may be leftward or rightward.

[0077] In step 702, a bend start position and a bend radius corresponding to each of the at least one wiring point are calculated based on the position information.

[0078] In one possible implementation, when the at least one wiring point includes n wiring points, where n is greater than or equal to 2 and n is an integer, the step of obtaining the bending start position and bending radius of each of the at least one wiring point based on the position information of the at least one wiring point described above may include the following steps:

[0079] In S702a, the array order of n wiring points is obtained.

[0080] After the wiring enters a densely packed area, multiple pairs of CPWs usually bend, and in order to ensure that all CPWs can bend smoothly and do not interfere with each other, it is necessary to determine which pair of CPWs will bend the earliest, which in this application can be imagined as rearranging the takeoff order of a "passenger plane."

[0081] In one possible implementation, the bending directions of the wiring paths of the n wiring points are the same, and the step of obtaining the array order of the n wiring points includes: The method includes a step of rearranging the positions of the n wiring points in the reverse direction of the bending direction to obtain an arrangement order of the n wiring points.

[0082] The algorithm provided in the embodiments of the present application can refer to the method of setting the track and the starting positions of athletes in long-distance running events. The inside of the track bends the fastest, has the smallest bending radius, and has a large curvature at the inside corner, so athletes positioned on the inside of the track need to stand further back at the start.

[0083] Similarly, referring to Figure 8, a schematic diagram of the rearrangement of wiring points according to an embodiment of the present application is shown. As shown in Figure 8, when CPWs are bent, the CPW located on the inside should also bend first and have the smallest bending radius (but not smaller than the minimum radius that meets the design needs), giving bending space to the remaining CPW lines located on the outside. By rearranging sequentially from the inside to the outside in this way, the bending order of each CPW pair is determined. Here, the above-mentioned rearrangement from the inside to the outside is that of the rearrangement in the reverse direction of the bending direction.

[0084] In S702b, based on the arrangement order of the n wiring points and the position information of the n wiring points, auxiliary frames of the n wiring points are obtained, the auxiliary frames of the n wiring points do not overlap each other, the auxiliary frames are U-shaped frames, the opening direction of the auxiliary frames is the same as the wiring extension direction at the wiring points, and the center of the auxiliary frame is located on the extension line from the wiring point.

[0085] In some embodiments, after determining the position information of the n wiring points in the circuit layout and the arrangement order of the n wiring points, an auxiliary frame determination order corresponding to the n wiring points is determined based on the arrangement order, and auxiliary frames are set sequentially in the wiring extension direction of each wiring point among the n wiring points according to the auxiliary frame determination order, thereby obtaining auxiliary frames for each of the n wiring points.

[0086] Based on the auxiliary frames of the n wiring points, the bending start positions and bending radii of the n wiring points are obtained.

[0087] In some embodiments, for each auxiliary frame of n wiring points, the midpoint of the connection line between the center of the auxiliary frame corresponding to the i-th wiring point and the i-th wiring point is set as the bending start position, and the side length of the auxiliary frame is set as the bending radius, where i is a positive integer.

[0088] Here, the bending start position of the wiring point is obtained based on the offset amount between the center of the auxiliary frame of the wiring point and the wiring point, and the bending radius of the wiring point is obtained based on the side length of the auxiliary frame of the wiring point.

[0089] In one possible implementation, the offset amount of each of the n wiring points increases in order of the sequence.

[0090] In one possible implementation, the side length of each subframe of n wiring points increases according to the ordering.

[0091] After determining the above sequence (corresponding to the above airport turning sequence), i.e., based on the bending sequence, a U-shaped frame (airport) can be constructed to control the bending curvature radius where the CPW is about to bend in the dense area, and at this time, it is necessary to consider where the "airport" will be located.

[0092] In real life, airports are scattered across different provinces and cities based on factors such as city size, population density, and geographical location. Usually, a city has at most one or two airports, and the distance between airports is not too close to avoid flight route and scheduling conflicts between airports.

[0093] Similarly, when routing, the algorithm of the present application needs to avoid mutual crossing or overlapping between U-shaped frames on CPWs, which may cause errors in the automatic routing, and at the same time, the algorithm needs to avoid mutual obstruction or interference when CPWs are bent. In contrast, the solution shown in the embodiments of the present application can accurately control the density of U-shaped frames in each dense area, with too close a distance limiting the bending space or causing CPWs to be too close, and too far a distance wasting layout space and ultimately affecting routing in other locations.

[0094] In the solution shown in the embodiment of this application, an "airport" is set for each CPW pair in a dense area before bending. In one dense area, there are multiple U-shaped frames, and in order to prevent them from interfering with or obstructing each other, an offset parameter is set before each "airport". Assuming that there is no problem with the layout space, the horizontal distance and takeoff order of the "airports" can be controlled.

[0095] For example, FIG. 9 illustrates a schematic diagram of offset setting in an embodiment of the present application. As shown in FIG. 9, the solution described in the embodiment of the present application sets one offset parameter (i.e., the above-mentioned offset amount) to adjust the density between airports. This offset is the horizontal distance between the center of the "airport" (the center of the U-shaped frame) and the intended bending point of the straight end of the original layout CPW. The offset value may be non-fixed; that is, the offset may be sequentially increased according to the above-mentioned sequence. The offset difference between adjacent wiring points may be preset by a developer or designer or determined based on layout information. Furthermore, because the surrounding environments are different in dense areas at different locations in a layout, the required offsets are not uniform. Therefore, the solution described in the embodiment of the present application allows for independent offsets to be set for different dense areas.

[0096] In one possible implementation form, the step of obtaining the auxiliary frames of the n wiring points based on the arrangement order of the n wiring points and the position information of the n wiring points includes: The method includes a step of obtaining an auxiliary frame for each of the n wiring points based on the arrangement order of the n wiring points, position information of the component in the extension direction of the n wiring points, and position information of the n wiring points.

[0097] In some embodiments, the computer device determines an offset value based on the position information of the component in the extension direction of the n wiring points and the position information of the n wiring points, and sequentially determines auxiliary frames corresponding to each of the n wiring points in accordance with the auxiliary frame determination order based on the determined offset value.

[0098] For example, the algorithm shown in the embodiments of the present application can traverse possible offset values ​​based on layout information around a congested area, including distances between components, obstacles, etc., and set an appropriate solution to ensure that the "airports" do not affect or overlap each other, while at the same time occupying as little layout space as possible.

[0099] Furthermore, in order to bend the CPW along a predetermined trajectory, the radius of curvature must be set according to the design needs.

[0100] The algorithm according to the embodiment of the present application is characterized in that the curvature radius of the CPW is set using a U-shaped frame to guide the bending. For example, the curvature radius of the CPW may be set to half the side length of the U-shaped frame, and if a larger bending radius is desired, the side length of the block can be increased.

[0101] The CPW bends are performed according to the above sequence. Referring to FIG. 10, a schematic diagram of the bend radius according to an embodiment of the present application is shown. As shown in FIG. 10, a bend in a CPW arc with order 1 in one congested region is shown, and its radius of curvature is R_1. As the bend routing continues, the radius of curvature can be set to be larger and larger for later bends in the same congested region so as to avoid earlier CPW arcs. Optionally, the initial value and amplification of the curvature radius can be selected by automatically traversing the values ​​(e.g., increasing from the minimum design requirement) until an optimal solution is obtained.

[0102] Alternatively, the initial value of the radius of curvature and the amplification may be preset by a developer or designer.

[0103] In one possible implementation, for example, the radius of curvature of the CPW is set to half the side length of the U-shaped frame. When determining the subframes of n wiring points, the computer device first sets the side length and offset value of each subframe of the n wiring points as the initial side length and initial offset value, and then sequentially determines the side length and offset value of each subframe of each wiring point according to the arrangement order of the n wiring points and the predetermined increment length of the side length and increment length of the offset value, so that the subframe of the current wiring point does not overlap with the subframe of the previous wiring point and the side length of the subframe of the current wiring point is greater than that of the previous wiring point. At the same time, the size and offset value of the subframe are limited, for example, to prevent the subframe from overlapping with other components.

[0104] The solution shown in the examples of this application specifies the radius and location of the "airport" using a protobuf, where the size of the airport is controlled by the neighborhood field (for example, neighborhood1 and neighborhood2 are the same), and the location of the airport is controlled by the offset. By adjusting these two values, the algorithm provided by the examples of this application (which can be called the "airport" algorithm) can be realized, and the code may be as shown below.

[0105] message Terminal{ message Coord{ …… doublex=1; doubley=2; } …… Coord coord=1; …… repeated double thickness=3; repeated double keepaway=4; Coord offset=5; double neighborhood=6; } In step 703, the bending angle of the first wiring point is obtained based on the bending start position of the first wiring point, the bending radius of the first wiring point, and the position information of the target wiring point corresponding to the first wiring point.

[0106] Here, the first wiring point is any one of the at least one wiring point.

[0107] In some embodiments, the computer device takes the bending start position of the first wiring point as a starting point, takes the position information of the target wiring point corresponding to the first wiring point as an end point, bends the wiring between the starting point and the end point with the bending radius of the first wiring point, and calculates and obtains the bending angle corresponding to this bending.

[0108] In the embodiment of the present application, after determining the bending start position and bending radius of at least one wiring point, the bending angle can be determined by combining the position information of the corresponding target wiring point of the at least one wiring point, that is, it is necessary to determine the angle to be bent from the bending start position.

[0109] In step 704, a wiring path for the first wiring point is generated based on the bend start position of the first wiring point, the bend radius of the first wiring point, and the bend angle of the first wiring point.

[0110] In some embodiments, the computer device starts from the bending start position of the first wiring point, bends based on the bending radius of the first wiring point and the bending angle of the first wiring point, and determines the generated path as the wiring path of the first wiring point.

[0111] Here, generating the above wiring path can refer to generating a point set corresponding to the wiring path. For example, taking CPW as an example, the above wiring path can be realized as a CPW point set, and the CPW point set includes position information for defining n points on the CPW line placed on the wiring path.

[0112] Optionally, in the process of generating a wiring path, the computer device can further generate parameter information of an arc segment of the wiring at a bend corresponding to the first wiring point, where the parameter information of the arc segment includes an arc parameter and a circle center parameter, the arc parameter may be used to indicate the arrangement order of each point included in the arc segment, and the circle center parameter may be used to indicate the circle center position corresponding to the arc segment.

[0113] Here, when the above wiring is a CPW line, each set of CPW arc segments corresponds to two signal transmission line segments that are parallel and exhibit an arc.

[0114] Here, the wiring path is bent at a bending radius from the bending position.

[0115] Optionally, the wiring path corresponding to the first wiring point extends forward from the start position of the bend along the tangent direction of the circle where the arc formed by the bend is located, after rotating the bend angle according to the bend radius, that is, when calculating the bend angle, the corresponding target wiring point of the wiring point needs to be comprehensively taken into account.

[0116] For example, assuming that there is no obstacle between the target wiring point and the bending start position, the solution provided in the embodiments of the present application can simultaneously calculate the bending start positions and bending radii of the first wiring point and the target wiring point, and determine the circles on which the arcs formed by the first wiring point and the target wiring point are located when they are bent at the bending start positions according to their respective bending radii. A common tangent between the two circles is calculated, and the direction of the tangent is the same as the extending direction of the first wiring point and the target wiring point after they start bending at the bending start positions according to their respective bending radii. After calculating the intersections between the tangent and the two circles, the bending radii of the first wiring point and the target wiring point can be determined. The bending start positions and bending angles of the first wiring point and the target wiring point can be combined to draw a wiring path between the first wiring point and the target wiring point.

[0117] 11, a schematic diagram of a wiring path according to an embodiment of the present application is shown. As shown in FIG. 11, the bending radius 1101 of the wiring path generated according to the solution shown in the embodiment of the present application is significantly increased compared to the bending radius 1102 of the wiring path generated according to the classical automatic wiring algorithm, and the curvature radius is significantly decreased.

[0118] Optionally, the algorithm used by the solution presented in the examples of this application can be applied not only to congested areas but also to any wiring point in the layout whose bending radius needs to be flexibly adjusted.

[0119] As can be seen from the above description, the solution provided in the embodiments of the present application uses the position information of at least one wiring point to obtain the initial bending position at the start of bending of the wiring point and the bending radius corresponding to the bending curvature, and controls the bending of the wiring path based on the obtained initial bending position and bending radius, thereby realizing control over the bending curvature of the wiring path in the automatic routing process, allowing the automatic routing algorithm to be applied to the automatic routing of chips with bending curvature requirements, thereby expanding the application scenarios of the automatic routing algorithm.

[0120] Furthermore, the solution shown in the embodiments of the present application is not limited to horizontal and vertical wiring routes, but can combine multiple wiring points to comprehensively consider the offset parameters and bending radius, eliminating the need to wire each point one by one using a sequential wiring method, thereby reducing the wiring difficulty and improving wiring efficiency in large-scale chip wiring.

[0121] In the solution shown in the embodiments of this application, the automatic wiring algorithm has more tolerance in the selection of wiring paths and wiring directions, and while realizing automatic wiring, it can automatically identify and increase the curvature radius at the bends of lines (e.g., CPW) in dense areas, thereby improving the efficiency of chip development.

[0122] A topology routing algorithm can generate a routing path based on circuit routing rules, and one important parameter of the rules is the neighborhood parameter, which is usually set as the minimum spacing between wiring lines in a layout (in a dense area), and automatic routing is performed on the premise of ensuring the distance between lines (avoiding overlapping and crossing of lines). However, since the neighborhood parameter is usually a fixed value, if the CPW spacing in a dense area of ​​a layout is small, there is a problem that the CPW curvature of the automatically placed CPW in the dense area is too large. To address this, based on the solutions shown in Figure 4 or Figure 7 above, the solution shown in the embodiment of the present application introduces a new automatic routing algorithm for processing, and the processing flow diagram of the automatic routing algorithm may be as shown in Figure 12.

[0123] In S1201, wiring begins.

[0124] In S1202, dense regions are searched for and located.

[0125] For example, an automatic wiring tool can traverse each wiring point in the wiring plan information of the circuit layout in ascending order of abscissa / ordinate to search for and locate areas of high density of wiring points in the circuit layout.

[0126] In S1203, it is determined whether or not the area falls within a dense area.

[0127] Specifically, if the automatic wiring tool finds at least two wiring points with the same bending direction and the difference between the abscissa and ordinate of each of the at least two wiring points is less than a difference threshold, it determines that the wiring points are in a dense area of ​​wiring points.

[0128] In S1204, the takeoff sequence is organized.

[0129] The automatic wiring tool may rearrange the at least two wiring points based on the opposite bending directions of the at least two wiring points in the congested region, and obtain an arrangement order of the at least two wiring points in the congested region.

[0130] In S1205, airport density is controlled.

[0131] The automatic wiring tool can set the offset amounts of the at least two wiring points in the congested area in an increasing manner according to the arrangement order of the at least two wiring points in the congested area.

[0132] In S1206, a curved path is preset.

[0133] The automatic wiring tool can set the bending radius corresponding to each of the at least two wiring points in the above-mentioned dense area in an increasing manner (i.e., set the side length of the airport) according to the arrangement order of the at least two wiring points in the above-mentioned dense area, and then generate a wiring route in which the at least two wiring points start bending from their respective bending start positions based on the offset amount and bending radius of each of the at least two wiring points in the above-mentioned dense area, and the wiring route can be tangent to the circle where the arc formed at the bending position is located in the extension direction after bending and connect to the target wiring point.

[0134] The solution shown in the above embodiment of the present application is based on topology wiring and develops an algorithm that can identify wiring-congested areas and customize the curvature radius at the bends of the lines (e.g., CPW), thereby achieving the effect of small curvature bends in the densely packed areas when realizing automatic wiring, and meeting the automatic wiring demands of superconducting quantum chips. 1) EDA automatic wiring for superconducting quantum chips, 2) intelligently identifying areas of dense wiring; 3) Automatically adjust the radius of curvature of the CPW line at the bend during wiring; 4) allowing users to customize radius of curvature parameters based on design requirements; and 5) It has the advantages of high efficiency and convenience.

[0135] In addition, an embodiment of the present application further provides a chip product, which includes at least one wiring point, and the at least one wiring point has a bend start position and a bend radius in each wiring path, and the wiring path bends from the bend position at the bend radius.

[0136] Here, the wiring path of the above chip product can be obtained according to the method shown in FIG. 4 or FIG.

[0137] 13, a schematic diagram of a wiring path of a chip product according to an embodiment of the present application is shown. As shown in FIG. 13, the chip product includes at least one wiring point 1301 and a wiring path 1302 corresponding to the wiring point 1301, where the wiring path 1302 starts bending at a bending position 1303 and bends with a certain bending radius to form an arc-shaped bending section.

[0138] In one possible implementation, the at least one wiring point includes n wiring points, and the offset amount of each of the n wiring points increases in sequence.

[0139] As shown in FIG. 13, the offset amount of each wiring point in the chip product increases in the reverse direction of the bending direction.

[0140] In one possible implementation, the bending radius of each of the n wiring points increases in sequence.

[0141] As shown in FIG. 13, the bending radius of each wiring point in a chip product increases in the reverse direction of the bending direction.

[0142] In one possible implementation, for the n wiring points, the difference between the abscissas of any two adjacent wiring points is less than a first difference threshold, and the difference between the ordinates of any two adjacent wiring points is less than a second difference threshold.

[0143] In one possible implementation, the chip product is a quantum chip, which may be, for example, a superconducting quantum chip.

[0144] 14 is a structural block diagram of a wiring device for a circuit layout according to an exemplary embodiment, which can realize all or part of the steps performed by a computer device in the method provided by the embodiment shown in FIG. 4 or FIG. 7, and which includes: a first obtaining module 1401 configured to obtain position information of at least one wiring point in a circuit layout from wiring plan information of the circuit layout; a second obtaining module 1402 configured to calculate a bend start position and a bend radius corresponding to each of the at least one wiring point based on the position information; and a path generation module 1403 configured to generate a wiring path that passes through at least one wiring point based on a bend start position and a bend radius, wherein the wiring path starts bending at the bend start position with the bend radius.

[0145] In one possible implementation, the at least one wiring point includes n wiring points, where n is greater than or equal to 2 and n is an integer; The second acquisition module 1402 is Obtain the array order of the n wiring points; obtaining auxiliary frames for the n wiring points based on the arrangement order of the n wiring points and position information of the n wiring points, the auxiliary frames for the n wiring points not overlapping with each other, the auxiliary frames being U-shaped frames, the opening direction of the auxiliary frames being the same as the wire extension direction at the wiring points, and the center of the auxiliary frame being located on an extension line from the wiring points; The method is configured to calculate a bending start position and a bending radius corresponding to each of the n wiring points based on the auxiliary frames of each of the n wiring points; Here, the bending start position of the wiring point is obtained based on the offset amount between the center of the auxiliary frame of the wiring point and the wiring point, and the bending radius of the wiring point is obtained based on the side length of the auxiliary frame of the wiring point.

[0146] In one possible implementation, the offset amount for each of the n wiring points increases in order according to the sequence.

[0147] In one possible implementation, the side length of the auxiliary frame of each of the n wiring points increases according to the arrangement order.

[0148] In one possible implementation form, the second acquisition module 1402 is configured to acquire auxiliary frames for each of the n wiring points based on the arrangement order of the n wiring points, the position information of the component in the extension direction of the n wiring points, and the position information of the n wiring points.

[0149] In one possible implementation form, the second obtaining module 1402 is configured to sort the positions of the n wiring points according to the reverse direction of the bending direction, and obtain an arrangement order of the n wiring points.

[0150] In one possible implementation form, the first acquisition module 1401 is configured to traverse the position information of each of the wiring points in the wiring plan information and acquire the position information of n wiring points; Here, the bending direction of the n wiring points is the same, and the position information of any two adjacent wiring points among the n wiring points satisfies a specified condition.

[0151] In one possible implementation, the specified condition is: The difference between the abscissas of any two adjacent wiring points is less than a first difference threshold, and the difference between the ordinates of any two adjacent wiring points is less than a second difference threshold.

[0152] In one possible implementation, the path generation module 1401: obtaining a bending angle of the first wiring point based on a bending start position of the first wiring point, a bending radius of the first wiring point, and position information of a target wiring point corresponding to the first wiring point, the first wiring point being any one of at least one wiring point; The wiring path of the first wiring point is generated based on the bending start position of the first wiring point, the bending radius of the first wiring point, and the bending angle of the first wiring point.

[0153] In one possible implementation, the circuit layout is a circuit layout of a superconducting quantum chip.

[0154] As can be seen from the above description, the solution provided in the embodiments of the present application uses the position information of at least one wiring point to obtain the initial bending position at the start of bending of the wiring point and the bending radius corresponding to the bending curvature, and controls the bending of the wiring path based on the obtained initial bending position and bending radius, thereby realizing control over the bending curvature of the wiring path in the automatic routing process, allowing the automatic routing algorithm to be applied to the automatic routing of chips with bending curvature requirements, thereby expanding the application scenarios of the automatic routing algorithm.

[0155] It should be noted that the device provided in the above embodiments only takes the division of each of the above functional modules as an example when realizing its functions, but in actual application, the above functions can be performed by different functional modules as needed, that is, the internal structure of the device is divided into different functional modules to perform all or part of the above-described functions. In addition, the device and method embodiments provided in the above embodiments belong to the same concept, and their specific realization processes shall refer to the method embodiments in detail and shall not be repeated here.

[0156] 15 is a structural schematic diagram of a computer device according to an exemplary embodiment. The computer device 1500 includes a processor 1501, such as a central processing unit (CPU), a system memory 1504 including random access memory (RAM) 1502 and read-only memory (ROM) 1503, and a system bus 1505 connecting the system memory 1504 and the processor 1501. The computer device 1500 further includes an input / output system 1506 that facilitates information transfer between devices within the computer, and a mass storage device 1507 for storing an operating system 1513, application programs 1514, and other program modules 1515.

[0157] The mass storage device 1507 is connected to the processor 1501 via a mass storage controller (not shown) connected to the system bus 1505. The mass storage device 1507 and its associated computer-readable media provide non-volatile storage for the computing device 1500. That is, the mass storage device 1507 may include a computer-readable medium (not shown), such as a hard disk or a compact disc read-only memory (CD-ROM) drive.

[0158] Without loss of generality, the computer-readable media may include computer storage media and communication media. Computer storage media includes volatile and nonvolatile, removable and non-removable media implemented by any method or technology for storage of information, such as computer-readable instructions, data structures, program modules, or other data. Computer storage media include RAM, ROM, flash memory or other solid-state storage technology, CD-ROM or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage, or other magnetic storage devices. Of course, those skilled in the art will understand that the computer storage media is not limited to some of the above. The system memory 1504 and mass storage device 1507 described above may be collectively referred to as memory.

[0159] The computing device 1500 may be connected to the Internet or other network devices via a network interface unit 1516 connected to the system bus 1505 .

[0160] The memory further includes one or more computer instructions, which are stored in the memory and which the processor 1501 executes to implement all or part of the steps of the method shown in either FIG. 4 or FIG. 7.

[0161] In an exemplary embodiment, a non-transitory computer-readable storage medium containing instructions, such as a memory containing computer programs (instructions), may be provided, and the programs (instructions) may be executed by a processor of a computer device to perform the methods described in the embodiments of the present application. For example, the non-transitory computer-readable storage medium may be a ROM, RAM, CD-ROM, magnetic tape, floppy disk, optical data storage device, etc.

[0162] In an exemplary embodiment, a computer program product or a computer program is further provided, the computer program product or the computer program including computer instructions stored in a computer-readable storage medium, the computer instructions being read by a processor of a computing device from the computer-readable storage medium, and the processor executing the computer instructions to cause the computing device to perform the method illustrated in each of the above embodiments.

Claims

1. 1. A method for wiring a circuit layout implemented by a computer device, comprising: acquiring position information of at least one wiring point in the circuit layout from wiring plan information of the circuit layout; calculating a bend start position and a bend radius corresponding to each of the at least one wiring point based on the position information; generating a wiring path passing through the at least one wiring point based on the bend start position and the bend radius, wherein the wiring path starts bending at the bend start position with the bend radius; the at least one wiring point includes n wiring points, n being greater than or equal to 2 and n being an integer; The step of calculating a bend start position and a bend radius corresponding to each of the at least one wiring point based on the position information includes: obtaining an array order of the n wiring points; a step of acquiring auxiliary frames for the n wiring points based on the arrangement order of the n wiring points and position information of the n wiring points, wherein the auxiliary frames for the n wiring points do not overlap each other, the auxiliary frames are U-shaped frames, the opening direction of the auxiliary frames is the same as the wire extension direction at the wiring points, and the center of the auxiliary frame is located on an extension line from the wiring points; calculating a bending start position and a bending radius corresponding to each of the n wiring points based on the auxiliary frames of each of the n wiring points; a bending start position of the wiring point is obtained based on an offset amount between the center of the auxiliary frame of the wiring point and the wiring point, and a bending radius of the wiring point is obtained based on a side length of the auxiliary frame of the wiring point. How to wire the circuit layout.

2. the offset amount of each of the n wiring points increases in accordance with the arrangement order.

2. The method for wiring a circuit layout according to claim 1.

3. The length of each side of the auxiliary frame of the n wiring points increases in accordance with the arrangement order.

2. The method for wiring a circuit layout according to claim 1.

4. The step of acquiring auxiliary frames for the n wiring points based on the arrangement order of the n wiring points and position information of the n wiring points includes: and acquiring an auxiliary frame for each of the n wiring points based on an arrangement order of the n wiring points, position information of the component in the extension direction of the n wiring points, and position information of the n wiring points.

2. The method for wiring a circuit layout according to claim 1.

5. The bending directions of the wiring paths of the n wiring points are the same, and the step of acquiring the arrangement order of the n wiring points includes: and a step of rearranging the positions of the n wiring points in a direction opposite to the bending direction to obtain an arrangement order of the n wiring points.

2. The method for wiring a circuit layout according to claim 1.

6. The step of acquiring position information of at least one wiring point in the circuit layout from wiring plan information of the circuit layout includes: traversing position information of each of the wiring points in the wiring plan information to obtain position information of n wiring points; The n wiring points have the same bending direction, and position information of any two adjacent wiring points among the n wiring points satisfies a specified condition.

2. The method for wiring a circuit layout according to claim 1.

7. The specified conditions are: The difference between the abscissas of any two adjacent wiring points is less than a first difference threshold, and the difference between the ordinates of any two adjacent wiring points is less than a second difference threshold.

7. The wiring method for a circuit layout according to claim 6.

8. The step of generating a wiring path passing through the at least one wiring point based on the bend start position and the bend radius includes: acquiring a bending angle of the first wiring point based on a bending start position of the first wiring point, a bending radius of the first wiring point, and position information of a target wiring point corresponding to the first wiring point, the first wiring point being any one of the at least one wiring point; generating a wiring path for the first wiring point based on a bending start position of the first wiring point, a bending radius of the first wiring point, and a bending angle of the first wiring point, 2. The method for wiring a circuit layout according to claim 1.

9. The circuit layout is a circuit layout of a superconducting quantum chip. A wiring method for a circuit layout according to any one of claims 1 to 8.

10. A chip product manufactured by the circuit layout wiring method according to any one of claims 1 to 8.

11. A wiring device for a circuit layout, comprising: a first obtaining module configured to obtain position information of at least one wiring point in a circuit layout from wiring plan information of the circuit layout; a second acquisition module configured to calculate a bend start position and a bend radius corresponding to each of the at least one wiring point based on the position information; a path generation module configured to generate a wiring path passing through the at least one wiring point based on the bend start position and the bend radius, wherein the wiring path starts bending at the bend start position with the bend radius; the at least one wiring point includes n wiring points, n being greater than or equal to 2 and n being an integer; The second acquisition module: Obtain the array order of the n wiring points; acquiring auxiliary frames for the n wiring points based on the arrangement order of the n wiring points and position information of the n wiring points, the auxiliary frames for the n wiring points not overlapping with each other, the auxiliary frames being U-shaped frames, the opening direction of the auxiliary frames being the same as the wire extension direction at the wiring points, and the centers of the auxiliary frames being located on an extension line from the wiring points; a bending start position and a bending radius corresponding to each of the n wiring points are calculated based on the auxiliary frames of each of the n wiring points; a bending start position of the wiring point is obtained based on an offset amount between the center of the auxiliary frame of the wiring point and the wiring point, and a bending radius of the wiring point is obtained based on a side length of the auxiliary frame of the wiring point. Circuit layout wiring device.

12. 9. A computer apparatus comprising a processor and a memory, wherein at least one computer instruction is stored in the memory, and wherein the at least one computer instruction is loaded and executed by the processor to implement the method for wiring a circuit layout according to any one of claims 1 to 8.

13. A computer program causing a processor of a computer device to execute the method for wiring a circuit layout according to any one of claims 1 to 8.

Images