Programmable and reprogrammable quantum circuits
Superconducting fuse and antifuse devices in quantum circuits address qubit malfunctions and connectivity issues by allowing programmable reconfiguration, improving quantum computing performance and efficiency.
Patent Information
- Application Number
- JP2023534224
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2020-12-24
- Filing Date
- 2021-12-22
- Publication Date
- 2025-09-26
- Estimated Expiration
- 2041-12-22
AI Technical Summary
Qubit yield and frequency collisions are challenging for multi-qubit devices, with some qubits malfunctioning due to issues like low coherence and off-target frequencies, which worsen as quantum computers scale up.
The use of superconducting fuse and antifuse devices to modify the coupling between quantum computing elements, allowing for the programmable and reprogrammable configuration of quantum circuits by exposing these devices to laser power to open or close electrical connections, thereby removing malfunctioning qubits and improving connectivity.
This approach enhances the performance, accuracy, and efficiency of quantum computing devices by enabling the removal of problematic qubits and optimizing connectivity based on performance criteria, such as frequency collisions and coherence.
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Abstract
Description
[Technical Field]
[0001] The present disclosure relates to quantum circuits, and more particularly to programmable and reprogrammable quantum circuits. Summary of the Invention
[0002] The following presents a summary in order to provide a basic understanding of one or more embodiments of the invention. This summary is not intended to identify key or critical elements of particular embodiments or the claims, or to delineate any scope thereof. Its sole purpose is to present concepts in a simplified form as a prelude to the more detailed description that is presented later. In one or more embodiments described herein, systems, devices, computer-implemented methods, and / or computer program products that facilitate programmable and / or reprogrammable quantum circuits are described.
[0003] According to an embodiment, the device may include a superconducting coupler device having a superconducting fuse device used to modify the coupling of the first quantum computing element and the second quantum computing element.
[0004] According to an embodiment, the device may include a superconducting coupler device having a superconducting antifuse device used to modify the coupling of the first quantum computing element and the second quantum computing element.
[0005] According to another embodiment, a computer-implemented method may include reconfiguring, by a system operably coupled to a processor, connectivity of a quantum computing element based on exposure of one or more superconducting switch devices provided on one or more superconducting coupler devices to at least one laser output. [Brief explanation of the drawings]
[0006] [Figure 1]1 illustrates an exemplary, non-limiting device that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. [Figure 2] 1 illustrates an exemplary, non-limiting device that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. [Figure 3] 1 illustrates an exemplary, non-limiting device that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. [Figure 4] 1 illustrates an exemplary, non-limiting device that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. [Figure 5] 1 illustrates an exemplary, non-limiting device that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. [Figure 6A] 1 illustrates an exemplary, non-limiting device that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. [Figure 6B] 1 illustrates an exemplary, non-limiting device that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. [Figure 7] 1 illustrates an exemplary, non-limiting device that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. [Figure 8] 1 illustrates an exemplary, non-limiting device that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. [Figure 9] 1 illustrates an exemplary, non-limiting device that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. [Figure 10A]1 illustrates an exemplary, non-limiting device that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. [Figure 10B] 1 illustrates an exemplary, non-limiting device that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. [Figure 10C] 1 illustrates an exemplary, non-limiting device that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. [Figure 11] 1 illustrates an exemplary, non-limiting device that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. [Figure 12] 1 illustrates an exemplary, non-limiting device that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein.
[0007] [Figure 13] FIG. 1 shows a flow diagram of an exemplary, non-limiting computer-implemented method that may facilitate programmable and / or reprogrammable quantum circuits in accordance with one or more embodiments described herein. [Figure 14] FIG. 1 shows a flow diagram of an exemplary, non-limiting computer-implemented method that may facilitate programmable and / or reprogrammable quantum circuits in accordance with one or more embodiments described herein.
[0008] [Figure 15] 1 illustrates a block diagram of an exemplary non-limiting operating environment capable of facilitating one or more embodiments described herein. DETAILED DESCRIPTION OF THE INVENTION
[0009] The following detailed description is merely exemplary and is not intended to limit the embodiments, or the application or uses of embodiments, or combinations thereof. Furthermore, there is no intention to be bound by any express or implied information presented in the preceding Background or Overview sections or in the Detailed Description section.
[0010] Quantum computing generally uses quantum mechanical phenomena for the purposes of performing computing and information processing functions. Quantum computing can be viewed in contrast to classical computing, which generally uses transistors and operates on binary values. That is, while classical computers can operate on bit values of either 0 or 1, quantum computers operate on quantum bits (qubits) with superpositions of both 0 and 1, and may entangle multiple qubits and use interference.
[0011] Qubit yield and frequency collisions are challenging for multi-qubit devices and quantum computers. Qubits can exhibit a wide range in coherence, with some qubits malfunctioning. Multi-qubit devices can be limited by their worst qubit. These challenges are expected to worsen as quantum computers are scaled to have more qubits. To overcome these challenges, various embodiments of the present disclosure may facilitate programmable and / or reprogrammable quantum circuits (e.g., superconducting circuits including one or more qubits) by using one or more superconducting fuse devices and / or one or more superconducting antifuse devices to define quantum circuits that, when implemented, meet certain criteria. For example, various embodiments of the present disclosure may enable the removal of one or more problematic qubits from a quantum circuit, thereby facilitating programmable and / or reprogrammable qubit circuits. For example, various embodiments of the present disclosure may enable the removal of problematic qubits, including, but not limited to, malfunctioning qubits, qubits that exhibit a low quality factor (Q) for their coherence, qubits that have off-target frequencies, and / or other problematic qubits.
[0012] As referenced herein, a "superconducting fuse device" (also referred to herein as a "fuse") may include a type of superconducting switch device that can provide an electrical connection that can be opened (e.g., to interrupt the flow of electrical current). As referred to herein, a "superconducting antifuse device" (also referred to herein as an "antifuse") may include another type of superconducting switch device that can be closed to provide an electrical connection (e.g., to allow electrical current to flow). As referred to herein, an "entity" may comprise a human, a client, a user, a computing device, a software application, an agent, a machine learning model, an artificial intelligence, or another entity, or a combination thereof. It is understood that such an "entity" may facilitate the design, manufacture, and / or implementation (e.g., simulation, quantization, and / or testing) of one or more embodiments of the present disclosure described herein. It will be understood that when an element is referred to as being "coupled" to another element, this may describe one or more different types of coupling, including, but not limited to, capacitive coupling, chemical coupling, communicative coupling, electrical coupling, electromagnetic coupling, inductive coupling, operational coupling, optical coupling, physical coupling, thermal coupling, and / or another coupling type.
[0013] One or more embodiments will now be described with reference to the drawings. Like reference numerals are used to refer to like elements throughout. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a more thorough understanding of one or more embodiments. It will be apparent, however, that in various instances one or more embodiments may be practiced without these specific details.
[0014] 1 illustrates an exemplary, non-limiting device 100 that can facilitate a programmable and / or reprogrammable quantum circuit according to one or more embodiments described herein. Device 100 can include semiconductor devices or superconducting devices, or both, that can be implemented in a quantum device. For example, device 100 can comprise integrated semiconductor or superconducting circuits (e.g., quantum circuits), or both, that can be implemented in a quantum device, such as, for example, quantum hardware, a quantum processor, a quantum computer, or another quantum device, or a combination thereof. Device 100 can include semiconductor and / or superconducting devices, such as, for example, programmable and / or reprogrammable quantum circuit devices, that can be implemented in a quantum device as defined above.
[0015] In some embodiments, device 100 may include a programmable and / or reprogrammable quantum circuit device that may be integrated with a circuit (e.g., a quantum circuit, a superconducting circuit, and / or another circuit) and / or a processor (e.g., a quantum processor) using, for example, interconnects (e.g., microwave interconnects) including, but not limited to, wire bonds, bump bonds, mechanical interconnects (e.g., pogo pins), and / or other interconnects. In these embodiments, such interconnects (e.g., microwave interconnects) may couple (e.g., connect) device 100 to wiring layers including, for example, printed circuit boards, laminate boards, flexible wiring, and / or coaxial cables. In these embodiments, such wiring layers may couple (e.g., connect) device 100 to other components (e.g., microwave components), such as, for example, directional couplers, attenuators, isolators, filters, amplifiers, and / or other components. In some embodiments, device 100 may be co-fabricated directly on the same chip as a quantum processor or other elements (e.g., microwave elements).
[0016] Fabrication of device 100 can include a multi-step sequence of photolithographic and / or chemical processing steps that facilitate the step-by-step creation of electronic-based systems, devices, components, and / or circuits, for example, semiconductor or superconducting devices (e.g., integrated circuits), or both. For example, device 100 can be fabricated using techniques such as, but not limited to, photolithography, microlithography, nanolithography, nanoimprint lithography, photomasking techniques, patterning techniques, photoresist techniques (e.g., positive photoresist, negative photoresist, hybrid photoresist, and / or other photoresist techniques), etching techniques (e.g., reactive ion etching (RIE), dry etching, wet etching, ion beam etching, plasma etching, laser ablation, and / or other techniques), and the like. The semiconductor device may be fabricated on one or more substrates (e.g., a silicon (Si) substrate, and / or another substrate) by utilizing techniques including etching techniques, evaporation techniques, sputtering techniques, plasma ashing techniques, thermal treatments (e.g., rapid thermal annealing, furnace annealing, thermal oxidation, and / or another thermal treatment), chemical vapor deposition (CVD), atomic layer deposition (ALD), physical vapor deposition (PVD), molecular beam epitaxy (MBE), electrochemical deposition (ECD), chemical mechanical planarization (CMP), backgrinding techniques, and / or another technique for fabricating integrated circuits.
[0017] Device 100 can be fabricated using a variety of materials. For example, device 100 can be fabricated using materials from one or more different material classes, including, but not limited to, conductive materials, semiconductive materials, superconductive materials, dielectric materials, polymeric materials, organic materials, inorganic materials, non-conductive materials, and / or other materials that can be utilized in one or more of the above-mentioned techniques for fabricating integrated circuits.
[0018] 1, device 100 may include qubit 102. In various embodiments of the present disclosure, qubit 102 may include a quantum computing element. As referred to herein, a "quantum computing element" may include, for example, a qubit, a qubit device, a quantum computing device, a readout device, a quantum resonator, a waveguide, a Josephson junction, a ground, a capacitor, a shunt capacitor, and / or another quantum computing element.
[0019] Qubit 102 may include capacitor pads 104 a, 104 b and Josephson junction 106 (represented by an "X" in FIG. 1 ), where each of capacitor pads 104 a, 104 b is coupled to Josephson junction 106. Device 100 may further include one or more superconducting coupler devices 108 a, 108 b, 108 c, 108 d. In various embodiments of the present disclosure, each of superconducting coupler devices 108 a, 108 b, 108 c, 108 d may include, but is not limited to, a quantum resonator, a bus, a transmission line, an electrode, a lead, and / or another superconducting coupler device.
[0020] 1, one or more of superconducting coupler devices 108a, 108b, 108c, 108d may include one or more superconducting fuse devices 110a, 110b and / or one or more superconducting antifuse devices 112a, 112b, 112c. For example, in the exemplary embodiment shown in FIG. 1, superconducting coupler device 108a may include superconducting fuse device 110a and superconducting antifuse device 112a; superconducting coupler device 108b may include superconducting antifuse device 112b; superconducting coupler device 108c may include superconducting antifuse device 112c; and / or superconducting coupler device 108d may include superconducting fuse device 110b.
[0021] 1, superconducting antifuse device 112c may be provided (e.g., formed) partially on superconducting coupler device 108c and capacitor pad 104b. For example, in this exemplary embodiment, superconducting antifuse device 112c may be provided (e.g., formed) partially on superconducting coupler device 108c and capacitor pad 104b, such that when superconducting antifuse device 112c is implemented (e.g., activated and / or operated), it may create a conductive path along superconducting coupler device 108c that may couple superconducting coupler device 108c to capacitor pad 104b and thus to qubit 102 (e.g., via capacitor pad 104b). Additionally or alternatively, in this exemplary embodiment, Josephson junction 106 may include superconducting fuse device 110c.
[0022] 1, one or more superconducting fuse devices 110a, 110b, 110c and / or one or more superconducting antifuse devices 112a, 112b, 112c may be used to alter the coupling (e.g., connectivity) between quantum computing elements of device 100 and / or between one or more quantum computing elements of device 100 and one or more external quantum computing elements (not shown in FIG. 1), which may be external to device 100. In some embodiments, one or more superconducting fuse devices 110a, 110b, 110c may be actuated (e.g., operated) to decouple the quantum computing elements of device 100 from each other and / or to decouple one or more quantum computing elements of device 100 from one or more external quantum computing elements (not shown in FIG. 1), which may be external to device 100. In some embodiments, one or more superconducting antifuse devices 112a, 112b, 112c may be actuated (e.g., operated) to couple quantum computing elements of device 100 to one another and / or to one or more external quantum computing elements (not shown in FIG. 1 ), which may be external to device 100. In the exemplary embodiment illustrated in FIG. 1 , actuating (e.g., operating) one or more superconducting fuse devices 110a, 110b, 110c and / or one or more superconducting antifuse devices 112a, 112b, 112c may, based on respectively uncoupling or coupling quantum computing elements of device 100 and / or uncoupling or coupling one or more quantum computing elements of device 100 and one or more external quantum computing elements (e.g., external to device 100), device 100 may thereby facilitate a programmable and / or reprogrammable quantum circuit device.
[0023] In various embodiments of the present disclosure, superconducting fuse device 110a, 110b, 110c and / or superconducting antifuse device 112a, 112b, 112c may be exposed to laser power (e.g., exposed to a laser) to activate (e.g., operate) such devices. In these embodiments, device 100, one or more superconducting fuse devices 110a, 110b, 110c, and / or one or more superconducting antifuse devices 112a, 112b, 112c may be coupled to an external device (not shown) to expose such devices to laser power. For example, device 100, superconducting fuse devices 110a, 110b, and / or 110c, and / or superconducting antifuse devices 112a, 112b, and / or 112c may be coupled (e.g., via superconducting coupler devices 108a, 108b, 108c, and / or 108d) to external devices that may be external to device 100, such as, for example, laser devices and / or pulse generator devices.
[0024] In an exemplary embodiment, although not shown in FIG. 1 , device 100, superconducting fuse devices 110a, 110b, and / or 110c, and / or superconducting antifuse devices 112a, 112b, and / or 112c may be coupled to a laser device, including, but not limited to, a power amplifier, an optical laser device (e.g., generating an optical laser output), an infrared laser device (e.g., generating an infrared laser output), and / or another laser device that may be external to device 100 and that may facilitate the transmission and / or reception of optical and / or infrared light lasers to and / or from device 100, superconducting fuse devices 110a, 110b, and / or 110c, and / or superconducting antifuse devices 112a, 112b, and / or 112c. In another exemplary embodiment, although not shown in FIG. 1 , device 100, superconducting fuse devices 110a, 110b, and / or 110c, and / or superconducting antifuse devices 112a, 112b, and / or 112c may be coupled to a pulse generator device, including but not limited to an arbitrary waveform generator (AWG), a vector network analyzer (VNA), and / or another pulse generator device that may be external to device 100 and that may transmit and / or receive pulses (e.g., microwave pulses, microwave signals, control signals, and / or other pulses) to and / or from device 100, superconducting fuse devices 110a, 110b, and / or 110c, and / or superconducting antifuse devices 112a, 112b, and / or 112c.
[0025] According to one or more embodiments of the present disclosure, such external devices (e.g., power amplifiers, optical laser devices, infrared laser devices, AWGs, VNAs, and / or other external devices) may also be coupled to a computer including a memory that may store instructions and a processor that may execute such instructions. For example, in these embodiments, such external devices (e.g., power amplifiers, optical laser devices, infrared laser devices, AWGs, VNAs, and / or other external devices) may also be coupled to a computer 1512, described below with reference to FIG. 15 , where the computer 1512 may include a system memory 1516 that may store instructions (e.g., software, routines, processing threads, and / or other instructions) and a processing unit 1514 that may execute such instructions. In these embodiments, such a computer may be utilized to operate and / or control (e.g., via the processing unit 1514 executing instructions stored in the system memory 1516) such external devices (e.g., power amplifiers, optical laser devices, infrared laser devices, AWGs, VNAs, and / or other external devices). For example, in these embodiments, such a computer may be utilized to enable the above-described external devices (e.g., power amplifiers, optical laser devices, infrared laser devices, AWGs, VNAs, and / or other external devices) to: a) transmit and / or receive optical and / or infrared laser light to and / or from device 100, superconducting fuse devices 110a, 110b, and / or 110c, and / or superconducting antifuse devices 112a, 112b, and / or 112c; and / or b) transmit and / or receive pulses (e.g., microwave pulses, microwave signals, control signals, and / or other pulses) to and / or from device 100, superconducting fuse devices 110a, 110b, and / or 110c, and / or superconducting antifuse devices 112a, 112b, and / or 112c.In the above embodiments, such optical and / or infrared lasers may constitute laser outputs that may be provided to, for example, device 100, superconducting fuse devices 110a, 110b, and / or 110c, and / or superconducting antifuse devices 112a, 112b, and / or 112c (e.g., via superconducting coupler devices 108a, 108b, 108c, and / or 108d).
[0026] 1 , upon exposure of superconducting fuse device 110a to laser power (e.g., a first laser power from a laser device), superconducting fuse device 110a may sever a conductive path along superconducting coupler device 108a to decouple superconducting coupler device 108a from the first quantum computing element and the second quantum computing element. For example, upon exposure of superconducting fuse device 110a to such laser power, superconducting fuse device 110a may sever a conductive path along superconducting coupler device 108a to decouple superconducting coupler device 108a from qubit 102 (e.g., from capacitor pad 104a of qubit 102) and from external quantum computing elements (e.g., qubits) that may be external to device 100. In this exemplary embodiment, upon exposure of superconducting antifuse device 112a to laser output (e.g., a second laser output from the laser device), superconducting antifuse device 112a may generate a conductive path along superconducting coupler device 108a that may couple superconducting coupler device 108a to ground (not shown in FIG. 1 ). In this exemplary embodiment, upon exposure of superconducting antifuse device 112b to laser output (e.g., a third laser output from the laser device), superconducting antifuse device 112b may generate a conductive path along superconducting coupler device 108b that may couple superconducting coupler device 108b to the first quantum computing element and the third quantum computing element. For example, upon exposure of superconducting antifuse device 112b to such laser output, superconducting antifuse device 112b may generate a conductive path along superconducting coupler device 108b that may couple superconducting coupler device 108b to qubit 102 (e.g., capacitor pad 104a of qubit 102) and to an external quantum computing element (e.g., a readout device), which may be external to device 100.
[0027] 1, upon exposure of superconducting antifuse device 112c to laser power (e.g., a fourth laser power from the laser device), superconducting antifuse device 112c may generate a conductive path along superconducting coupler device 108c that may couple superconducting coupler device 108c to the first quantum computing element and the second quantum computing element. For example, upon exposure of superconducting antifuse device 112c to such laser power, superconducting antifuse device 112c may generate a conductive path along superconducting coupler device 108c that may couple superconducting coupler device 108c to qubit 102 (e.g., capacitor pad 104b of qubit 102) and to an external quantum computing element (e.g., a readout device), which may be external to device 100.
[0028] 1 , upon exposure of superconducting fuse device 110b to a laser output (e.g., a fifth laser output from the laser device), superconducting fuse device 110b may sever a conductive path along superconducting coupler device 108d to decouple superconducting coupler device 108d from the first quantum computing element and the second quantum computing element. For example, upon exposure of superconducting fuse device 110b to such a laser output, superconducting fuse device 110b may sever a conductive path along superconducting coupler device 108d to decouple superconducting coupler device 108d from qubit 102 (e.g., from capacitor pad 104a of qubit 102) and from an external quantum computing element (e.g., a qubit) that may be external to device 100.
[0029] 1 , upon exposure of superconducting fuse device 110c to a laser output (e.g., a sixth laser output from the laser device), superconducting fuse device 110c may sever the conductive path along Josephson junction 106 and decouple capacitor pad 104a from capacitor pad 104b. For example, upon exposure of superconducting fuse device 110c to such a laser output, superconducting fuse device 110c may sever the conductive path along Josephson junction 106 and decouple capacitor pad 104a from capacitor pad 104b, thereby opening qubit 102 and effectively rendering it inoperable.
[0030] It should be understood that one or more superconducting fuse devices 110a, 110b, 110c and / or one or more superconducting antifuse devices 112a, 112b, 112c of device 100 may be activated (e.g., operated) as described above to improve the performance, accuracy, fidelity, and / or efficiency of a quantum computing device including device 100. It should also be understood that device 100 may effectively include and / or provide a programmable and / or reprogrammable quantum circuit, in which the connectivity (e.g., coupling of one or more quantum computing elements) of device 100 (e.g., qubit 102, capacitor pads 104a and / or 104b, Josephson junction 106, one or more superconducting coupler devices 108a, 108b, 108c, 108d, and / or another quantum computing element) may be configured and / or reconfigured based on one or more performance criteria (e.g., frequency collisions, a low quality factor (Q) of the qubit related to its coherence, fidelity, accuracy, efficiency, and / or another performance criteria) to achieve one or more defined criteria.
[0031] 2 illustrates an exemplary, non-limiting device 200 that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. Repeated descriptions of similar elements and / or processes used in each embodiment are omitted for the sake of brevity.
[0032] Device 200 may comprise an exemplary, non-limiting alternative embodiment of device 100 described above with reference to Figure 1. As shown in the exemplary embodiment illustrated in Figure 2, device 200 may include qubits 202a, 202b, 202c, and 202d, each of which may include the same structure and / or functionality as qubit 102 described above with reference to the exemplary embodiment illustrated in Figure 1. In the exemplary embodiment illustrated in Figure 2, qubits 202a and 202b may each be coupled to qubits 202c and 202d via superconducting coupler devices 208a and 208b, respectively. Superconducting coupler devices 208a and 208b may each include the same structure and / or functionality as superconducting coupler devices 108a, 108b, 108c, and / or 108d described above with reference to the exemplary embodiment illustrated in Figure 1. 2, qubits 202a, 202b may also be coupled to superconducting coupler devices 208c, 208d, respectively, of device 200. Superconducting coupler devices 208c, 208d may each include the same structure and / or functionality as that of superconducting coupler devices 108a, 108b, 108c, and / or 108d described above with reference to the exemplary embodiment illustrated in FIG. 1. In some embodiments, superconducting coupler devices 208c, 208d may each be coupled to a quantum computing element and / or another component that is external to device 200 and therefore not shown in FIG. 2.
[0033] 2, superconducting coupler device 208a may include superconducting fuse devices 210a, 210b, and superconducting coupler device 208b may include superconducting fuse devices 210c, 210d. Additionally or alternatively, in this exemplary embodiment, superconducting fuse devices 210a, 210b may be actuated (e.g., operated) to decouple qubits 202a, 202b, respectively, from qubit 202c, and / or superconducting fuse devices 210c, 210d may be actuated (e.g., operated) to decouple qubits 202a, 202b, respectively, from qubit 202d.
[0034] As described above with reference to the exemplary embodiment shown in Figure 1, to activate (e.g., operate) superconducting fuse devices 210a, 210b, 210c, 210d, such devices may be exposed to laser power (e.g., exposed to a laser). In the exemplary embodiment shown in Figure 2, to expose superconducting fuse devices 210a, 210b, 210c, 210d to laser power, device 200 and / or one or more superconducting fuse devices 210a, 210b, 210c, 210d may be coupled to one or more of the external devices described above with reference to the exemplary embodiment shown in Figure 1. For example, device 200 and / or one or more superconducting fuse devices 210a, 210b, 210c, 210d may be coupled to one or more external devices (not shown in FIG. 1 ) that may be external to device 200, such as laser devices (e.g., power amplifiers, optical laser devices, and / or infrared laser devices), pulse generator devices (e.g., AWGs and / or VNAs), and / or computers (e.g., computer 1512) that may be utilized to operate and / or control such laser devices and / or pulse generator devices (e.g., via processing unit 1514 executing instructions stored in system memory 1516). In this example, such a computer may be utilized to enable the laser device and / or pulse generator device to: a) transmit and / or receive optical and / or infrared laser light to and / or from device 200 and / or superconducting fuse devices 210a, 210b, 210c, and / or 210d; and / or b) transmit and / or receive pulses (e.g., microwave pulses, microwave signals, control signals, and / or other pulses) to and / or from device 200 and / or superconducting fuse devices 210a, 210b, 210c, and / or 210d, respectively. In this example, such optical and / or infrared laser light may constitute laser outputs that may be provided to device 200 and / or superconducting fuse devices 210a, 210b, 210c, and / or 210d, for example.
[0035] In the exemplary embodiment shown in FIG. 2, upon exposure of superconducting fuse device 210a to laser output (e.g., a first laser output from a laser device), superconducting fuse device 210a may sever a conductive path along superconducting coupler device 208a to decouple superconducting coupler device 208a from qubit 202a (e.g., from capacitor pad 104b of qubit 202a) and from qubit 202c (e.g., from capacitor pad 104a of qubit 202c). In the exemplary embodiment shown in FIG. 2, upon exposure of superconducting fuse device 210b to a laser output (e.g., a second laser output from a laser device), superconducting fuse device 210b may sever a conductive path along superconducting coupler device 208a to decouple superconducting coupler device 208a from qubit 202b (e.g., from capacitor pad 104a of qubit 202b) and from qubit 202c (e.g., from capacitor pad 104a of qubit 202c).
[0036] In the exemplary embodiment shown in FIG. 2, upon exposure of superconducting fuse device 210c to a laser output (e.g., a third laser output from a laser device), superconducting fuse device 210c may sever a conductive path along superconducting coupler device 208b to decouple superconducting coupler device 208b from qubit 202a (e.g., from capacitor pad 104b of qubit 202a) and from qubit 202d (e.g., from capacitor pad 104a of qubit 202d). In the exemplary embodiment shown in FIG. 2, upon exposure of superconducting fuse device 210d to a laser output (e.g., a fourth laser output from the laser device), superconducting fuse device 210d may sever a conductive path along superconducting coupler device 208b to decouple superconducting coupler device 208b from qubit 202b (e.g., from capacitor pad 104a of qubit 202b) and from qubit 202d (e.g., from capacitor pad 104a of qubit 202d).
[0037] 3 illustrates an exemplary, non-limiting device 300 that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. Repeated descriptions of similar elements and / or processes used in each embodiment are omitted for the sake of brevity.
[0038] Device 300 may comprise an exemplary, non-limiting alternative embodiment of device 200 described above with reference to FIG. 2. As shown in the exemplary embodiment illustrated in FIG. 3, device 300 may include qubits 202a, 202b, 202c, and 202d. In the exemplary embodiment illustrated in FIG. 3, qubits 202a and 202b may each be coupled to qubit 202c via superconducting coupler devices 308a and 308b, respectively. In the exemplary embodiment illustrated in FIG. 3, qubits 202a and 202b may each be coupled to qubit 202d via superconducting coupler devices 308c and 308d, respectively. Superconducting coupler devices 308a, 308b, 308c, and 308d may each include the same structure and / or functionality as that of superconducting coupler devices 208a, 208b, 208c, and / or 208d described above with reference to the exemplary embodiment illustrated in FIG. 2. 3, qubits 202a, 202b may also be coupled to superconducting coupler devices 208c, 208d, respectively, of device 300. In some embodiments, superconducting coupler devices 208c, 208d may each be coupled to a quantum computing element and / or another component that is external to device 300 and therefore not shown in FIG.
[0039] 3, superconducting coupler device 308a may include superconducting fuse device 310a; superconducting coupler device 308b may include superconducting fuse device 310b; superconducting coupler device 308c may include superconducting fuse device 310c; and / or superconducting coupler device 308d may include superconducting fuse device 310d. Superconducting fuse devices 310a, 310b, 310c, 310d may each include the same structure and / or functionality as that of superconducting fuse devices 210a, 210b, 210c, and / or 210d described above with reference to the exemplary embodiment illustrated in FIG. 2. In this exemplary embodiment, superconducting fuse devices 310a, 310b may be actuated (e.g., operated) to decouple qubits 202a, 202b, respectively, from qubit 202c. Additionally or alternatively, in this exemplary embodiment, superconducting fuse devices 310c, 310d can be actuated (eg, operated) to decouple qubits 202a, 202b, respectively, from qubit 202d.
[0040] As described above with reference to the exemplary embodiment shown in Figure 1, to activate (e.g., operate) superconducting fuse devices 310a, 310b, 310c, 310d, such devices may be exposed to laser power (e.g., exposed to a laser). In the exemplary embodiment shown in Figure 3, to expose superconducting fuse devices 310a, 310b, 310c, 310d to laser power, device 300 and / or one or more superconducting fuse devices 310a, 310b, 310c, 310d may be coupled to one or more of the external devices described above with reference to the exemplary embodiment shown in Figure 1. For example, device 300 and / or one or more superconducting fuse devices 310a, 310b, 310c, 310d may be coupled to one or more external devices (not shown in FIG. 3 ) that may be external to device 300, such as, for example, laser devices (e.g., power amplifiers, optical laser devices, and / or infrared laser devices), pulse generator devices (e.g., AWGs and / or VNAs), and / or computers (e.g., computer 1512) that may be utilized to operate and / or control such laser devices and / or pulse generator devices (e.g., via processing unit 1514 executing instructions stored in system memory 1516). In this example, such a computer may be utilized to enable the laser device and / or pulse generator device to: a) transmit and / or receive optical and / or infrared laser light to and / or from device 300 and / or superconducting fuse devices 310a, 310b, 310c, and / or 310d; and / or b) transmit and / or receive pulses (e.g., microwave pulses, microwave signals, control signals, and / or other pulses) to and / or from device 300 and / or superconducting fuse devices 310a, 310b, 310c, and / or 310d, respectively. In this example, such optical and / or infrared laser light may constitute laser outputs that may be provided to device 300 and / or superconducting fuse devices 310a, 310b, 310c, and / or 310d, for example.
[0041] In the exemplary embodiment shown in FIG. 3, upon exposure of superconducting fuse device 310a to laser output (e.g., a first laser output from a laser device), superconducting fuse device 310a may sever a conductive path along superconducting coupler device 308a to decouple superconducting coupler device 308a from qubit 202a (e.g., from capacitor pad 104a of qubit 202a) and from qubit 202c (e.g., from capacitor pad 104a of qubit 202c). In the exemplary embodiment shown in FIG. 3, upon exposure of superconducting fuse device 310b to a laser output (e.g., a second laser output from a laser device), superconducting fuse device 310b may sever a conductive path along superconducting coupler device 308b to decouple superconducting coupler device 308b from qubit 202b (e.g., from capacitor pad 104a of qubit 202b) and from qubit 202c (e.g., from capacitor pad 104a of qubit 202c).
[0042] In the exemplary embodiment shown in FIG. 3, upon exposure of superconducting fuse device 310c to a laser output (e.g., a third laser output from a laser device), superconducting fuse device 310c may sever a conductive path along superconducting coupler device 308c to decouple superconducting coupler device 308c from qubit 202a (e.g., from capacitor pad 104a of qubit 202a) and from qubit 202d (e.g., from capacitor pad 104a of qubit 202d). In the exemplary embodiment shown in FIG. 3, upon exposure of superconducting fuse device 310d to a laser output (e.g., a fourth laser output from the laser device), superconducting fuse device 310d may sever a conductive path along superconducting coupler device 308d to decouple superconducting coupler device 308d from qubit 202b (e.g., from capacitor pad 104a of qubit 202b) and from qubit 202d (e.g., from capacitor pad 104a of qubit 202d).
[0043] 4 illustrates an exemplary, non-limiting device 400 that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. Repeated descriptions of similar elements and / or processes used in each embodiment are omitted for the sake of brevity.
[0044] Device 400 may comprise an exemplary, non-limiting alternative embodiment of device 300 described above with reference to FIG. 3. As shown in the exemplary embodiment illustrated in FIG. 4, device 400 may include qubits 202a, 202b, 202c, and 202d. In the exemplary embodiment illustrated in FIG. 4, qubits 202a and 202b may each be coupled to qubit 202c via superconducting coupler devices 308a and 308b, respectively. In the exemplary embodiment illustrated in FIG. 4, qubits 202a and 202b may each be coupled to qubit 202d via superconducting coupler devices 308c and 308d, respectively. As shown in the exemplary embodiment illustrated in FIG. 4, qubits 202a and 202b may also be coupled to superconducting coupler devices 208c and 208d, respectively, of device 400. In some embodiments, superconducting coupler devices 208c, 208d may each be coupled to a quantum computing element and / or another component that is external to device 400 and therefore not shown in FIG.
[0045] 3, superconducting coupler device 308a may include superconducting fuse device 310a; superconducting coupler device 308b may include superconducting fuse device 310b; superconducting coupler device 308c may include superconducting fuse device 310c; and / or superconducting coupler device 308d may include superconducting fuse device 310d. In this exemplary embodiment, superconducting fuse devices 310a, 310b may be actuated (e.g., operated) to decouple qubits 202a, 202b, respectively, from qubit 202c. Additionally or alternatively, in this exemplary embodiment, superconducting fuse devices 310c, 310d may be actuated (e.g., operated) to decouple qubits 202a, 202b, respectively, from qubit 202d.
[0046] As described above with reference to the exemplary embodiment shown in Figure 1, to activate (e.g., operate) superconducting fuse devices 310a, 310b, 310c, 310d, such devices may be exposed to laser power (e.g., exposed to a laser). In the exemplary embodiment shown in Figure 4, to expose superconducting fuse devices 310a, 310b, 310c, 310d to laser power, device 400 and / or one or more superconducting fuse devices 310a, 310b, 310c, 310d may be coupled to one or more of the external devices described above with reference to the exemplary embodiment shown in Figure 1. For example, device 400 and / or one or more superconducting fuse devices 310a, 310b, 310c, 310d may be coupled to one or more external devices (not shown in FIG. 4) that may be external to device 400, such as laser devices (e.g., power amplifiers, optical laser devices, and / or infrared laser devices), pulse generator devices (e.g., AWGs and / or VNAs), and / or computers (e.g., computer 1512) that may be utilized to operate and / or control such laser devices and / or pulse generator devices (e.g., via processing unit 1514 executing instructions stored in system memory 1516). In this example, such a computer may be utilized to enable the laser device and / or pulse generator device to: a) transmit and / or receive optical and / or infrared laser light to and / or from device 400 and / or superconducting fuse devices 310a, 310b, 310c, and / or 310d; and / or b) transmit and / or receive pulses (e.g., microwave pulses, microwave signals, control signals, and / or other pulses) to and / or from device 400 and / or superconducting fuse devices 310a, 310b, 310c, and / or 310d, respectively. In this example, such optical and / or infrared laser light may constitute laser outputs that may be provided to device 400 and / or superconducting fuse devices 310a, 310b, 310c, and / or 310d, for example.
[0047] In the exemplary embodiment shown in FIG. 4, upon exposure of superconducting fuse device 310a to laser output (e.g., a first laser output from a laser device), superconducting fuse device 310a may sever a conductive path along superconducting coupler device 308a to decouple superconducting coupler device 308b from qubit 202a (e.g., from capacitor pad 104a of qubit 202a), and from qubit 202c (e.g., from capacitor pad 104a of qubit 202c). In the exemplary embodiment shown in FIG. 4, upon exposure of superconducting fuse device 310b to a laser output (e.g., a second laser output from a laser device), superconducting fuse device 310b may sever a conductive path along superconducting coupler device 308b to decouple superconducting coupler device 308a from qubit 202b (e.g., from capacitor pad 104a of qubit 202b) and from qubit 202c (e.g., from capacitor pad 104a of qubit 202c).
[0048] In the exemplary embodiment shown in FIG. 4, upon exposure of superconducting fuse device 310c to a laser output (e.g., a third laser output from a laser device), superconducting fuse device 310c may sever a conductive path along superconducting coupler device 308c to decouple superconducting coupler device 308d from qubit 202a (e.g., from capacitor pad 104a of qubit 202a) and from qubit 202d (e.g., from capacitor pad 104a of qubit 202d). In the exemplary embodiment shown in FIG. 4, upon exposure of superconducting fuse device 310d to a laser output (e.g., a fourth laser output from the laser device), superconducting fuse device 310d may sever a conductive path along superconducting coupler device 308d to decouple superconducting coupler device 308c from qubit 202b (e.g., from capacitor pad 104a of qubit 202b), and from qubit 202d (e.g., from capacitor pad 104a of qubit 202d).
[0049] 5 illustrates an exemplary, non-limiting device 500 that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. Repeated descriptions of similar elements and / or processes used in each embodiment are omitted for the sake of brevity.
[0050] Device 500 may comprise an exemplary, non-limiting alternative embodiment of device 400 described above with reference to Figure 4. As shown in the exemplary embodiment illustrated in Figure 5, device 500 may include qubits 202a, 202b, 202c, and 202d. In this exemplary embodiment, qubits 202a and 202b may be coupled to superconducting coupler devices 208c and 208d, respectively, of device 500. In some embodiments, superconducting coupler devices 208c and 208d may each be coupled to a quantum computing device and / or another component that is external to device 500 and therefore not illustrated in Figure 5.
[0051] As shown in the exemplary embodiment illustrated in FIG. 5, the device 500 may further include superconducting coupler devices 308a, 308b, 308c, 308d. 4, superconducting coupler device 308a may include superconducting antifuse device 512a; superconducting coupler device 308b may include superconducting antifuse device 512b; superconducting coupler device 308c may include superconducting antifuse device 512c; and / or superconducting coupler device 308d may include superconducting antifuse device 512d. Superconducting antifuse devices 512a, 512b, 512c, 512d may each include the same structure and / or functionality as that of superconducting antifuse devices 112a, 112b, and / or 112c described above with reference to the exemplary embodiment illustrated in FIG. 5. In the exemplary embodiment shown in FIG. 5, superconducting antifuse devices 512a, 512b may be actuated (e.g., operated) to couple qubits 202a, 202b to qubit 202c, respectively. Additionally or alternatively, in this exemplary embodiment, superconducting antifuse devices 512c, 512d can be actuated (eg, operated) to couple qubits 202a, 202b to qubit 202d, respectively.
[0052] As described above with reference to the exemplary embodiment shown in Figure 1, to activate (e.g., operate) superconducting antifuse devices 512a, 512b, 512c, 512d, such devices may be exposed to laser power (e.g., exposed to a laser). In the exemplary embodiment shown in Figure 5, to expose superconducting antifuse devices 512a, 512b, 512c, 512d to laser power, device 500 and / or one or more superconducting antifuse devices 512a, 512b, 512c, 512d may be coupled to one or more of the external devices described above with reference to the exemplary embodiment shown in Figure 1. For example, device 500 and / or one or more superconducting antifuse devices 512a, 512b, 512c, 512d may be coupled to one or more external devices (not shown in FIG. 5 ) that may be external to device 500, such as laser devices (e.g., power amplifiers, optical laser devices, and / or infrared laser devices), pulse generator devices (e.g., AWGs and / or VNAs), and / or computers (e.g., computer 1512) that may be utilized to operate and / or control such laser devices and / or pulse generator devices (e.g., via processing unit 1514 executing instructions stored in system memory 1516). In this example, such a computer may be utilized to enable the laser device and / or pulse generator device to: a) transmit and / or receive optical and / or infrared laser light to and / or from device 500 and / or superconducting antifuse devices 512a, 512b, 512c, and / or 512d; and / or b) transmit and / or receive pulses (e.g., microwave pulses, microwave signals, control signals, and / or other pulses) to and / or from device 500 and / or superconducting antifuse devices 512a, 512b, 512c, and / or 512d, respectively.In this example, such optical and / or infrared lasers may constitute laser outputs that may be provided to, for example, device 500 and / or superconducting antifuse devices 512a, 512b, 512c, and / or 512d.
[0053] 5, upon exposure of superconducting antifuse device 512a to laser output (e.g., a first laser output from a laser device), superconducting antifuse device 512a may generate a conductive path along superconducting coupler device 308a that may couple superconducting coupler device 308a to qubit 202a (e.g., capacitor pad 104a of qubit 202a) and qubit 202c (e.g., capacitor pad 104a of qubit 202c). In the exemplary embodiment shown in FIG. 5, upon exposure of superconducting antifuse device 512b to laser output (e.g., a second laser output from a laser device), superconducting antifuse device 512b may generate a conductive path along superconducting coupler device 308b that may couple superconducting coupler device 308b to qubit 202b (e.g., capacitor pad 104a of qubit 202b) and qubit 202c (e.g., capacitor pad 104a of qubit 202c).
[0054] 5, upon exposure of superconducting antifuse device 512c to laser power (e.g., a third laser output from the laser device), superconducting antifuse device 512c may generate a conductive path along superconducting coupler device 308c that may couple superconducting coupler device 308c to qubit 202a (e.g., capacitor pad 104a of qubit 202a) and qubit 202d (e.g., capacitor pad 104a of qubit 202d). In the exemplary embodiment shown in FIG. 5, upon exposure of superconducting antifuse device 512d to laser power (e.g., a fourth laser output from the laser device), superconducting antifuse device 512d may generate a conductive path along superconducting coupler device 308d that may couple superconducting coupler device 308d to qubit 202b (e.g., capacitor pad 104a of qubit 202b) and qubit 202d (e.g., capacitor pad 104a of qubit 202d).
[0055] 6A illustrates an exemplary, non-limiting device 600a that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. Repeated descriptions of similar elements and / or processes used in each embodiment are omitted for the sake of brevity.
[0056] Device 600a may comprise an exemplary, non-limiting alternative embodiment of device 300 described above with reference to FIG. 3. As shown in the exemplary embodiment illustrated in FIG. 6A, device 600a may include qubits 202a, 202b, 202c, and 202d. In this exemplary embodiment, qubits 202a and 202b may be coupled to superconducting coupler devices 208c and 208d, respectively, of device 600a. In some embodiments, superconducting coupler devices 208c and 208d may each be coupled to a quantum computing device and / or another component that is external to device 600a and therefore not illustrated in FIG. 6A.
[0057] As shown in the exemplary embodiment illustrated in FIG. 6A, device 600a may further include superconducting coupler devices 308a, 308b, 308c, and 308d, which may include superconducting antifuse devices 512a, 512b, 512c, and 512d, respectively. In the exemplary embodiment illustrated in FIG. 6A, superconducting antifuse devices 512a and 512b may be actuated (e.g., operated) to couple superconducting coupler devices 308a and 308b, respectively, to ground (not shown in FIG. 6A). Additionally or alternatively, in this exemplary embodiment, superconducting antifuse devices 512c and 512d may be actuated (e.g., operated) to couple superconducting coupler devices 308c and 308d, respectively, to ground (not shown in FIG. 6A).
[0058] As described above with reference to the exemplary embodiment shown in Figure 1, to activate (e.g., operate) superconducting antifuse devices 512a, 512b, 512c, 512d, such devices may be exposed to laser power (e.g., exposed to a laser). In the exemplary embodiment shown in Figure 6A, to expose superconducting antifuse devices 512a, 512b, 512c, 512d to laser power, device 600a and / or one or more superconducting antifuse devices 512a, 512b, 512c, 512d may be coupled to one or more of the external devices described above with reference to the exemplary embodiment shown in Figure 1. For example, device 600a and / or one or more superconducting antifuse devices 512a, 512b, 512c, 512d may be coupled to one or more external devices (not shown in FIG. 6A ) that may be external to device 600a, such as laser devices (e.g., power amplifiers, optical laser devices, and / or infrared laser devices), pulse generator devices (e.g., AWGs and / or VNAs), and / or computers (e.g., computer 1512) that may be utilized to operate and / or control such laser devices and / or pulse generator devices (e.g., via processing unit 1514 executing instructions stored in system memory 1516). In this example, such a computer may be utilized to enable the laser device and / or pulse generator device to: a) transmit and / or receive optical and / or infrared laser light to and / or from device 600a and / or superconducting antifuse devices 512a, 512b, 512c, and / or 512d; and / or b) transmit and / or receive pulses (e.g., microwave pulses, microwave signals, control signals, and / or other pulses) to and / or from device 600a and / or superconducting antifuse devices 512a, 512b, 512c, and / or 512d, respectively.In this example, such optical and / or infrared lasers may constitute laser outputs that may be provided to, for example, device 600a and / or superconducting antifuse devices 512a, 512b, 512c, and / or 512d.
[0059] 6A , upon exposure of superconducting antifuse device 512a to laser output (e.g., a first laser output from a laser device), superconducting antifuse device 512a may generate a conductive path along superconducting coupler device 308a that may couple superconducting coupler device 308a to ground (not shown in FIG. 6A ), thereby effectively shorting superconducting coupler device 308a to ground. In the exemplary embodiment shown in FIG. 6A , upon exposure of superconducting antifuse device 512b to laser output (e.g., a second laser output from a laser device), superconducting antifuse device 512b may generate a conductive path along superconducting coupler device 308b that may couple superconducting coupler device 308b to ground (not shown in FIG. 6A ), thereby effectively shorting superconducting coupler device 308b to ground.
[0060] In the exemplary embodiment shown in Figure 6A, upon exposure of superconducting antifuse device 512c to a laser output (e.g., a third laser output from the laser device), superconducting antifuse device 512c may generate a conductive path along superconducting coupler device 308c that may couple superconducting coupler device 308c to ground (not shown in Figure 6A), thereby effectively shorting superconducting coupler device 308c to ground. In the exemplary embodiment shown in Figure 6A, upon exposure of superconducting antifuse device 512d to a laser output (e.g., a fourth laser output from the laser device), superconducting antifuse device 512d may generate a conductive path along superconducting coupler device 308d that may couple superconducting coupler device 308d to ground (not shown in Figure 6A), thereby effectively shorting superconducting coupler device 308d to ground.
[0061] 6B illustrates an exemplary, non-limiting device 600b that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. Repeated descriptions of similar elements and / or processes used in each embodiment are omitted for the sake of brevity.
[0062] Device 600b can include an exemplary, non-limiting alternative embodiment of device 600a described above with reference to Figure 6A. As shown in the exemplary embodiment illustrated in Figure 6B, device 600b can include qubits 202a, 202b, 202c, and 202d. In this exemplary embodiment, qubits 202a and 202b can be coupled to superconducting coupler devices 208c and 208d, respectively, of device 600b. In some embodiments, superconducting coupler devices 208c and 208d can each be coupled to a quantum computing device and / or another component that is external to device 600b and therefore not illustrated in Figure 6B.
[0063] As shown in the exemplary embodiment illustrated in Figure 6B, device 600b may further include superconducting coupler devices 308a, 308b, 308c, and 308d, which may include superconducting fuse devices 310a, 310b, 310c, and 310d, respectively. In the exemplary embodiment illustrated in Figure 6B, superconducting fuse devices 310a and 310b may couple (e.g., connect) superconducting coupler devices 308a and 308b, respectively, to ground (not shown in Figure 6B). In this exemplary embodiment, superconducting fuse devices 310c and 310d may couple (e.g., connect) superconducting coupler devices 308c and 308d, respectively, to ground (not shown in Figure 6B). 6B, superconducting fuse devices 310a, 310b can be actuated (e.g., operated) to decouple (e.g., decouple) superconducting coupler devices 308a, 308b, respectively, from ground (not shown in FIG. 6B), thereby coupling qubits 202a, 202b, respectively, to qubit 202c. Additionally or alternatively, in this exemplary embodiment, superconducting fuse devices 310c, 310d can be actuated (e.g., operated) to decouple (e.g., decouple) superconducting coupler devices 308c, 308d, respectively, from ground (not shown in FIG. 6B), thereby coupling qubits 202a, 202b, respectively, to qubit 202d.
[0064] As described above with reference to the exemplary embodiment illustrated in Figure 1, to activate (e.g., operate) superconducting fuse devices 310a, 310b, 310c, 310d, such devices may be exposed to laser power (e.g., exposed to a laser). In the exemplary embodiment illustrated in Figure 6B, device 600b and / or one or more superconducting fuse devices 310a, 310b, 310c, 310d may be coupled to one or more of the external devices described above with reference to the exemplary embodiment illustrated in Figure 1 to expose superconducting fuse devices 310a, 310b, 310c, 310d to laser power. For example, device 600b and / or one or more superconducting fuse devices 310a, 310b, 310c, 310d may be coupled to one or more external devices (not shown in FIG. 6B ) that may be external to device 600b, such as laser devices (e.g., power amplifiers, optical laser devices, and / or infrared laser devices), pulse generator devices (e.g., AWGs and / or VNAs), and / or computers (e.g., computer 1512) that may be utilized to operate and / or control such laser devices and / or pulse generator devices (e.g., via processing unit 1514 executing instructions stored in system memory 1516). In this example, such a computer may be utilized to enable the laser device and / or pulse generator device to: a) transmit and / or receive optical and / or infrared lasers to and / or from device 600b and / or superconducting fuse devices 310a, 310b, 310c, and / or 310d; and / or b) transmit and / or receive pulses (e.g., microwave pulses, microwave signals, control signals, and / or other pulses) to and / or from device 600b and / or superconducting fuse devices 310a, 310b, 310c, and / or 310d, respectively. In this example, such optical and / or infrared lasers may constitute laser outputs that may be provided, for example, to device 600b and / or superconducting fuse devices 310a, 310b, 310c, and / or 310d.
[0065] 6B , upon exposure of superconducting fuse device 310a to laser output (e.g., a first laser output from a laser device), superconducting fuse device 310a may break a conductive path along superconducting coupler device 308a that may decouple (e.g., decouple) superconducting coupler device 308a from ground (not shown in FIG. 6B ), thereby enabling coupling of qubit 202a to qubit 202c. In the exemplary embodiment shown in FIG. 6B , upon exposure of superconducting fuse device 310b to laser output (e.g., a second laser output from a laser device), superconducting fuse device 310b may break a conductive path along superconducting coupler device 308b that may decouple (e.g., decouple) superconducting coupler device 308b from ground (not shown in FIG. 6B ), thereby enabling coupling of qubit 202b to qubit 202c.
[0066] 6B , upon exposure of superconducting fuse device 310c to a laser output (e.g., a third laser output from the laser device), superconducting fuse device 310c may break a conductive path along superconducting coupler device 308c that may decouple (e.g., decouple) superconducting coupler device 308c from ground (not shown in FIG. 6B ), thereby enabling coupling of qubit 202a to qubit 202d. In the exemplary embodiment shown in FIG. 6B , upon exposure of superconducting fuse device 310d to a laser output (e.g., a fourth laser output from the laser device), superconducting fuse device 310d may break a conductive path along superconducting coupler device 308d that may decouple (e.g., decouple) superconducting coupler device 308d from ground (not shown in FIG. 6B ), thereby enabling coupling of qubit 202b to qubit 202d.
[0067] 7 illustrates an exemplary, non-limiting device 700 that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. Repeated descriptions of similar elements and / or processes used in each embodiment are omitted for the sake of brevity.
[0068] Device 700 may include exemplary, non-limiting alternative embodiments of devices 600a and / or 600b described above with reference to Figures 6A and 6B, respectively. As shown in the exemplary embodiment illustrated in Figure 7, device 700 may include qubits 202a, 202b, 202c, and 202d. In this exemplary embodiment, qubits 202a and 202b may be coupled to superconducting coupler devices 208c and 208d, respectively, of device 700. In some embodiments, superconducting coupler devices 208c and 208d may each be coupled to a quantum computing device and / or another component that is external to device 700 and therefore not illustrated in Figure 7. In the exemplary embodiment illustrated in Figure 7, superconducting coupler devices 208c and 208d may include superconducting fuse devices 710a and 710b, respectively. Superconducting fuse devices 710a, 710b may each include the same structure and / or functionality as that of superconducting fuse devices 110a, 110b, and / or 110c described above with reference to the exemplary embodiment illustrated in FIG. 1.
[0069] As shown in the exemplary embodiment illustrated in Figure 7, device 700 may further include superconducting coupler devices 308a, 308b, 308c, and 308d, which may include superconducting antifuse devices 512a, 512b, 512c, and 512d, respectively. In the exemplary embodiment illustrated in Figure 7, superconducting antifuse devices 512a and 512b may be activated (e.g., operated) to couple superconducting coupler devices 308a and 308b, respectively, to ground (not shown in Figure 7), as described above with reference to the exemplary embodiment illustrated in Figures 6A and / or 6B. Additionally or alternatively, in this exemplary embodiment, superconducting antifuse devices 512c and 512d may be activated (e.g., operated) to couple superconducting coupler devices 308c and 308d, respectively, to ground (not shown in Figure 7), as described above with reference to the exemplary embodiment illustrated in Figures 6A and / or 6B.
[0070] To activate (e.g., operate) superconducting fuse devices 710a, 710b, such devices may be exposed to laser power (e.g., exposed to a laser), as described above with reference to the exemplary embodiment illustrated in Figure 1. In the exemplary embodiment illustrated in Figure 7, device 700 and / or one or more superconducting fuse devices 710a, 710b may be coupled to one or more of the external devices described above with reference to the exemplary embodiment illustrated in Figure 1 to expose superconducting fuse devices 710a, 710b to laser power. For example, device 700 and / or one or more superconducting fuse devices 710a, 710b may be coupled to one or more external devices (not shown in FIG. 7) that may be external to device 700, such as, for example, laser devices (e.g., power amplifiers, optical laser devices, and / or infrared laser devices), pulse generator devices (e.g., AWGs and / or VNAs), and / or computers (e.g., computer 1512) that may be utilized to operate and / or control such laser devices and / or pulse generator devices (e.g., via processing unit 1514 executing instructions stored in system memory 1516). In this example, such a computer may be utilized to enable a laser device and / or a pulse generator device to: a) transmit and / or receive optical and / or infrared lasers to and / or from device 700 and / or superconducting fuse devices 710a and / or 710b; and / or b) transmit and / or receive pulses (e.g., microwave pulses, microwave signals, control signals, and / or other pulses) to and / or from device 700 and / or superconducting fuse devices 710a and / or 710b. In this example, such optical and / or infrared lasers may constitute laser outputs that may be provided to device 700 and / or superconducting fuse devices 710a and / or 710b, for example.
[0071] In the exemplary embodiment shown in FIG. 7, upon exposure of superconducting fuse device 710a to laser output (e.g., a first laser output from a laser device), superconducting fuse device 710a may sever a conductive path along superconducting coupler device 208c to decouple superconducting coupler device 208c from qubit 202a (e.g., from capacitor pad 104a of qubit 202a) and from a quantum computing element (e.g., a qubit, a readout device, and / or another quantum computing element), which may be coupled to superconducting coupler device 208c and / or may be external to device 700. In the exemplary embodiment shown in FIG. 7, upon exposure of superconducting fuse device 710b to laser output (e.g., a second laser output from a laser device), superconducting fuse device 710b may sever a conductive path along superconducting coupler device 208d to decouple superconducting coupler device 208d from qubit 202b (e.g., from capacitor pad 104b of qubit 202b) and from a quantum computing element (e.g., a qubit, a readout device, and / or another quantum computing element), which may be coupled to superconducting coupler device 208d and / or may be external to device 700.
[0072] 8 illustrates an exemplary, non-limiting device 800 that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. Repeated descriptions of similar elements and / or processes used in each embodiment are omitted for the sake of brevity.
[0073] In the exemplary embodiment shown in FIG. 8 , the illustrated device 800 may include a qubit device including qubit 802. Qubit 802 may include the exemplary, non-limiting alternative embodiment of qubit 102 described above with reference to the exemplary embodiment illustrated in FIG. 1 . As shown in the exemplary embodiment illustrated in FIG. 8 , qubit 802 may include superconducting coupler devices 808 a, 808 b, 808 c and / or capacitor pads 104 a, 104 b that may be coupled to each other via Josephson junctions 806 a, 806 b, 806 c (denoted as “JJ1,” “JJ2,” and “JJ3,” respectively, in FIG. 8 ). Superconducting coupler devices 808 a, 808 b, 808 c may each include the same structure and / or functionality as that of superconducting coupler devices 108 a, 108 b, 108 c, and / or 108 d described above with reference to the exemplary embodiment illustrated in FIG. 1 . The Josephson junctions 806a, 806b, 806c may each include the same structure and / or functionality as that of the Josephson junction 106 described above with reference to the exemplary embodiment illustrated in FIG.
[0074] 8, superconducting coupler device 808a may include superconducting fuse device 810a; superconducting coupler device 808b may include superconducting fuse device 810b and superconducting antifuse device 812a; and / or superconducting coupler device 808c may include superconducting antifuse device 812b. Superconducting fuse devices 810a, 810b may each include the same structure and / or functionality as superconducting fuse devices 110a, 110b, and / or 110c described above with reference to the exemplary embodiment illustrated in FIG. 1. Superconducting antifuse devices 812a, 812b may each include the same structure and / or functionality as superconducting antifuse devices 112a, 112b, and / or 112c described above with reference to the exemplary embodiment illustrated in FIG.
[0075] 8, superconducting fuse devices 810a and / or 810b can be actuated (e.g., operated) to decouple capacitor pad 104a from capacitor pad 104b. In this exemplary embodiment, superconducting antifuse devices 812a and / or 812b can be actuated (e.g., operated) to couple superconducting coupler devices 808b and / or 808c, respectively, to ground (not shown in FIG. 8).
[0076] As described above with reference to the exemplary embodiment shown in Figure 1, to activate (e.g., operate) superconducting fuse device 810a, 810b and / or superconducting antifuse device 812a, 812b, such devices may be exposed to laser power (e.g., exposed to a laser). In the exemplary embodiment shown in Figure 8, to expose superconducting fuse device 810a, 810b and / or superconducting antifuse device 812a, 812b to laser power, device 800, one or more superconducting fuse devices 810a, 810b, and / or one or more superconducting antifuse devices 812a, 812b may be coupled to one or more of the external devices described above with reference to the exemplary embodiment shown in Figure 1. For example, device 800, one or more superconducting fuse devices 810a, 810b, and / or one or more superconducting antifuse devices 812a, 812b may be coupled to one or more external devices (not shown in FIG. 8 ) that may be external to device 800, such as laser devices (e.g., power amplifiers, optical laser devices, and / or infrared laser devices), pulse generator devices (e.g., AWGs and / or VNAs), and / or a computer (e.g., computer 1512) that may be utilized to operate and / or control such laser devices and / or pulse generator devices (e.g., via processing unit 1514 executing instructions stored in system memory 1516). In this example, such a computer may be utilized to enable the laser device and / or pulse generator device to: a) transmit and / or receive optical and / or infrared laser light to and / or from device 800, superconducting fuse devices 810a and / or 810b, and / or superconducting antifuse devices 812a and / or 812b; and / or b) transmit and / or receive pulses (e.g., microwave pulses, microwave signals, control signals, and / or other pulses) to and / or from device 800, superconducting fuse devices 810a and / or 810b, and / or superconducting antifuse devices 812a and / or 812b, respectively.In this example, such optical and / or infrared lasers may constitute laser outputs that may be provided to, for example, device 800, superconducting fuse devices 810a and / or 810b, and / or superconducting antifuse devices 812a and / or 812b.
[0077] In the exemplary embodiment shown in FIG. 8, upon exposure of superconducting fuse device 810a to laser output (e.g., a first laser output from a laser device), superconducting fuse device 810a may sever a conductive path along superconducting coupler device 808a to decouple superconducting coupler device 808a and / or Josephson junction 806a from capacitor pads 104a, 104b of qubit 802.
[0078] 8, upon exposure of superconducting fuse device 810b to laser power (e.g., a second laser output from the laser device), superconducting fuse device 810b may sever a conductive path along superconducting coupler device 808b, decoupling superconducting coupler device 808b and / or Josephson junction 806b from capacitor pads 104a, 104b of qubit 802. Additionally or alternatively, in the exemplary embodiment shown in FIG. 8, upon exposure of superconducting antifuse device 812a to laser power (e.g., a third laser output from the laser device), superconducting antifuse device 812a may create a conductive path along superconducting coupler device 808b that may couple superconducting coupler device 808b and / or Josephson junction 806b to ground (not shown in FIG. 8), thereby effectively shorting superconducting coupler device 808b and / or Josephson junction 806b to ground. In the exemplary embodiment shown in FIG. 8, upon exposure of superconducting antifuse device 812b to a laser output (e.g., a fourth laser output from the laser device), superconducting antifuse device 812b may generate a conductive path along superconducting coupler device 808c that may couple superconducting coupler device 808c and / or Josephson junction 806c to ground (not shown in FIG. 8), thereby effectively shorting superconducting coupler device 808c and / or Josephson junction 806c to ground.
[0079] 9 illustrates an exemplary, non-limiting device 900 topology that may facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. Repeated descriptions of similar elements and / or processes used in each embodiment are omitted for the sake of brevity.
[0080] As shown in the exemplary embodiment illustrated in Figure 9, device 900 may be represented as a topology including multiple qubits (represented by dark gray circles in Figure 9) that may be coupled to each other via multiple superconducting coupler devices (represented by dashed lines in Figure 9), each of which may be coupled to ground (represented by light gray triangles in Figure 9). Device 900 may include multiple qubits that may be coupled to each other via multiple superconducting coupler devices, each of which may be coupled to ground, although for clarity, only qubits 902a, 902b, superconducting coupler device 908, and ground 914 are annotated in the exemplary embodiment illustrated in Figure 9. Device 900 may include an exemplary, non-limiting alternative embodiment of device 100 described above with reference to the exemplary embodiment illustrated in Figure 1.
[0081] 9, qubits 902a, 902b may each include the same structure and / or functionality as qubit 102 described above with reference to the exemplary embodiment illustrated in FIG. 1. As shown in the exemplary embodiment illustrated in FIG. 9, qubits 902a, 902b may be coupled to one another via superconducting coupler device 908, which may be coupled to ground 914 (e.g., a ground plane of a semiconductor and / or superconducting device that may include device 900). Superconducting coupler device 908 may include the same structure and / or functionality as superconducting coupler devices 108a, 108b, and / or 108c described above with reference to the exemplary embodiment illustrated in FIG. 1. As shown in inset 916 in the exemplary embodiment illustrated in FIG. 9, superconducting coupler device 908 may include a superconducting fuse device 910 provided (e.g., formed) on superconducting coupler device 908 and ground 914, which may couple superconducting coupler device 908 to ground 914. Superconducting fuse device 910 may include the same structure and / or functionality as that of superconducting fuse devices 110a, 110b, and / or 110c described above with reference to the exemplary embodiment illustrated in FIG.
[0082] 9, superconducting fuse device 910 may be actuated (e.g., operated) to decouple superconducting coupler device 908 from ground 914, thereby enabling coupling of qubits 902a, 902b. To actuate (e.g., operate) superconducting fuse device 910, such device may be exposed to laser power (e.g., exposed to a laser), as described above with reference to the exemplary embodiment illustrated in FIG. 9. To expose superconducting fuse device 910 to laser power, device 900 and / or superconducting fuse device 910 may be coupled to one or more of the external devices described above with reference to the exemplary embodiment illustrated in FIG. For example, device 900 and / or superconducting fuse device 910 may be coupled to one or more external devices (not shown in FIG. 9 ) that may be external to device 900, such as, for example, a laser device (e.g., a power amplifier, an optical laser device, and / or an infrared laser device), a pulse generator device (e.g., an AWG and / or a VNA), and / or a computer (e.g., computer 1512) that may be utilized to operate and / or control such laser device and / or pulse generator device (e.g., via processing unit 1514 executing instructions stored in system memory 1516). In this example, such a computer may be utilized to enable a laser device and / or a pulse generator device to: a) transmit and / or receive optical and / or infrared lasers to and / or from device 900 and / or superconducting fuse device 910; and / or b) transmit and / or receive pulses (e.g., microwave pulses, microwave signals, control signals, and / or other pulses) to and / or from device 900 and / or superconducting fuse device 910. In this example, such optical and / or infrared lasers may constitute, for example, laser outputs that may be provided to device 900 and / or superconducting fuse device 910.
[0083] 9, upon exposure of superconducting fuse device 910 to laser power, superconducting fuse device 910 may decouple superconducting coupler device 908 from ground 914 by severing the conductive path between superconducting coupler device 908 and ground 914, thereby allowing qubits 902a, 902b to be coupled. In some embodiments, superconducting fuse device 910 may not be actuated (e.g., not exposed to such laser power), allowing device 900 to maintain the coupling of superconducting coupler device 908 to ground 914, which may allow qubit 902a to be decoupled from qubit 902b.
[0084] 10A, 10B, and 10C illustrate exemplary, non-limiting device topologies 1000a, 1000b, and 1000c, respectively, each of which may facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. Repeated descriptions of similar elements and / or processes used in each embodiment are omitted for the sake of brevity.
[0085] 10A, 10B, and 10C, devices 1000a, 1000b, and 1000c may each be represented as a topology including multiple qubits (represented as varying shades of gray circles in FIGS. 10A, 10B, and 10C) that may be coupled to one another via multiple superconducting coupler devices (represented by dashed lines in FIGS. 10A, 10B, and 10C), each of which may be coupled to ground (represented as light gray triangles in FIGS. 10A, 10B, and 10C). Although devices 1000a, 1000b, and 1000c may each include multiple qubits that may be coupled to one another via multiple superconducting coupler devices, each of which may be coupled to ground, for clarity, only certain elements of devices 1000a, 1000b, and / or 1000c are annotated in the exemplary embodiments illustrated in FIGS. 10A, 10B, and 10C. Devices 1000a, 1000b, 1000c may each include an exemplary, non-limiting alternative embodiment of device 900 described above with reference to the exemplary embodiment illustrated in FIG.
[0086] 10A, 10B, and 10C, one or more superconducting coupler devices of devices 1000a, 1000b, and / or 1000c may include one or more superconducting fuse devices. In the exemplary embodiment illustrated in Figures 10A, 10B, and 10C, such one or more superconducting fuse devices may each include the same structure and / or functionality as that of superconducting fuse devices 110a, 110b, and / or 110c described above with reference to the exemplary embodiment illustrated in Figure 1. Additionally or alternatively, although not shown in the exemplary embodiment illustrated in Figures 10A, 10B, and 10C, one or more superconducting coupler devices of devices 1000a, 1000b, and / or 1000c may further include one or more superconducting antifuse devices. 10A, 10B, and 10C, such one or more superconducting antifuse devices may each include the same structure and / or functionality as that of superconducting antifuse devices 112a, 112b, and / or 112c described above with reference to the exemplary embodiment illustrated in Figure 1. In embodiments in which one or more superconducting coupler devices of devices 1000a, 1000b, and / or 1000c include one or more superconducting fuse devices and / or one or more superconducting antifuse devices, such superconducting fuse and / or antifuse devices may be actuated (e.g., operated) in the same manner (e.g., via exposure to a laser) as described above with reference to the exemplary embodiments illustrated in Figures 1 through 9.
[0087] 10A , device 1000a may include a plurality (e.g., nine) of qubits 1002 (not annotated in FIG. 10A for clarity). Qubits 1002 may each include the same structure and / or functionality as qubit 102 described above with reference to the exemplary embodiment illustrated in FIG. 1. In the exemplary embodiment illustrated in FIG. 10A , device 1000a may further include a plurality (e.g., four) of superconducting coupler devices 1008 (only one annotated in FIG. 10A for clarity) that may be coupled to qubit 1002a of qubit 1002. Superconducting coupler devices 1008 may each include the same structure and / or functionality as superconducting coupler devices 108a, 108b, 108c, and / or 108d described above with reference to the exemplary embodiment illustrated in FIG. 1. 10A, superconducting coupler devices 1008 may each include a superconducting fuse device that may enable coupling each superconducting coupler device 1008 to ground 1014 of device 1000a in the same way that superconducting fuse device 910 may enable coupling superconducting coupler device 908 to ground 914 of device 900 described above with reference to the exemplary embodiment illustrated in Figure 9. As shown in the exemplary embodiment illustrated in Figure 10A, by not activating the superconducting fuse devices of superconducting coupler devices 1008 surrounding qubit 1002a, the coupling of superconducting coupler devices 1008 to their respective grounds 1014 may be maintained, and device 1000a may thereby enable qubit 1002a to remain decoupled from all other qubits 1002 of device 1000a.
[0088] 10B , device 1000b may include a plurality of (e.g., nine) qubits 1002 (not annotated in FIG. 10B for clarity). In the exemplary embodiment shown in FIG. 10B , device 1000b may further include a plurality of (e.g., six) superconducting coupler devices 1008 (only one annotated in FIG. 10B for clarity) that may be coupled to various qubits 1002 of device 1000b. Although not shown in the exemplary embodiment shown in FIG. 10B , superconducting coupler devices 1008 may each include a superconducting fuse device that may enable coupling each superconducting coupler device 1008 to ground 1014 of device 1000b in the same way that superconducting fuse device 910 may enable coupling superconducting coupler device 908 to ground 914 of device 900 described above with reference to the exemplary embodiment illustrated in FIG. 9 . As shown in the exemplary embodiment illustrated in FIG. 10B, by not activating the superconducting fuse device of a particular superconducting coupler device 1008 on device 1000b, the above-mentioned coupling of such superconducting coupler device 1008 to its respective ground 1014 can be maintained, and device 1000b can thereby provide a topology including multiple (e.g., three) independent sets 1018 of qubits 1002b (only one is annotated in FIG. 10B for clarity).
[0089] 10C , device 1000c may include a plurality of (e.g., nine) qubits 1002 (not annotated in FIG. 10C for clarity). In the exemplary embodiment shown in FIG. 10C , device 1000c may further include a plurality of (e.g., eight) superconducting coupler devices 1008 (only one annotated in FIG. 10C for clarity) that may be coupled to various qubits 1002 of device 1000c. Although not shown in the exemplary embodiment shown in FIG. 10C , superconducting coupler devices 1008 may each include a superconducting fuse device that may enable coupling each superconducting coupler device 1008 to ground 1014 of device 1000c in the same way that superconducting fuse device 910 may enable coupling superconducting coupler device 908 to ground 914 of device 900 described above with reference to the exemplary embodiment illustrated in FIG. 9 . As shown in the exemplary embodiment illustrated in FIG. 10C, by not activating the superconducting fuse device of a particular superconducting coupler device 1008 on device 1000c, the above-mentioned coupling of such superconducting coupler device 1008 to its respective ground 1014 can be maintained, and device 1000c can thereby enable conversion of a three-by-three (3×3) topology including nine qubits 1002 into a two-by-two (2×2) topology including four qubits 1002c of qubits 1002.
[0090] 11 illustrates an exemplary, non-limiting topology of a device 1100 that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. Repeated descriptions of similar elements and / or processes used in each embodiment are omitted for the sake of brevity.
[0091] As shown in the exemplary embodiment illustrated in Figure 11, device 1100 may be represented as a topology including multiple qubits (represented in Figure 11 by varying shades of gray circles) that may be coupled to one another via multiple superconducting coupler devices (represented by dashed lines in Figure 11), each of which may be coupled to ground (represented in Figure 11 by light gray triangles). Although device 1100 may include multiple qubits that may be coupled to one another via multiple superconducting coupler devices, each of which may be coupled to ground, for clarity, only certain elements of device 1100 are annotated in the exemplary embodiment illustrated in Figure 11. Device 1100 may include an exemplary, non-limiting alternative embodiment of device 900 described above with reference to the exemplary embodiment illustrated in Figure 9.
[0092] 11 , one or more superconducting coupler devices of device 1100 may include one or more superconducting fuse devices. In the exemplary embodiment illustrated in FIG. 11 , such one or more superconducting fuse devices may each include the same structure and / or functionality as that of superconducting fuse devices 110a, 110b, and / or 110c described above with reference to the exemplary embodiment illustrated in FIG. 1 . Additionally or alternatively, although not shown in the exemplary embodiment illustrated in FIG. 11 , one or more superconducting coupler devices of device 1100 may further include one or more superconducting antifuse devices. In the exemplary embodiment illustrated in FIG. 11 , such one or more superconducting antifuse devices may each include the same structure and / or functionality as that of superconducting antifuse devices 112a, 112b, and / or 112c described above with reference to the exemplary embodiment illustrated in FIG. 1 . In embodiments in which one or more superconducting coupler devices of device 1100 include one or more superconducting fuse devices and / or one or more superconducting antifuse devices, such superconducting fuse and / or antifuse devices may be actuated (e.g., operated) in the same manner (e.g., via exposure to a laser) as described above with reference to the exemplary embodiments illustrated in Figures 1 through 9.
[0093] 11 , device 1100 may include a plurality (e.g., 54) of qubits 1102 (not annotated in FIG. 11 for clarity). The qubits 1102 may each include the same structure and / or functionality as that of the qubits 102 described above with reference to the exemplary embodiment illustrated in FIG. 1. As shown in the exemplary embodiment illustrated in FIG. 11 , device 1100 may include a plurality (e.g., 26) of qubits 1102 a, which may be provided along the perimeter of the exemplary topological representation of device 1100 illustrated in FIG. 11 . In this exemplary embodiment, device 1100 may further include a plurality (e.g., 28) of qubits 1102 b, which may be provided in an interior portion of the exemplary topological representation of device 1100 illustrated in FIG. 11 . 11 , device 1100 may further include multiple superconducting coupler devices 1108 (only two are annotated in FIG. 11 for clarity) that may be coupled to various qubits 1102 of device 1100. Superconducting coupler devices 1108 may each include the same structure and / or functionality as that of superconducting coupler devices 108a, 108b, 108c, and / or 108d described above with reference to the exemplary embodiment illustrated in FIG.
[0094] 11 , superconducting coupler devices 1108 may each include a superconducting fuse device that may enable coupling of each superconducting coupler device 1108 to ground 1114 of device 1100a in the same way that superconducting fuse device 910 may enable coupling of superconducting coupler device 908 to ground 914 of device 900 described above with reference to the exemplary embodiment illustrated in FIG. 9. Additionally or alternatively, although not shown in the exemplary embodiment illustrated in FIG. 11 , superconducting coupler devices 1108 may each further include a superconducting antifuse device that may enable coupling of each superconducting coupler device 1108 to one or more qubits 1102 or ground 1114. 11 , actuation of one or more of such superconducting fuse devices and / or one or more of such superconducting antifuse devices of superconducting coupler device 1108 (e.g., via exposure to a laser) may enable device 1100 to have a topology (e.g., qubit topology) that can be initially programmed (e.g., configured) as a particular first topology and / or subsequently reprogrammed (e.g., reconfigured) as a particular second, different topology. For example, actuating (e.g., via exposure to a laser) or not actuating (e.g., via not exposing to a laser) one or more of such superconducting fuse devices of superconducting coupler device 1108 and / or one or more of such superconducting antifuse devices may enable coupling or decoupling of one or more pairs of qubits 1102 a and qubits 1102 b of device 1100.It should be understood that activating (e.g., via exposure to a laser) or not activating (e.g., via not exposing to a laser) one or more such superconducting fuse devices and / or one or more such superconducting antifuse devices of superconducting coupler device 1108 may enable device 1100 to provide various topologies, where certain qubits 1102 are coupled to define a particular topology, while others are effectively isolated from the topology and / or rendered inoperable.
[0095] 12 illustrates an exemplary, non-limiting device 1200 that can facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. Repeated descriptions of similar elements and / or processes used in each embodiment are omitted for the sake of brevity.
[0096] 12, device 1200 may include qubits 1202a, 1202b (denoted as “qubit 1” and “qubit 2,” respectively, in FIG. 12) that may be coupled to one another via superconducting coupler device 1208. Qubits 1202a, 1202b may each include the same structure and / or functionality as qubit 102 described above with reference to the exemplary embodiment illustrated in FIG. 1. Superconducting coupler device 1208 may include the same structure and / or functionality as superconducting coupler devices 108a, 108b, 108c, and / or 108d described above with reference to the exemplary embodiment illustrated in FIG. 1. As shown in the exemplary embodiment illustrated in FIG. 12, superconducting coupler device 1208 may include a superconducting fuse device 1210 that may couple superconducting coupler device 1208 to ground 1214. In this exemplary embodiment, superconducting fuse device 1210 may be actuated (e.g., operated) to decouple superconducting coupler device 1208 from ground 1214, thereby allowing coupling of qubit 1202a to qubit 1202b.
[0097] As described above with reference to the exemplary embodiment illustrated in Figure 1, to activate (e.g., operate) superconducting fuse device 1210, such device may be exposed to laser power (e.g., exposed to a laser). In the exemplary embodiment illustrated in Figure 12, to expose superconducting fuse device 1210 to laser power, device 1200 and / or superconducting fuse device 1210 may be coupled to one or more of the external devices described above with reference to the exemplary embodiment illustrated in Figure 1. For example, device 1200 and / or superconducting fuse device 1210 may be coupled to one or more external devices (not shown in Figure 12) that may be external to device 1200, such as laser devices (e.g., power amplifiers, optical laser devices, and / or infrared laser devices), pulse generator devices (e.g., AWGs and / or VNAs), and / or computers (e.g., computer 1512) that may be utilized to operate and / or control such laser devices and / or pulse generator devices (e.g., via processing unit 1514 executing instructions stored in system memory 1516). In this example, such a computer may be utilized to enable the laser device and / or pulse generator device to: a) transmit and / or receive optical and / or infrared lasers to and / or from device 1200 and / or superconducting fuse device 1210; and / or b) transmit and / or receive pulses (e.g., microwave pulses, microwave signals, control signals, and / or other pulses) to and / or from device 1200 and / or superconducting fuse device 1210. In this example, such optical and / or infrared lasers may constitute, for example, laser outputs that may be provided to device 1200 and / or superconducting fuse device 1210.
[0098] 12 , upon exposure of superconducting fuse device 1210 to laser power, superconducting fuse device 1210 may sever the conductive path between superconducting coupler device 1208 and ground 1214, decoupling superconducting coupler device 1208 from ground 1214. In this exemplary embodiment, upon decoupling superconducting coupler device 1208 from ground 1214, superconducting coupler device 1208 may be coupled to qubit 1202a (e.g., capacitor pad 104a of qubit 1202a) and qubit 1202b (e.g., capacitor pad 104a of qubit 1202b).
[0099] 13 illustrates a flow diagram of an exemplary, non-limiting, computer-implemented method 1300 that may facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. Repeated descriptions of similar elements and / or processes used in respective embodiments are omitted for the sake of brevity.
[0100] At 1302, the computer-implemented method 1300 may include, by a system (e.g., a system including device 100 coupled to a power amplifier, an optical laser device, an infrared laser device, an AWG, and / or a VNA, which may be coupled to computer 1512, for example) operably coupled to a processor (e.g., processing unit 1514), reconfiguring connectivity of a quantum computing element based on exposure of one or more superconducting switch devices (e.g., one or more superconducting fuse devices 110a, 110b, 110c and / or one or more superconducting antifuse devices 112a, 112b, 112c) provided to one or more superconducting coupler devices (e.g., one or more superconducting coupler devices 108a, 108b, 108c, 108d) to at least one laser output. For example, with reference to the exemplary embodiment shown in FIG. 1, based on exposure of one or more superconducting fuse devices 110a, 110b, 110c and / or one or more superconducting antifuse devices 112a, 112b, 112c to at least one laser output (e.g., at least one laser generated by a laser device), the connectivity (e.g., coupling) of qubit 102 with one or more quantum computing elements (e.g., another qubit, a readout device, a transmission line, a bus, a resonator, and / or another quantum computing element) may be reconfigured (e.g., reprogrammed).
[0101] 14 illustrates a flow diagram of an exemplary, non-limiting, computer-implemented method 1400 that may facilitate programmable and / or reprogrammable quantum circuits according to one or more embodiments described herein. Repeated descriptions of similar elements and / or processes used in respective embodiments are omitted for the sake of brevity.
[0102] At 1402, computer-implemented method 1400 may include applying, by a system (e.g., a system including device 100 coupled to a power amplifier, an optical laser device, an infrared laser device, an AWG, and / or a VNA, which may be coupled to computer 1512, for example) operably coupled to a processor (e.g., processing unit 1514), laser power (e.g., a first laser power) to a superconducting fuse device (e.g., superconducting fuse device 110a) provided on a superconducting coupler device (e.g., superconducting coupler device 108a); and, by the system, severing a conductive path along the superconducting coupler device to decouple a first quantum computing element (e.g., qubit 102 and / or capacitor pad 104a of qubit 102) and a second quantum computing element (e.g., a quantum computing element external to device 100, such as a qubit) based on the applying step (e.g., based on exposure of superconducting fuse device 110a to the first laser power).
[0103] At 1404, computer-implemented method 1400 may include applying, by a system (e.g., a system including device 100 coupled to a power amplifier, an optical laser device, an infrared laser device, an AWG, and / or a VNA, which may be coupled to computer 1512, for example) operably coupled to a processor (e.g., processing unit 1514), laser output (e.g., the second laser output) to a superconducting antifuse device (e.g., superconducting antifuse device 112a) provided on a superconducting coupler device (e.g., superconducting coupler device 108a); and, by the system, generating a conductive path along the superconducting coupler device based on the applying step (e.g., based on exposure of superconducting antifuse device 112a to the second laser output), coupling the superconducting coupler device to ground.
[0104] At 1406, computer-implemented method 1400 may include applying, by a system (e.g., a system including device 100 coupled to a power amplifier, an optical laser device, an infrared laser device, an AWG, and / or a VNA, which may be coupled to computer 1512, for example) operably coupled to a processor (e.g., processing unit 1514), laser power (e.g., the third laser power) to a superconducting antifuse device (e.g., superconducting antifuse device 112b) provided on a superconducting coupler device (e.g., superconducting coupler device 108b); and generating, by the system, a conductive path along the superconducting coupler device to couple the superconducting coupler device to a first quantum computing element (e.g., qubit 102 and / or capacitor pad 104a of qubit 102) and a second quantum computing element (e.g., a quantum computing element external to device 100, such as a readout device) based on the applying (e.g., based on exposure of superconducting antifuse device 112b to the third laser power).
[0105] At 1408, the computer-implemented method 1400 may include, by a system (e.g., a system including device 100 coupled to a power amplifier, an optical laser device, an infrared laser device, an AWG, and / or a VNA, which may be coupled to a computer 1512, for example), reconfiguring the connectivity (e.g., coupling) of the quantum computing elements based on exposure of one or more superconducting switch devices (e.g., one or more superconducting fuse devices 110a, 110b, 110c and / or one or more superconducting antifuse devices 112a, 112b, 112c) provided on one or more superconducting coupler devices (e.g., one or more superconducting coupler devices 108a, 108b, 108c, 108d) to at least one laser output. For example, with reference to the exemplary embodiment shown in FIG. 1, based on exposure of one or more superconducting fuse devices 110a, 110b, 110c and / or one or more superconducting antifuse devices 112a, 112b, 112c to at least one laser output (e.g., at least one laser generated by a laser device), the connectivity of qubit 102 with one or more quantum computing elements (e.g., another qubit, a readout device, a transmission line, a bus, a resonator, and / or another quantum computing element) may be reconfigured (e.g., reprogrammed).
[0106] Various embodiments of the present disclosure (e.g., devices 100, 200, 300, 400, 500, 600a, 600b, 700, 800, 900, 1000a, 1000b, 1000c, 1100, and / or 1200) may be associated with various technologies. For example, various embodiments of the present disclosure may be associated with quantum computing technology, qubit device technology, quantum hardware and / or software technology, quantum circuit technology, superconducting circuit technology, quantum circuit and / or superconducting circuit topology technology, machine learning technology, artificial intelligence technology, cloud computing technology, and / or other technologies.
[0107] Various embodiments of the present disclosure (e.g., devices 100, 200, 300, 400, 500, 600a, 600b, 700, 800, 900, 1000a, 1000b, 1000c, 1100, and / or 1200) may provide technical improvements to systems, devices, components, operational steps, and / or processing steps associated with the various techniques identified above. For example, various embodiments of the present disclosure may provide programmable and / or reprogrammable quantum circuits, where, based on one or more performance criteria (e.g., frequency collisions, a low quality factor (Q) of the qubits related to their coherence, fidelity, accuracy, efficiency, and / or another performance criterion), the connectivity (e.g., couplings) of one or more quantum computing elements in such quantum circuits can be configured and / or reconfigured to achieve one or more defined criteria.
[0108] Various embodiments of the present disclosure (e.g., devices 100, 200, 300, 400, 500, 600a, 600b, 700, 800, 900, 1000a, 1000b, 1000c, 1100, and / or 1200) may provide technical improvements to processing units (e.g., quantum processors including various embodiments of the present disclosure) that may be associated with various embodiments of the present disclosure. For example, as described above, various embodiments of the present disclosure may provide programmable and / or reprogrammable quantum circuits, where, based on one or more performance criteria (e.g., frequency collisions, a low quality factor (Q) of the qubits related to their coherence, fidelity, accuracy, efficiency, and / or another performance criterion), the connectivity (e.g., couplings) of one or more quantum computing elements in such quantum circuits may be configured and / or reconfigured to achieve one or more defined criteria. In this example, one or more of the embodiments of the present disclosure may be implemented in a processor, such as a quantum processor. In this example, such one or more embodiments of the present disclosure that may be implemented within such a quantum processor may provide a programmable and / or reprogrammable quantum circuit that may be modified to improve one or more performance criteria of such quantum circuit, and such one or more embodiments of the present disclosure may thereby improve one or more performance criteria (e.g., accuracy, fidelity, and / or another performance criterion) of such quantum processors that include one or more of the various embodiments of the present disclosure.
[0109] Based on the provision of the above-described programmable and / or reprogrammable quantum circuits, a practical application of various embodiments of the present disclosure (e.g., devices 100, 200, 300, 400, 500, 600a, 600b, 700, 800, 900, 1000a, 1000b, 1000c, 1100, and / or 1200) is that they may be implemented in quantum devices (e.g., quantum processors, quantum computers, and / or other quantum devices) that may enable one or more solutions (e.g., heuristics) to a variety of problems (e.g., estimation problems, optimization problems, and / or other problems) of varying complexity in a variety of domains (e.g., finance, chemistry, medicine, and / or other domains) to be computed more quickly and more efficiently with improved fidelity and / or accuracy. For example, based on the provision of the above-described programmable and / or reprogrammable quantum circuits, a practical application of various embodiments of the present disclosure is that they may be implemented, for example, in a quantum processor, to enable faster and more efficient computation of one or more solution methods (e.g., heuristics) in optimization problems in the fields of chemistry, medicine, and / or finance with improved fidelity and / or accuracy, where such solution methods may be used, for example, in the engineering of new compounds, new drugs, and / or new option pricing systems and / or methods.
[0110] It should be appreciated that various embodiments of the present disclosure (e.g., devices 100, 200, 300, 400, 500, 600a, 600b, 700, 800, 900, 1000a, 1000b, 1000c, 1100, and / or 1200) provide new approaches driven by relatively new quantum computing technologies. For example, various embodiments of the present disclosure provide new approaches for programming and / or reprogramming (e.g., configuring and / or reconfiguring) the connectivity (e.g., couplings) of one or more quantum computing elements of a quantum circuit. In this example, such new approaches for providing programmable and / or reprogrammable quantum circuits may enable faster and more efficient quantum computation with improved accuracy using quantum processors including one or more of the various embodiments of the present disclosure.
[0111] Various embodiments of the present disclosure (e.g., devices 100, 200, 300, 400, 500, 600a, 600b, 700, 800, 900, 1000a, 1000b, 1000c, 1100, and / or 1200) may utilize hardware and / or software to solve problems that are highly technical in nature, not abstract, and cannot be performed by humans as a set of mental activities. In some embodiments, one or more of the processes described herein may be performed by one or more specialized computers (e.g., specialized processing units, specialized classical computers, specialized quantum computers, or another specialized computer, or a combination thereof) to perform defined tasks related to the various technologies identified above. Various embodiments of the present disclosure may be utilized to solve new problems that arise through the use of advances in the technologies described above, quantum computing systems, cloud computing systems, computer architectures, or another technology, or a combination thereof.
[0112] It should be understood that various embodiments of the present disclosure (e.g., devices 100, 200, 300, 400, 500, 600a, 600b, 700, 800, 900, 1000a, 1000b, 1000c, 1100, and / or 1200) may utilize various combinations of electrical components, mechanical components, and circuitry that cannot be replicated in or performed by the human mind, as various operations that may be performed by various embodiments of the present disclosure are operations greater than the capabilities of the human mind. For example, the amount of data processed, the rate at which such data is processed, or the types of data processed by various embodiments of the present disclosure over a particular period of time may be greater than, faster than, or different from the amount, rate, or types of data that can be processed by the human mind over the same period of time.
[0113] According to some embodiments, various embodiments of the present disclosure (e.g., devices 100, 200, 300, 400, 500, 600a, 600b, 700, 800, 900, 1000a, 1000b, 1000c, 1100, and / or 1200) may also be fully operational toward performing one or more other functions (e.g., fully powered on, fully running, and / or another function) while also performing various operations described herein. It should be understood that such simultaneous operation execution exceeds the capabilities of the human mind. It should also be understood that various embodiments of the present disclosure may include information that is impossible to manually obtain by an entity such as a human user. For example, the type, amount, and / or variety of information included in various embodiments of the present disclosure may be more complex than information manually obtained by a human user.
[0114] To provide context for various aspects of the disclosed subject matter, FIG. 15 and the following discussion are intended to provide a general description of a suitable environment in which various aspects of the disclosed subject matter may be implemented. FIG. 15 illustrates a block diagram of an exemplary, non-limiting operating environment capable of facilitating one or more embodiments described herein. For example, as described below, operating environment 1500 may be used to implement the exemplary, non-limiting multi-step manufacturing sequence described above with reference to FIGS. 1 through 12, which may be implemented to manufacture various embodiments of the present disclosure described herein. In another example, as described below, operating environment 1500 may be used to implement one or more of the exemplary, non-limiting computer-implemented methods 1300 and / or 1400 described above with reference to FIGS. 13 and 14, respectively. Repeated descriptions of similar elements and / or processes used in other embodiments described herein have been omitted for the sake of brevity.
[0115] The exemplary, non-limiting multi-step manufacturing sequences described above with reference to FIGS. 1 through 12 that may be implemented to manufacture various embodiments of the present disclosure may be implemented by a computing system (e.g., operating environment 1500 shown in FIG. 15 and described below) and / or a computing device (e.g., computer 1512 shown in FIG. 15 and described below). In non-limiting, exemplary embodiments, such a computing system (e.g., operating environment 1500) and / or such a computing device (e.g., computer 1512) may include one or more processors and one or more memory devices that may store executable instructions thereon that, when executed by the one or more processors, may facilitate performance of the exemplary, non-limiting multi-step manufacturing sequences described above with reference to FIGS. 1 through 12. As a non-limiting example, the one or more processors may facilitate performance of the exemplary, non-limiting multi-step manufacturing sequences described above with reference to FIGS. 1 through 12 by directing and / or controlling one or more systems and / or equipment operable to perform semiconductor and / or superconductor device manufacturing.
[0116] 13 and 14, respectively, may be implemented (e.g., executed) by operating environment 1500. As a non-limiting example, one or more processors of such a computing device (e.g., computer 1512) may facilitate the performance of one or more of the exemplary, non-limiting computer-implemented methods 1300 and / or 1400, respectively, described above with reference to Figures 13 and 14 by directing and / or controlling one or more systems and / or equipment (e.g., one or more types of external devices defined herein, such as, for example, a power amplifier, an optical laser device, an infrared laser device, an AWG, a VNA, and / or another external device) operable to perform the operations and / or routines of such computer-implemented methods.
[0117] For simplicity of explanation, computer-implemented methods are illustrated and described as a series of actions. It is to be understood and appreciated that the subject innovation is not limited by the actions shown, or the order or combination of actions. For example, actions may occur in various orders and / or simultaneously, along with other actions not shown and described herein. Moreover, not all actions shown may be required to implement a computer-implemented method in accordance with the disclosed subject matter. In addition, those skilled in the art will understand and appreciate that a computer-implemented method can alternatively be represented as a series of interrelated states via a state diagram or events. Additionally, it should be further appreciated that the computer-implemented methods disclosed hereinafter and throughout this specification can be stored on an article of manufacture to facilitate transporting and transferring such computer-implemented methods to a computer. The term article of manufacture, as used herein, is intended to encompass a computer program accessible from any computer-readable device or storage medium.
[0118] 15, a suitable operating environment 1500 for implementing various aspects of the disclosure may also include a computer 1512. The computer 1512 may also include a processing unit 1514, a system memory 1516, and a system bus 1518. The system bus 1518 couples system components including, but not limited to, the system memory 1516 to the processing unit 1514. The processing unit 1514 may be any of a variety of available processors. Dual microprocessors and other multi-processor architectures may also be utilized as the processing unit 1514. The system bus 1518 can be any of several types of bus structures, including a memory bus or memory controller, a peripheral bus or external bus, or a local bus, or combinations thereof, using any of a variety of available bus architectures, including, but not limited to, Industry Standard Architecture (ISA), Micro Channel Architecture (MSA), Enhanced ISA (EISA), Intelligent Drive Electronics (IDE), VESA Local Bus (VLB), Peripheral Component Interconnect (PCI), Card Bus, Universal Serial Bus (USB), Advanced Graphics Port (AGP), Firewire (registered trademark) (IEEE 1394), Small Computer System Interface (SCSI).
[0119] The system memory 1516 may also include volatile memory 1520 and nonvolatile memory 1522. A basic input / output system (BIOS), containing the basic routines for transferring information between elements within the computer 1512, such as during start-up, is stored in the nonvolatile memory 1522. The computer 1512 may also include removable and non-removable, volatile and non-volatile computer storage media. FIG. 15 illustrates, for example, disk storage 1524. The disk storage 1524 may also include devices such as, but not limited to, a magnetic disk drive, a floppy disk drive, a tape drive, a Jaz drive, a Zip drive, an LS-100 drive, a flash memory card, or a memory stick. The disk storage 1524 may also include storage media separately from or in combination with other storage media. A removable or non-removable interface, such as interface 1526, is typically used to facilitate connection of the disk storage 1524 to the system bus 1518. FIG. 15 also illustrates software that acts as an intermediary between users and the basic computer resources described in the preferred operating environment 1500. Such software may also include, for example, operating system 1528. Operating system 1528, which may be stored on disk storage 1524, acts to control and allocate resources of the computer 1512.
[0120] System applications 1530 take advantage of the management of resources by operating system 1528 through program modules 1532 and program data 1534, for example, stored either in system memory 1516 or on disk storage 1524. It should be appreciated that the present disclosure may be implemented with various operating systems or combinations of operating systems. Users enter commands or information into computer 1512 through input devices 1536. Input devices 1536 include, but are not limited to, pointing devices such as a mouse, trackball, stylus, touchpad, keyboard, microphone, joystick, gamepad, satellite dish, scanner, television tuner card, digital camera, digital video camera, webcam, and the like. These and other input devices connect to processing unit 1514 through system bus 1518 via interface ports 1538. Interface ports 1538 include, for example, serial ports, parallel ports, game ports, and universal serial bus (USB). Output devices 1540 use several of the same types of ports as input devices 1536. Thus, for example, a USB port may be used to provide input to computer 1512 and to output information from computer 1512 to output device 1540. Output adapter 1542 is provided to illustrate that there are some output devices 1540, such as monitors, speakers, and printers, among other output devices 1540, that require special adapters. Output adapters 1542 include, by way of example and not limitation, video and sound cards that provide a means of connection between output device 1540 and system bus 1518. It should be noted that other devices or systems of devices, or combinations thereof, provide both input and output capabilities, such as remote computer 1544.
[0121] The computer 1512 may operate in a networked environment using logical connections to one or more remote computers, such as a remote computer 1544. The remote computer 1544 may be a computer, a server, a router, a network PC, a workstation, a microprocessor-based device, a peer device, or other common network node, and may typically include many or all of the elements described relative to the computer 1512. For purposes of simplicity, only a memory storage device 1546 is shown with the remote computer 1544. The remote computer 1544 is logically connected to the computer 1512 through a network interface 1548 and, in turn, physically connected via communication connection 1550. The network interface 1548 encompasses a wired and / or wireless communication network, such as a local area network (LAN), a wide area network (WAN), a cellular network, or another wired and / or wireless communication network, or a combination thereof. LAN technologies include Fiber Distributed Data Interface (FDDI), Copper Distributed Data Interface (CDDI), Ethernet, Token Ring, and the like. WAN technologies include, but are not limited to, point-to-point links, circuit-switched networks such as Integrated Services Digital Networks (ISDN) and its variations, packet-switched networks, and Digital Subscriber Lines (DSL). Communications connection(s) 1550 refers to the hardware / software utilized to connect network interface 1548 to system bus 1518. For clarity of illustration, communications connection(s) 1550 is shown internal to computer 1512, but could also be external to computer 1512. The hardware / software for connecting to network interface 1548 could also include, by way of example only, internal and external technologies such as ordinary telephone-grade modems, cable modems, modems including DSL modems, ISDN adapters, Ethernet cards, etc.
[0122] The present invention may be a system, method, apparatus, or computer program product, or combination thereof, at any possible level of technical detail of integration. A computer program product may include a computer-readable storage medium (or media) having computer-readable program instructions for causing a processor to perform aspects of the present invention. A computer-readable storage medium may be a tangible device capable of holding and storing instructions for use by an instruction-execution device. A computer-readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of computer-readable storage media may also include portable computer diskettes, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disk read-only memory (CD-ROM), digital versatile disk (DVD), memory stick, floppy disk, mechanically encoded devices such as punch cards or raised structures in grooves with instructions recorded thereon, and any suitable combination of the above. As used herein, a computer-readable storage medium itself is not considered to be a transitory signal, such as an electric wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide or other transmission medium (e.g., an optical pulse passing through a fiber optic cable), or an electrical signal transmitted over a wire.
[0123] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device or to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, or a wireless network, or a combination thereof. The network may include copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, or edge servers, or a combination thereof. A network adapter card or network interface within each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions to a computer-readable storage medium within the respective computing / processing device for storage. The computer-readable program instructions for carrying out operations of the present invention may be either assembler instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, configuration data for integrated circuits, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages such as Smalltalk®, C++, or the like, or conventional procedural programming languages such as the “C” programming language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be to an external computer (e.g., through the Internet using an Internet Service Provider).In some embodiments, to carry out aspects of the present invention, electronic circuitry including, for example, a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), may execute computer-readable program instructions by utilizing state information of the computer-readable program instructions to personalize the electronic circuitry.
[0124] Aspects of the present invention are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions. These computer-readable program instructions may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to create a machine. The instructions, executed by the processor of the computer or other programmable data processing apparatus, thereby form means for implementing the function / acts specified in a block or blocks of the flowchart illustrations or block diagrams, or combinations thereof. These computer-readable program instructions may also be stored on a computer-readable storage medium that can instruct a computer, programmable data processing apparatus, or other device, or combination thereof, to function in a particular manner. A computer-readable storage medium having instructions stored thereon thereby includes a product including instructions that implement an aspect of the function / acts specified in a block or blocks of the flowchart illustrations or block diagrams, or combinations thereof. Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational acts to be performed on the computer, other programmable apparatus, or other device to create a computer-implemented process, whereby the instructions executing on the computer, other programmable apparatus, or other device implement the function / acts specified in a block or blocks of the flowchart or block diagram, or a combination thereof.
[0125] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of instructions, including one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the blocks may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, depending on the functionality involved, or the blocks may even be executed in the reverse order. It should also be noted that each block of the block diagrams and / or flowchart diagrams, and combinations of blocks in the block diagrams and / or flowchart diagrams, may be implemented by a dedicated hardware-based system that performs the specified functions or operations or executes a combination of dedicated hardware and computer instructions.
[0126] While the subject matter has been described above in the general context of computer-executable instructions for a computer program product executed on one computer and / or multiple computers, those skilled in the art will recognize that the present disclosure can also be combined with or practiced in combination with other program modules. Generally, program modules include routine programs, components, data structures, and / or entities that perform particular tasks and / or implement particular abstract data types. Furthermore, those skilled in the art will recognize that the computer-implemented methods of the present invention can be practiced with other computer system configurations, including single-processor or multiprocessor computer systems, minicomputing devices, mainframe computers, computers, handheld computing devices (e.g., PDAs, phones), microprocessor-based or programmable consumer or industrial electronic devices, etc. The illustrated aspects can also be practiced in distributed computing environments where tasks are performed by remote processing devices linked through a communications network. However, some, if not all, aspects of the present disclosure can be practiced on stand-alone computers. In a distributed computing environment, program modules can be located in both local and remote memory storage devices. For example, in one or more embodiments, the computer-executable components may execute from a memory that may include or consist of one or more distributed memory units. As used herein, the terms "memory" and "memory unit" are interchangeable. Furthermore, one or more embodiments described herein may execute code of the computer-executable components in a distributed manner (e.g., multiple processors combining or acting cooperatively to execute code from one or more distributed memory units). As used herein, the term "memory" may encompass a single memory or memory unit in one location, or multiple memories or memory units in one or more locations.
[0127] As used herein, terms such as “component,” “system,” “platform,” and “interface” may refer to and / or include computer-related entities or entities related to an operating machine having one or more specific functionalities. The entities disclosed herein may be hardware, a combination of hardware and software, software, or software in execution. For example, a component may be, but is not limited to, a process running on a processor, a processor, an object, an executable, a thread of execution, a program, or a computer, or combinations thereof. By way of example, both an application running on a server and the server may be a component. One or more components may reside within a process or thread of execution, or both, and a component may be localized on one computer, distributed between two or more computers, or both. In another example, each component may execute from various computer-readable media having various data structures stored thereon. Components may communicate via local or remote processes, or both, such as according to signals comprising one or more data packets (e.g., data from one component interacting with another component in a network such as the Internet, a local system, a distributed system, or other systems via signals, or a combination thereof). As another example, a component may be a device having inherent functionality provided by mechanical parts operated by electrical or electronic circuits operated by software or firmware applications executed by a processor. In such cases, the processor may be internal or external to the device and may execute at least a portion of the software or firmware applications.As yet another example, a component may be a device that provides its inherent functionality without mechanical parts through electronic components, which may include a processor or other means for executing software or firmware that provides at least a portion of the functionality of the electronic component. In some aspects, a component may emulate an electronic component via, for example, a virtual machine in a cloud computing system.
[0128] Additionally, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or." That is, unless otherwise specified or clear from context, "X utilizes A or B" is intended to mean any of the natural inclusive permutations. That is, if X utilizes A, X utilizes B, or X utilizes both A and B, then "X utilizes A or B" is satisfied under any of the foregoing examples. Furthermore, the articles "a" and "an," as used in this specification and the accompanying drawings, should generally be construed to mean "one or more" unless otherwise specified or clear from context that the singular is intended. As used herein, the terms "example" and "exemplary," or both, are used to mean serving as an example, instance, or illustration. For the avoidance of doubt, the subject matter disclosed herein is not limited to such examples. Additionally, any aspect or design described herein as "example" and / or "exemplary" is not necessarily to be construed as preferred or advantageous over other aspects or designs, and is not intended to exclude equivalent exemplary structures and techniques known to those skilled in the art.
[0129] The term "processor" as used herein may refer to virtually any computing processing unit or device, including, but not limited to, a single-core processor, a single processor with software multithreading execution capabilities, a multi-core processor, a multi-core processor with software multithreading execution capabilities, a multi-core processor with hardware multithreading technology, a parallel platform, and a parallel platform with distributed shared memory. Additionally, a processor may refer to an integrated circuit, an application-specific integrated circuit (ASIC), a digital signal processor (DSP), a field-programmable gate array (FPGA), a programmable logic controller (PLC), a complex programmable logic device (CPLD), discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. Furthermore, a processor may utilize nanoscale architectures, such as, but not limited to, molecular and quantum dot-based transistors, switches, and gates, to optimize space utilization or enhance the performance of user equipment. A processor may also be implemented as a combination of computing processing units. In this disclosure, terms such as "store," "storage," "data store," "data storage," "database," and substantially any other information storage component associated with the operation and functionality of a component are utilized to refer to a "memory" or a "memory component" entity embodied in a component that includes memory. It should be understood that memory or memory components or combinations thereof described herein may be either volatile memory or non-volatile memory, or may include both volatile and non-volatile memory.By way of example, and not limitation, non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable ROM (EEPROM), flash memory, or non-volatile random access memory (RAM) (e.g., ferroelectric RAM (FeRAM)). Volatile memory may include RAM, which may act as external cache memory, for example. By way of example, and not limitation, RAM is available in many forms, including synchronous RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchlink DRAM (SLDRAM), direct Rambus RAM (DRRAM), direct Rambus dynamic RAM (DRDRAM), and Rambus dynamic RAM (RDRAM). Additionally, the disclosed memory components of systems or computer-implemented methods herein are intended to include, but are not limited to, these and any other suitable types of memory.
[0130] The foregoing includes only example systems and computer-implemented methods. Of course, for purposes of describing this disclosure, it is not possible to describe every conceivable combination of components or computer-implemented methods, but one of ordinary skill in the art will recognize that many further combinations and permutations of the present disclosure are possible. Furthermore, to the extent that "includes," "has," "possesse," and similar terms are used in the detailed description, claims, appendices, and drawings, such terms are intended to be inclusive in a manner similar to the term "comprising," as they are interpreted as "comprising" when used as transitional words in the claims.
[0131] The descriptions of various embodiments are presented for illustrative purposes and are not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein has been selected to best explain the principles of the embodiments, practical applications of, or technical improvements to, the technology found in the marketplace, or to enable others skilled in the art to understand the embodiments disclosed herein.
Claims
1. A device comprising a superconducting coupler device having a superconducting fuse device used to modify the coupling of a first quantum computing element and a second quantum computing element.
2. 10. The device of claim 1, wherein the superconducting fuse device severs a conductive path along the superconducting coupler device upon exposure of the superconducting fuse device to laser power, and the superconducting fuse device decouples the first quantum computing element and the second quantum computing element upon interruption of the conductive path to improve at least one of performance, accuracy, fidelity, or efficiency of a quantum computing device comprising the device.
3. a superconducting antifuse device on the superconducting coupler device 3. The device of claim 1, further comprising:
4. 4. The device of claim 1, wherein the superconducting fuse device connects the superconducting coupler device to ground, the superconducting fuse device being capable of isolating the superconducting coupler device from the ground upon exposure of the superconducting fuse device to laser power.
5. 5. The device of claim 1, further comprising a second superconducting coupler device having the superconducting antifuse device that couples the first quantum computing element and a third quantum computing element upon exposure of the superconducting antifuse device to laser output.
6. 6. The device of claim 1, wherein the superconducting coupler device is selected from the group consisting of a quantum resonator, a bus, a transmission line, an electrode, and a lead.
7. 7. The device of claim 1, wherein at least one of the first quantum computing element or the second quantum computing element is selected from the group consisting of a qubit, a qubit device, a quantum computing device, a readout device, a second quantum resonator, a waveguide, a Josephson junction, a ground, a capacitor, and a shunt capacitor.
8. A device comprising a superconducting coupler device having a superconducting antifuse device used to modify the coupling of a first quantum computing element and a second quantum computing element.
9. 10. The device of claim 8, wherein the superconducting antifuse device generates a conductive path along the superconducting coupler device based on exposure of the superconducting antifuse device to laser power, the superconducting antifuse device coupling the first quantum computing element and the second quantum computing element based on generation of the conductive path to improve at least one of performance, accuracy, fidelity, or efficiency of a quantum computing device comprising the device.
10. 10. The device of claim 8 or 9, further comprising a second superconducting coupler device having the second superconducting antifuse device that couples the first quantum computing element and a third quantum computing element upon exposure of the second superconducting antifuse device to laser output.
11. a superconducting fuse device that decouples the first quantum computing element and the third quantum computing element upon exposure of the superconducting fuse device to laser output; and a second superconducting antifuse device that connects the second superconducting coupler device to ground upon exposure of the second superconducting antifuse device to the second laser output; 11. The device of claim 8, further comprising the second superconducting coupler device having:
12. 12. The device of claim 8, wherein the superconducting coupler device is selected from the group consisting of a quantum resonator, a bus, a transmission line, an electrode, and a lead.
13. 13. The device of claim 8, wherein at least one of the first quantum computing element or the second quantum computing element is selected from the group consisting of a qubit, a qubit device, a quantum computing device, a readout device, a second quantum resonator, a waveguide, a Josephson junction, a ground, a capacitor, and a shunt capacitor.
14. reconfiguring, by a system operatively coupled to the processor, the connectivity of the quantum computing elements based on exposure of one or more superconducting switch devices provided on the one or more superconducting coupler devices to the at least one laser output. A method performed by the system comprising:
15. 15. The system-performed method of claim 14, wherein the one or more superconducting switch devices are selected from the group consisting of superconducting antifuse devices and superconducting fuse devices.
16. applying, by the system, laser power to a superconducting fuse device provided on a superconducting coupler device; and and disconnecting, by the system, a conductive path along the superconducting coupler device to decouple the first quantum computing device and the second quantum computing device based on the applying step.
16. The method performed by the system of claim 14 or 15, further comprising:
17. applying, by the system, laser power to a superconducting antifuse device provided on a superconducting coupler device; and generating, by the system, a conductive path along the superconducting coupler device and coupling the superconducting coupler device to ground based on the applying step; 17. The method performed by the system of claim 14, further comprising:
18. applying, by the system, laser power to a superconducting antifuse device provided on a superconducting coupler device; and generating, by the system, a conductive path along the superconducting coupler device and coupling the superconducting coupler device to a first quantum computing device and a second quantum computing device based on the applying step; 18. The method performed by the system of claim 14, further comprising:
19. 19. The method performed by the system of any one of claims 14 to 18, wherein the one or more superconducting coupler devices are selected from the group consisting of quantum resonators, buses, transmission lines, electrodes, and leads.
20. 20. The method performed by the system of any one of claims 14 to 19, wherein the quantum computing element is selected from the group consisting of a qubit, a qubit device, a quantum computing device, a readout device, a quantum resonator, a waveguide, a Josephson junction, a ground, a capacitor, and a shunt capacitor.
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