Quantum Device Structure

Abstract

A silicon-based quantum device is provided. The device comprises a first metal structure, a second metal structure laterally separated from the first metal structure, and an elongated channel defined by the separation between the first and second metal structures, the elongated channel having an apex. The device further comprises a third metal structure positioned partially within the elongated channel, a fourth metal structure disposed at a first end of the third metal structure, and a fifth metal structure disposed at a second end of the third metal structure. The first, second, third, fourth, and fifth metal structures are configured to connect to first, second, third, fourth, and fifth potentials, respectively. The first, second, third, fourth, and fifth potentials are controllable to define potential wells for confining quantum charge carriers in elongated quantum dots below the elongated channel. The fourth and fifth potentials and the positions of the fourth and fifth metal structures define the first and second ends of the elongated channel, respectively. The width of the potential well is defined by the positions of the first, second, and third metallic structures and their corresponding potentials, and the length of the potential well is defined by the positions of the third, fourth, and fifth metallic structures and their corresponding potentials, and the third potential is controllable to adjust the quantum charge carrier energy level within the potential well.

Description

[Technical Field]

[0001] The present invention relates to silicon-based quantum devices for quantum computing. [Background technology]

[0002] Quantum computing typically requires a large number of qubits. In the near future, intermediate-scale quantum computing, or NISQ, era, a quantum computing process may use 50-100 qubits. The qubits are densely packed into quantum devices and designed to minimize the size of the required processor.

[0003] To allow experimenters to manipulate qubits within a device, it is desirable to be able to address qubits with individual electrodes. However, the electrode wiring used to address qubits typically requires space in a qubit array or qubit lattice equal to or greater than the space occupied by the qubit alone. In a planar qubit lattice layout, qubits must be widely spaced to allow enough space for electrode patterning.

[0004] Previously, vertical wiring has been proposed using conductive vias that extend perpendicular to the surface of the device, but this method is complex, requires many processing steps, and has a high failure rate. Summary of the Invention [Problem to be solved by the invention]

[0005] It is desirable to create scalable device structures for use in quantum computing. [Means for solving the problem]

[0006] One aspect of the present invention provides a silicon-based quantum device comprising a first metal structure and a second metal structure laterally separated from the first metal structure. The device comprises an elongated channel defined by a separation between the first and second metal structures, the elongated channel having an apex. The device comprises a third metal structure positioned partially within the elongated channel. The device further comprises a fourth metal structure disposed at a first end of the third metal structure and a fifth metal structure disposed at a second end of the third metal structure. The first, second, third, fourth, and fifth metal structures are configured to connect to first, second, third, fourth, and fifth potentials, respectively, which are controllable to define potential wells for confining quantum charge carriers in elongated quantum dots below the elongated channel. The fourth and fifth potentials and the positions of the fourth and fifth metallic structures define first and second ends of the elongated channel, respectively. The width of the potential well is defined by the positions of the first, second, and third metallic structures and their corresponding potentials, and the length of the potential well is defined by the positions of the third, fourth, and fifth metallic structures and their corresponding potentials. The third potential is controllable to adjust quantum charge carrier energy levels within the potential well.

[0007] This device provides a quasi-one-dimensional channel with improved quantum charge carrier confinement. The quasi-one-dimensional channel extends around the corners. The charge carriers may be, for example, electrons or holes. The extended channel can support extended quantum dots with vertices that can be advantageously used to connect laterally separated conductive regions of the device. Advantageously, extended quantum dots that extend around the corners can be used to create two-dimensional arrays while using only planar wiring. This device also has the advantage of better control over charge carrier occupancy within the potential wells.

[0008] The presence of the first and second metal structures on either side of the third metal structure improves independent control of the channel shape and chemical potential level within the potential well. Advantageously, this device offers the ability to resonate different structures within the device.

[0009] Advantageously, the fourth and fifth potentials may be configured such that the fourth and fifth metal structures form an electrostatic barrier together with the third metal structure that defines the length of an elongated channel, the width of which is typically defined using the first, second and third metal structures.

[0010] Furthermore, by applying the first and second potentials to the first and second metal structures, respectively, the effect of applying the fourth and fifth potentials on the shape of the elongated channel is reduced. Advantageously, the shape of the elongated channel is controlled primarily using the first and second potentials.

[0011] The device comprises an elongated channel having an apex. The third metal structure is disposed partially within the elongated channel, and thus typically extends around the apex. This has the advantage that the device structure can be scaled up to couple conductive regions arranged in a two-dimensional array. Typically, the outer edge of the third metal structure is substantially aligned with the inner edge of the elongated channel.

[0012] The first, second, third, fourth, and fifth metallic structures are configured to be connected to respective controllable potentials to define potential wells for confining quantum charge carriers within the elongated quantum dots below the elongated channel. The first, second, third, fourth, and fifth metallic structures define the width and length of the potential wells. Thus, the elongated quantum dots typically extend around the apex. This has the advantage that elongated quantum dots with apexes can be used as intermediary dots between conductive regions in two-dimensional arrays where linear elongated quantum dots are not suitable. This configuration provides an intermediary mechanism compatible with planar wiring.

[0013] Typically, the device further comprises a substrate beneath the first, second and third metal structures. The substrate may comprise an isotopically purified silicon layer, such as silicon 28. The substrate may further comprise an additional silicon layer beneath the silicon 28 layer. The device is preferably a silicon metal oxide semiconductor (SiMOS) device.

[0014] Preferably, the first, second, third, fourth and fifth potentials are configured to define the dimensions and charge carrier occupancy of a potential well, and preferably the polarities of the first and second potentials are opposite to the polarity of the third potential.

[0015] Typically, the first potential is substantially the same as the second potential. The first and second potentials preferably define first and second walls of a potential well. By defining the first and second walls using similar or identical potentials, a substantially symmetric potential well is obtained, advantageously providing a more uniform confinement region. This can be achieved by providing electrical contact between the first and second metal structures or by providing both metal structures in a common layer.

[0016] Optionally, the fourth potential is substantially the same as the fifth potential. This may provide the advantage of uniformity of quantum charge carrier confinement. In another example, the fourth potential and the fifth potential may be different. The fourth and fifth potentials affect the height of the potential barrier at the first and second ends of the elongated channel. The fourth and fifth potentials can change the barrier height and, accordingly, the tunneling strength into and out of the potential well. Advantageously, this allows the experimenter to manipulate the quantum charge carriers as desired.

[0017] The first and second metal structures typically extend to an outer region of the device, where they can be connected to a voltage source configured to provide a potential bias, the magnitude and polarity of which can be selected depending on the desired characteristics of the device, particularly the potential well.

[0018] The first metal structure and the second metal structure may be connected to two separate voltage sources or may be connected to the same voltage source. Optionally, if the first and second metal structures are connected to the same voltage source, the first and second metal structures may form a single structure having first and second limbs such that the first and second metal structures are disposed on opposite sides of an elongated channel. In this case, using a single structure to form both the first metal structure and the second metal structure ensures electrical connection between the two structures. Optionally, even if the first metal structure and the second metal structure are connected to two separate voltage sources, the set voltage may be selected to be the same for each of the voltage sources.

[0019] Advantageously, when the first and second potentials are substantially the same, the walls of the potential well are substantially symmetrical, thus providing good confinement.

[0020] Optionally, the first and second metal structures are disposed in a first metal layer. Multiple metal structures may be deposited simultaneously, such that each laterally separated structure forms a single layer of approximately the same thickness. This advantageously reduces the number of steps required to fabricate the device. The third metal structure may be disposed in a second metal layer.

[0021] Preferably, the device further comprises an electrically insulating layer between and overlying the first metal layer and the second metal layer, which advantageously provides electrical isolation between the metal layers, allowing the first, second and third metal structures to be connected to different potentials.

[0022] Optionally, the fourth and fifth metal structures may be disposed on a third metal layer. Preferably, the device further comprises another electrically insulating layer between the second and third metal layers. Advantageously, the presence of an electrically insulating layer between the metal layers separates the conductive regions and adds flexibility to the device structure.

[0023] Typically, the first metal layer and the second metal layer each comprise a plurality of laterally separated metal structures. Optionally, the third metal layer includes a plurality of laterally separated metal structures. The use of multiple metal structures in one or more of the metal layers provides additional flexibility in device design.

[0024] The second metal layer may further comprise a sixth metal structure configured to connect to a sixth potential. Preferably, a charge carrier reservoir may be supported below the sixth metal structure. The reservoir may be couplable to the potential well by proximity. The strength of the coupling may be determined by a configurable potential barrier, the height of which may be modified, for example, by one or more of the metal structures in the third metal layer. Advantageously, coupling of the reservoir to the potential well improves the charge stability of the potential well.

[0025] The second metal layer may further include a seventh metal structure configured to connect to a seventh potential. Preferably, a quantum dot may be supported below the seventh metal structure. The quantum dot may be capable of coupling to a potential well by proximity. The strength of the coupling may be determined by a modifiable potential barrier, the height of which may be modified, for example, by one or more of the metal structures in the third metal layer. Additional quantum dots may be supported below additional metal structures in the second metal layer. For example, a first quantum dot may be supported near a first end of the potential well, and a second quantum dot may be supported near a second end of the potential well. Advantageously, the potential wells may be used to communicate quantum information between the first and second quantum dots.

[0026] The device may include additional metal structures, each of which may be configured to guide a quantum dot. Thus, the device may be suitable for supporting an array of quantum dots that may be used as qubits in quantum computing. Each quantum dot in the array of quantum dots may be coupled to another quantum dot, a potential well, or a charge carrier reservoir. The device advantageously provides a mechanism for coupling quantum dots and for individually addressing multiple quantum dots in a single device.

[0027] Preferably, the device further comprises one or more implanted regions. For example, a metal structure in the second metal layer may partially overlie one of the one or more implanted regions. This advantageously provides an ohmic contact between the metal structure and the substrate. The implanted regions are typically doped with phosphorus (P + The metal structure may be configured to support, for example, a quantum charge carrier reservoir or a quantum dot.

[0028] The first and second metal structures are laterally separated to define an elongated channel therebetween. A third metal structure is disposed partially within the elongated channel. The elongated channel is preferably longer than it is wide and has an apex. Preferably, the first portion of the channel is angled relative to the second portion of the channel. In this manner, the channel, and the resulting elongated quantum dots formed beneath the third metal structure, extend around a corner. Advantageously, this configuration provides a mechanism for fabricating two-dimensional arrays while using only planar wiring.

[0029] Each of the metal structures is typically configured to connect to a respective potential, defining a potential topography across the device. Typically, each of the metal structures extends to an outer region of the device, where it can be connected to a voltage source that can be used to provide a specific potential bias. In particular, the third metal structure may include a first extension, the first extension partially overlapping the first metal structure. The first extension may be configured to connect to the third potential, typically connecting the voltage source to a portion of the third metal structure disposed within the elongated channel.

[0030] The third metal structure may further comprise a second extension partially overlying the first metal structure. The first and / or second extension may be configured to connect to the third potential. The use of two extensions advantageously provides a mechanism for troubleshooting the device by using the first extension to connect the third metal structure to a third potential and using the second extension to check correct function of the first extension.

[0031] Another aspect of the present invention provides a method for fabricating a silicon-based quantum device, the method comprising: depositing a first metallic structure and a second metallic structure laterally separated from the first metallic structure such that an elongated channel is defined by a separation between the first and second metallic structures, the elongated channel having an apex; depositing a third metallic structure partially within the elongated channel; depositing a fourth metallic structure at a first end of the third metallic structure; and depositing a fifth metallic structure at a second end of the third metallic structure, the first, second, third, fourth, and fifth metallic structures configured to connect to first, second, third, fourth, and fifth potentials, respectively, and the first, second, third, fourth, and fifth potentials are controllable to define a potential well for confining quantum charge carriers in an elongated quantum dot below the elongated channel. The fourth and fifth potentials and the positions of the fourth and fifth metallic structures define first and second ends of the elongated channel, respectively. The width of the potential well is defined by the positions of the first, second, and third metallic structures and their corresponding potentials, and the length of the potential well is defined by the positions of the third, fourth, and fifth metallic structures and their corresponding potentials. The third potential is controllable to adjust quantum charge carrier energy levels within the potential well.

[0032] Advantageously, this method of fabricating silicon-based devices provides a confinement region capable of confining quantum charge carriers. The elongated channel can support elongated quantum dots that can be advantageously used to couple laterally separated conductive regions of a device such as a charge carrier reservoir or quantum dot.

[0033] Typically, depositing the third metal structure partially within the elongated channel includes depositing the third metal structure so that it extends around the apex. The third metal structure is preferably deposited partially within the elongated channel and partially on top of the first metal structure. Typically, the first, second, fourth, and fifth metal structures define the extent of the elongated channel. The portion of the third metal structure deposited in the elongated channel typically substantially fills the elongated channel. For example, an edge of the third metal structure may overlap or be adjacent to an edge of one or more of the first, second, fourth, and fifth metal structures. An advantage of depositing the third metal structure so that it extends around the apex is the ability to fabricate a device capable of supporting a two-dimensional array of quantum dots using planar wiring.

[0034] The elongated quantum dots typically extend around the apex as a result of the third metal structure being deposited around the apex, an advantage of which is the ability to mediate interactions around corners in quantum devices.

[0035] Preferably, the first and second metal structures are deposited simultaneously as part of the first metal layer. Depositing the first and second metal structures in the same manufacturing step advantageously reduces the number of manufacturing steps required to fabricate the device, and therefore reduces manufacturing complexity. The third metal structure may be deposited as part of the second metal layer after deposition of the first metal layer.

[0036] The first and second metal structures are preferably deposited on a silicon substrate to create a silicon metal oxide semiconductor (SiMOS) device.

[0037] The method typically further comprises the step of depositing a first electrically insulating layer after depositing the first metal layer and before depositing the second metal layer, the first electrically insulating layer preferably overlying the first metal layer, thereby advantageously electrically isolating the first and second metal structures from a third metal structure and allowing the first and second electric potentials to differ from a third electric potential.

[0038] Preferably, after deposition of the second metal layer, the fourth and fifth metal structures are simultaneously deposited as part of a third metal layer. The method typically further comprises, after depositing the second metal layer and before depositing the third metal layer, depositing a second electrically insulating layer, the second electrically insulating layer overlying the second metal layer.

[0039] The method preferably further includes forming one or more implanted regions in the silicon substrate prior to metal deposition. For example, phosphorus ions may be implanted to form negatively doped regions in the device. The metal structure of the second metal layer may be positioned such that a portion of the metal structure extends over or partially over one of the one or more implanted regions. Advantageously, this provides an ohmic contact between the metal structure and the substrate.

[0040] A further aspect of the present invention provides a method of operating a silicon-based quantum device, the method comprising: applying a first potential to a first metallic structure and a second potential to a second metallic structure, the second metallic structure being laterally separated from the first metallic structure such that an elongated channel is defined by a separation between the first and second metallic structures, the elongated channel having an apex; applying a third potential to a third metallic structure, the third metallic structure being partially disposed within the elongated channel; applying a fourth potential to a fourth metallic structure disposed at a first end of the third metallic structure; applying a fifth potential to a fifth metallic structure disposed at a second end of the third metallic structure; and controlling the third potential to adjust quantum charge carrier energy levels in the potential well. The first, second, third, fourth, and fifth metallic structures are configured to connect to the first, second, third, fourth, and fifth potentials, respectively. The first, second, third, fourth, and fifth potentials are controllable to define a potential well for confining quantum charge carriers in an elongated quantum dot below the elongated channel, and the fourth and fifth potentials and the positions of the fourth and fifth metallic structures define first and second ends of the elongated channel, respectively, the width of the potential well is defined by the positions of the first, second, and third metallic structures and their corresponding potentials, and the length of the potential well is defined by the positions of the third, fourth, and fifth metallic structures and their corresponding potentials.

[0041] Advantageously, this method can be used to operate two-dimensional arrays of quantum dots while using only planar wiring.

[0042] Typically, the third metallic structure extends around the apex. The third potential is applied to the third metallic structure, and the third potential can be controlled to adjust the quantum charge carrier energy level within the potential well. Advantageously, if the third metallic structure has an apex, the third potential can be controlled to define a potential well with the apex. This can be used to operate a device supporting a two-dimensional array of quantum dots.

[0043] As a result, the elongated quantum dots typically extend around the vertices. Advantageously, elongated quantum dots that extend around vertices can be used to mediate interactions around corners.

[0044] Preferably, the polarities of the first and second potentials are opposite to the polarity of the third potential. Advantageously, this enhances the confinement of quantum charge carriers in the elongated quantum dot. The first and second metal structures and corresponding potentials typically provide electrostatic barriers on each side of the third metal structure. The third metal structure and third potential preferably provide a plunger gate.

[0045] Typically, the first potential is substantially the same as the second potential. The first and second potentials preferably define first and second walls of a potential well. Using similar or the same potentials to define the first and second walls results in a substantially symmetric potential well, advantageously providing a more uniform confinement region. This can be achieved by providing electrical contact between the first and second metal structures or by disposing both metal structures on a common layer.

[0046] Optionally, the fourth potential is substantially the same as the fifth potential. This may provide the advantage of uniformity of quantum charge carrier confinement. In another example, the fourth potential and the fifth potential may be different. The fourth and fifth potentials affect the height of a potential barrier at the first and second ends of the extended channel. Varying the fourth and fifth potentials can change the barrier height and, accordingly, the strength of tunneling into and out of the potential well. Advantageously, this allows an experimenter to manipulate quantum charge carriers as desired.

[0047] Another aspect of the present invention provides a silicon-based quantum device comprising a first metal structure, a second metal structure, and a third metal structure. The first metal structure is configured to connect to a first potential. The second metal structure is configured to connect to the second potential. The third metal structure is disposed at least partially in an elongated channel between the first and second metal structures and is configured to connect to a third potential, such that the potentials of the first, second, and third metal structures define a potential well for confining quantum charge carriers below the elongated channel. The third potential is controllable to adjust the energy level of quantum charge carriers within the potential well.

[0048] A further aspect of the present invention provides a method for fabricating a silicon-based quantum device, the method comprising depositing first and second metal structures and depositing a third metal structure at least partially in an elongated channel between the first and second metal structures, the first, second, and third metal structures configured to be connected to first, second, and third potentials, respectively, such that the first, second, and third potentials define potential wells confining quantum charge carriers below the elongated channel, the third potential being controllable to adjust the energy levels of quantum charge carriers within the potential wells.

[0049] Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings. [Brief explanation of the drawings]

[0050] [Figure 1A] 1 is a cross-sectional side view of a silicon-based quantum device according to a first embodiment of the present invention. [Figure 1B] 1 is a top view of a silicon-based quantum device according to a first embodiment of the present invention. [Figure 2] FIG. 1 is a top view of a silicon-based quantum device. [Figure 3] FIG. 1 is a top view of a silicon-based quantum device. [Figure 4] FIG. 1 is a top view of a silicon-based quantum device. [Figure 5] FIG. 1 is a top view of a silicon-based quantum device. [Figure 6A] FIG. 10 is a cross-sectional side view of an elongated channel. [Figure 6B] Schematic diagram of the potential energy landscape. DETAILED DESCRIPTION OF THE INVENTION

[0051] 1A and 1B are schematic cross-sectional side and top views of a silicon-based quantum device according to a first embodiment. The silicon-based quantum device is fabricated using a silicon metal oxide semiconductor (SiMOS) fabrication process. The cross-sectional side view depicted in FIG. 1A is taken along direction A shown in FIG. 1B.

[0052] 1A shows a first metal structure 101, a second metal structure 102, and a third metal structure 103 on a silicon substrate 100. In this embodiment, the first and second metal structures 101, 102 are deposited simultaneously, i.e., in the same processing step, and therefore have approximately the same thickness. The first and second metal structures 101, 102 are disposed in a first metal layer 111. The first and second metal structures 101, 102 are laterally separated within the first metal layer 111, forming an elongated channel 120 between the metal structures.

[0053] A third metal structure 103 is partially deposited in the elongated channel 120 between the first metal structure 101 and the second metal structure 102. The third metal structure 103 is disposed on the second metal layer 112. An electrical insulating layer (not shown) is deposited between the first metal layer 111 and the second metal layer 112. The electrical insulating layer may be formed from any suitable material, such as alumina or any high-k dielectric.

[0054] Each of the first, second, and third metal structures 101, 102, and 103 is deposited on a silicon substrate 100, the top layer of which is isotopically purified silicon, in this embodiment, silicon-28. The first, second, and third metal structures 101, 102, and 103 may be formed from any suitable metal, such as gold or tungsten. Each of the first and second metal layers 111, 112 may comprise multiple layers. For example, one of the first or second metal layers 111, 112 may include a layer of titanium followed by a layer of gold. Metal deposition may be performed using any suitable technique, such as atomic layer deposition or chemical vapor deposition.

[0055] 1B is a schematic diagram illustrating a top view of the silicon-based quantum device shown in FIG. 1A. A first metal layer 111 includes multiple metal structures, including a first metal structure 101 and a second metal structure 102. The first and second metal structures 101, 102 in the first metal layer 111 are configured to connect to first and second potentials, respectively. The first and second potentials may be substantially the same or may be adjusted to form a confinement region within the device by forming an electrostatic potential barrier.

[0056] The second metal layer 112 includes multiple metal structures, including a third metal structure 103. A first portion 121 of the third metal structure 103 is positioned in the elongated channel 120 between the first and second metal structures 101, 102, and a second portion 122 of the third metal structure 103 is positioned partially overlapping the first metal structure 101. The width of the first metal structure 101, which defines the level of overlap between the second portion 122 of the third metal structure 103 and the first metal structure 101, can be adjusted according to fabrication considerations. The first metal structure 101 is preferably wide enough to provide sufficient confinement and narrow enough to reduce the possibility of defects in the electrical insulation layer between the first and third metal structures 101, 103. For example, the first metal structure 101 may be between 10 and 400 nanometers when using planar wiring, or between 10 and 50 nanometers when using non-planar wiring. The second portion 122 of the third metal structure 103 extends to an outer region of the device and is a first extension configured for connection to a third potential. The third metal structure 103 in this embodiment is "T" shaped when viewed from above.

[0057] The third metallic structure 103 acts as a plunger gate, and the first, second and third potentials are adjusted to define a potential well below the elongated channel 120. The potential well below the elongated channel 120 is an elongated quantum dot or a mediator quantum dot. The presence of the first and second metallic structures 101, 102 on either side of the third metallic structure 103 improves control over the confinement shape of the elongated quantum dot below the elongated channel 120.

[0058] Quantum charge carriers, such as electrons or holes, can be confined in the elongated quantum dots. The third potential has a polarity opposite to that of the first and second potentials and can be adjusted to control the number of charge carriers in the elongated quantum dots. For example, if the first and second potentials are negative, the third potential is positive. Varying the third potential has the effect of shifting the depth of the potential well and correspondingly shifting the quantum charge carrier energy levels within the potential well. This can be used to change the number of quantum charge carriers confined in the elongated quantum dots.

[0059] The fourth metal structure 104 and the fifth metal structure 105 form a barrier gate. In this embodiment, the fourth and fifth metal structures 104, 105 are deposited simultaneously and form part of a third metal layer 113. The third metal layer 113 includes multiple metal structures. The fourth and fifth metal structures 104, 105 are configured to connect to fourth and fifth potentials, respectively. The fourth and fifth potentials are selected such that the fourth and fifth metal structures 104, 105 form potential barriers, thereby defining the first end 114 and the second end 115 of the elongated channel 120, respectively. The fourth and fifth potentials can be controlled to adjust the height of the potential barriers at each end of the elongated channel 120.

[0060] The potential well underlying the elongated channel 120 is therefore defined by the first, second, third, fourth, and fifth metal structures 101-105 and their corresponding potentials. The width of the potential well is defined by the first, second, and third metal structures 101-103 and the potentials, and the length of the potential well is defined by the third, fourth, and fifth metal structures 103-105 and the potentials.

[0061] In this embodiment, fabrication of the device includes depositing a first metal layer 111, depositing a first electrically insulating layer (not shown) on the first metal layer 111, depositing a second metal layer 112, depositing a second electrically insulating layer (not shown) on the second metal layer 112, and depositing a third metal layer 113. In this manner, the first, second, and third metal layers 111, 112, and 113 are electrically isolated. In another embodiment, the third metal layer is deposited before the second metal layer, with an electrically insulating layer disposed between each metal layer. Each electrically insulating layer is configured to cover the previously deposited and therefore exposed metal layer. Each electrically insulating layer may partially cover the exposed metal layer. Importantly, each electrically insulating layer is deposited such that each metal layer is electrically isolated from each of the other metal layers. There is no galvanic contact between the metal layers, and therefore charge carriers do not flow between the vertically stacked metal layers.

[0062] In this embodiment, the second metal layer 112 further includes three additional metal structures that act as plunger gates. The first plunger gate 131 is adapted to support a charge carrier reservoir. The second plunger gate 132 forms a quantum charge carrier source, and the third plunger gate 133 forms a quantum charge carrier drain. In another embodiment, the second plunger gate may form a quantum charge carrier drain, and the third plunger gate may form a quantum charge carrier source.

[0063] Each of the first, second, and third plunger gates 131, 132, and 133 is deposited simultaneously with the third metal structure in this embodiment and is configured to connect to a respective potential. The potential may be adjusted depending on the desired device function. For example, there may be a potential difference between the potential on the second plunger gate and the potential on the third plunger gate that directs charge carrier movement in a particular direction. Each of the first, second, and third plunger gates 131, 132, and 133 is positioned to partially overlap an implantation region (not shown) of the device. The implantation region contains ions, such as phosphorus ions, and is typically positioned in an outer region of the device.

[0064] A fourth metal structure 104 in the third metal layer 113 is positioned between a first end 114 of the third metal structure 103 and a second plunger gate 132 of the second metal layer 112. A fifth metal structure 105 in the third metal layer 113 is positioned between a second end 115 of the third metal structure 103 and a third plunger gate 133 of the second metal layer 112. The fourth and fifth metal structures 104, 105 are positioned partially in the channel between the two metal structures of the first metal layer 111 and partially overlying the first metal structure 101. Adjusting the fourth and fifth potentials adjusts the height of a potential barrier formed under the fourth and fifth metal structures that controls tunnel coupling between adjacent potential wells. In this embodiment, the strength of the coupling between the metal structures in the third metal layer, namely the second plunger gate 132, the third metal structure 103 and the third plunger gate 133, is controlled by adjusting the potential on the barrier gates 104, 105.

[0065] The third metal layer 113 comprises a barrier gate including a fourth metal structure 104 and a fifth metal structure 105. The third metal layer 113 further comprises an additional barrier gate, a first barrier gate 130, disposed between the first plunger gate 131 and the third metal structure 103. The first barrier gate 130 is configured for connection to a barrier potential that can be adjusted to control the coupling strength between a charge carrier reservoir supported beneath the first plunger gate 131 and an elongated quantum dot supported beneath the third metal structure 103.

[0066] The first metal layer includes an additional metal structure, a first confinement gate 123. A first channel 124 is formed between the first metal structure 101, the first confinement gate 123, and the second metal structure 102. A second plunger gate 132, a fourth metal structure 104, a third metal structure 103, a fifth metal structure 105, and a third plunger gate 133 are all partially positioned within the first channel 124. An elongated channel 120 beneath which quantum charge carriers can be confined forms part of the first channel 124. A second channel 125 is formed between the second metal structure 102 and the first confinement gate 123. A first barrier gate 130 and a first plunger gate 131 are partially positioned within the second channel 125.

[0067] Each metal structure is configured to be connected to a respective electrical potential. In this way, a potential topography is established on the surface of the device, across which quantum charge carriers can be manipulated and guided. Each metal structure extends to the outer region of the device and to a bonding region that can be used to connect the metal structure to a voltage source. The metal structures of the first metal layer remain substantially adjacent to the metal structures of the second metal layer, even in the outer region of the device, to minimize the presence of unwanted charge carriers. However, a small separation may be introduced between the metal structures of the first and second metal layers to avoid defects in the underlying substrate. The metal structures in the first metal layer can be used to screen electrical potentials arising from the metal structures in the second and / or third metal layers.

[0068] Quantum charge carriers are confined within potential wells beneath the third metal structure 103 and the first, second, and third plunger gates 131, 132, and 133. The fourth and fifth metal structures 104, 105 and the first barrier gate 130 form a potential barrier, and the first and second metal structures 101, 102 and the first confinement gate 123 form a potential wall. The potentials can be adjusted during operation to move charge carriers within the device. In particular, the potentials of the metal structures 104, 105, and 130 of the third metal layer 113 can be adjusted to control the strength of coupling between adjacent charge carrier confinement regions, and the potentials of the metal structures 103, 131, 132, and 133 of the second metal layer 112 can be adjusted to adjust the quantum charge carrier energy levels of the potential wells or confinement regions, thereby adjusting the quantum charge carrier occupancy.

[0069] Figure 2 shows a schematic top view of a silicon-based quantum device. A first metal layer 311 includes multiple confinement gates that define a first channel 324 and a second channel 325. A second metal layer 312 includes multiple plunger gates, including a source gate 314, a drain gate 316, a mediator gate 318, and a reservoir gate 319. A third metal layer 313 includes multiple barrier gates.

[0070] The first channel 324 includes a source gate 314, a drain gate 316, a mediator gate 318, four quantum dot gates 305, 306, 307, and 308, and portions of six barrier gates 331, 332, 333, 334, 335, and 336. Each of the plunger gates 305-308, 314, 316, and 318 is separated by a barrier gate 331-336. Adjusting the potential of the barrier gates 331-336 controls the strength of the coupling between adjacent plunger gates. The potentials of the plunger gates are configured such that, in use, a potential well is defined beneath the plunger gate in the first channel.

[0071] The second channel 325 includes a portion of the reservoir gate 319 surrounded by a seventh barrier gate 337. The potential of the seventh barrier gate 337 can be adjusted to regulate the strength of the coupling between the reservoir and the elongated quantum dot supported beneath the mediator gate 318.

[0072] The source gate 314, drain gate 316 and reservoir gate 319 extend to the doped regions to provide ohmic contacts.

[0073] The portion of the device shown in Figure 2 illustrates four quantum dots 301, 302, 303, 304. Adjacent quantum dots, namely the first and second quantum dots 301, 302 and the third and fourth quantum dots 303, 304, can interact. The second and third quantum dots 302, 303 can also interact with the extended quantum dot 300 acting as a mediator.

[0074] FIG. 3 shows a schematic top view of a silicon-based quantum device. This device is similar to the device shown in FIG. 1B. A first metal layer 411 has a metal structure forming a confinement gate that defines a channel. A second metal layer 412 has a metal structure forming a plunger gate, including a source gate 414, a drain gate 416, a mediator gate 418, and a reservoir gate 419. A third metal layer 413 has a metal structure forming a barrier gate that separates the mediator gate 418 from the source and drain gates 414 and 416 and the mediator gate from the reservoir gate 419. The potential applied to the metal structure of the third metal layer 413 can be controlled to control the coupling strength between adjacent quantum charge carrier confinement regions. The confinement regions are typically in the form of potential wells, such as a potential well formed beneath an elongated channel 420 in which the mediator gate 418 is partially positioned.

[0075] This embodiment differs from that shown in FIG. 1B in that the third metal structure 403 comprises an additional extension. The third metal structure 403, which forms the mediator gate 418, comprises a first portion 421, a second portion 422, and a third portion 423. The first portion 421 is positioned in an elongated channel 420 between laterally separated metal structures 401 in the first metal layer 411. The second portion 422 and the third portion 423 of the third metal structure 403 extend substantially parallel to each other and substantially perpendicular to the first portion 421 to regions outside the device. The second and third portions 422 and 423 are first and second extensions of the mediator gate 418, respectively, and extend to regions outside the device for connection to a voltage source. Either or both of the second and third portions 422 and 423 may be connected to a voltage source. The third metal structure, mediator gate 418 in this embodiment, is "U" shaped.

[0076] 4 shows a schematic top view of a silicon-based quantum device. A first metal layer 511 comprises a first metal structure 501 and a second metal structure 502. The first and second metal structures 501, 502 are laterally separated to define an elongated channel 520 between the metal structures. In this embodiment, the elongated channel 520 has an apex 505.

[0077] The second metal layer 512 includes a source gate 514, a drain gate 516, and a mediator gate 518. The source gate 514 is an elongated metal structure and is positioned at an angle relative to the similarly structured drain gate 516. The mediator gate 518 is positioned within an elongated channel 520 and extends around an apex 505. A first region of the mediator gate 518 is angled relative to a second region of the mediator gate 518, with the first and second regions disposed within the elongated channel 520. The first region of the mediator gate 518 is axially aligned with the source gate 514 (horizontally from the perspective of FIG. 4), and the second region of the mediator gate 518 is axially aligned with the drain gate 516 (vertically from the perspective of FIG. 4). In this embodiment, the angle between the source and drain gates 514, 516 and the first and second regions of the mediator gate 518 is approximately a right angle. For example, the angle may be between 85 and 95 degrees, preferably between 89 and 91 degrees. In another embodiment, the angle may be about 45 or 135 degrees. Mediator gate 518 has a first portion 521 positioned within elongated channel 520 and a second portion 522 extending from mediator gate 518 to an outer region of the device.

[0078] The third metal layer 513 includes a first barrier gate 531 and a second barrier gate 532. The first barrier gate is positioned between the source gate 514 and the mediator gate 518. The second barrier gate is positioned between the mediator gate 518 and the drain gate 516.

[0079] This device structure allows for mediated interactions near corners, allowing two-dimensional arrays of quantum dots to be addressed within the device using planar wiring. In another embodiment, the device may include a quantum dot gate and an additional barrier gate between the mediator gate and the source and / or drain gates. Elongated quantum dots may be formed with their apexes below the mediator gate.

[0080] 5 schematically illustrates a top view of a silicon-based quantum device. A first metal layer 711 includes a plurality of metal structures that cooperate to define a first channel 724 and a second channel 725. A second metal layer 712 includes first and second quantum dot gates 705, 706, first and second source gates 714, 715, and first and second drain gates 716, 717. A third metal layer 713 includes first and second barrier gates 731, 732. The barrier gates 731, 732 are positioned substantially perpendicular to the first and second channels 724, 725, with each barrier gate positioned partially within each channel.

[0081] Thus, the first channel 724 includes a first source gate 714, a first quantum-dot gate 705, and a portion of a first drain gate 716, separated by first and second barrier gates 731, 732. The second channel 725 includes a second source gate 715, a second quantum-dot gate 706, and a portion of a second drain gate 716, similarly separated by first and second barrier gates 731, 732.

[0082] In this embodiment, one of the multiple metal structures of the first metal layer 711 forms a horizontal confinement gate 720. The horizontal confinement gate 720 provides a barrier between the first channel 724 and the second channel 725 such that the first and second channels 724, 725 can support linear arrays of quantum dots and / or mediator dots. Thus, this device structure provides a mechanism for addressing adjacent linear arrays of quantum dots using only planar wiring.

[0083] Figure 6B is a schematic diagram of the potential topography 800 along the elongated channel 820 depicted in Figure 6A. Figure 6A is a cross-sectional view of the elongated channel 820, depicting a source electrode 814, a mediator electrode 818, and a drain electrode 816 separated by a first barrier electrode 831 and a second barrier electrode 832. The source, drain, and mediator electrodes 814, 816, 818 are metal structures within a second metal layer 812. The first and second barrier electrodes 831, 832 are metal structures within a third metal layer 813. The first metal layer is disposed on each side of the elongated channel and is therefore not shown in the cross-sectional view.

[0084] Each of the metal structures 814, 831, 818, 832, 816 in the elongated channel 820 is configured to connect to a corresponding potential. These potentials define a potential energy landscape 800 along the elongated channel 820. Lateral confinement of quantum charge carriers in the elongated channel 820 is achieved using the potentials of the confinement electrodes in the first metal layer. Figure 6B depicts an exemplary potential energy landscape 800. However, the potentials of each of the metal structures 814, 831, 818, 832, 816 in the elongated channel 820 can be adjusted to modify the potential energy landscape 800 according to requirements.

[0085] The potential energy landscape 800 includes first, second, and third potential wells 841, 842, 843. The first potential well 841 is formed beneath the mediator electrode 818. The second and third potential wells 842, 843 are formed beneath the source and drain electrodes 814, 816, respectively. In this embodiment, the potentials of the source and drain electrodes 814, 816 are substantially the same and less than the potential of the mediator electrode 818. Thus, the first potential well 841 is deeper than the second and third potential wells 842, 843, and the second and third potential wells 842, 843 are of similar depth.

[0086] The number of quantum charge carriers confined within a potential well is related to the depth of the potential well. Figure 6B illustrates the uppermost energy levels 851, 852, and 853 within each of the first, second, and third potential wells 841, 842, and 843, respectively. Quantum charge carriers are illustrated as occupying the uppermost energy levels 851-853 in one possible configuration.

[0087] The potential energy landscape 800 also includes first and second barriers 844, 845 formed beneath the first and second barrier electrodes 831, 832, respectively. The first barrier 844 separates the second potential well 842 from the first potential well 841. The second barrier 845 separates the third potential well 843 from the first potential well 841. The potentials of the first and second barrier electrodes 831, 832 can be adjusted to control tunnel coupling between adjacent potential wells. Control of tunnel coupling can be used to adjust the quantum charge carrier occupancy within each potential well 841-843.

[0088] As will be appreciated, silicon-based quantum devices are disclosed along with methods for fabricating the devices. Each of the described silicon-based quantum devices includes a series of sequentially deposited metal layers. An electrically insulating layer is deposited between each of the metal layers to electrically isolate the metal layers. Each of the metal layers includes a plurality of metal structures. Each metal structure is configured to connect to a respective electrical potential. The relative arrangement of the metal structures and the electrical potential together define an electrical potential topography that can be used to manipulate quantum charge carriers, such as electrons or holes, within the device. [Explanation of symbols]

[0089] 100 silicon substrate 101 First Metal Structure 102 Second Metal Structure 103 Third Metal Structure 111 First metal layer 112 Second Metal Layer 120 elongated channel 301, 302, 303, 304 Quantum dots 305, 306, 307, 308 Quantum dot gate 313 Third Metal Layer 314 Source Gate 316 Drain Gate 318 Mediator Gate 319 Reservoir Gate 324 First Channel 325 Second Channel 331, 332, 333, 334, 335, 336, 337 Barrier Gate

Claims

1. A silicon-based quantum device, a first metal structure; a second metal structure laterally separated from the first metal structure; an elongated channel defined by a separation between the first and second metal structures; a third metal structure positioned within the elongated channel, the third metal structure comprising a source gate, a drain gate, and a mediator gate, a first region of the mediator gate being angled relative to a second region of the mediator gate, the first region of the mediator gate being axially aligned with the source gate, and the second region of the mediator gate being axially aligned with the drain gate; a fourth metal structure disposed at a first end of the third metal structure and constituting a first barrier gate; a fifth metal structure disposed at a second end of the third metal structure and constituting a second barrier gate; the first, second, third, fourth, and fifth metal structures are configured for connection to first, second, third, fourth, and fifth potentials, respectively; the first, second, third, fourth, and fifth potentials are controllable to define a potential well for confining quantum charge carriers in an elongated quantum dot beneath the elongated channel; the fourth and fifth potentials and the locations of the fourth and fifth metal structures define first and second ends, respectively, of the elongated channel; a width of the potential well is defined by the positions of the first, second, and third metal structures and their corresponding potentials, and a length of the potential well is defined by the positions of the third, fourth, and fifth metal structures and their corresponding potentials; The third potential is controllable to adjust quantum charge carrier energy levels within the potential well.

2. A device as described in claim 1, wherein the angle between the first region of the mediator gate and the source gate and the second region of the mediator gate and the drain gate is approximately a right angle.

3. A device as described in claim 1 or claim 2, wherein a first region of the elongated quantum dot is angled relative to a second region of the elongated quantum dot, the angle corresponding to the angle between the first region of the mediator gate and the second region of the mediator gate.

4. 4. The device of claim 1, wherein the first and second metal structures are disposed on a first metal layer, the third metal structure is disposed on a second metal layer, and the device further comprises an electrically insulating layer between the first metal layer and the second metal layer and stacked on the first metal layer.

5. The device of claim 4 , wherein the first metal layer and the second metal layer each comprise a plurality of laterally separated metal structures.

6. 6. The device of claim 5, wherein the second metal layer further comprises a sixth metal structure configured to connect to a sixth potential such that a reservoir of charge carriers can be supported beneath the sixth metal structure.

7. 7. The device of claim 5 or claim 6, wherein the second metal layer further comprises a seventh metal structure configured to be connected to a seventh potential, such that quantum dots can be supported below the seventh metal structure.

8. 8. The device of claim 1, wherein the third metal structure comprises a first extension, the first extension partially overlapping the first metal structure, and the first extension configured to be connected to the third potential.

9. 9. The device of claim 8, wherein the third metal structure further comprises a second extension, the second extension partially overlapping the first metal structure, and the first and / or second extensions configured to be connected to the third potential.

10. 10. A method for manufacturing a silicon-based quantum device according to any one of claims 1 to 9, said method comprising: depositing a first metal structure; depositing the second metal structure laterally separated from the first metal structure such that an elongated channel is defined by the separation between the first and second metal structures; depositing a third metal structure within the elongated channel; depositing a fourth metal structure on a first end of the third metal structure; depositing a fifth metal structure on a second end of the third metal structure; a third metal structure comprising a source gate, a drain gate, and a mediator gate, a first region of the mediator gate being angled relative to a second region of the mediator gate, the first region of the mediator gate being axially aligned with the source gate, and the second region of the mediator gate being axially aligned with the drain gate; the fourth metal structure constitutes a first barrier gate; the fifth metal structure constitutes a second barrier gate; the first, second, third, fourth, and fifth metal structures are configured for connection to first, second, third, fourth, and fifth potentials, respectively; the first, second, third, fourth, and fifth potentials are controllable to define a potential well for confining quantum charge carriers in an elongated quantum dot beneath the elongated channel; the fourth and fifth potentials and the locations of the fourth and fifth metal structures define first and second ends, respectively, of the elongated channel; a width of the potential well is defined by the positions of the first, second, and third metal structures and their corresponding potentials, and a length of the potential well is defined by the positions of the third, fourth, and fifth metal structures and their corresponding potentials; The method wherein the third potential is controllable to adjust quantum charge carrier energy levels within the potential well.

11. 11. The method of claim 10, wherein depositing the third metal structure in the elongated channel comprises depositing the first region of the mediator gate and the source gate, and the second region of the mediator gate and the drain gate substantially perpendicular to one another.

12. 12. The method of claim 10 or claim 11, wherein a first region of the elongated quantum dot is angled relative to a second region of the elongated quantum dot, the angle corresponding to the angle between the first region of the mediator gate and the second region of the mediator gate.

13. 13. The method of claim 10, wherein the first and second metal structures are deposited simultaneously as part of a first metal layer, and the third metal structure is deposited as part of a second metal layer after the deposition of the first metal layer, the method further comprising the step of depositing a first electrically insulating layer after the deposition of the first metal layer and before the deposition of the second metal layer, the first electrically insulating layer overlying the first metal layer.

14. 14. The method of claim 13, wherein the fourth and fifth metal structures are deposited simultaneously as part of a third metal layer, the method further comprising depositing a second electrically insulating layer after depositing the second metal layer and before depositing the third metal layer, the second electrically insulating layer overlying the second metal layer.

15. 10. A method of operating a silicon-based quantum device according to any one of claims 1 to 9, said method comprising: applying a first potential to a first metal structure; applying a second potential to a second metal structure, the second metal structure being laterally separated from the first metal structure such that an elongated channel is defined by the separation between the first metal structure and the second metal structure; applying a third potential to a third metal structure, the third metal structure being disposed within the elongated channel; applying a fourth potential to a fourth metal structure disposed at a first end of the third metal structure; applying a fifth potential to a fifth metal structure disposed at a second end of the third metal structure; a third metal structure comprising a source gate, a drain gate, and a mediator gate, a first region of the mediator gate being angled relative to a second region of the mediator gate, the first region of the mediator gate being axially aligned with the source gate, and the second region of the mediator gate being axially aligned with the drain gate; the fourth metal structure constitutes a first barrier gate; the fifth metal structure constitutes a second barrier gate; the first, second, third, fourth, and fifth metal structures are configured for connection to first, second, third, fourth, and fifth potentials, respectively; the first, second, third, fourth, and fifth potentials are controllable to define a potential well for confining quantum charge carriers in an elongated quantum dot beneath the elongated channel; the fourth and fifth potentials and the locations of the fourth and fifth metal structures define first and second ends, respectively, of the elongated channel; a width of the potential well is defined by the positions of the first, second, and third metal structures and their corresponding potentials, and a length of the potential well is defined by the positions of the third, fourth, and fifth metal structures and their corresponding potentials; and controlling the third potential to adjust quantum charge carrier energy levels within the potential well.

16. The method described in claim 15, wherein the angle between the first region of the mediator gate and the source gate and the second region of the mediator gate and the drain gate is approximately a right angle.

17. The method described in claim 15 or claim 16, wherein a first region of the elongated quantum dot is angled relative to a second region of the elongated quantum dot, the angle corresponding to the angle between the first region of the mediator gate and the second region of the mediator gate.

18. 18. The method of claim 15, wherein the polarity of the first and second potentials is opposite to the polarity of the third potential.

19. 19. The method of any one of claims 15 to 18, wherein the first potential is substantially the same as the second potential.

20. 20. The method of any one of claims 15 to 19, wherein the fourth potential is substantially the same as the fifth potential.

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