Electronic component, manufacturing method of electronic component, filter module and electronic device

Abstract

To provide an electronic component having an inductance with a high Q value which is in a small size and is with a capacitor, a manufacturing method of the electronic component, a filter module having the electronic component, and an electronic apparatus having them.SOLUTION: An electronic component 11 comprises: a first insulation body layer S1 in which a first conductive pattern CL11 for inductor formation and a first electrode pattern EC11 for capacitor formation are formed; and a second insulation body layer S2 in which a second conductive pattern CL12 for inductor formation and a second electrode pattern EC12 for capacitor formation are formed. By the first electrode pattern EC11 and the second conductive pattern CL12 facing each other via the second insulation body layer S2, a capacitor is constructed, and the second conductive pattern CL12 is conducted along the first conductive pattern CL11.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to an electronic component including an inductor and a capacitor, a method for manufacturing the electronic component, a filter module including the electronic component, and an electronic device including the filter module. [Background technology]

[0002] In the electronic component of Patent Document 1, a conductor layer for forming an inductor and a conductor layer for forming a capacitor are formed on the same layer, and the conductor layers for forming the inductors, which are formed on different layers, are connected in parallel. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2019-186696 Summary of the Invention [Problem to be solved by the invention]

[0004] In a structure that improves the Q value of an inductor by connecting inductors in parallel, such as the electronic component described in Patent Document 1, the volumetric efficiency of the inductor is low. Therefore, in order to obtain an inductor with a high Q value, the electronic component must be large, and in electronic components with limited external size, the effect of improving the Q value of the inductor is low.

[0005] Therefore, an object of the present invention is to provide a small electronic component that includes a capacitor and an inductor with a high Q value, a method for manufacturing this electronic component, a filter module that includes this electronic component, and an electronic device that includes this electronic component. [Means for solving the problem]

[0006] (A) An electronic component as an example of the present disclosure includes a first insulator layer on which a first conductor pattern for forming an inductor and a first electrode pattern for forming a capacitor are formed, and a second insulator layer on which a second conductor pattern for forming the inductor and a second electrode pattern for forming the capacitor are formed, wherein the first electrode pattern and the second electrode pattern face each other via the second insulator layer to form a capacitor, and the second conductor pattern is electrically connected along the first conductor pattern.

[0007] According to the above configuration, the second conductor pattern is electrically connected along the first conductor pattern, resulting in a high occupancy rate of the inductor-forming conductor per unit volume. This results in an inductor with a high Q value. Furthermore, the first and second electrode patterns for forming the capacitor face each other via a single insulating layer, preventing a decrease in the occupancy rate of the capacitor-forming electrode per unit volume.

[0008] (B) A method for manufacturing an electronic component as an example of the present invention is characterized by comprising the steps of: simultaneously forming a first conductor pattern for forming an inductor and a first electrode pattern for forming a capacitor on a first insulator layer; forming a second insulator layer on the surface of the first insulator layer on which the first conductor pattern is formed, the second insulator layer having an opening above the first conductor pattern; forming a second conductor pattern for forming the inductor in the opening and on the second insulator layer, and forming a second electrode pattern for forming the capacitor in a position opposite the first electrode pattern with the second insulator layer interposed therebetween.

[0009] According to the above manufacturing method, the second electrode pattern and the second conductor pattern can be formed simultaneously on the second insulating layer and in the opening, so that the electronic component can be manufactured with a reduced number of steps.

[0010] (C) A filter module as an example of the present disclosure is configured to include the electronic component according to (A) and an inductor or capacitor connected to the inductor or capacitor of the electronic component.

[0011] (D) An electronic device as an example of the present disclosure includes the electronic component described in (A) or the filter module described in (C). [Effects of the Invention]

[0012] According to the present invention, it is possible to obtain a small electronic component that includes a capacitor and an inductor with a high Q value, a method for manufacturing the electronic component, a filter module including the electronic component, and an electronic device including the filter module. [Brief explanation of the drawings]

[0013] [Figure 1] FIG. 1 is an exploded plan view of an electronic component 11 according to a first preferred embodiment. [Figure 2] 2A is a plan view of the electronic component 11, FIG. 2B is a cross-sectional view of the XX portion in FIG. 2A, and FIG. 2C is a cross-sectional view of the YY portion in FIG. 2A. [Figure 3] FIG. 3 is a circuit diagram of the electronic component 11. [Figure 4] FIG. 4 is a circuit diagram of the filter module according to the first embodiment. [Figure 5] 5(A), 5(B), and 5(C) are cross-sectional views at various stages in the process of forming the first conductor pattern and the first electrode pattern. [Figure 6] 6(A), 6(B), and 6(C) are cross-sectional views at various stages in the process of forming the second insulating layer S2. [Figure 7] Figures 7(A), 7(B), 7(C), and 7(D) are cross-sectional views at each stage in the process of forming the first conductor pattern, the second conductor pattern, the first electrode pattern, the second electrode pattern, and the third insulator layer. [Figure 8] 8(A), 8(B), and 8(C) are cross-sectional views of an electronic component when the line widths of the first conductor pattern LC11 and the second conductor pattern CL12 are made equal. [Figure 9] 9A and 9B are cross-sectional views showing examples of the positional relationship between the first conductor pattern CL11 and the second conductor pattern CL12. [Figure 10] FIG. 10 is an exploded plan view of an electronic component 12A according to the second preferred embodiment. [Figure 11] FIG. 11(A) is a plan view of the electronic component 12A, and FIG. 11(B) is a cross-sectional view of the XX portion in FIG. 11(A). [Figure 12] FIG. 12 is an exploded plan view of another electronic component 12B according to the second preferred embodiment. [Figure 13] FIG. 13(A) is a plan view of the electronic component 12B, and FIG. 13(B) is a cross-sectional view of the XX portion in FIG. 13(A). [Figure 14] FIG. 14 is a perspective view of a filter module 13 according to the third embodiment. [Figure 15] FIG. 15 is an exploded plan view showing the insulator layers of the filter module 13 and the conductor patterns formed thereon. [Figure 16] FIG. 16 is a circuit diagram of the filter module 13. [Figure 17] FIG. 17 is an exploded plan view showing the insulator layers and the conductor patterns formed thereon of another filter module according to the third preferred embodiment. [Figure 18] FIG. 18 is an exploded plan view showing the insulating layers and the conductor patterns formed thereon of another filter module according to the third preferred embodiment. [Figure 19] 19(A), 19(B), 19(C), 19(D), and 19(E) are diagrams schematically showing the junction structure of a plurality of conductor patterns and via conductors V for forming an inductor. [Figure 20] FIG. 20 is a block diagram showing the configuration of an electronic device 201 according to the fifth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0014] Hereinafter, several specific examples will be given with reference to the drawings to illustrate several embodiments for carrying out the present invention. The same reference numerals are used for the same parts in each drawing. For the sake of convenience, the embodiments are shown divided into several embodiments, taking into account ease of explanation and understanding of the main points, but partial substitution or combination of the configurations shown in different embodiments is possible. From the second embodiment onwards, a description of matters common to the first embodiment will be omitted, and only the differences will be described. In particular, similar effects resulting from similar configurations will not be mentioned in each embodiment.

[0015] First Embodiment Fig. 1 is an exploded plan view of an electronic component 11 according to a first embodiment. Fig. 2(A) is a plan view of the electronic component 11, Fig. 2(B) is a cross-sectional view of the XX portion in Fig. 2(A), and Fig. 2(C) is a cross-sectional view of the YY portion in Fig. 2(A).

[0016] This electronic component 11 includes a first insulator layer S1, a second insulator layer S2, and a third insulator layer S3. Terminal electrodes are formed on the lower surface of the first insulator layer S1. A first conductor pattern CL11 for forming an inductor and a first electrode pattern EC11 for forming a capacitor are formed on the upper surface of the first insulator layer S1. A second conductor pattern CL12 for forming an inductor and a second electrode pattern EC12 for forming a capacitor are formed on the upper surface of the second insulator layer S2. The second conductor pattern CL12 is also formed inside the second insulator layer S2. That is, the second conductor pattern CL12 has a portion formed on the upper surface of the second insulator layer S2 and a portion formed inside the second insulator layer S2. A third insulator layer S3 is formed on the upper surface of the second insulator layer S2, covering the second insulator layer S2, the second conductor pattern CL12, and the second electrode pattern EC12.

[0017] The first electrode pattern EC11 and the second electrode pattern EC12 face each other with the second insulator layer S2 interposed therebetween. With this structure, the first electrode pattern EC11, the second electrode pattern EC12, and the second insulator layer S2 form a capacitor.

[0018] The second conductor pattern CL12 formed on the second insulator layer S2 has a shape that is continuous along the first conductor pattern CL11. In this embodiment, the second conductor pattern CL12 is conductively connected to the first conductor pattern CL11 in the thickness direction of the second insulator layer S2 over the entire length of its extending shape (see FIGS. 2B and 2C). In other words, the portion of the second conductor pattern CL12 formed inside the second insulator layer S2 is connected to the first conductor pattern CL11 over the entire length of its extending shape in a plan view of the second conductor pattern CL12. With this structure, an inductor is formed by the first conductor pattern CL11 and the second conductor pattern CL12. In this way, by forming the first conductor pattern CL11 and the second conductor pattern CL12 so as to be conductively connected in the thickness direction of the second insulator layer S2, the thickness of the electrodes that form the inductor can be increased. This increases the surface area of ​​the electrodes, reducing the increase in high frequency resistance due to the skin effect when a high frequency signal propagates through the electrodes that make up the inductor, and increasing the Q value of the inductor. In this embodiment, the first conductor pattern CL11 and the second conductor pattern CL12 are conductively connected over almost the entire length of the shape of each pattern extending in a plan view, but it is sufficient that at least a portion of each pattern is conductively connected.

[0019] 3 is a circuit diagram of the electronic component 11. This electronic component 11 includes the inductor L1 and the capacitor C1.

[0020] 4 is a circuit diagram of a filter module according to a first embodiment. This filter module includes terminals T1 and T2 that form input / output ports between the module and ground. The filter circuit section includes inductors L1 and L2 and capacitors C1, C2, and C3.

[0021] 1 to 3 and an inductor L2 or capacitors C2 and C3 connected to the inductor L1 or capacitor C1 of the electronic component, the filter module can be configured. The inductor L2 and the capacitors C2 and C3 can be formed in the same manner on the multiple insulator layers on which the inductor L1 and the capacitor C1 are formed.

[0022] Next, an example of a method for manufacturing the electronic component 11 will be described. Figures 5(A), 5(B), and 5(C) are cross-sectional views at each stage in the process of forming the first conductor pattern and the first electrode pattern.

[0023] First, as shown in FIG. 5(A), a photosensitive conductive paste is screen-printed on the upper surface of the first insulating layer S1 and then dried to form a film PP of the photosensitive conductive paste.

[0024] Next, as shown in FIG. 5(B), UV light is irradiated onto the photosensitive conductive paste film PP through a photomask PM.

[0025] Thereafter, the photosensitive conductive paste film PP is developed and sintered to form the first conductor pattern CL11 and the first electrode pattern EC11, as shown in FIG. 5(C).

[0026] 6(A), 6(B), and 6(C) are cross-sectional views at various stages in the process of forming the second insulating layer S2.

[0027] First, as shown in FIG. 6(A), a photosensitive insulating paste is screen-printed on the upper surface of the first insulating layer S1 and then dried to form a film S2P of the photosensitive insulating paste.

[0028] Next, as shown in FIG. 6(B), UV light is irradiated onto the photosensitive insulating paste film S2P through a photomask PM.

[0029] Thereafter, the photosensitive insulating paste film S2P is developed and sintered to form a second insulating layer S2 having an opening AP as shown in FIG. 6(C).

[0030] Figures 7(A), 7(B), 7(C), and 7(D) are cross-sectional views at each stage in the process of forming the first conductor pattern, the second conductor pattern, the first electrode pattern, the second electrode pattern, and the third insulator layer.

[0031] First, as shown in FIG. 7(A), a photosensitive conductive paste is screen-printed on the upper surface of the second insulating layer S2 and then dried to form a film PP of the photosensitive conductive paste.

[0032] Next, as shown in FIG. 7(B), UV light is irradiated onto the photosensitive conductive paste film PP through a photomask PM.

[0033] Thereafter, the photosensitive conductive paste film PP is developed and sintered to form the second conductor pattern CL12 and the second electrode pattern EC12, as shown in FIG. 7(C).

[0034] Finally, as shown in FIG. 7(D), a third insulator layer S3 is formed on the upper surface of the second insulator layer S2.

[0035] According to the method for manufacturing an electronic component described above, the second conductor pattern CL12 can be formed simultaneously with the second electrode pattern EC12 on the second insulator layer S2 and in the opening AP, so that the electronic component can be manufactured with a reduced number of steps.

[0036] Although the manufacturing method using a photomask has been described above, the electronic component of the present invention is not limited to this manufacturing method. For example, the electronic component may be manufactured by a method of laminating insulating sheets using a process of forming an electrode pattern by screen printing or a process of drilling holes in an insulating layer with a laser and filling them with via electrodes.

[0037] Next, several modified examples of the overlapping state of the first conductor pattern CL11 and the second conductor pattern CL12 will be shown.

[0038] 8(A), 8(B), and 8(C) are cross-sectional views of an electronic component when the line widths of the first conductor pattern LC11 and the second conductor pattern CL12 are equal. The positions of these cross-sections are the same as those shown in FIG. 2(C). As shown in FIG. 8(A), it is preferable that the line widths of the first conductor pattern CL11 and the second conductor pattern CL12 are equal and that they entirely overlap in a plan view. However, depending on the accuracy of the formation of the conductor patterns on each layer, as shown in FIGS. 8(B) and 8(C), the second conductor pattern CL12 may extend beyond the line width of the first conductor pattern CL11. As such, if the conductor patterns have irregularities at the inner and outer edges of the loop, the current density becomes non-uniform, resulting in increased conductor loss in areas with high current density.

[0039] 2(B) and 2(C), the first conductor pattern CL11 and the second conductor pattern CL12 are loop-shaped or have a shape that forms part of a loop. In a plan view seen from the stacking direction of the first conductor pattern CL11 and the second conductor pattern CL12, the conductor pattern of the second conductor pattern CL12 formed within the second insulator layer S2 is positioned more inward than the line width (both ends in the width direction) of the conductor pattern of the second conductor pattern CL12 formed on the upper surface of the second insulator layer S2 and the line width (both ends in the width direction) of the first conductor pattern CL11. In this way, the line width of the conductor pattern of the second conductor pattern CL12 formed within the second insulator layer S2 is set to be narrower than the line width of the conductor pattern of the second conductor pattern CL12 formed on the upper surface of the second insulator layer S2 and the line width of the first conductor pattern CL11. This makes it possible to prevent the conductor pattern of the second conductor pattern CL12 formed within the second insulator layer S2 from protruding toward the opening of the loop.

[0040] 9(A) and 9(B) are cross-sectional views showing examples of the positional relationship between the first conductor pattern CL11 and the second conductor pattern CL12. The cross-sectional positions are the same as the cross-sectional position shown in FIG. 2(C).

[0041] In both the electronic components shown in Fig. 9(A) and Fig. 9(B), the line width of the conductor pattern of the second conductor pattern CL12 formed within the second insulator layer S2 is narrower than the line width of the conductor pattern of the second conductor pattern CL12 formed on the upper surface of the second insulator layer S2 and the line width of the first conductor pattern CL11. In the example shown in Fig. 9(A), the inner edges of the loop in a plan view seen from the stacking direction of the first conductor pattern CL11 and the second conductor pattern CL12 are at the same position in the first conductor pattern CL11 and the second conductor pattern CL12. That is, the inner peripheries of the first conductor pattern CL11 and the second conductor pattern CL12 are aligned. In the example shown in Fig. 9(B), the outer edges of the loop in a plan view are at the same position in the first conductor pattern CL11 and the second conductor pattern CL12. That is, the outer peripheries of the first conductor pattern CL11 and the second conductor pattern CL12 are aligned.

[0042] The current density is higher on the inner periphery of the first conductor pattern CL11 and the second conductor pattern CL12 that make up the inductor due to the proximity effect, so it is preferable that the conductor patterns CL11 and CL12 protrude less in the direction of the opening of the loop, as shown in Figure 9(A).

[0043] Second Embodiment In the second embodiment, an electronic component including a plurality of first conductor patterns, a plurality of second conductor patterns, and three or more first electrode patterns or second electrode patterns will be exemplified.

[0044] Fig. 10 is an exploded plan view of an electronic component 12A according to the second preferred embodiment. Fig. 11(A) is a plan view of the electronic component 12A, and Fig. 11(B) is a cross-sectional view of part XX in Fig. 11(A).

[0045] This electronic component 12A includes insulator layers Sa, Sb, Sc, and Sd. A terminal electrode is formed on the lower surface of the insulator layer Sa. A conductor pattern CL1a and an electrode pattern EC1a are formed on the upper surface of the insulator layer Sa. A conductor pattern CL1b and an electrode pattern EC1b are formed on the upper surface of the insulator layer Sb. A conductor pattern CL1b is also formed inside the insulator layer Sb. That is, the conductor pattern CL1b has a portion formed on the upper surface of the insulator layer Sb and a portion formed inside the insulator layer Sb. A conductor pattern CL1c and an electrode pattern EC1c are formed on the upper surface of the insulator layer Sc. A conductor pattern CL1c is also formed inside the insulator layer Sc. That is, the conductor pattern CL1c has a portion formed on the upper surface of the insulator layer Sc and a portion formed inside the insulator layer Sc. An insulator layer Sd is formed on the upper surface of the insulator layer Sc, covering the insulator layer Sc, the conductor pattern CL1c, and the electrode pattern EC1c.

[0046] This electronic component 12A includes insulator layers Sa, Sb, Sc, and Sd. A terminal electrode is formed on the lower surface of the insulator layer Sa. A conductor pattern CL1a and an electrode pattern EC1a are formed on the upper surface of the insulator layer Sa. A conductor pattern CL1b and an electrode pattern EC1b are formed on the upper surface of the insulator layer Sb. A conductor pattern CL1c is formed inside the insulator layer Sb. A conductor pattern CL1c and an electrode pattern EC1c are formed on the upper surface of the insulator layer Sc. A conductor pattern CL1c is formed inside the insulator layer Sc. An insulator layer Sd is formed on the upper surface of the insulator layer Sc, covering the insulator layer Sc, the conductor pattern CL1c, and the electrode pattern EC1c.

[0047] In the pair of conductor patterns CL1a and CL1b, conductor pattern CL1a corresponds to the first conductor pattern, conductor pattern CL1b corresponds to the second conductor pattern, insulator layer Sa corresponds to the first insulator layer, insulator layer Sb corresponds to the second insulator layer, and insulator layer Sc corresponds to the third insulator layer. Also, in the pair of conductor patterns CL1b and CL1c, conductor pattern CL1b corresponds to the first conductor pattern, conductor pattern CL1c corresponds to the second conductor pattern, insulator layer Sb corresponds to the first insulator layer, insulator layer Sc corresponds to the second insulator layer, and insulator layer Sd corresponds to the third insulator layer.

[0048] In the pair of electrode patterns EC1a and EC1b, the electrode pattern EC1a corresponds to the first electrode pattern and the electrode pattern EC1b corresponds to the second electrode pattern. In the pair of electrode patterns EC1b and EC1c, the electrode pattern EC1b corresponds to the first electrode pattern and the electrode pattern EC1c corresponds to the second electrode pattern.

[0049] The conductor pattern CL1b is continuous along the conductor pattern CL1a, and the conductor pattern CL1c is continuous along the conductor pattern CL1b. The portion of the conductor pattern CL1b formed inside the insulator layer Sb is connected to the conductor pattern CL1a over the entire length of the shape of the conductor pattern CL1b when viewed from above. The portion of the conductor pattern CL1c formed inside the insulator layer Sc is connected to the conductor pattern CL1b over the entire length of the shape of the conductor pattern CL1c when viewed from above. The conductor patterns CL1a, CL1b, and CL1c form an inductor. The electrode patterns EC1a, EC1b, and EC1c and the insulator layers Sb and Sc form a capacitor.

[0050] Fig. 12 is an exploded plan view of another electronic component 12B according to the second preferred embodiment. Fig. 13(A) is a plan view of the electronic component 12B, and Fig. 13(B) is a cross-sectional view of the XX portion in Fig. 13(A).

[0051] This electronic component 12B includes insulator layers Sa, Sb, Sc, Sd, and Se. A terminal electrode is formed on the lower surface of the insulator layer Sa. A conductor pattern CL1a and an electrode pattern EC1a are formed on the upper surface of the insulator layer Sa. An electrode pattern EC1b is formed on the upper surface of the insulator layer Sb. A conductor pattern CL1b is formed on the upper surface of the insulator layer Sb and inside the insulator layer Sb. A conductor pattern CL1c and an electrode pattern EC1c are formed on the upper surface of the insulator layer Sc. A via conductor V is formed inside the insulator layer Sc, connecting the end of the conductor pattern CL1b to the end of the conductor pattern CL1c. An electrode pattern EC1d is formed on the upper surface of the insulator layer Sd. A conductor pattern CL1d is formed on the upper surface of the insulator layer Sd and inside the insulator layer Sd. An insulator layer Se is formed on the upper surface of the insulator layer Sd, covering the insulator layer Sd, the conductor pattern CL1d, and the electrode pattern EC1d.

[0052] In the pair of conductor patterns CL1a and CL1b, conductor pattern CL1a corresponds to the first conductor pattern, conductor pattern CL1b corresponds to the second conductor pattern, insulator layer Sa corresponds to the first insulator layer, insulator layer Sb corresponds to the second insulator layer, and insulator layer Sc corresponds to the third insulator layer. Also, in the pair of conductor patterns CL1c and CL1d, conductor pattern CL1c corresponds to the first conductor pattern, conductor pattern CL1d corresponds to the second conductor pattern, insulator layer Sc corresponds to the first insulator layer, insulator layer Sd corresponds to the second insulator layer, and insulator layer Se corresponds to the third insulator layer.

[0053] In the pair of electrode patterns EC1a and EC1b, the electrode pattern EC1a corresponds to the first electrode pattern, and the electrode pattern EC1b corresponds to the second electrode pattern. In the pair of electrode patterns EC1c and EC1d, the electrode pattern EC1c corresponds to the first electrode pattern, and the electrode pattern EC1d corresponds to the second electrode pattern.

[0054] The conductor pattern CL1b is continuous along the conductor pattern CL1a, and the conductor pattern CL1d is continuous along the conductor pattern CL1c. The portion of the conductor pattern CL1b formed inside the insulator layer Sb is connected to the conductor pattern CL1a over the entire length of the shape of the conductor pattern CL1b when viewed from above. The portion of the conductor pattern CL1d formed inside the insulator layer Sd is connected to the conductor pattern CL1c over the entire length of the shape of the conductor pattern CL1d when viewed from above. The conductor patterns CL1a, CL1b, CL1c, and CL1d form an inductor. The electrode patterns EC1a, EC1b, EC1c, and EC1d and the insulator layers Sb, Sc, and Sd form a capacitor.

[0055] Third Embodiment In the third embodiment, a filter module will be illustrated.

[0056] Fig. 14 is a perspective view of a filter module 13 according to a third embodiment. Fig. 15 is an exploded plan view showing the insulator layers of the filter module 13 and the conductor patterns formed thereon. Fig. 16 is a circuit diagram of the filter module 13.

[0057] 16, the filter module 13 is composed of capacitors C1 and C2 and inductors L2 and Lg. The values ​​of each element are, for example, as follows:

[0058] C1: 0.56pF C2: 0.75pF Lg:0.9nH L2: 1.2nH Coupling coefficient between inductors Lg and L2: 0.32 14 and 15, the filter module 13 includes a rectangular parallelepiped laminate 1 formed by laminating a plurality of rectangular insulating layers S1 to S17. A first terminal electrode ET1, a second terminal electrode ET2, a ground terminal electrode (a terminal hidden at the rear in FIG. 14), and a floating terminal electrode ENC for interlayer connection of the internal electrodes are formed on the outer surface of the laminate 1, for example, by plating.

[0059] Inductor L2 is composed of a conductor pattern CL2 formed on a laminate 1 of multiple insulating layers, and inductor Lg is composed of a conductor pattern CLg formed on a laminate 1 of multiple insulating layers.

[0060] Capacitor C1 is composed of electrode patterns EC1 that face each other in the stacking direction of the insulating layers and an insulating layer sandwiched between these electrode patterns EC1, while capacitor C2 is composed of electrode patterns EC2 that face each other in the stacking direction of the insulating layers and an insulating layer sandwiched between these electrode patterns.

[0061] The conductor pattern CL2 is composed of conductor patterns CL2a, CL2b, CL2c, and CL2d shown in FIG. 15. The conductor pattern CLg is composed of conductor patterns CLga, CLgb, CLgc, and CLgd shown in FIG. 15. The electrode pattern EC1 is composed of electrode patterns EC1a, EC1b, EC1c, EC1d, and EC1e shown in FIG. 15. The electrode pattern EC2 is composed of electrode patterns EC2a, EC2b, EC2c, EC2d, EC2e, and EC2f shown in FIG. 15. Terminals T1, T2, GND, and NC are formed on the lower surface of the first insulator layer S1. Here, the terminals T1, T2, GND, and NC may be formed on the insulator layer S1 in advance, or may be formed after multiple insulator layers are stacked. In addition, although the present embodiment shows an example of stacking the insulator layers S1 to S17 in order, the order may be reversed, starting with the insulator layer S17 on which the terminals T1, T2, GND, and NC are not formed, and stacking up to the insulator layer S1 in order.

[0062] The inductor-forming conductor pattern CL2b has a shape that is continuous along the conductor pattern CL2a. The portion of the conductor pattern CL2b formed inside the insulator layer S5 is connected to the conductor pattern CL2a over the entire length of the shape of the conductor pattern CL2b extending in a planar view. Similarly, the conductor pattern CL2d has a shape that is continuous along the conductor pattern CL2c. The portion of the conductor pattern CL2d formed inside the insulator layer S7 is connected to the conductor pattern CL2c over the entire length of the shape of the conductor pattern CL2d extending in a planar view. The conductor pattern CLgd has a shape that is continuous along the conductor pattern CLgc. The portion of the conductor pattern CLgd formed inside the insulator layer S17 is connected to the conductor pattern CLgc over the entire length of the shape of the conductor pattern CLgd extending in a planar view. The conductor pattern CLgb has a shape that is continuous along the conductor pattern CLga. The portion of the conductor pattern CLgb that is formed inside the insulating layer S14 is connected to the conductor pattern CLga over the entire length of the shape of the conductor pattern CLgb that extends in a plan view.

[0063] One end of the conductor patterns CL2a, CL2b is connected to one end of the conductor patterns CL2c, CL2d via a via conductor V. Also, one end of the conductor patterns CLga, CLgb is connected to one end of the conductor patterns CLgc, CLgd via a via conductor V.

[0064] 17 and 18 are exploded plan views showing the insulator layers and the conductor patterns formed thereon of another filter module according to the third preferred embodiment.

[0065] The filter module shown in Figure 17 differs from Figure 15 in the shapes of the conductor patterns CL2a and CL2b formed on the insulator layers S4 and S5, the shape of the conductor pattern CLgd formed on the insulator layer S17, and the shape of the electrode pattern EC1d formed on the insulator layer S13.

[0066] 17, the conductor pattern CL2a is longer than the conductor pattern CL2b. This structure smooths the change in the conductor film thickness in the lamination direction of the conductor patterns CL2a and CL2b, thereby mitigating the concentration of current flowing through the inductor L2.

[0067] 17, the end of the conductor pattern CLgd formed on the insulator layer S17 is connected to the conductor portion at the corner that is electrically connected to the terminal GND. This structure makes the conductor thickness of the entire conductor patterns CLgc and CLgd uniform all the way to the end, mitigating the concentration of current flowing through the inductor Lg.

[0068] 17, the end of electrode pattern EC1d is connected to the conductor portion at the corner that is electrically connected to terminal NC, similar to electrode pattern EC1c. This structure makes it possible to smooth the change in the conductor film thickness in the lamination direction of electrode patterns EC1c and EC1d that make up capacitor C1, thereby mitigating local current concentration and effectively improving the Q value of the inductor.

[0069] Compared to FIG. 17, the filter module shown in FIG. 18 differs in the shape of the via conductor V formed in the insulator layer S6, the shape of the conductor patterns CL2c and CL2d formed in the insulator layers S6 and S7, the shape of the conductor patterns CLga and CLgb formed in the insulator layers S13 and S14, the shape of the via conductor V formed in the insulator layer S15, and the shape of the conductor patterns CLgc and CLgd formed in the insulator layers S16 and S17.

[0070] 18, the conductor patterns CL2c and CL2d are gradually longer in that order. Furthermore, via conductor V connecting conductor patterns CL2b and CL2c extends so as to connect conductor patterns CL2b and CL2c along the layers. This structure smooths the change in conductor film thickness in the stacking direction of conductor patterns CL2b, CL2c, and CL2d, further mitigating the concentration of current flowing through inductor L2.

[0071] 18, the conductor patterns CLga and CLgb are gradually longer in that order. Similarly, the conductor patterns CLgc and CLgd are gradually shorter in that order. Furthermore, via conductors V connecting the conductor patterns CLgb and CLgc extend so as to connect the conductor patterns CLgb and CLgc along the layers. This structure smooths the change in conductor film thickness in the stacking direction of the conductor patterns CLga, CLgb, CLgc, and CLgd, thereby mitigating the concentration of current flowing through the inductor Lg.

[0072] Fourth Embodiment In the fourth embodiment, a structure in which a plurality of conductor patterns are joined in the stacking direction will be illustrated.

[0073] 19(A) is a diagram schematically illustrating the junction structure of the conductor patterns CLga, CLgb, CLgc, and CLgd for forming an inductor and the via conductor V, as viewed from a direction perpendicular to the lamination direction. The insulating layers are not shown. These conductor patterns and via conductors correspond to the junction structure of the conductor patterns CLga, CLgb, conductor patterns CLgc, CLgd, and via conductor V in FIG. 15.

[0074] As shown in FIG. 19(A), if the conductor patterns are not connected in part in the lamination direction, the inductance of the inductor can be easily finely adjusted by adjusting the length of the unconnected part.

[0075] 19(B) is a cross-sectional view of the conductor patterns CLga, CLgb, CLgc, and CLgd for forming the inductor and the via conductor V. The insulating layer is not shown. These conductor patterns and via conductors correspond to the junction structure of the conductor patterns CLga, CLgb, conductor patterns CLgc, CLgd, and via conductor V in FIG.

[0076] As shown in Figure 19(B), by making the conductor pattern CLgb conductive to almost the entire conductor pattern CLga and by making the conductor pattern CLgd conductive to almost the entire conductor pattern CLgc, the equivalent series resistance of the inductor can be reduced and an inductor with a high Q value can be obtained.

[0077] 19(C) is a cross-sectional view of the conductor patterns CL2a, CL2b, CL2c, and CL2d for forming the inductor and the via conductor V. The insulating layer is not shown. These conductor patterns and via conductor correspond to the junction structure of the conductor patterns CL2a and CL2b, the conductor patterns CL2c and CL2d, and the via conductor V in FIG.

[0078] As shown in FIG. 19(C), the change in the number of layers in the lamination direction of the conductor pattern becomes gentler, local current concentration is alleviated, and the Q value of the inductor can be effectively improved.

[0079] 19(D) is a cross-sectional view of the conductor patterns CLga, CLgb, CLgc, and CLgd for forming the inductor and the via conductor V. The insulating layer is not shown. These conductor patterns and via conductors correspond to the junction structure of the conductor patterns CLga, CLgb, conductor patterns CLgc, CLgd, and via conductor V in FIG.

[0080] As shown in FIG. 19(D), by connecting the conductor patterns CLga, CLgb and the conductor patterns CLgc, CLgd over a long distance through via conductors V, the inductance of the inductor Lg can be easily finely adjusted.

[0081] Fig. 19(E) is a cross-sectional view of the conductor patterns CL2a, CL2b, CL2c, and CL2d for forming the inductor and the via conductor V. The insulating layer is not shown. Compared to Fig. 19(C), the joint length of the conductor patterns CL2b and CL2c and the via conductor V is shorter, and the conductor patterns are configured so that they do not overlap in three or more layers.

[0082] As shown in Figure 19(E), by avoiding areas where the number of layers of conductive patterns is locally high, structural defects such as cracks that occur due to the way the insulator and conductive patterns shrink during firing can be suppressed.

[0083] Fifth Embodiment In the fifth embodiment, an electronic device including the filter module described above will be exemplified.

[0084] FIG. 20 is a block diagram showing the configuration of an electronic device 201 according to a fifth embodiment. The electronic device 201 is, for example, a smartphone or a mobile phone. The electronic device 201 includes a duplexer 53, an antenna 54, a control circuit 50, an interface and memory 51, and a frequency synthesizer 52. The transmission system includes a transmitter 61, a transmission signal processing circuit 62, a transmission mixer 63, a transmission filter 64, and a power amplifier 65. The reception system includes a low-noise amplifier 71, a reception filter 72, a reception mixer 73, a reception signal processing circuit 74, and a receiver 75. A transmission signal output from the power amplifier 65 is output to the antenna 54 via the duplexer 53. A signal received by the antenna 54 is amplified by the low-noise amplifier 71 via the duplexer 53. In the case of data communication rather than telephone conversation, the control circuit 50 processes the received signal.

[0085] The filter module of the present invention can be applied to the transmit filter 64 and the receive filter 72. Also, the filter module of the present invention can be applied to the high-frequency side filter of the duplexer 53.

[0086] Furthermore, when filters are provided before and after the power amplifier 65, before and after the low noise amplifier 71, before and after the transmitting mixer 63, before and after the receiving mixer 73, etc., the filter module of the present invention can be applied to these filters.

[0087] Finally, the present invention is not limited to the above-described embodiments. Those skilled in the art can make appropriate modifications and variations. The scope of the present invention is defined not by the above-described embodiments but by the claims. Furthermore, the scope of the present invention includes modifications and variations from the embodiments within the scope of the claims and their equivalents.

[0088] For example, Figure 1 shows an example in which the second conductor pattern CL12 is formed on the insulator layer S2, penetrating the insulator layer S2 and providing continuous conduction along the first conductor pattern CL11, but the second conductor pattern CL12 may also be formed discontinuously at multiple locations along the first conductor pattern CL11. [Explanation of symbols]

[0089] AP:Aperture C1, C2, C3...capacitors CL11...First conductor pattern CL12...Second conductor pattern CL1a, CL1b, CL1c, CL1d...Conductor patterns CL2, CL2a, CL2b, CL2c, CL2d...Conductor patterns CLg, CLga, CLgb, CLgc, CLgd...Conductor patterns EC11...First electrode pattern EC12: Second electrode pattern EC1, EC1a, EC1b, EC1c, EC1d, EC1e...electrode pattern EC2, EC2a, EC2b, EC2c, EC2d, EC2e, EC2f...electrode pattern ENC: Floating terminal electrode ET1...1st terminal electrode ET2…Second terminal electrode L1, L2, Lg...inductors LC11...First conductor pattern PM...Photomask PP...Photosensitive conductive paste film S1: First insulating layer S14, S15, S16, S17...insulating layers S2: Second insulating layer S2P...Photosensitive insulating paste film S3: Third insulating layer S4,S5,S6,S7...Insulator layer Sa, Sb, Sc, Sd, Se...insulating layer T1, T2, GND, NC... terminals V...Via conductor 1...Laminate 11...Electronic components 12A, 12B...Electronic components 13...Filter module 50...Control circuit 51...Memory 52...Frequency synthesizer 53...Duplexer 54...Antenna 61...Telephone 62...Transmission signal processing circuit 63...Transmit mixer 64...Transmission filter 65...Power amplifier 71...Low noise amplifier 72...Receive filter 73...Receive mixer 74...Received signal processing circuit 75...Receiver 201…Electronic equipment

Claims

1. a first insulating layer on which a first conductor pattern for forming an inductor and a first electrode pattern for forming a capacitor are formed; a second insulating layer on which a second conductor pattern for forming the inductor and a second electrode pattern for forming the capacitor are formed; Equipped with a capacitor is formed by the first electrode pattern and the second electrode pattern facing each other via the second insulating layer; the second conductor pattern is directly connected to the first conductor pattern and is at least partially conductive along the first conductor pattern; a line width of the second conductor pattern formed in the second insulating layer is narrower than a line width of the second conductor pattern formed on an upper surface of the second insulating layer and a line width of the first conductor pattern; the first conductor pattern and the second conductor pattern have a loop shape or a shape that forms part of a loop, and inner edges of the loop are located at the same positions in a plan view seen from a stacking direction of the first conductor pattern and the second conductor pattern. Electronic components.

2. the first conductor pattern and the first electrode pattern are simultaneously formed in a first pattern forming step, the second conductor pattern and the second electrode pattern are simultaneously formed in a second pattern forming step; The electronic component according to claim 1 .

3. the second insulating layer has an opening at least in a part directly above the first conductor pattern, and the second electrode pattern is formed in the opening; The electronic component according to claim 1 or 2.

4. a step of simultaneously forming a first conductor pattern for forming an inductor and a first electrode pattern for forming a capacitor on a first insulating layer; forming a second insulator layer on the surface of the first insulator layer on which the first conductor pattern is formed, the second insulator layer having an opening above the first conductor pattern; forming a second conductor pattern for forming the inductor in the opening and on the second insulating layer, and forming a second electrode pattern for forming the capacitor at a position facing the first electrode pattern with the second insulating layer interposed therebetween; Equipped with the second conductor pattern is directly connected to the first conductor pattern and is at least partially conductive along the first conductor pattern; a line width of the second conductor pattern formed in the second insulating layer is narrower than a line width of the second conductor pattern formed on an upper surface of the second insulating layer and a line width of the first conductor pattern; the first conductor pattern and the second conductor pattern have a loop shape or a shape that forms part of a loop, and inner edges of the loop are located at the same positions in a plan view seen from a stacking direction of the first conductor pattern and the second conductor pattern. Manufacturing methods for electronic components.

5. An electronic component comprising: an inductor or a capacitor connected to the electronic component; Filter module.

6. An electronic device comprising the electronic component according to any one of claims 1 to 3 or the filter module according to claim 5.

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