Semiconductor device, secondary battery system

Abstract

To provide a novel semiconductor device which is improved in convenience or reliability.SOLUTION: A semiconductor device comprises a detection section, a first storage section, a second storage section, and a determination section. The detection section supplies a detection signal, the first storage section holds the detection signal, and the second storage section holds standard data and allowable difference information. The determination section compares the detection signal with the standard data and in a case where there is deviation exceeding the allowable difference information between the detection signal and the standard data, the determination section supplies a control signal.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One embodiment of the present invention relates to an object, a method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, a manufacture, or a composition of matter. Another embodiment of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a lighting device, or an electronic device. Another embodiment of the present invention relates to a charging control method for a power storage device. Another embodiment of the present invention relates to a charging device.

[0002] In this specification, the term "power storage device" (also referred to as "battery" or "secondary battery") refers to all elements and devices having a power storage function. Examples include storage batteries (also referred to as secondary batteries) such as lithium ion secondary batteries, lithium ion capacitors, nickel-metal hydride batteries, all-solid-state batteries, and electric double layer capacitors. [Background technology]

[0003] Silicon-based semiconductor materials are widely known as semiconductor thin films applicable to transistors, but oxide semiconductors (OS) are also attracting attention as other materials. Oxide semiconductors include not only oxides of single-component metals such as indium oxide and zinc oxide, but also oxides of multi-component metals. Among multi-component metal oxides, research on In-Ga-Zn oxide (hereinafter also referred to as IGZO) has been particularly active.

[0004] Research on IGZO has revealed that oxide semiconductors have a c-axis aligned crystalline (CAAC) structure and a nanocrystalline (nc) structure, which are neither single crystal nor amorphous (see Non-Patent Documents 1 to 3). Non-Patent Documents 1 and 2 also disclose techniques for fabricating transistors using oxide semiconductors with a CAAC structure. Furthermore, Non-Patent Documents 4 and 5 show that even oxide semiconductors with lower crystallinity than the CAAC structure and the nc structure have minute crystals.

[0005] Furthermore, transistors using IGZO as an active layer have an extremely low off-state current (see Non-Patent Document 6), and LSIs and displays that utilize this property have been reported (see Non-Patent Documents 7 and 8).

[0006] Furthermore, various semiconductor devices using a transistor including an oxide semiconductor in a channel formation region (hereinafter also referred to as an "OS transistor") have been proposed.

[0007] In recent years, there has been active development of various types of electricity storage devices, including secondary batteries such as lithium-ion secondary batteries, lithium-ion capacitors, and air batteries. Demand for high-power, high-energy-density lithium-ion secondary batteries has rapidly expanded in line with the development of the semiconductor industry, and they are now essential to the modern information society as a rechargeable energy source, as they are used in a wide range of electronic devices, including mobile phones, smartphones, and portable information terminals such as laptop computers, portable music players, and digital cameras, as well as medical devices and next-generation clean-energy vehicles such as hybrid electric vehicles (HEVs), electric vehicles (EVs), and plug-in hybrid electric vehicles (PHEVs).

[0008] The characteristics required for lithium-ion batteries include high energy density, improved cycle characteristics, safety in various operating environments, and improved long-term reliability.

[0009] An example of a lithium ion battery includes at least a positive electrode, a negative electrode, and an electrolyte solution (Patent Document 1).

[0010] Furthermore, Patent Document 2 discloses a battery state detection device for detecting a micro-short circuit in a secondary battery, and a battery pack incorporating the same. [Prior art documents] [Patent documents]

[0011] [Patent Document 1] Special Publication No. 2012-9418

Patent document 2

Non-licensed literature

[0012] [Non-licensed document 1] S. Yamazaki et al., "SID Symposium Digest of Technical Papers", 2012, volume 43, issue 1, p.183-186 [Non-licensed document 2] S. Yamazaki et al., "Japanese Journal of Applied Physics", 2014, volume 53, Number 4S, p.04ED18-1-04ED18-10 [Non-licensed document 3] S. Ito et al., "The Proceedings of AM-FPD'13 Digest of Technical Papers", 2013, p.151-154

Non-licensed Document 4

Non-licensed Document 5

Non-licensed Document 6

Non-licensed Document 7

[0013] An object of one embodiment of the present invention is to provide a novel semiconductor device with excellent convenience or reliability, or a novel secondary battery system with excellent convenience or reliability, or a novel semiconductor device or a novel secondary battery system.

[0014] A common method for charging an energy storage device is to pass a constant current between the positive and negative electrodes of the device until the voltage between the two electrodes reaches a constant value. The optimal current value for charging an energy storage device varies depending on the materials used to make the positive and negative electrodes and the electrolyte. To prevent deterioration of the energy storage device (such as a decrease in storage capacity), the current value must be appropriately set depending on the ambient temperature during charging (including heat generation from the energy storage device).

[0015] An object of one embodiment of the present invention is to provide a semiconductor device that realizes charging with less deterioration of a power storage device.An object of one embodiment of the present invention is to provide a charging method with less deterioration of a power storage device.An object of one embodiment of the present invention is to provide a charging method with less damage to a power storage device.An object of one embodiment of the present invention is to provide a novel semiconductor device.An object of one embodiment of the present invention is to provide a novel charging device.An object of one embodiment of the present invention is to provide a novel charging method.

[0016] Note that the description of these problems does not preclude the existence of other problems. Note that one embodiment of the present invention does not necessarily solve all of these problems. Note that problems other than these will become apparent from the description of the specification, drawings, claims, etc., and it is possible to extract other problems from the description of the specification, drawings, claims, etc. [Means for solving the problem]

[0017] (1) One embodiment of the present invention is a semiconductor device including a detection unit, a first storage unit, a second storage unit, and a determination unit.

[0018] The detection unit supplies a detection signal, and the first storage unit holds the detection signal.

[0019] The second storage unit holds standard data and tolerance information.

[0020] The determination unit compares the detection signal with the standard data, and if there is a deviation between the detection signal and the standard data that exceeds the tolerance information, the determination unit supplies a control signal.

[0021] This makes it possible to determine whether the detection signal is a signal that deviates from the standard data, or to detect an abnormality, or to detect an abnormality and supply a control signal, thereby providing a novel semiconductor device that is highly convenient and reliable.

[0022] (2) Another embodiment of the present invention is the semiconductor device described above, which includes a control unit.

[0023] The control unit provides a selection signal.

[0024] The first memory unit includes a group of memory elements and a selection circuit, and the group of memory elements includes a memory element.

[0025] The storage element holds the sense signal.

[0026] The selection circuit selects a storage element based on a selection signal.

[0027] As a result, the first storage unit can store, for example, multiple detection signals obtained by multiple samplings. Alternatively, the first storage unit can store multiple detection signals obtained by detecting multiple different events, such as voltage, current, and temperature. Alternatively, the first storage unit can store multiple detection signals that change continuously. Alternatively, the first storage unit can store, for example, detection signals that change over time together with information on the detection time. Alternatively, the first storage unit can store detection signals that change due to wear together with information on the usage history. Alternatively, the first storage unit can determine whether there is a deviation between the multiple detection signals and standard data that exceeds the tolerance information. Alternatively, the first storage unit can detect a deviation that exceeds the tolerance information and supply a control signal. As a result, a novel semiconductor device with excellent convenience and reliability can be provided.

[0028] (3) Another embodiment of the present invention is the semiconductor device described above, in which the selection circuit includes a switch.

[0029] This allows, for example, one memory element to be selected from a plurality of memory elements, thereby providing a novel semiconductor device that is highly convenient and reliable.

[0030] (4) Another aspect of the present invention is the semiconductor device described above, wherein the selection circuit includes a source follower circuit.

[0031] This allows, for example, selection of one of a plurality of memory elements, or suppression of degradation of analog data due to the selection operation, thereby providing a novel semiconductor device that is highly convenient and reliable.

[0032] (5) Another embodiment of the present invention is the above-described semiconductor device in which the memory element includes a semiconductor layer containing an oxide semiconductor.

[0033] This allows, for example, the detection signal to be held, or the detection signal to be repeatedly rewritten, or deterioration of the memory element due to rewriting can be reduced. As a result, a novel semiconductor device with excellent convenience and reliability can be provided.

[0034] (6) Another embodiment of the present invention is a semiconductor device including the first semiconductor device and any of the above semiconductor devices.

[0035] The first semiconductor device has a function of supplying a predetermined current or a predetermined voltage, and is electrically connected to the second semiconductor device.

[0036] The first semiconductor device is supplied with a control signal, and operates based on the control signal.

[0037] This allows the second semiconductor device to perform feedback control on the first semiconductor device, thereby providing a novel semiconductor device that is highly convenient and reliable.

[0038] (7) Another embodiment of the present invention is the semiconductor device described above, wherein the detection unit includes a voltage detector.

[0039] The voltage detector measures the voltage required to supply a predetermined current.

[0040] The second storage unit holds standard data relating to voltage.

[0041] This makes it possible to monitor a deviation exceeding the tolerance information that occurs between the detected voltage and the standard data. Alternatively, it is possible to monitor an abnormality in a first semiconductor device electrically connected to a second semiconductor device using the voltage. Alternatively, it is possible to monitor an abnormality in a load electrically connected to the first semiconductor device using the voltage. As a result, it is possible to provide a novel semiconductor device that is highly convenient and reliable.

[0042] (8) Another embodiment of the present invention is the semiconductor device described above, in which the detection unit includes a current detector.

[0043] The current detector measures the current required to supply a predetermined voltage.

[0044] The second storage unit holds standard data relating to the current.

[0045] This makes it possible to monitor a deviation exceeding the tolerance information that occurs between the detected current and the standard data. Alternatively, it is possible to monitor an abnormality in a first semiconductor device electrically connected to a second semiconductor device using the current. Alternatively, it is possible to monitor an abnormality in a load electrically connected to the first semiconductor device using the current. As a result, it is possible to provide a novel semiconductor device that is highly convenient and reliable.

[0046] (9) Another embodiment of the present invention is the semiconductor device, wherein the detection unit includes a terminal.

[0047] The terminal is supplied with a sensing signal relating to temperature.

[0048] The second storage unit holds standard data relating to temperature.

[0049] This makes it possible to monitor deviations exceeding the tolerance information that occur between the detected temperature and the standard data. Alternatively, it is possible to monitor abnormalities in the first semiconductor device or the load connected to the second semiconductor device using the temperature. As a result, it is possible to provide a novel semiconductor device that is highly convenient and reliable.

[0050] (10) Another embodiment of the present invention is a secondary battery system including a secondary battery and the above-described semiconductor device.

[0051] The secondary battery is electrically connected to the semiconductor device.

[0052] This makes it possible to detect, for example, a voltage applied to a secondary battery during charging that exceeds the tolerance information. Alternatively, it makes it possible to detect a current flowing through a secondary battery during charging that exceeds the tolerance information. Alternatively, it makes it possible to supply a control signal based on the tolerance information derived from the characteristics of the secondary battery. As a result, it is possible to provide a novel secondary battery system that is highly convenient and reliable.

[0053] (11) Another embodiment of the present invention is a secondary battery system including a secondary battery and any of the above semiconductor devices.

[0054] The secondary battery includes a battery cell and a temperature detector.

[0055] The temperature detector is electrically connected to the terminal, and detects the temperature of the battery cell.

[0056] This makes it possible to detect, for example, a temperature change exceeding the tolerance information of a secondary battery during charging, and as a result, a novel secondary battery system that is highly convenient and reliable can be provided.

[0057] (12) In one embodiment of the present invention, the magnitude of a charging current is adjusted depending on the ambient temperature. Charging is performed in a low-temperature environment by reducing the charging current. Charging is stopped when the ambient temperature is too low or too high. The ambient temperature is measured using a memory element including an oxide semiconductor. By using a memory element including an oxide semiconductor, the ambient temperature can be measured and temperature information can be stored at the same time.

[0058] One embodiment of the present invention is a semiconductor device including a first memory element, a second memory element, a comparison circuit, and a current adjustment circuit. The first memory element has a function of holding reference temperature information. The second memory element has a transistor including an oxide semiconductor in a semiconductor layer. The second memory element has a function of measuring an ambient temperature and a function of holding the ambient temperature as ambient temperature information. The comparison circuit has a function of comparing the reference temperature information with the ambient temperature information to determine an operation of the current adjustment circuit. The current adjustment circuit has a function of supplying a current to a secondary battery.

[0059] The device may have a plurality of first storage elements, each of which preferably holds different reference temperature information.

[0060] The semiconductor layer preferably contains at least one of indium and zinc, and more preferably contains both indium and zinc.

[0061] As the secondary battery, for example, a lithium ion secondary battery can be used. [Effects of the Invention]

[0062] According to one embodiment of the present invention, a novel semiconductor device with excellent convenience or reliability can be provided. Alternatively, a novel secondary battery system with excellent convenience or reliability can be provided. Alternatively, a novel semiconductor device or a novel secondary battery system can be provided.

[0063] According to one embodiment of the present invention, a semiconductor device that realizes charging with less deterioration of a power storage device can be provided. Alternatively, a charging method with less deterioration of a power storage device can be provided. Alternatively, a charging method with less damage to a power storage device can be provided. Alternatively, a novel semiconductor device can be provided. Alternatively, a novel charging device can be provided. Alternatively, a novel charging method can be provided.

[0064] Note that the description of these effects does not preclude the existence of other effects. Note that one embodiment of the present invention does not necessarily have all of these effects. Note that effects other than these will become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract other effects from the description in the specification, drawings, claims, etc. [Brief explanation of the drawings]

[0065] [Figure 1] 1A and 1B are diagrams illustrating a semiconductor device. [Figure 2]2A, 2B, 2C, 2D, 2E, 2F, and 2G are diagrams for explaining examples of circuit configurations of memory elements. [Figure 3] 3A and 3B are diagrams illustrating the electrical characteristics of a transistor. [Figure 4] 4A, 4B, and 4C are diagrams illustrating a method for charging a secondary battery. [Figure 5] 5A, 5B, 5C, and 5D are diagrams illustrating a method for charging a secondary battery. [Figure 6] FIG. 6 is a flowchart illustrating the charging operation of the semiconductor device. [Figure 7] 7A and 7B are diagrams illustrating the relationship between the environmental temperature and the charging current. [Figure 8] 8A and 8B are perspective views of the semiconductor device 100. FIG. [Figure 9] FIG. 9 is a cross-sectional view of the semiconductor device 100. [Figure 10] FIG. 10 is a cross-sectional view of the semiconductor device 100A. [Figure 11] FIG. 11 is a cross-sectional view of the semiconductor device 100B. [Figure 12] 12A, 12B, and 12C are diagrams illustrating an example of a transistor. [Figure 13] 13A, 13B, and 13C are diagrams illustrating an example of a transistor. [Figure 14] 14A and 14B are perspective views showing an example of a secondary battery. [Figure 15] 15A, 15B, and 15C are diagrams showing examples of electronic devices. [Figure 16] 16A, 16B, 16C, and 16D are diagrams showing examples of electronic devices. [Figure 17] FIG. 17 is a diagram illustrating a semiconductor device. [Figure 18] 18A and 18B are perspective views of the semiconductor device 700. FIG. [Figure 19] FIG. 19 is a diagram illustrating a secondary battery system and a semiconductor device. DETAILED DESCRIPTION OF THE INVENTION

[0066] A semiconductor device according to one embodiment of the present invention includes a detection unit, a first memory unit, a second memory unit, and a determination unit. The detection unit supplies a detection signal, the first memory unit holds the detection signal, the second memory unit holds standard data and tolerance information, the determination unit compares the detection signal with the standard data, and, if there is a deviation between the detection signal and the standard data that exceeds the tolerance information, the determination unit supplies a control signal.

[0067] This makes it possible to determine whether the detection signal is a signal that deviates from the standard data, or to detect an abnormality, or to detect an abnormality and supply a control signal, thereby providing a novel semiconductor device that is highly convenient and reliable.

[0068] In the following, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and those skilled in the art will easily understand that the form and details can be modified in various ways. Furthermore, the present invention should not be interpreted as being limited to the description of the embodiments shown below.

[0069] In the drawings described in this specification, the size of each component, the thickness of a layer, or an area may be exaggerated or omitted to clarify the invention, and therefore, the drawings are not necessarily limited to the scale.

[0070] Note that ordinal numbers such as "first" and "second" in this specification are used to avoid confusion between components, and do not indicate any order or ranking, such as the order of processes or stacking. Furthermore, even if a term does not have an ordinal number in this specification, an ordinal number may be added in the claims, etc., to avoid confusion between components.

[0071] (Embodiment 1) In this embodiment, a structure of a semiconductor device of one embodiment of the present invention will be described with reference to FIGS.

[0072] 1A and 1B are diagrams illustrating a structure of a semiconductor device according to one embodiment of the present invention, in which Fig. 1A is a block diagram of a semiconductor device according to one embodiment of the present invention, and Fig. 1B is a part of Fig. 1A.

[0073] 18A and 18B are diagrams illustrating a structure of a semiconductor device of one embodiment of the present invention, in which Fig. 18A is a perspective view of a semiconductor device of one embodiment of the present invention, and Fig. 18B is an exploded view illustrating the stacked layer structure of Fig. 18A.

[0074] In this specification, variables that take on integer values ​​of 1 or greater may be used in codes. For example, (p) including a variable p that takes on an integer value of 1 or greater may be used as part of a code that identifies any one of up to p components. Also, for example, (m, n) including variables m and n that take on integer values ​​of 1 or greater may be used as part of a code that identifies any one of up to m×n components.

[0075] <Configuration Example 1 of Semiconductor Device 700> A semiconductor device 700 described in this embodiment includes a detection unit 702, a storage unit 701A, a storage unit 701B, and a determination unit 703 (see FIG. 1A).

[0076] <<Configuration Example 1 of Detection Unit 702>> The detection unit 702 supplies a detection signal DS(i). For example, a voltage detector, a current detector, a temperature detector, or a timer can be used for the detection unit 702. For example, a signal including information such as voltage, current, or temperature can be used for the detection signal DS(i). Also, for example, an analog signal can be used for the detection signal DS(i).

[0077] <<Configuration Example 1 of Storage Unit 701A>> The storage unit 701A stores the detection signal DS(i).

[0078] <<Configuration Example 1 of Storage Unit 701B>> The storage unit 701B stores the standard data DATA and the tolerance information TI. For example, the average characteristics of the electrically connected load can be used as the standard data DATA. Alternatively, characteristics that vary depending on the number of times the load is used can be used as the standard data DATA. Alternatively, characteristics that change depending on the usage history can be used as the standard data DATA. Alternatively, characteristics detected during the most recent use can be used as the standard data DATA.

[0079] For example, a memory element having the same configuration as the memory element used in the memory unit 701A can be used for the memory unit 701B. Specifically, the memory element described in Embodiment 2 can be used for the memory unit 701B. A flash memory can be used for the memory unit 701B.

[0080] <<Configuration Example 1 of Determination Unit 703>> The determination unit 703 compares the detection signal DS(i) with the standard data DATA. If there is a deviation between the detection signal DS(i) and the standard data DATA that exceeds the tolerance information TI, the determination unit 703 supplies a control signal CI1. For example, a comparator can be used for the determination unit 703. Specifically, a comparison circuit having a configuration similar to that of the comparison circuit 103 described in the second embodiment can be used for the determination unit 703.

[0081] This makes it possible to determine whether the detection signal DS(i) is a signal that deviates from the standard data DATA. Alternatively, it is possible to detect an abnormality. Alternatively, it is possible to detect an abnormality and supply a control signal CI1. As a result, it is possible to provide a novel semiconductor device that is highly convenient and reliable.

[0082] <Configuration Example 2 of Semiconductor Device 700> Furthermore, the semiconductor device 700 described in this embodiment has a control unit 705 (see FIG. 1A).

[0083] <<Configuration Example 1 of Control Unit 705>> The control unit 705 supplies a selection signal CI2.

[0084] <<Configuration Example 2 of Storage Unit 701A>> The storage unit 701A includes a group of storage elements 701A(1) to 701A(n) and a selection circuit SC (see FIG. 1B).

[0085] The group of storage elements 701A(1) to 701A(n) includes a storage element 701A(i), which holds a sense signal DS(i).

[0086] <<Configuration example 1 of selection circuit SC>> The selection circuit SC selects the storage element 701A(i) based on the selection signal CI2.

[0087] As a result, the first storage unit 701A can store, for example, multiple detection signals DS(1) through DS(n) obtained by multiple samplings. Alternatively, the first storage unit 701A can store multiple detection signals DS(1) through DS(n) obtained by detecting multiple different events, such as voltage, current, and temperature. Alternatively, the first storage unit 701A can store multiple detection signals that change continuously. Alternatively, the first storage unit 701A can store, for example, a detection signal that changes over time along with information about the detection time. Alternatively, the first storage unit 701A can store a detection signal DS(i) that changes due to wear along with information about the usage history. Alternatively, the first storage unit 701A can determine whether a deviation exceeding the tolerance information TI exists between the multiple detection signals DS(1) through DS(n) and the standard data DATA(i). Alternatively, the first storage unit 701A can detect a deviation exceeding the tolerance information TI and supply a control signal CI1. As a result, a novel semiconductor device with excellent convenience and reliability can be provided.

[0088] <<Configuration example 2 of selection circuit SC>> The selection circuit SC includes a switch SW.

[0089] This allows, for example, selection of one of the storage elements 701A(1) to 701A(n), thereby providing a novel semiconductor device that is highly convenient and reliable.

[0090] <<Configuration example 3 of selection circuit SC>> The selection circuit SC includes a source follower circuit SF.

[0091] This makes it possible to select, for example, one of the storage elements 701A(1) to 701A(n). Alternatively, it is possible to suppress deterioration of the analog data DATA(i) due to the selection operation. As a result, it is possible to provide a novel semiconductor device that is highly convenient and reliable.

[0092] <Configuration Example 3 of Memory Element 701A(i)> The memory element 701A(i) is the above-described semiconductor device including the semiconductor layer 260, which contains an oxide semiconductor. For example, the metal oxide described in Embodiment 3 can be used for the semiconductor layer 260.

[0093] This makes it possible to hold the detection signal DS(i), or to repeatedly rewrite the detection signal DS(i), or to reduce deterioration of the storage element 701A(i) due to rewriting. As a result, it is possible to provide a novel semiconductor device that is highly convenient and reliable.

[0094] <Configuration Example 3 of Semiconductor Device 700> Moreover, the semiconductor device 700 described in this embodiment includes an integrated circuit 750 and an integrated circuit 760 (see FIG. 18).

[0095] <<Configuration example of integrated circuit 750>> The integrated circuit 750 includes a determination unit 703 (see FIG. 18B). For example, a Si transistor can be used in the integrated circuit 750. This can improve the current driving capability of the transistor used in the integrated circuit 750. Alternatively, the operating speed can be increased. Note that, for example, the configuration of the integrated circuit 150 described in Embodiment 3 can be used in the integrated circuit 750.

[0096] <<Configuration example of integrated circuit 760>> The integrated circuit 760 includes a memory element 701A(i). For example, a transistor including an oxide semiconductor can be used for the integrated circuit 760. In this way, the integrated circuit 760 can include a memory element that can be repeatedly rewritten.

[0097] The integrated circuit 760 has a region overlapping with the integrated circuit 750, and is electrically connected to the integrated circuit 750. This can reduce the area occupied by the semiconductor device 700. Note that, for example, the same structure as the integrated circuit 160 described in Embodiment 3 can be used for the integrated circuit 760.

[0098] This embodiment mode can be implemented in appropriate combination with any of the structures described in other embodiment modes.

[0099] (Embodiment 2) A configuration example and an operation example of the semiconductor device 100 of one embodiment of the present invention will be described with reference to the drawings. FIG. 17 is a block diagram illustrating the semiconductor device 100.

[0100] <Configuration example> The semiconductor device 100 includes a memory element 101, a memory element 102, a comparison circuit 103, a current adjustment circuit 104, a control circuit 105, and an input / output circuit 106. The semiconductor device 100 is electrically connected to a secondary battery 200 and has a function of charging the secondary battery 200.

[0101] [Memory element 101] The memory element 101 includes one or more memory elements. In this embodiment, the memory element 101 includes three memory elements (a memory element 101_1, a memory element 101_2, and a memory element 101_3).

[0102] The storage element 101 stores information (potential or charge) for changing the charging current depending on the ambient temperature during charging. In this embodiment, each of the storage elements 101_1, 101_2, and 101_3 stores information corresponding to a temperature that serves as a reference for determination (also referred to as "reference temperature information").

[0103] 2A to 2G show examples of circuit configurations that can be used for the memory element 101. Each of the circuits in FIGS. 2A to 2G functions as a memory element. The memory element 410 shown in FIG. 2A includes a transistor M1 and a capacitor CA. The memory element 410 includes one transistor and one capacitor.

[0104] The first terminal of the transistor M1 is connected to the first terminal of the capacitance element CA, the second terminal of the transistor M1 is connected to the wiring BL, the gate of the transistor M1 is connected to the wiring WL, and the back gate of the transistor M1 is connected to the wiring BGL. The second terminal of the capacitance element CA is connected to the wiring CAL. The node where the first terminal of the transistor M1 and the first terminal of the capacitance element CA are electrically connected is called a node ND.

[0105] In an actual transistor, the gate and back gate are arranged to overlap each other via the channel formation region of the semiconductor layer. Both the gate and the back gate can function as gates. Therefore, when one is called the "back gate," the other is sometimes called the "gate" or "front gate." Furthermore, one is sometimes called the "first gate" and the other the "second gate."

[0106] The back gate may be at the same potential as the gate, or at ground potential or any other potential. The threshold voltage of the transistor can be changed by changing the potential of the back gate independently of the gate.

[0107] By providing a back gate and by setting the gate and back gate at the same potential, the region through which carriers flow in the semiconductor layer becomes larger in the film thickness direction, increasing the amount of carrier movement, which results in an increase in the on-state current of the transistor and an increase in field-effect mobility.

[0108] Therefore, the transistor can have a large on-state current relative to the area it occupies. That is, the area occupied by the transistor can be reduced relative to the required on-state current. Therefore, a highly integrated semiconductor device can be realized.

[0109] The wiring BGL functions as a wiring for applying a potential to the back gate of the transistor M1. By applying a given potential to the wiring BGL, the threshold voltage of the transistor M1 can be increased or decreased.

[0110] Data is written and read by applying a high-level potential to the wiring WL to turn on the transistor M1 and electrically connect the wiring BL and the node ND.

[0111] The wiring CAL functions as a wiring for applying a predetermined potential to the second terminal of the capacitance element CA. It is preferable to apply a fixed potential to the wiring CAL.

[0112] The memory element 420 shown in FIG. 2B is a modified example of the memory element 410. In the memory element 420, the back gate of the transistor M1 is electrically connected to the wiring WL. With this configuration, the same potential as that of the gate of the transistor M1 can be applied to the back gate of the transistor M1. Therefore, when the transistor M1 is in a conductive state, the current flowing through the transistor M1 can be increased.

[0113] 2C , the transistor M1 may be a transistor with a single gate structure (a transistor without a back gate). The memory element 430 has a structure in which the back gate is removed from the transistor M1 of the memory element 410 and the memory element 420. Therefore, the memory element 430 can be manufactured in a shorter process than the memory element 410 and the memory element 420.

[0114] The storage elements 410, 420, and 430 are DRAM type storage elements.

[0115] An oxide semiconductor, which is a type of metal oxide, is preferably used for a semiconductor layer in which a channel of the transistor M1 is formed. In this specification and the like, a transistor including an oxide semiconductor in a semiconductor layer in which a channel is formed is also referred to as an "OS transistor."

[0116] For example, the oxide semiconductor may be a metal oxide containing any one of indium, element M (element M is one or more elements selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, etc.), and zinc. In particular, the oxide semiconductor is preferably a metal oxide containing indium, gallium, or zinc.

[0117] An OS transistor has a characteristic of having an extremely low off-state current. By using an OS transistor as the transistor M1, the leakage current of the transistor M1 can be made extremely low. That is, written data can be held by the transistor M1 for a long time. This reduces the frequency of refreshing the memory element. Furthermore, the refresh operation of the memory element can be made unnecessary. Furthermore, because the leakage current is extremely low, multilevel data or analog data can be held in the memory element 410, the memory element 420, and the memory element 430.

[0118] In this specification and the like, a DRAM using an OS transistor is referred to as a DOSRAM (Dynamic Oxide Semiconductor Random Access Memory).

[0119] 2D shows an example of the circuit configuration of a gain cell type memory element 440 including two transistors and one capacitor element. The memory element 440 includes a transistor M1, a transistor M2, and a capacitor element CA.

[0120] The first terminal of transistor M1 is connected to the first terminal of capacitor CA, the second terminal of transistor M1 is connected to wiring WBL, and the gate of transistor M1 is connected to wiring WWL. The second terminal of capacitor CA is connected to wiring CAL. The first terminal of transistor M2 is connected to wiring RBL, the second terminal of transistor M2 is connected to wiring RWL, and the gate of transistor M2 is connected to the first terminal of capacitor CA. The node where the first terminal of transistor M1, the first terminal of capacitor CA, and the gate of transistor M2 are electrically connected is called node ND.

[0121] The bit line WBL functions as a write bit line, the bit line RBL functions as a read bit line, the word line WWL functions as a write word line, and the word line RWL functions as a read word line. The transistor M1 functions as a switch that connects the node ND and the bit line WBL to or from a conducting state.

[0122] An OS transistor is preferably used as the transistor M1. As described above, an OS transistor has an extremely low off-state current. Therefore, by using an OS transistor as the transistor M1, the potential written to the node ND can be held for a long time. That is, data written to the memory element can be held for a long time.

[0123] There is no particular limitation on the type of transistor used as the transistor M2, and the transistor M2 may be an OS transistor, a Si transistor (a transistor using silicon in a semiconductor layer), or another transistor.

[0124] When a Si transistor is used for the transistor M2, the silicon used for the semiconductor layer may be amorphous silicon, polycrystalline silicon, low-temperature polysilicon (LTPS), or single-crystalline silicon. Since Si transistors may have higher field-effect mobility than OS transistors, using a Si transistor as a readout transistor can increase the operation speed during readout.

[0125] When an OS transistor is used as the transistor M1 and a Si transistor is used as the transistor M2, they may be stacked on different layers. OS transistors can be manufactured using the same manufacturing equipment and processes as Si transistors. Therefore, it is easy to combine OS transistors and Si transistors (hybridization) and achieve high integration.

[0126] Furthermore, using an OS transistor for the transistor M2 can significantly reduce leakage current in a non-selected state, thereby improving read accuracy. Using OS transistors for both the transistors M1 and M2 reduces the number of manufacturing steps for the semiconductor device, thereby improving productivity. For example, the semiconductor device can be manufactured at a process temperature of 400° C. or lower.

[0127] 2E to 2G show circuit configuration examples in which transistors having back gates (four-terminal transistors, also referred to as "four-terminal elements") are used as the transistors M1 and M2. A memory element 450 shown in FIG. 2E, a memory element 460 shown in FIG. 2F, and a memory element 470 shown in FIG. 2G are modifications of the memory element 440.

[0128] 2E, the gate and back gate of the transistor M1 are electrically connected to each other, and the gate and back gate of the transistor M2 are electrically connected to each other.

[0129] 2F, the back gates of the transistors M1 and M2 are electrically connected to the wiring BGL. A predetermined potential can be applied to the back gates of the transistors M1 and M2 through the wiring BGL.

[0130] 2G, the back gate of the transistor M1 is electrically connected to the wiring WBGL, and the back gate of the transistor M2 is electrically connected to the wiring RBGL. By connecting the back gates of the transistors M1 and M2 to different wirings, the threshold voltages of the transistors M1 and M2 can be changed independently.

[0131] The memory elements 440 to 470 are 2Tr1C memory cells. In this specification and the like, a memory device in which a 2Tr1C memory cell is formed using an OS transistor as the transistor M1 is referred to as a non-volatile oxide semiconductor random access memory (NOSRAM). In addition, the memory elements 440 to 470 can read the potential of the node ND by amplifying it with the transistor M12. Furthermore, since the off-state current of an OS transistor is very small, the potential of the node ND can be held for a long period of time. Furthermore, nondestructive reading, in which the potential of the node ND is held even during a read operation, is possible.

[0132] The information stored in the storage element 101 is information that is rewritten infrequently. Therefore, it is preferable to use, as the storage element 101, an NOSRAM that allows non-destructive reading of information and that can store information for a long period of time.

[0133] Furthermore, the transistors shown in Figures 2A, 2B, (E) to (G) are four-terminal elements, and therefore have the advantage that independent control of input and output can be easily performed compared to two-terminal elements such as magnetoresistive random access memory (MRAM), resistive random access memory (ReRAM), and phase-change memory, which utilize MTJ (Magnetic Tunnel Junction) characteristics.

[0134] In addition, in MRAM, ReRAM, and phase-change memory, structural changes at the atomic level may occur when data is rewritten. On the other hand, the memory device of one embodiment of the present invention operates by charging or discharging electric charge via a transistor when data is rewritten, and therefore has the characteristics of excellent durability against repeated rewriting and little structural change.

[0135] [Memory element 102] The memory element 102 can be the same as the memory element 101. It is preferable that the memory element 102 be a DOSRAM or a NOARAM.

[0136] Here, we will explain the temperature dependence of the Id-Vg characteristic, which is one of the electrical characteristics of a transistor. Figures 3A and 3B show an example of the Id-Vg characteristic, which is one of the electrical characteristics of a transistor. The Id-Vg characteristic shows the change in drain current (Id) with respect to the change in gate voltage (Vg). The horizontal axis of Figures 3A and 3B represents Vg on a linear scale. The vertical axis of Figures 3A and 3B represents Id on a logarithmic scale.

[0137] Figure 3A shows the Id-Vg characteristics of an OS transistor. Figure 3B shows the Id-Vg characteristics of a transistor (Si transistor) that uses silicon for the semiconductor layer in which the channel is formed. Note that both Figure 3A and Figure 3B show the Id-Vg characteristics of an n-channel transistor.

[0138] As shown in Figure 3A, the off-state current of OS transistors is less likely to increase even when operating in a high-temperature environment. OS transistors can achieve an on / off ratio of more than 10 orders of magnitude even when the operating temperature is between 125°C and 150°C. On the other hand, as shown in Figure 3B, the off-state current of Si transistors increases with increasing temperature. Furthermore, the Vth of Si transistors shifts in the positive direction with increasing temperature, and the on-state current decreases.

[0139] By using an OS transistor as the transistor M1, data can be retained for a long period of time even under high temperature operation.

[0140] Furthermore, an oxide semiconductor has a property that its resistance decreases as its temperature rises. By utilizing this property, the ambient temperature can be converted into a potential. For example, when using the memory element 430 shown in FIG. 2C, the transistor M1 is first turned on to supply 0 V to the wiring BL, and 0 V is written to the node ND. Next, VDD is supplied to the wiring BL, and the transistor M1 is turned off after a certain period of time. The resistance of an oxide semiconductor changes depending on the temperature. Therefore, a potential corresponding to the ambient temperature at the time of measurement (also referred to as "ambient temperature information") is held in the node ND. Furthermore, the higher the ambient temperature, the higher the potential held in the node ND.

[0141] In this way, the memory element 102 can function as a temperature sensor. By using an oxide semiconductor, the memory elements 101 and 102 can be manufactured simultaneously in the same process. Furthermore, since there is no need to provide a separate temperature sensor such as a thermistor, productivity of the semiconductor device 100 can be improved.

[0142] [Comparison circuit 103] The comparison circuit 103 has a function of comparing the temperature information stored in the memory element 101 with the environmental temperature stored in the memory element 102 to determine the operation of the current adjustment circuit. Specifically, the comparison circuit 103 compares the potential of the node ND of the memory element 101 with the potential of the node ND of the memory element 102. The comparison circuit 103 can be configured with a comparator or the like.

[0143] [Current adjustment circuit 104] The current adjustment circuit 104 has a function of controlling the value of the current supplied to the secondary battery 200 based on the signal supplied from the comparison circuit 103. The current adjustment circuit 104 can be configured by a power transistor or the like.

[0144] [Control circuit 105, input / output circuit 106] The control circuit 105 has a function of comprehensively controlling the operations of the memory element 101, the memory element 102, the comparison circuit 103, the current adjustment circuit 104, and the input / output circuit 106. Furthermore, the control circuit 105 is supplied with control signals and setting information for the memory element 101 from the outside via the input / output circuit 106. Furthermore, the control circuit 105 has a function of outputting the charging voltage of the secondary battery 200, the current value output from the current adjustment circuit 104, and environmental temperature information acquired by the memory element 102 to the outside via the input / output circuit 106.

[0145] <Example of operation> Next, an example of the charging operation of the secondary battery 200 using the semiconductor device 100 will be described.

[0146] [Charging method] The secondary battery can be charged, for example, as follows.

[0147] [CC charging] First, we will explain CC charging as one of the charging methods. CC charging is a charging method in which a constant current flows through the secondary battery throughout the entire charging period, and charging stops when a predetermined voltage is reached. The secondary battery is assumed to be an equivalent circuit with an internal resistance R and a secondary battery capacity C, as shown in Figure 4A. In this case, the secondary battery voltage V B is the voltage V across the internal resistance R R and the voltage V applied to the secondary battery capacity C C It is the sum of.

[0148] During CC charging, as shown in Figure 4A, the switch is turned on and a constant current I flows through the secondary battery. During this time, the current I is constant, so V RAccording to Ohm's law, the voltage V applied to the internal resistance R is R On the other hand, the voltage V applied to the secondary battery capacity C is also constant. C increases over time. Therefore, the secondary battery voltage V B increases over time.

[0149] and the secondary battery voltage V B When the current reaches a predetermined voltage, for example, 4.3 V, charging stops. When CC charging stops, the switch turns off and the current I becomes 0, as shown in Figure 4B. Therefore, the voltage V across the internal resistance R R becomes 0V. Therefore, the secondary battery voltage V B is decreasing.

[0150] The secondary battery voltage V during CC charging and after CC charging is stopped B An example of the charging current is shown in Figure 4C. The secondary battery voltage V B However, it is shown that the value decreases slightly after CC charging is stopped.

[0151] [CCCV charging] Next, we will explain CCCV charging, which is a different charging method from the above. CCCV charging is a charging method in which the battery is first charged to a predetermined voltage using CC charging, and then the battery is charged using CV (constant voltage) charging until the current decreases, specifically until it reaches the end current value.

[0152] During CC charging, as shown in Figure 5A, the constant current power supply is switched on and the constant voltage power supply is switched off, and a constant current I flows through the secondary battery. During this time, the current I is constant, so V R According to Ohm's law, the voltage V applied to the internal resistance R is R On the other hand, the voltage V applied to the secondary battery capacity C is also constant. C increases over time. Therefore, the secondary battery voltage V B increases over time.

[0153] and the secondary battery voltage VB When the secondary battery voltage V reaches a predetermined voltage, for example, 4.3 V, the charging mode is switched from CC to CV. During CV charging, as shown in FIG. 5B, the constant voltage power supply is switched on and the constant current power supply is switched off, and the secondary battery voltage V B On the other hand, the voltage V applied to the secondary battery capacity C is constant. C V increases over time. B =V R +V C Therefore, the voltage V across the internal resistance R R The voltage V across the internal resistance R decreases over time. R As becomes smaller, V R According to Ohm's law, the current I flowing through the secondary battery also becomes smaller.

[0154] When the current I flowing through the secondary battery reaches a predetermined value, for example, a current equivalent to 0.01 C, charging is stopped. When CCCV charging is stopped, all switches are turned off and the current I becomes 0, as shown in Figure 5C. Therefore, the voltage V across the internal resistance R R However, the voltage V applied to the internal resistance R due to CV charging R is small enough that even if the voltage drop across the internal resistance R disappears, the secondary battery voltage V B hardly descends at all.

[0155] The secondary battery voltage V during CCCV charging and after CCCV charging is stopped B An example of the charge current and the secondary battery voltage V B It is shown that there is almost no descent.

[0156] [About charging rate] Here, we will explain the charge rate. The charge rate is the relative ratio of the charge current to the battery capacity, and is expressed in units of C. For a battery with a rated capacity of X [Ah], the current equivalent to 1C is X [A]. When charging with a current of 2X [A], it is said to have been charged at 2C, and when charging with a current of X / 5 [A], it is said to have been charged at 0.2C.

[0157] [Charging operation example] Generally, the charging conditions for a secondary battery vary depending on the constituent materials of the positive electrode, negative electrode, and electrolyte contained in the secondary battery. In this embodiment, an example will be described in which the semiconductor device 100 performs CC charging on the secondary battery 200 under the charging conditions shown in Table 1.

[0158] [Table 1]

[0159] Fig. 6 is a flowchart illustrating the charging operation of semiconductor device 100. Fig. 7A is a diagram illustrating the relationship between ambient temperature and charging current. Fig. 7A also shows a temperature range P0 below 0°C, a temperature range P1 between 0°C and 10°C, a temperature range P2 between 10°C and 45°C, and a temperature range P3 above 45°C.

[0160] First, the environmental temperature Tp is acquired (step S501).

[0161] Next, the temperature condition T1 stored in the storage element 101_1 is compared with the environmental temperature Tp (step S502). If the environmental temperature Tp is lower than the temperature condition T1, it is determined that the secondary battery 200 is in the temperature range P0, and charging of the secondary battery 200 is stopped (current supply is stopped) (step S505).

[0162] If the environmental temperature Tp is higher than the temperature condition T1, the temperature condition T2 stored in the storage element 101_2 is compared with the environmental temperature Tp (step S503). If the environmental temperature Tp is lower than the temperature condition T2, it is determined that the secondary battery 200 is in the temperature range P1, and the current I L is supplied to the secondary battery 200 (step S511). In this embodiment, the current I L is the current corresponding to a charge rate of 0.25C. Therefore, the current I L is 750mA.

[0163] If the environmental temperature Tp is higher than the temperature condition T2, the temperature condition T3 stored in the storage element 101_3 is compared with the environmental temperature Tp (step S504). If the environmental temperature Tp is lower than the temperature condition T3, it is determined that the secondary battery 200 is in the temperature range P2, and the current I SD is supplied to the secondary battery 200 (step S512). SD is the current corresponding to a charging rate of 0.5C. Therefore, the current I SD is 1500mA.

[0164] If the environmental temperature Tp is higher than the temperature condition T3, it is determined that the secondary battery 200 is in the temperature range P3, and charging of the secondary battery 200 is stopped (current supply is stopped) (step S505).

[0165] Next, the state of step S505, step S511, or step S512 is maintained for a certain period of time (step S506).

[0166] After a certain time has elapsed, it is determined whether the voltage of the secondary battery 200 is less than the maximum charging voltage. In this embodiment, it is determined whether the voltage of the secondary battery 200 is less than 4.3V. If the voltage of the secondary battery 200 is less than the maximum charging voltage, the process returns to step S501 (step S507). If the voltage of the secondary battery 200 is equal to or greater than the maximum charging voltage, the charging operation is terminated.

[0167] If CCCV charging is to be performed, CV charging should be performed after this.

[0168] When the ambient temperature is low (below 10°C in this embodiment), the reaction rate between the negative electrode material and Li decreases, making Li deposition more likely to occur. Li deposition can lead to a decrease in battery capacity and may cause a fire due to an internal short circuit. Therefore, it is preferable to reduce the charging current. Furthermore, if the ambient temperature is too low (below 0°C in this embodiment), the supply of charging current is stopped.

[0169] Furthermore, charging when the ambient temperature is too high (45°C or higher in this embodiment) may accelerate the oxidative decomposition of the electrolyte and the elution of metal components from the positive electrode material, which may contribute to a decrease in battery capacity.

[0170] By adjusting the charging current in accordance with the ambient temperature, deterioration of the secondary battery can be prevented and charging can be performed more safely.

[0171] FIG. 7B also shows a temperature range P0 below 0°C, a temperature range P1 between 0°C and 10°C, a temperature range P2 between 10°C and 25°C, a temperature range P3 between 25°C and 45°C, and a temperature range P4 of 45°C or higher.

[0172] As shown in Figure 7B, the ambient temperature and charging current may be changed continuously within a specific temperature range. Figure 7B shows an example in which the charging current is changed continuously in accordance with the ambient temperature within temperature range P2. By controlling in this manner, the charging time of secondary battery 200 can be shortened.

[0173] This embodiment mode can be implemented in appropriate combination with any of the structures described in other embodiment modes.

[0174] (Embodiment 3) High current driving capability and / or high-speed operation may be required for the comparison circuit 103, the current adjustment circuit 104, the control circuit 105, and the input / output circuit 106. In this case, it is preferable to use Si transistors for the comparison circuit 103, the current adjustment circuit 104, the control circuit 105, and the input / output circuit 106.

[0175] As described in the above embodiment, the memory element 101 and the memory element 102 are preferably OS transistors.

[0176] The OS transistor and the Si transistor can be stacked. For example, the semiconductor device 100 may include an integrated circuit 160 including the memory element 101 and the memory element 102 on an integrated circuit 150 including the comparator circuit 103, the current regulator circuit 104, the control circuit 105, and the input / output circuit 106. Stacking various circuits can reduce the size of the semiconductor device 100. In other words, the area occupied by the semiconductor device 100 can be reduced.

[0177] <Example of cross-sectional configuration> Fig. 8A is a perspective view of a semiconductor device 100 including an integrated circuit 150 and an integrated circuit 160. Fig. 8B is a diagram for easily understanding the positional relationship between the integrated circuits 150 and 160. Fig. 9 is a cross-sectional view of a portion of the semiconductor device 100.

[0178] [Integrated Circuit 150] 9, an integrated circuit 150 has a transistor 233a, a transistor 233b, and a transistor 233c on a substrate 231. FIG. 9 shows cross sections of the transistors 233a, 233b, and 233c in the channel length direction.

[0179] The channels of the transistors 233a, 233b, and 233c are formed in part of the substrate 231. When high-speed operation is required for an integrated circuit, a single crystal semiconductor substrate is preferably used as the substrate 231.

[0180] The transistors 233a, 233b, and 233c are electrically isolated from other transistors by an element isolation layer 232. The element isolation layer can be formed by a local oxidation of silicon (LOCOS) method, a shallow trench isolation (STI) method, or the like.

[0181] In addition, insulating layers 234, 235, and 237 are provided over the transistors 233a, 233b, and 233c, and an electrode 238 is embedded in the insulating layer 237. The electrode 238 is electrically connected to one of the source and drain of the transistor 233a through a contact plug 236.

[0182] Furthermore, insulating layers 239, 240, and 241 are provided on electrode 238 and insulating layer 237, and electrode 242 is embedded in insulating layers 239, 240, and 241. Electrode 242 is electrically connected to electrode 238.

[0183] Furthermore, insulating layers 243 and 244 are provided on electrode 242 and insulating layer 241, and electrode 245 is embedded in insulating layers 243 and 244. Electrode 245 is electrically connected to electrode 242.

[0184] Furthermore, insulating layers 246 and 247 are provided on electrode 245 and insulating layer 244, and electrode 249 is embedded in insulating layers 246 and 247. Electrode 249 is electrically connected to electrode 245.

[0185] Furthermore, insulating layers 248 and 250 are provided on electrode 249 and insulating layer 247, and electrode 251 is embedded in insulating layers 248 and 250. Electrode 251 is electrically connected to electrode 249.

[0186] [Integrated Circuit 160] The integrated circuit 160 is provided over the integrated circuit 150. In Fig. 9, the integrated circuit 160 includes a transistor 210 and a capacitor 220. Fig. 9 illustrates a cross section of the transistor 210 in the channel length direction. The transistor 210 has a back gate.

[0187] An oxide semiconductor, which is a type of metal oxide, is preferably used for a semiconductor layer of the transistor 210. That is, the transistor 210 is preferably an OS transistor.

[0188] The transistor 210 is provided over an insulating layer 361. An insulating layer 362 is provided over the insulating layer 361. The back gate of the transistor 210 is buried in the insulating layer 362. An insulating layer 371 and an insulating layer 380 are provided over the insulating layer 362. The gate of the transistor 210 is buried in the insulating layer 380.

[0189] Furthermore, insulating layers 374 and 381 are provided on insulating layer 380. Furthermore, electrode 355 is embedded in insulating layers 361, 362, 365, 366, 371, 380, 374, and 381. Electrode 355 is electrically connected to electrode 251. Electrode 355 can function as a contact plug.

[0190] Furthermore, an electrode 152 is provided on the insulating layer 381. The electrode 152 is electrically connected to an electrode 355. Furthermore, an insulating layer 114, an insulating layer 115, and an insulating layer are provided on the insulating layer 381 and the electrode 152.

[0191] The capacitive element 220 has an electrode 110 disposed in an opening formed in the insulating layer 114 and the insulating layer 115, an insulating layer 130 on the electrode 110 and the insulating layer 115, and an electrode 120 on the insulating layer 130. At least a portion of the electrode 110, at least a portion of the insulating layer 130, and at least a portion of the electrode 120 are disposed in the openings formed in the insulating layer 114 and the insulating layer 115.

[0192] The electrode 110 functions as a lower electrode of the capacitor 220, the electrode 120 functions as an upper electrode of the capacitor 220, and the insulating layer 130 functions as a dielectric of the capacitor 220. The capacitor 220 has a configuration in which the upper electrode and the lower electrode face each other across the dielectric not only on the bottom surface but also on the side surfaces of the openings in the insulating layers 114 and 115, allowing for a larger capacitance per unit area. Therefore, the deeper the openings, the larger the capacitance of the capacitor 220 can be. Increasing the capacitance per unit area of ​​the capacitor 220 in this way can promote miniaturization or high integration of semiconductor devices.

[0193] The shape of the openings formed in insulating layer 114 and insulating layer 115 when viewed from above may be a rectangle, a polygon other than a rectangle, a polygon with curved corners, or a circle including an ellipse.

[0194] Furthermore, insulating layers 116 and 154 are provided on insulating layer 130 and electrode 120. Furthermore, electrode 112 is embedded in insulating layer 114, insulating layer 115, insulating layer 130, insulating layer 116, and insulating layer 154. Electrode 112 is electrically connected to electrode 152. Electrode 112 can function as a contact plug. Furthermore, electrode 153 is provided on insulating layer 154. Electrode 153 is electrically connected to electrode 112.

[0195] Furthermore, an insulating layer 156 is provided on the insulating layer 154 and the electrode 153 .

[0196] [Variation 1] 10 shows a semiconductor device 100A, which is a modification of the semiconductor device 100. The semiconductor device 100A has an integrated circuit 150A and an integrated circuit 160 stacked on top of each other. The integrated circuit 150A uses OS transistors as transistors such as the transistor 233a and the transistor 233b included in the integrated circuit 150. By using OS transistors for all the transistors included in the semiconductor device 100A, the semiconductor device 100A can be a unipolar integrated circuit.

[0197] [Variation 2] 11 shows a semiconductor device 100B, which is a modification of the semiconductor device 100A. When all the transistors included in the semiconductor device 100 are OS transistors, the integrated circuit 150A and the integrated circuit 160 can be manufactured over the substrate 231 in the same process. This can improve the productivity of the semiconductor device. Furthermore, the production cost of the semiconductor device can be reduced.

[0198] Furthermore, if a substrate with high thermal conductivity such as a silicon substrate is used for the substrate 231, the cooling efficiency of the semiconductor device can be improved compared to when an insulating substrate is used, thereby improving the reliability of the semiconductor device.

[0199] <About the constituent materials> For example, a substrate, an insulating layer, a conductive layer, a semiconductor layer, a metal oxide, or the like can be used in a semiconductor device.

[0200] 〔substrate〕 There are no particular limitations on the material used for the substrate, and for example, an insulating substrate, a semiconductor substrate, or a conductive substrate may be used.

[0201] Examples of insulating substrates include glass substrates, quartz substrates, sapphire substrates, stabilized zirconia substrates (such as yttria-stabilized zirconia substrates), and resin substrates.

[0202] The semiconductor substrate may be, for example, a semiconductor substrate made of silicon or germanium, or a compound semiconductor substrate made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. A semiconductor substrate having an insulator region inside the semiconductor substrate, such as an SOI (Silicon On Insulator) substrate, may also be used.

[0203] As described above, when high-speed operation is required for an integrated circuit, it is preferable to use a single-crystal semiconductor substrate as the substrate.

[0204] Conductive substrates include graphite substrates, metal substrates, alloy substrates, and conductive resin substrates. Other examples include substrates containing metal nitrides and substrates containing metal oxides. Furthermore, examples include substrates in which a conductor or semiconductor is provided on an insulating substrate, substrates in which a conductor or insulator is provided on a semiconductor substrate, and substrates in which a semiconductor or insulator is provided on a conductive substrate. Alternatively, these substrates may be provided with elements. Examples of elements provided on the substrate include capacitive elements, resistive elements, switching elements, light-emitting elements, and memory elements. Semiconductor substrates on which semiconductor elements such as strained transistors and FIN-type transistors are provided may also be used. In other words, the substrate is not limited to a simple support substrate, but may also be a substrate on which other devices such as transistors are formed.

[0205] [Insulating layer] Materials used for the insulating layer include oxides, nitrides, oxynitrides, nitride oxides, metal oxides, metal oxynitrides, and metal nitride oxides, all of which have insulating properties.

[0206] For example, as transistors become more miniaturized and highly integrated, thinner gate insulating layers can cause problems such as leakage current. Using high-k materials for the insulating layer that functions as the gate insulating layer makes it possible to lower the voltage required for transistor operation while maintaining the physical film thickness. On the other hand, using a material with a low dielectric constant for the insulator that functions as the interlayer insulating layer can reduce the parasitic capacitance that occurs between wiring. Therefore, it is best to select materials based on the function of the insulating layer.

[0207] Furthermore, examples of insulators with a high relative dielectric constant include gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, and nitrides containing silicon and hafnium.

[0208] Examples of insulators with a low dielectric constant include silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added, silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, silicon oxide with voids, and resin.

[0209] Furthermore, when an OS transistor is used as a transistor, the transistor can have stable electrical characteristics by being surrounded by an insulating layer (such as the insulating layer 365 or the insulating layer 371) that has a function of suppressing the permeation of impurities such as hydrogen and oxygen. Examples of insulators that have a function of suppressing the permeation of impurities such as hydrogen and oxygen include, for example, insulators containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, and tantalum, and can be used in a single layer or a stacked layer. Specifically, examples of insulators that have a function of suppressing the permeation of impurities such as hydrogen and oxygen include metal oxides such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide, and metal nitrides such as aluminum nitride, aluminum titanium nitride, titanium nitride, silicon nitride oxide, and silicon nitride.

[0210] The insulating layer functioning as the gate insulating layer is preferably an insulator having a region containing oxygen that is released by heating. For example, by using a structure in which silicon oxide or silicon oxynitride having a region containing oxygen that is released by heating is in contact with the semiconductor layer 260, oxygen vacancies in the semiconductor layer 260 can be compensated for.

[0211] In this specification, "nitride oxide" refers to a compound containing more nitrogen than oxygen. "Oxynitride" refers to a compound containing more oxygen than nitrogen. The content of each element can be measured using, for example, Rutherford Backscattering Spectrometry (RBS).

[0212] When an oxide semiconductor, which is a type of metal oxide, is used for the semiconductor layer, it is preferable to reduce the hydrogen concentration in the insulating layer in order to prevent an increase in the hydrogen concentration in the semiconductor layer. Specifically, the hydrogen concentration in the insulating layer is preferably reduced to 2×10 by secondary ion mass spectrometry (SIMS). 20 atoms / cm 3 Less than or equal to 5 x 10 19 atoms / cm 3 Less than or equal to 1×10 19 atoms / cm 3 Less than 5 × 10, more preferably 18 atoms / cm 3 In particular, it is preferable to reduce the hydrogen concentration in the insulating layer in contact with the semiconductor layer.

[0213] When an oxide semiconductor, which is a type of metal oxide, is used for the semiconductor layer, it is preferable to reduce the nitrogen concentration in the insulating layer in order to prevent an increase in the nitrogen concentration in the semiconductor layer. Specifically, the nitrogen concentration in the insulating layer is preferably reduced to 5×10 by SIMS. 19 atoms / cm 3 Less than or equal to 5 x 10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 Less than 5 × 10, more preferably 17 atoms / cm 3 The following applies.

[0214] Furthermore, it is preferable that at least the region of the insulating layer that is in contact with the semiconductor layer has few defects, and typically, it is preferable that the signal observed by electron spin resonance (ESR) is small. For example, the above-mentioned signal is an E' center observed at a g value of 2.001. The E' center is caused by a dangling bond of silicon. For example, when a silicon oxide layer or a silicon oxynitride layer is used as the insulating layer, the spin density caused by the E' center is 3×10 17 spins / cm 3 Less than or equal to 5 x 10 16 spins / cm 3 A silicon oxide layer or a silicon oxynitride layer as follows may be used.

[0215] In addition to the signals mentioned above, a signal due to nitrogen dioxide (NO2) may be observed. This signal is split into three signals due to the nuclear spin of N, with g values ​​of 2.037 to 2.039 (referred to as the first signal), 2.001 to 2.003 (referred to as the second signal), and 1.964 to 1.966 (referred to as the third signal).

[0216] For example, the spin density of the signal caused by nitrogen dioxide (NO2) as an insulating layer is 1×10 17 spins / cm 3 More than 1×10 18 spins / cm 3 It is preferable to use an insulating layer having a thickness of less than 1000 .mu.m.

[0217] In addition, nitrogen oxides (NO x ) forms a level in the insulating layer. This level is located within the energy gap of the oxide semiconductor layer. xWhen nitrogen oxides diffuse to the interface between the insulating layer and the oxide semiconductor layer, the level may trap electrons on the insulating layer side. As a result, the trapped electrons remain near the interface between the insulating layer and the oxide semiconductor layer, which shifts the threshold voltage of the transistor in the positive direction. Therefore, using a film with a low content of nitrogen oxides as the insulating layer can reduce the shift in the threshold voltage of the transistor.

[0218] Nitrogen oxides (NO x As an insulating layer that emits a small amount of nitrogen oxides (NO), for example, a silicon oxynitride layer can be used. The silicon oxynitride layer emits a small amount of nitrogen oxides (NO) in thermal desorption spectroscopy (TDS). x ) is a membrane that releases more ammonia than the amount of ammonia released, typically 1 × 10 18 / cm 3 5x10 or more 19 / cm 3 The above-mentioned amount of released ammonia is the total amount when the temperature of the heat treatment in TDS is in the range of 50°C or more and 650°C or less, or 50°C or more and 550°C or less.

[0219] Nitrogen oxides (NO x ) reacts with ammonia and oxygen during heat treatment, so by using an insulating layer that releases a large amount of ammonia, nitrogen oxides (NO x ) is reduced.

[0220] At least one of the insulating layers in contact with the oxide semiconductor layer is preferably formed using an insulating layer from which oxygen is released by heating. Specifically, in TDS performed at a surface temperature of the insulating layer at 100° C. to 700° C., preferably at 100° C. to 500° C., the amount of released oxygen, converted into oxygen atoms, is 1.0×10 18 atoms / cm 3 That's it, 1.0 x 10 19 atoms / cm 3 or more, or 1.0×10 20 atoms / cm 3It is preferable to use an insulating layer having the above structure. Note that in this specification and the like, oxygen released by heating is also referred to as "excess oxygen."

[0221] Alternatively, an insulating layer containing excess oxygen can be formed by adding oxygen to an insulating layer. The oxygen addition treatment can be performed by heat treatment in an oxidizing atmosphere, plasma treatment, or the like. Alternatively, oxygen may be added by ion implantation, ion doping, plasma immersion ion implantation, or the like. Examples of gases used in the oxygen addition treatment include: 16 O2 or 18 Examples of the oxygen-containing gas include oxygen gas such as O2, nitrous oxide gas, and ozone gas. In this specification, the process of adding oxygen is also referred to as "oxygen doping process." The oxygen doping process may be performed by heating the substrate.

[0222] The insulating layer may be made of a heat-resistant organic material such as polyimide, acrylic resin, benzocyclobutene resin, polyamide, or epoxy resin. In addition to the above organic materials, low-dielectric-constant materials (low-k materials), siloxane resin, PSG (phosphorus glass), BPSG (borophosphorus glass), or the like may be used. The insulating layer may be formed by stacking multiple insulating layers made of these materials.

[0223] The siloxane-based resin corresponds to a resin containing Si-O-Si bonds formed using a siloxane-based material as a starting material. The siloxane-based resin may have an organic group (e.g., an alkyl group or an aryl group) or a fluoro group as a substituent. The organic group may also have a fluoro group.

[0224] The method for forming the insulating layer is not particularly limited. Note that, depending on the material used for the insulating layer, a firing step may be required. In this case, by combining the firing step of the insulating layer with other heat treatment steps, it becomes possible to efficiently manufacture a transistor.

[0225] The method for forming the insulating layer is not particularly limited. Note that, depending on the material used for the insulating layer, a firing step may be required. In this case, by combining the firing step of the insulating layer with other heat treatment steps, it becomes possible to efficiently manufacture a transistor.

[0226] [Conductive Layer] The conductive layer is preferably made of a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, etc., or an alloy containing the above metal elements, or an alloy combining the above metal elements. For example, tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, oxides containing lanthanum and nickel, etc. Furthermore, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred because they are conductive materials that are resistant to oxidation or maintain conductivity even when absorbing oxygen. Furthermore, semiconductors with high electrical conductivity, such as polycrystalline silicon containing impurity elements such as phosphorus, and silicides such as nickel silicide may also be used.

[0227] Furthermore, a plurality of conductive layers formed from the above materials may be stacked. For example, a stacked structure may be formed by combining the above-described material containing a metal element and a conductive material containing oxygen. A stacked structure may be formed by combining the above-described material containing a metal element and a conductive material containing nitrogen. A stacked structure may be formed by combining the above-described material containing a metal element, a conductive material containing oxygen, and a conductive material containing nitrogen.

[0228] When an oxide semiconductor, which is a type of metal oxide, is used as the semiconductor layer, the conductive layer functioning as the gate electrode preferably has a stacked structure in which a material containing the metal element and a conductive material containing oxygen are combined. In this case, the conductive material containing oxygen is preferably provided on the channel formation region side. By providing the conductive material containing oxygen on the channel formation region side, oxygen released from the conductive material is easily supplied to the channel formation region.

[0229] In particular, for the conductive layer functioning as a gate electrode, a conductive material containing oxygen and a metal element contained in the metal oxide in which the channel is formed may be preferably used. Alternatively, a conductive material containing the aforementioned metal element and nitrogen may be used. For example, a conductive material containing nitrogen, such as titanium nitride or tantalum nitride, may be used. Alternatively, indium tin oxide (ITO), indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide doped with silicon may be used. Furthermore, indium gallium zinc oxide containing nitrogen may be used. Using such a material may allow hydrogen contained in the metal oxide in which the channel is formed to be captured. Alternatively, hydrogen introduced from an external insulator may be captured.

[0230] The conductive material used for the contact plugs may be, for example, a conductive material with high embeddability, such as tungsten or polysilicon. Alternatively, a conductive material with high embeddability may be used in combination with a barrier layer (diffusion prevention layer), such as a titanium layer, a titanium nitride layer, or a tantalum nitride layer.

[0231] [Semiconductor layer] For the semiconductor layer, a single crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, an amorphous semiconductor, or the like can be used alone or in combination. Examples of semiconductor materials that can be used include silicon and germanium. Compound semiconductors such as silicon germanium, silicon carbide, gallium arsenide, oxide semiconductors, and nitride semiconductors, as well as organic semiconductors can also be used.

[0232] When an organic semiconductor is used for the semiconductor layer, a low-molecular organic material having an aromatic ring or a π-electron conjugated conductive polymer can be used, such as rubrene, tetracene, pentacene, perylene diimide, tetracyanoquinodimethane, polythiophene, polyacetylene, or polyparaphenylene vinylene.

[0233] Note that semiconductor layers may be stacked. When semiconductor layers are stacked, semiconductors having different crystal states or different semiconductor materials may be used for the respective layers.

[0234] In addition, since the band gap of an oxide semiconductor, which is a type of metal oxide, is 2 eV or more, when an oxide semiconductor is used for the semiconductor layer, a transistor with extremely low off-state current can be realized. Specifically, when the voltage between the source and drain is 3.5 V and at room temperature (typically 25°C), the off-state current per 1 μm of channel width can be reduced to 1×10 -20 Less than A, 1 x 10 -22 Less than A or 1 x 10 -24 A or less can be achieved. That is, the on / off ratio can be increased to 20 digits or more. Furthermore, a transistor using an oxide semiconductor in a semiconductor layer (OS transistor) has a high withstand voltage between the source and drain. Therefore, a highly reliable transistor can be provided. Furthermore, a transistor with a high output voltage and high withstand voltage can be provided. Furthermore, a highly reliable memory device or the like can be provided. Furthermore, a memory device with a high output voltage and high withstand voltage can be provided.

[0235] Crystalline silicon transistors have a relatively high mobility compared to OS transistors. However, it is difficult for crystalline silicon transistors to achieve an extremely low off-state current like OS transistors. Therefore, it is important to select appropriate semiconductor materials for the semiconductor layer depending on the purpose and application. For example, OS transistors and crystalline silicon transistors may be used in combination depending on the purpose and application.

[0236] When an oxide semiconductor layer is used as the semiconductor layer, it is preferable to form the oxide semiconductor layer by a sputtering method. Forming the oxide semiconductor layer by a sputtering method is preferable because the density of the oxide semiconductor layer can be increased. When the oxide semiconductor layer is formed by a sputtering method, a rare gas (typically argon), oxygen, or a mixed gas of a rare gas and oxygen may be used as a sputtering gas. Furthermore, the sputtering gas must be highly purified. For example, oxygen gas or a rare gas used as a sputtering gas is highly purified to a dew point of −60° C. or lower, preferably −100° C. or lower. By using a highly purified sputtering gas for film formation, moisture and the like can be prevented from being introduced into the oxide semiconductor layer as much as possible.

[0237] When the oxide semiconductor layer is formed by a sputtering method, it is preferable to remove moisture from a film formation chamber of a sputtering apparatus as much as possible. For example, the film formation chamber is evacuated to a high vacuum (5×10) using an adsorption-type vacuum exhaust pump such as a cryopump. -7 Pa to 1 x 10 -4 In particular, it is preferable to exhaust the gas to a pressure of 1×10 Pa or less (approximately 1×10 Pa) equivalent to the partial pressure of gas molecules equivalent to HO (gas molecules equivalent to m / z=18) in the deposition chamber during standby of the sputtering apparatus. -4 Pa or less, and 5×10 -5 It is more preferable that the viscosity is set to Pa or less.

[0238] [Metal oxides] By changing the composition of elements contained in metal oxides, it is possible to create conductors, semiconductors, and insulators. Metal oxides with conductive properties are sometimes called "conductive oxides." Metal oxides with semiconducting properties are sometimes called "oxide semiconductors." Metal oxides with insulating properties are sometimes called "insulating oxides."

[0239] The oxide semiconductor, which is a type of metal oxide, preferably contains indium or zinc. It is particularly preferable that it contains indium and zinc. It is also preferable that it contains aluminum, gallium, yttrium, tin, or the like in addition to these. It may also contain one or more elements selected from boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, or the like.

[0240] Here, consider a case where the oxide semiconductor contains indium, an element M, and zinc. The element M is aluminum, gallium, yttrium, tin, or the like. Other elements that can be used as the element M include boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium. However, there are cases where the element M may be a combination of two or more of the above-mentioned elements.

[0241] In this specification and the like, nitrogen-containing metal oxides may also be collectively referred to as metal oxides. Nitrogen-containing metal oxides may also be referred to as metal oxynitrides.

[0242] [Metal oxide structures] Oxide semiconductors (metal oxides) are classified into single-crystal oxide semiconductors and non-single-crystal oxide semiconductors, such as CAAC-OS, polycrystalline oxide semiconductors, nanocrystalline oxide semiconductors (nc-OS), amorphous-like oxide semiconductors (a-like OS), and amorphous oxide semiconductors.

[0243] CAAC-OS has a c-axis orientation and a distorted crystal structure in which multiple nanocrystals are connected in the ab-plane direction. The distorted crystal structure refers to the change in the lattice orientation between regions with a uniform lattice arrangement and regions with a different uniform lattice arrangement in the regions where multiple nanocrystals are connected.

[0244] Nanocrystals are basically hexagonal, but not necessarily regular hexagons; they can also have non-regular hexagonal shapes. Furthermore, the lattice arrangement of CAAC-OS can be pentagonal, heptagonal, or other shapes due to distortion. It is difficult to identify clear grain boundaries in CAAC-OS, even near the distortion. This indicates that the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is because CAAC-OS can tolerate distortion due to the lack of close-packed arrangement of oxygen atoms in the ab-plane direction and the change in interatomic bond distance caused by substitution of metal elements.

[0245] CAAC-OS also tends to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium and oxygen (hereinafter referred to as an In layer) and a layer containing the element M, zinc, and oxygen (hereinafter referred to as an (M,Zn) layer) are stacked. Note that indium and the element M are mutually substituted, and when the element M in an (M,Zn) layer is substituted with indium, it can also be expressed as an (In,M,Zn) layer. When the indium in an In layer is substituted with the element M, it can also be expressed as an (In,M) layer.

[0246] CAAC-OS is a metal oxide with high crystallinity. Because it is difficult to identify clear grain boundaries in CAAC-OS, it is unlikely that the electron mobility will decrease due to grain boundaries. Furthermore, because the crystallinity of metal oxides can be reduced by the incorporation of impurities or the generation of defects, CAAC-OS can be considered a metal oxide with few impurities or defects (such as oxygen vacancies). Therefore, metal oxides with CAAC-OS have stable physical properties. Therefore, metal oxides with CAAC-OS are heat-resistant and highly reliable.

[0247] The nc-OS has periodic atomic arrangement in a small region (for example, a region of 1 nm to 10 nm, particularly a region of 1 nm to 3 nm). Furthermore, the nc-OS exhibits no regularity in the crystal orientation between different nanocrystals. Therefore, no orientation is observed throughout the film. Therefore, depending on the analytical method, the nc-OS may be indistinguishable from an a-like OS or an amorphous oxide semiconductor.

[0248] In-Ga-Zn oxide (hereinafter referred to as IGZO), a type of metal oxide containing indium, gallium, and zinc, can sometimes have a stable structure when made into the above-mentioned nanocrystals. In particular, since IGZO tends to have difficulty growing crystals in the atmosphere, it may be structurally more stable to make it into smaller crystals (for example, the above-mentioned nanocrystals) than larger crystals (here, crystals of a few millimeters or a few centimeters).

[0249] The a-like OS is a metal oxide having a structure between the nc-OS and the amorphous oxide semiconductor. The a-like OS has pores or low-density regions. That is, the a-like OS has lower crystallinity than the nc-OS and CAAC-OS.

[0250] Oxide semiconductors (metal oxides) have a variety of structures, each with different characteristics. The oxide semiconductor of one embodiment of the present invention may include two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-like OS, an nc-OS, and a CAAC-OS.

[0251] [Transistors with metal oxides] Next, a case where the above metal oxide is used for a channel formation region of a transistor will be described.

[0252] By using the metal oxide for a channel formation region of a transistor, a transistor with high field-effect mobility and high reliability can be realized.

[0253] Furthermore, it is preferable to use a metal oxide with a low carrier density for a transistor. In order to reduce the carrier density of a metal oxide, the impurity concentration in the metal oxide may be reduced to reduce the defect state density. In this specification and the like, a low impurity concentration and a low defect state density are referred to as high-purity intrinsic or substantially high-purity intrinsic. For example, a metal oxide having a carrier density of 8×10 11 cm -3 Less than 1 x 10 11 cm -3 less than 1×10 10 cm -3 Less than 1 x 10 -9 cm -3 That's all there is to it.

[0254] Furthermore, a highly purified intrinsic or substantially highly purified intrinsic metal oxide has a low density of defect states, and therefore may also have a low density of trap states.

[0255] In addition, charges trapped in the trap states of a metal oxide take a long time to dissipate and may behave like fixed charges. Therefore, a transistor having a channel formation region made of a metal oxide with a high density of trap states may have unstable electrical characteristics.

[0256] Therefore, to stabilize the electrical characteristics of a transistor, it is effective to reduce the impurity concentration in the metal oxide. Furthermore, to reduce the impurity concentration in the metal oxide, it is preferable to also reduce the impurity concentration in the adjacent film. Impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, etc.

[0257] [impurities] Here, the influence of each impurity in the metal oxide will be described.

[0258] Furthermore, when a metal oxide contains an alkali metal or alkaline earth metal, defect levels may be formed, generating carriers. Therefore, a transistor using a metal oxide containing an alkali metal or alkaline earth metal in a channel formation region is likely to have normally-on characteristics. For this reason, it is preferable to reduce the concentration of the alkali metal or alkaline earth metal in the metal oxide. Specifically, the concentration of the alkali metal or alkaline earth metal in the metal oxide obtained by SIMS is reduced to 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 Do the following:

[0259] Furthermore, hydrogen contained in metal oxide reacts with oxygen bonded to metal atoms to form water, which may form oxygen vacancies. When oxygen vacancies are present in the channel formation region of a metal oxide, the transistor tends to exhibit normally-on characteristics. Furthermore, hydrogen entering the oxygen vacancies may generate electrons, which act as carriers. Furthermore, some of the hydrogen may bond with oxygen bonded to metal atoms to generate electrons, which act as carriers. Therefore, a transistor using a metal oxide containing hydrogen tends to exhibit normally-on characteristics.

[0260] For this reason, it is preferable that the hydrogen content in the metal oxide is reduced as much as possible. Specifically, the hydrogen concentration in the metal oxide obtained by SIMS is reduced to 1×10 20 atoms / cm3 Less than 1 x 10 19 atoms / cm 3 less than 5 × 10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 By using a metal oxide with sufficiently reduced impurities for a channel formation region of a transistor, stable electrical characteristics can be obtained.

[0261] It is preferable to use a highly crystalline thin film as the metal oxide semiconductor of a transistor. The use of such a thin film can improve the stability or reliability of the transistor. Examples of such a thin film include a thin film of a single-crystal metal oxide or a thin film of a polycrystalline metal oxide. However, forming a thin film of a single-crystal metal oxide or a thin film of a polycrystalline metal oxide on a substrate requires a high-temperature or laser heating process. This increases the cost of the manufacturing process and also reduces throughput.

[0262] In 2009, the discovery of In-Ga-Zn oxide with a CAAC structure (referred to as CAAC-IGZO) was reported in Non-Patent Documents 1 and 2. It was reported that CAAC-IGZO has a c-axis orientation, no clearly visible grain boundaries, and can be formed on a substrate at low temperatures. Furthermore, it was reported that transistors using CAAC-IGZO have excellent electrical properties and reliability.

[0263] In 2013, an In-Ga-Zn oxide (called nc-IGZO) with an nc structure was discovered (see Non-Patent Document 3). It was reported that nc-IGZO has periodic atomic arrangement in minute regions (for example, regions of 1 nm to 3 nm), and no regularity in the crystal orientation is observed between different regions.

[0264] Non-Patent Documents 4 and 5 show the changes in average crystal size due to electron beam irradiation in thin films of the above-mentioned CAAC-IGZO, nc-IGZO, and low-crystallinity IGZO. Crystalline IGZO with crystal sizes of approximately 1 nm was observed in the low-crystallinity IGZO thin film even before electron beam irradiation. Therefore, it was reported that the presence of a completely amorphous structure could not be confirmed in IGZO. Furthermore, it was shown that CAAC-IGZO and nc-IGZO thin films are more stable against electron beam irradiation than low-crystallinity IGZO thin films. Therefore, it is preferable to use CAAC-IGZO or nc-IGZO thin films as transistor semiconductors.

[0265] A transistor using a metal oxide has an extremely low leakage current in the off-state. Specifically, the off-state current per 1 μm of the channel width of the transistor is yA / μm (10 -24 Non-Patent Document 6 shows that the leakage current is on the order of A / μm. For example, a low-power CPU that utilizes the low leakage current characteristic of transistors using metal oxides has been disclosed (see Non-Patent Document 7).

[0266] Furthermore, the application of metal oxide transistors to display devices has been reported, taking advantage of their low leakage current (see Non-Patent Document 8). Display devices change the displayed image several tens of times per second. The number of image changes per second is called the refresh rate. The refresh rate is also sometimes called the drive frequency. Such high-speed screen changes, which are difficult for the human eye to perceive, are thought to cause eye fatigue. Therefore, it has been proposed to reduce the refresh rate of display devices to reduce the number of image rewrites. Furthermore, driving at a reduced refresh rate can reduce the power consumption of display devices. This driving method is called idling stop (IDS) driving.

[0267] The discovery of the CAAC and nc structures has contributed to improving the electrical characteristics and reliability of transistors using metal oxides with the CAAC or nc structure, as well as reducing the cost and throughput of the manufacturing process. Furthermore, research into the application of these transistors to display devices and LSIs is ongoing, taking advantage of their low leakage current.

[0268] [Film formation method] An insulating material for forming an insulating layer, a conductive material for forming a conductive layer, or a semiconductor material for forming a semiconductor layer can be formed using a sputtering method, a spin coating method, a CVD (Chemical Vapor Deposition) method (including a thermal CVD method, a MOCVD (Metal Organic Chemical Vapor Deposition) method, a PECVD (Plasma Enhanced CVD) method, a high density plasma CVD (High density plasma CVD) method, a LPCVD (Low pressure CVD) method, an APCVD (Atmospheric pressure CVD) method, etc.), an ALD (Atomic Layer Deposition) method, an MBE (Molecular Beam Epitaxy) method, a PLD (Pulsed Laser Deposition) method, a dipping method, a spray coating method, a droplet discharge method (such as an inkjet method), or a printing method (such as a screen printing method or an offset printing method).

[0269] The plasma CVD method can produce high-quality films at relatively low temperatures. When using a film formation method that does not use plasma during film formation, such as MOCVD, ALD, or thermal CVD, damage to the surface on which the film is formed is less likely to occur. For example, wiring, electrodes, and elements (transistors, capacitors, etc.) contained in a memory device may become charged up by receiving electrical charge from the plasma. This accumulated electrical charge can destroy the wiring, electrodes, and elements contained in the memory device. On the other hand, film formation methods that do not use plasma do not cause such plasma damage, which can increase the yield of memory devices. Furthermore, because plasma damage does not occur during film formation, films with fewer defects can be obtained.

[0270] Furthermore, ALD utilizes the self-regulating properties of atoms to deposit atoms layer by layer, enabling the formation of ultrathin films, films with high aspect ratios, films with fewer defects such as pinholes, films with excellent coverage, and films formed at low temperatures. ALD also includes plasma-enhanced ALD (PEALD), which utilizes plasma. Using plasma can sometimes be preferable because it enables film formation at lower temperatures. Note that some precursors used in ALD contain impurities such as carbon. Therefore, films formed by ALD may contain higher amounts of impurities such as carbon than films formed by other film formation methods. Quantitative determination of impurities can be performed using X-ray photoelectron spectroscopy (XPS).

[0271] Unlike film formation methods in which particles emitted from a target or the like are deposited, CVD and ALD are film formation methods in which a film is formed by a reaction on the surface of a workpiece. Therefore, these film formation methods are less affected by the shape of the workpiece and have good step coverage. In particular, ALD has excellent step coverage and excellent thickness uniformity, making it suitable for coating the surface of openings with high aspect ratios. However, because ALD has a relatively slow film formation rate, it may be preferable to use it in combination with other film formation methods, such as CVD, which has a faster film formation rate.

[0272] The CVD and ALD methods can control the composition of the resulting film by adjusting the flow rate ratio of the source gases. For example, the CVD and ALD methods can form a film of any composition by adjusting the flow rate ratio of the source gases. Furthermore, for example, the CVD and ALD methods can form a film with a continuously changing composition by changing the flow rate ratio of the source gases while forming the film. When forming a film while changing the flow rate ratio of the source gases, the time required for film formation can be shortened by the time required for transportation and pressure adjustment compared to when forming a film using multiple film formation chambers. This can sometimes increase the productivity of memory devices.

[0273] This embodiment mode can be implemented in appropriate combination with any of the structures described in other embodiment modes.

[0274] (Fourth embodiment) In this embodiment, structural examples of a transistor 210A and a transistor 210B that can be used as the transistor 210 will be described with reference to drawings.

[0275] <Transistor structure example 1> An example structure of a transistor 210A will be described using Figures 12A, 12B, and 12C. Figure 12A is a top view of the transistor 210A. Figure 12B is a cross-sectional view of the L1-L2 portion indicated by the dashed-dotted line in Figure 12A. Figure 12C is a cross-sectional view of the W1-W2 portion indicated by the dashed-dotted line in Figure 12A. Note that in the top view of Figure 12A, some elements are omitted for clarity.

[0276] 12A, 12B, and 12C show the transistor 210A and insulating layers 361, 362, 365, 366, 371, 380, 374, and 381 that function as interlayer insulating layers. Also shown are conductive layers 340 (conductive layers 340a and 340b) that are electrically connected to the transistor 210A and function as contact plugs. Note that insulating layers 341 (insulating layers 341a and 341b) are provided in contact with the side surfaces of the conductive layers 340 that function as contact plugs.

[0277] The interlayer insulating layer can be formed of a single layer or a stack of insulators such as silicon oxide, silicon oxynitride, silicon nitride oxide, aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST). Alternatively, these insulators may contain, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide. Alternatively, these insulators may be nitrided. Silicon oxide, silicon oxynitride, or silicon nitride may be stacked on the above insulators.

[0278] The transistor 210A includes a conductive layer 360 (conductive layer 360a and conductive layer 360b) functioning as a first gate electrode, a conductive layer 305 (conductive layer 305a and conductive layer 305b) functioning as a second gate electrode, an insulating layer 349 functioning as a first gate insulating layer, insulating layers 365 and 366 functioning as a second gate insulating layer, a semiconductor layer 260 (semiconductor layer 260a, semiconductor layer 260b, and semiconductor layer 260c) having a region where a channel is formed, a conductive layer 342a functioning as one of a source or a drain, a conductive layer 342b functioning as the other of the source or the drain, and an insulating layer 371.

[0279] The conductive layer 305 is disposed so as to be embedded in the insulating layer 362, and the insulating layer 365 is disposed on the insulating layer 362 and the conductive layer 305. The insulating layer 366 is disposed on the insulating layer 365. Furthermore, the semiconductor layer 260 (semiconductor layer 260a, semiconductor layer 260b, and semiconductor layer 260c) is disposed on the insulating layer 366. The insulating layer 349 is disposed on the semiconductor layer 260, and the conductive layer 360 (conductive layer 360a and conductive layer 360b) is disposed on the insulating layer 349.

[0280] The conductive layer 342a and the conductive layer 342b are arranged in contact with a portion of the upper surface of the semiconductor layer 260b, and the insulating layer 371 is arranged in contact with a portion of the upper surface of the insulating layer 366, the side of the semiconductor layer 260a, the side of the semiconductor layer 260b, the side of the conductive layer 342a, the upper surface of the conductive layer 342a, the side of the conductive layer 342b, and the upper surface of the conductive layer 342b.

[0281] The insulating layer 341 is provided in contact with the sidewall of an opening formed in the insulating layer 380, the insulating layer 374, and the insulating layer 381. The first conductor of the conductive layer 340 is provided in contact with the side surface of the insulating layer 341, and the second conductor of the conductive layer 340 is provided further inside. Here, the height of the top surface of the conductive layer 340 and the height of the top surface of the insulating layer 381 can be approximately the same. Note that, although the transistor 210A shows a structure in which the first conductor of the conductive layer 340 and the second conductor of the conductive layer 340 are stacked, the present invention is not limited to this. For example, the conductive layer 340 may be provided as a single layer or a stacked structure of three or more layers. When a structure has a stacked structure, ordinal numbers may be assigned to indicate the order of formation to distinguish them.

[0282] The semiconductor layer 260 preferably includes a semiconductor layer 260a disposed on the insulating layer 366, a semiconductor layer 260b disposed on the semiconductor layer 260a, and a semiconductor layer 260c disposed on the semiconductor layer 260b, at least a portion of which is in contact with the upper surface of the semiconductor layer 260b. By providing the semiconductor layer 260a below the semiconductor layer 260b, it is possible to suppress the diffusion of impurities from structures formed below the semiconductor layer 260a to the semiconductor layer 260b. Furthermore, by providing the semiconductor layer 260c on the semiconductor layer 260b, it is possible to suppress the diffusion of impurities from structures formed above the semiconductor layer 260c to the semiconductor layer 260b.

[0283] The transistor 210A preferably uses an oxide semiconductor, which is a type of metal oxide, for the semiconductor layer 260.

[0284] A transistor using an oxide semiconductor for a semiconductor layer in which a channel is formed has an extremely low leakage current (off-state current) when off. Therefore, a semiconductor device with reduced power consumption can be realized. Furthermore, since an oxide semiconductor can be formed by a sputtering method or the like, a highly integrated semiconductor device can be easily realized.

[0285] For example, a metal oxide such as In-M-Zn oxide (wherein element M is one or more elements selected from gallium, yttrium, tin, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, etc.) may be used as the semiconductor layer 260. In particular, element M may be gallium, yttrium, or tin. Alternatively, the semiconductor layer 260 may be an In-M oxide, an In-Zn oxide, or an M-Zn oxide.

[0286] In the transistor 210A, the conductive layer 360 functioning as a first gate (also referred to as a top gate) electrode is formed in a self-aligned manner to fill an opening formed in the insulating layer 380 or the like. By forming the conductive layer 360 in this manner, the conductive layer 360 can be reliably disposed in the region between the conductive layer 342a and the conductive layer 342b without alignment.

[0287] The conductive layer 360 preferably includes a conductive layer 360a and a conductive layer 360b disposed on the conductive layer 360a. For example, the conductive layer 360a is preferably disposed so as to surround the bottom and side surfaces of the conductive layer 360b. As shown in FIG. 12B, the top surface of the conductive layer 360 is substantially flush with the top surfaces of the insulating layer 349 and the oxide 260c.

[0288] The conductive layer 305 may function as a second gate (also referred to as a bottom gate) electrode. In this case, the threshold voltage (Vth) of the transistor 210A can be controlled by changing the potential applied to the conductive layer 305 independently of the potential applied to the conductive layer 360. In particular, applying a negative potential to the conductive layer 305 can increase the Vth of the transistor 210A above 0 V, thereby reducing the off-state current. Therefore, applying a negative potential to the conductive layer 305 can reduce the drain current when the potential applied to the conductive layer 360 is 0 V, compared to when a negative potential is not applied.

[0289] Furthermore, for example, by providing the conductive layer 305 and the conductive layer 360 so as to overlap with each other with the channel formation region of the semiconductor layer 260 interposed therebetween, when a voltage is applied to the conductive layer 305 and the conductive layer 360, the electric field generated from the conductive layer 360 and the electric field generated from the conductive layer 305 are connected to each other, and the channel formation region of the semiconductor layer 260 can be covered.

[0290] That is, the channel formation region can be electrically surrounded by the electric field of the conductive layer 360 functioning as the first gate electrode and the electric field of the conductive layer 305 functioning as the second gate electrode. In this specification and the like, a transistor structure in which the channel formation region is electrically surrounded by the electric fields of the first gate electrode and the second gate electrode is referred to as a surrounded channel (S-channel) structure.

[0291] The insulating layer 365 and the insulating layer 371 preferably have a function of suppressing diffusion of hydrogen (for example, at least one of hydrogen atoms, hydrogen molecules, and the like). The insulating layer 365 and the insulating layer 371 preferably have a function of suppressing diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, and the like). For example, the insulating layer 365 and the insulating layer 371 preferably have a function of suppressing diffusion of one or both of hydrogen and oxygen more than the insulating layer 366. The insulating layer 365 and the insulating layer 371 preferably have a function of suppressing diffusion of one or both of hydrogen and oxygen more than the insulating layer 349. The insulating layer 365 and the insulating layer 371 preferably have a function of suppressing diffusion of one or both of hydrogen and oxygen more than the insulating layer 380.

[0292] In this specification and the like, a film having a function of suppressing the diffusion of hydrogen or oxygen may be referred to as a film that is difficult for hydrogen or oxygen to permeate, a film with low hydrogen or oxygen permeability, a film having barrier properties against hydrogen or oxygen, a barrier film against hydrogen or oxygen, etc. Furthermore, when the barrier film has conductivity, the barrier film may be referred to as a conductive barrier film.

[0293] 12B , the insulating layer 371 preferably contacts the top surfaces of the conductive layers 342a and 342b, the side surfaces of the conductive layers 342a and 342b other than the side surfaces where the conductive layers 342a and 342b face each other, the side surfaces of the semiconductor layers 260a and 260b, and a portion of the top surface of the insulating layer 366. This separates the insulating layer 380 from the insulating layer 366, the semiconductor layer 260a, and the semiconductor layer 260b by the insulating layer 371. This prevents impurities such as hydrogen contained in the insulating layer 380 from being mixed into the insulating layer 366, the semiconductor layer 260a, and the semiconductor layer 260b.

[0294] 12B, the transistor 210A has a structure in which the insulating layer 374 is in contact with the top surfaces of the conductive layer 360, the insulating layer 349, and the semiconductor layer 260c. This structure can prevent impurities such as hydrogen contained in the insulating layer 381 from entering the insulating layer 349. This can prevent adverse effects on the electrical characteristics and reliability of the transistor.

[0295] With the above structure, a transistor with a large on-state current, a transistor with a small off-state current, or a semiconductor device with reduced fluctuation in electrical characteristics, stable electrical characteristics, and improved reliability can be provided.

[0296] <Transistor structure example 2> An example structure of transistor 210B will be described using Figures 13A, 13B, and 13C. Figure 13A is a top view of transistor 210B. Figure 13B is a cross-sectional view of the L1-L2 portion indicated by the dashed-dotted line in Figure 13A. Figure 13C is a cross-sectional view of the W1-W2 portion indicated by the dashed-dotted line in Figure 13A. Note that in the top view of Figure 13A, some elements are omitted for clarity.

[0297] The transistor 210B is a modified example of the transistor 210A, and therefore, to avoid repetition of explanation, the differences from the transistor 210A will be mainly described.

[0298] The conductive layer 360 functioning as the first gate electrode includes a conductive layer 360a and a conductive layer 360b over the conductive layer 360a. The conductive layer 360a is preferably made of a conductive material that has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms. Alternatively, the conductive layer 360a is preferably made of a conductive material that has a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, and the like).

[0299] The conductive layer 360a has the function of suppressing oxygen diffusion, which improves the material selectivity of the conductive layer 360b. In other words, the conductive layer 360a suppresses oxidation of the conductive layer 360b, preventing a decrease in conductivity.

[0300] An insulating layer 371 is preferably provided to cover the top surface and side surfaces of the conductive layer 360, the side surfaces of the insulating layer 349, and the side surfaces of the semiconductor layer 260c. Note that the insulating layer 371 is preferably formed using an insulating material that has a function of suppressing the diffusion of impurities such as water or hydrogen and oxygen. For example, aluminum oxide or hafnium oxide is preferably used. Other examples of the insulating material that can be used include metal oxides such as magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, and tantalum oxide, silicon nitride oxide, and silicon nitride.

[0301] The insulating layer 371 can suppress oxidation of the conductive layer 360. Furthermore, the insulating layer 371 can suppress diffusion of impurities such as water and hydrogen contained in the insulating layer 380 into the transistor 210B.

[0302] In the transistor 210B, the conductive layer 360 overlaps with a part of the conductive layer 342a and a part of the conductive layer 342b, so the parasitic capacitance tends to be larger than that of the transistor 210A. Therefore, the operating frequency tends to be lower than that of the transistor 210A. However, the productivity of the transistor 210B is higher than that of the transistor 210A because the process of forming an opening in the insulating layer 380 or the like and burying the conductive layer 360, the insulating layer 349, or the like is not required.

[0303] This embodiment mode can be implemented in appropriate combination with any of the structures described in other embodiment modes.

[0304] (Embodiment 5) In this embodiment, a structure of a semiconductor device of one embodiment of the present invention will be described with reference to FIGS.

[0305] FIG. 19 illustrates a structure of a semiconductor device of one embodiment of the present invention.

[0306] <Configuration Example 1 of Semiconductor Device 800> A semiconductor device 800 described in this embodiment includes a semiconductor device 100 and a semiconductor device 700 (see FIG. 19). For example, the semiconductor device described in the second embodiment can be used as the semiconductor device 100. Furthermore, for example, the semiconductor device described in the first embodiment can be used as the semiconductor device 700.

[0307] <<Configuration Example 1 of Semiconductor Device 100>> The semiconductor device 100 has a function of supplying a predetermined current or a predetermined voltage.

[0308] The semiconductor device 100 is electrically connected to the second semiconductor device 700, and a control signal CI1 is supplied to the semiconductor device 100. The semiconductor device 100 operates based on the control signal CI1.

[0309] For example, the semiconductor device 100 can stop the supply of power based on a control signal CI1. Specifically, the control signal CI1 is supplied to the input / output circuit 106, and based on the control signal CI1, the control circuit 105 stops the supply of power to the current adjustment circuit 104 (see FIG. 17).

[0310] This makes it possible to perform feedback control of the first semiconductor device 100 using the second semiconductor device 700. As a result, it is possible to provide a novel semiconductor device that is highly convenient and reliable.

[0311] <<Configuration Example 1 of Detection Unit 702>> The detection unit 702 includes a voltage detector VD, which measures the voltage required to supply a predetermined current.

[0312] <<Configuration Example 2 of Storage Unit 701B>> The storage unit 701B holds standard data DATA relating to voltage.

[0313] This makes it possible to monitor a deviation exceeding the tolerance information TI that occurs between the detected voltage and the standard data DATA. Alternatively, it is possible to monitor an abnormality in the first semiconductor device 100 connected to the second semiconductor device 700 using the voltage. Alternatively, it is possible to monitor an abnormality in the load connected to the first semiconductor device 100 using the voltage. As a result, it is possible to provide a novel semiconductor device that is excellent in convenience and reliability.

[0314] Configuration Example 2 of Detection Unit 702 The detection unit 702 includes a current detector CD, which measures the current required to supply a predetermined voltage.

[0315] <<Configuration Example 3 of Storage Unit 701B>> The storage unit 701B holds standard data DATA relating to current.

[0316] This makes it possible to monitor a deviation exceeding the tolerance information TI that occurs between the detected current and the standard data DATA. Alternatively, it is possible to monitor an abnormality in the first semiconductor device 100 electrically connected to the second semiconductor device 700 using the current. Alternatively, it is possible to monitor an abnormality in a load electrically connected to the first semiconductor device 100 using the current. As a result, it is possible to provide a novel semiconductor device that is excellent in convenience and reliability.

[0317] <<Configuration Example 3 of Detection Unit 702>> The detection unit 702 includes a terminal TT (see FIG. 1A), and the terminal TT is supplied with a detection signal related to temperature.

[0318] <<Configuration Example 4 of Storage Unit 701B>> The storage unit 701B holds standard data DATA relating to temperature.

[0319] This makes it possible to monitor any deviation exceeding the tolerance information TI that occurs between the detected temperature and the standard data DATA. Alternatively, it is possible to monitor an abnormality in the first semiconductor device 100 or a load connected to the second semiconductor device 700 using the temperature. As a result, it is possible to provide a novel semiconductor device that is highly convenient and reliable.

[0320] This embodiment mode can be implemented in appropriate combination with any of the structures described in other embodiment modes.

[0321] (Embodiment 6) In this embodiment, a configuration of a secondary battery system of one embodiment of the present invention will be described with reference to FIG.

[0322] FIG. 19 illustrates a configuration of a secondary battery system according to one embodiment of the present invention.

[0323] <Secondary battery system configuration example 1> The secondary battery system described in this embodiment includes a secondary battery 200 and a semiconductor device 800. For example, the semiconductor device 800 described in Embodiment 5 can be used.

[0324] <<Configuration Example 1 of Secondary Battery 200>> The secondary battery 200 is electrically connected to the semiconductor device 800 .

[0325] This makes it possible to detect, for example, a voltage exceeding the tolerance information TI applied to the secondary battery 200 being charged with a constant current. Alternatively, it is possible to detect a current exceeding the tolerance information TI flowing through the secondary battery 200 being charged with a constant voltage. Alternatively, it is possible to supply a control signal based on the tolerance information TI derived from the characteristics of the secondary battery 200. As a result, it is possible to provide a novel secondary battery system that is highly convenient and reliable.

[0326] <Secondary battery system configuration example 2> The secondary battery system described in this embodiment includes a secondary battery 200 and a semiconductor device 800.

[0327] <<Configuration Example 2 of Secondary Battery 200>> The secondary battery 200 is electrically connected to the semiconductor device 800. The secondary battery 200 includes a battery cell and a temperature detector TD. For example, the semiconductor device 800 described in the fifth embodiment can be used.

[0328] The temperature detector TD is electrically connected to the terminal TT, and detects the temperature of the battery cell.

[0329] This makes it possible to detect, for example, a temperature change exceeding the tolerance information TI of the secondary battery 200 during charging. As a result, it is possible to provide a novel secondary battery system that is highly convenient and reliable.

[0330] This embodiment mode can be implemented in appropriate combination with any of the structures described in other embodiment modes.

[0331] (Embodiment 7) In this embodiment, a cylindrical secondary battery 600 will be described with reference to Fig. 14A and Fig. 14B as an example of secondary battery 200. As shown in Fig. 14A, cylindrical secondary battery 600 has a positive electrode cap (battery lid) 601 on the top surface and a battery can (external can) 602 on the side and bottom surfaces. Positive electrode cap (battery lid) 601 and battery can (external can) 602 are insulated by a gasket (insulating packing) 610.

[0332] FIG. 14B is a schematic diagram showing the cross section of a cylindrical secondary battery. Inside a hollow cylindrical battery can 602, a battery element is provided, in which a strip-shaped positive electrode 604 and a negative electrode 606 are wound with a separator 605 sandwiched between them. Although not shown, the battery element is wound around a center pin. One end of the battery can 602 is closed and the other end is open. The battery can 602 can be made of a metal that is corrosion-resistant to the electrolyte, such as nickel, aluminum, or titanium, or an alloy of these metals or an alloy of these metals with other metals (e.g., stainless steel). Furthermore, a coating of nickel, aluminum, or the like is preferable to prevent corrosion by the electrolyte. Inside the battery can 602, the wound battery element, in which the positive electrode 604, the negative electrode 606, and the separator 605 are wound, is sandwiched between a pair of opposing insulating plates 608 and 609. A nonaqueous electrolyte (not shown) is poured into the battery can 602, in which the battery element is provided. A secondary battery consists of a positive electrode containing an active material such as lithium cobalt oxide (LiCoO2) or lithium iron phosphate (LiFePO4), a negative electrode made of a carbon material such as graphite that can absorb and release lithium ions, and a non-aqueous electrolyte solution in which an electrolyte made of a lithium salt such as LiBF4 or LiPF6 is dissolved in an organic solvent such as ethylene carbonate or diethyl carbonate.

[0333] Because the positive and negative electrodes used in cylindrical storage batteries are wound, it is preferable to form active materials on both sides of the current collector. A positive electrode terminal (positive electrode current collector lead) 603 is connected to the positive electrode 604, and a negative electrode terminal (negative electrode current collector lead) 607 is connected to the negative electrode 606. Both the positive electrode terminal 603 and the negative electrode terminal 607 can be made of a metal material such as aluminum. The positive electrode terminal 603 is resistance-welded to a safety valve mechanism 612, and the negative electrode terminal 607 is resistance-welded to the bottom of the battery can 602. The safety valve mechanism 612 is electrically connected to the positive electrode cap 601 via a PTC (Positive Temperature Coefficient) element 611. The safety valve mechanism 612 cuts off the electrical connection between the positive electrode cap 601 and the positive electrode 604 when the internal pressure of the battery exceeds a predetermined threshold. The PTC element 611 is a thermosensitive resistor whose resistance increases as the temperature rises, and the increased resistance limits the amount of current to prevent abnormal heat generation. The PTC element 611 can be made of barium titanate (BaTiO3)-based semiconductor ceramics or the like.

[0334] A lithium-ion secondary battery using an electrolyte solution has a positive electrode, a negative electrode, a separator, an electrolyte solution, and an outer casing. In a lithium-ion secondary battery, the anode (positive electrode) and cathode (negative electrode) are interchanged during charging and discharging, and oxidation and reduction reactions alternate. Therefore, the electrode with a higher reaction potential is called the positive electrode, and the electrode with a lower reaction potential is called the negative electrode. Therefore, in this specification and elsewhere, the positive electrode will be referred to as the "positive electrode" or "+ electrode (plus electrode)," and the negative electrode will be referred to as the "negative electrode" or "- electrode (minus electrode)," regardless of whether the battery is being charged or discharged. Using the terms anode (positive electrode) and cathode (negative electrode), which are related to oxidation and reduction reactions, could lead to confusion because their roles are reversed during charging and discharging. Therefore, the terms anode (positive electrode) and cathode (negative electrode) will not be used in this specification. If the terms anode and cathode are used, it should be clearly stated whether they are used during charging or discharging, and whether they correspond to the positive or negative pole.

[0335] Although this embodiment illustrates an example of a lithium ion secondary battery, the present invention is not limited to lithium ion secondary batteries, and a material containing element A, element X, and oxygen can be used as a positive electrode material for a secondary battery. Element A is preferably one or more elements selected from Group 1 elements and Group 2 elements. Examples of Group 1 elements that can be used include alkali metals such as lithium, sodium, and potassium. Examples of Group 2 elements that can be used include calcium, beryllium, and magnesium. Element X can be one or more elements selected from metal elements, silicon, and phosphorus. Element X is preferably one or more elements selected from cobalt, nickel, manganese, iron, and vanadium. Representative examples include lithium-cobalt composite oxide (LiCoO2) and lithium iron phosphate (LiFePO4).

[0336] The negative electrode includes a negative electrode active material layer and a negative electrode current collector. The negative electrode active material layer may also include a conductive additive and a binder.

[0337] The negative electrode active material can be an element capable of undergoing charge-discharge reactions through alloying and dealloying reactions with lithium. For example, a material containing at least one of silicon, tin, gallium, aluminum, germanium, lead, antimony, bismuth, silver, zinc, cadmium, and indium can be used. These elements have a larger capacity than carbon, and silicon in particular has a high theoretical capacity of 4200 mAh / g.

[0338] The secondary battery preferably has a separator, which may be made of, for example, cellulose-containing fibers such as paper, nonwoven fabric, glass fiber, ceramics, or synthetic fibers such as nylon (polyamide), vinylon (polyvinyl alcohol-based fiber), polyester, acrylic, polyolefin, or polyurethane.

[0339] This embodiment mode can be implemented in appropriate combination with any of the structures described in other embodiment modes.

[0340] (Embodiment 8) In this embodiment, electronic devices to which a semiconductor device according to one embodiment of the present invention can be applied will be described.

[0341] A semiconductor device according to one embodiment of the present invention can be incorporated into various electronic devices. Examples of electronic devices include electronic devices with relatively large screens, such as televisions, desktop or notebook personal computers, computer monitors, digital signage, and large game machines such as pachinko machines, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and audio players. Moving objects such as automobiles, motorcycles, ships, and aircraft can also be considered electronic devices. A semiconductor device according to one embodiment of the present invention can be used as a charge monitoring device for a battery built into these electronic devices.

[0342] The electronic device may have an antenna. By receiving a signal through the antenna, it is possible to display images, information, etc. on a display unit. Furthermore, if the electronic device has an antenna and a secondary battery, the antenna may be used for contactless power transmission.

[0343] The electronic device may have sensors (including the ability to measure force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared).

[0344] Electronic devices can have various functions, such as a function to display various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function to display a calendar, date, or time, a function to execute various software (programs), a wireless communication function, and a function to read out programs or data recorded on a recording medium.

[0345] 15 illustrates an example of a mobile object using the semiconductor device and a secondary battery according to one embodiment of the present invention. A secondary battery 8024 of an automobile 8400 shown in FIG. 15A can not only drive an electric motor 8406 but also supply power to a light-emitting device such as a headlight 8401 or a room light (not shown). The secondary battery 8024 of the automobile 8400 may be a battery module using a plurality of cylindrical secondary batteries 600 shown in FIGS. 14A and 14B. A charging monitoring device 8025 includes the semiconductor device according to one embodiment of the present invention and charges the secondary battery 8024 according to the ambient temperature.

[0346] An automobile 8500 shown in FIG. 15B can charge a secondary battery of the automobile 8500 by receiving power supply from an external charging facility by a plug-in system, a wireless power supply system, or the like. FIG. 15B illustrates a state in which a secondary battery 8024 mounted on the automobile 8500 is being charged from a ground-mounted charging device 8021 through a cable 8022. Charging can be performed according to the ambient temperature by a charging monitoring device 8025 including the semiconductor device of one embodiment of the present invention. Note that the charging monitoring device including the semiconductor device of one embodiment of the present invention may be provided in the charging device 8021.

[0347] The charging method and connector specifications may be appropriately determined using a predetermined method such as CHAdeMO (registered trademark) or Combo. The charging device 8021 may be a charging station installed in a commercial facility or a home power source. For example, plug-in technology can be used to charge the secondary battery 8024 mounted on the automobile 8500 using external power supply. Charging can be performed by converting AC power to DC power via a conversion device such as an AC-DC converter.

[0348] Furthermore, although not shown, a power receiving device can be mounted on a mobile object and can be charged by receiving power contactlessly from a ground-based power transmitting device. In the case of this contactless power supply method, by incorporating a power transmitting device into a road or an exterior wall, charging can be performed not only while the vehicle is stopped but also while it is moving. This contactless power supply method can also be used to transmit and receive power between mobile objects. Furthermore, a solar cell can be provided on the exterior of the mobile object, and a secondary battery can be charged while the vehicle is stopped or moving. For such contactless power supply, an electromagnetic induction method or a magnetic field resonance method can be used.

[0349] 15C is an example of a two-wheeled vehicle using a secondary battery. A scooter 8600 shown in FIG. 15C includes a secondary battery 8602, a charging monitoring device 8625, a side mirror 8601, and a turn signal light 8603. The secondary battery 8602 can supply electricity to the turn signal light 8603. The charging monitoring device 8625 including the semiconductor device of one embodiment of the present invention can charge the secondary battery 8602 depending on the ambient temperature.

[0350] 15C, the secondary battery 8602 can be stored in the under-seat storage 8604. The secondary battery 8602 can be stored in the under-seat storage 8604 even if the under-seat storage 8604 is small.

[0351] A semiconductor device according to one embodiment of the present invention can be applied not only to mobile objects but also to devices including secondary batteries and wireless modules.

[0352] 16A shows an example of a mobile phone. The mobile phone 7400 includes a display portion 7402 built into a housing 7401, operation buttons 7403, an external connection port 7404, a speaker 7405, a microphone 7406, and the like. The mobile phone 7400 also includes a power storage device 7407 and a charging monitoring device for the power storage device 7407.

[0353] 16B is a projection view illustrating an example of the appearance of the information processing device 1200. The information processing device 1200 described in this embodiment includes an arithmetic device, an input / output device, a housing 1210, a display unit 1230, a display unit 1240, a power storage device 1250, and a charge monitoring device.

[0354] The information processing device 1200 has a communication unit and is equipped with a function of supplying information to a network and a function of acquiring information from the network. The information processing device 1200 may also receive information distributed to a specific space using the communication unit and generate image information based on the received information. The information processing device 1200 can function as a personal computer by setting the screen of either the display unit 1230 or the display unit 1240, on which a keyboard is displayed, as a touch input panel.

[0355] Furthermore, a secondary battery charge monitoring device according to an aspect of the present invention may be provided in a wearable device such as that shown in FIG. 16C.

[0356] For example, a charging monitor may be provided in an eyeglasses-type device 400 as shown in FIG. 16C. The eyeglasses-type device 400 has a frame 400a, a display unit 400b, and a wireless module. A power storage device, a charging monitor, and a wireless module may be provided in the temples of the curved frame 400a. By providing a charging monitor, deterioration of the power storage device can be suppressed, and a decrease in continuous use time can be prevented. Furthermore, charging abnormalities are less likely to occur, making the eyeglasses-type device 400 safer.

[0357] Furthermore, a power storage device, a charge monitoring device, and a wireless module can be mounted on headset type device 401. Headset type device 401 has at least microphone unit 401a, flexible pipe 401b, and earphone unit 401c. The power storage device, charge monitoring device, and wireless module can be provided inside flexible pipe 401b or earphone unit 401c.

[0358] It can also be mounted on a device 402 that can be attached directly to the body. A power storage device 402b and a charge monitor for the power storage device can be provided inside a thin housing 402a of the device 402.

[0359] The device 403 can also be mounted on a device that can be attached to clothing. A power storage device 403b and a charge monitor for the power storage device can be provided inside a thin housing 403a of the device 403.

[0360] The device can also be mounted on a wristwatch-type device 405. The wristwatch-type device 405 has a display portion 405a and a belt portion 405b, and the display portion 405a or the belt portion 405b can be provided with a power storage device and a charging monitor for the power storage device.

[0361] The display unit 405a can display not only the time but also various other information such as incoming emails and phone calls.

[0362] Furthermore, since the wristwatch device 405 is a wearable device that is worn directly on the wrist, it may be equipped with sensors that measure the user's pulse, blood pressure, etc. Data on the user's exercise volume and health can be accumulated and used to help maintain health.

[0363] Furthermore, a power storage device and a charging monitor for the power storage device can be mounted on the belt type device 406. The belt type device 406 has a belt portion 406a and a wireless power receiving portion 406b, and the power storage device, the charging monitor, and the wireless module can be mounted inside the belt portion 406a.

[0364] Furthermore, by using the power storage device and the charging monitoring device for the power storage device according to one embodiment of the present invention as a power storage device for daily electronic products, products that are lightweight and safe can be provided. Examples of daily electronic products include electric toothbrushes, electric shavers, and electric beauty devices. For these products, a stick-shaped, compact, lightweight, and high-capacity power storage device is desirable for ease of holding by users. FIG. 16D is a perspective view of a device also known as a tobacco-containing smoking device (electronic cigarette). In FIG. 16D, an electronic cigarette 7410 includes an atomizer 7411 including a heating element, a power storage device 7414 that supplies power to the atomizer, and a cartridge 7412 that includes a liquid supply bottle, a sensor, and the like. To enhance safety, a charging monitoring device for the power storage device may be electrically connected to the power storage device 7414. The power storage device 7414 shown in FIG. 16D has an external terminal so that it can be connected to a charging device. Because the power storage device 7414 is the tip of the device when held, it is desirable for the total length to be short and the weight to be light.

[0365] Note that this embodiment mode can be combined with other embodiment modes as appropriate. [Explanation of symbols]

[0366] 100: semiconductor device, 101: memory element, 102: memory element, 103: comparison circuit, 104: current adjustment circuit, 105: control circuit, 106: input / output circuit, 110: electrode, 112: electrode, 114: insulating layer, 115: insulating layer, 116: insulating layer, 120: electrode, 130: insulating layer, 150: integrated circuit, 152: electrode, 153: electrode, 154: insulating layer, 156: insulating layer, 160: integrated circuit, 200: secondary battery, 210: transistor, 700: semiconductor device, 701(i): memory element, 701: memory unit, 702: detection unit, 703: determination unit, 705: control unit, 750: integrated circuit, 760: integrated circuit, 800: semiconductor device

Claims

1. A device comprising: a first integrated circuit; and a second integrated circuit on the first integrated circuit; the first integrated circuit includes a comparison circuit, a current adjustment circuit, and a control circuit; the second integrated circuit includes a first memory element and a second memory element; the first memory element holds temperature information serving as a determination criterion as a first potential; the second memory element holds environmental temperature information as a second potential; the comparison circuit supplies a signal to the current adjustment circuit based on a result of comparing the first potential with the second potential; The control circuit has a function of supplying the current value output from the current adjustment circuit to an external device.

2. the first memory element and the second memory element each include a semiconductor layer; The semiconductor device according to claim 1 , wherein the semiconductor layer includes an oxide semiconductor.

3. A semiconductor device according to claim 1 or 2, and a secondary battery, the secondary battery is electrically connected to the semiconductor device; A secondary battery system, wherein the external element is the secondary battery.

Images