High-voltage pulse power supply, gas laser oscillator, and laser processing machine

Abstract

A high voltage pulse power supply device (10) comprising: capacitors (C1-C4) including an i-th capacitor; full bridge inverters (Inv1-Inv4) including an i-th full bridge inverter connected to the i-th capacitor, the full bridge inverter (Inv1-Inv4) having output terminals being sequentially connected in series; a pair of power supply output terminals; positive-side inductors (Lp1-Lp4) including an i-th positive-side inductor having one end connected to one end of the i-th capacitor and the other end connected to an (i+1)-th positive-side inductor and one end of an (i+1)-th capacitor or to a DC power supply (V1); negative-side inductors (Ln1-Ln4) including an i-th negative-side inductor having one end connected to the other end of the i-th capacitor and the other end connected to an (i+1)-th negative-side inductor and the other end of the (i+1)-th capacitor or to the DC power supply (V1); and the DC power supply (V1) connected to the positive-side inductor (Lp4) and the negative-side inductor (Ln4).

Description

[Technical Field]

[0001] The present disclosure relates to a high-voltage pulse power supply device that outputs high-voltage pulses, a gas laser oscillator, and a laser processing machine. [Background technology]

[0002] A gas laser oscillator is one example of a conventional application of a power supply device that outputs high-voltage pulses. The power supply circuit of a gas laser oscillator must apply a high-voltage pulse to the discharge electrodes filled with carbon dioxide gas or the like to excite the laser medium by generating a discharge between the discharge electrodes, thereby generating a current between the discharge electrodes.

[0003] One circuit method for realizing a high-voltage pulse power supply is the semiconductor-type high-frequency power supply disclosed in Patent Document 1. In the semiconductor-type high-frequency power supply of Patent Document 1, the V-phase output terminal of each high-frequency inverter is sequentially connected to the U-phase output terminal of the high-frequency inverter below it via a DC-blocking capacitor, thereby connecting the outputs of each high-frequency inverter in series. The semiconductor-type high-frequency power supply of Patent Document 1 then obtains a high-voltage, high-frequency single-phase output between the terminals of the uppermost inverter and the terminals of the lowermost inverter, and supplies this to the primary side of a matching transformer in a series resonant circuit, which serves as a load. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2001-250665 Summary of the Invention [Problem to be solved by the invention]

[0005] However, the high-voltage pulse power supply device of Patent Document 1 uses a matching transformer on the output side, which causes common-mode noise to propagate due to the parasitic capacitance of the matching transformer when driven at high frequencies, making it difficult to obtain the desired voltage waveform at the output. Furthermore, the high-voltage pulse power supply device of Patent Document 1 also has the problem of reduced power supply efficiency, particularly when driven at high frequencies, because losses due to eddy currents in the matching transformer increase as the frequency increases. Furthermore, the high-voltage pulse power supply device of Patent Document 1 connects individual input power supplies to each full-bridge inverter, which causes common-mode noise to propagate due to the parasitic capacitance of the switching transformer in the input power supply when driven at high frequencies, resulting in input power supply failure. Thus, the high-voltage pulse power supply device of Patent Document 1 cannot suppress the generated common-mode noise, and the generation of eddy currents reduces power supply efficiency.

[0006] The present disclosure has been made in view of the above, and aims to provide a high-voltage pulse power supply device that can suppress common-mode noise and prevent a decrease in power supply efficiency due to the generation of eddy currents. [Means for solving the problem]

[0007] In order to solve the above-mentioned problems and achieve the object, the high-voltage pulse power supply device of the present disclosure includes first to n-th full-bridge inverters, where n is an integer of 2 or more and i is an integer from 1 to n, including a first capacitor to an n-th capacitor including an i-th capacitor, and an i-th full-bridge inverter having a pair of input terminals connected in parallel to both ends of the i-th capacitor, a gate control unit that controls on / off of semiconductor switching elements included in the first to n-th full-bridge inverters by gate signals, and an output terminal of the first to n-th full-bridge inverters, in which output terminals of the first to n-th full-bridge inverters are connected in series in sequence, and an output terminal of the first full-bridge inverter that is not connected to a second full-bridge inverter and the nth full-bridge inverter includes a pair of power supply output terminals that are not connected to the (n-1)th full-bridge inverter; a first positive-side inductor to the nth positive-side inductor, one end of which is connected to one end of the ith capacitor and the other end of which is connected to one end of the (i+1)th positive-side inductor and one end of the (i+1)th capacitor, or a DC power supply; a first negative-side inductor to the nth negative-side inductor, one end of which is connected to the other end of the ith capacitor and the other end of which is connected to one end of the (i+1)th negative-side inductor and the other end of the (i+1)th capacitor, or a DC power supply; [Effects of the Invention]

[0008] The high-voltage pulse power supply device of the present disclosure has the effect of suppressing common-mode noise and preventing a decrease in power supply efficiency due to the generation of eddy currents. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a first diagram showing a configuration example of a high-voltage pulse power supply device according to a first embodiment; [Figure 2] FIG. 1 is a diagram showing a configuration example of a full-bridge inverter included in a high-voltage pulse power supply device according to a first embodiment; [Figure 3]FIG. 1 is a diagram showing a schematic diagram of the relationship between current and time when a discharge current is generated in the high-voltage pulse power supply device according to the first embodiment. [Figure 4] FIG. 1 is a diagram showing a schematic diagram of the relationship between time and current flowing when a DC power supply charges a capacitor in the high-voltage pulse power supply device according to the first embodiment. [Figure 5] FIG. 1 is a diagram showing a schematic representation of the timing of switch switching operations and the time course of output voltages in switching control for efficiently generating a discharge current in the high-voltage pulse power supply device according to the first embodiment. [Figure 6] FIG. 1 is a diagram schematically illustrating switching control when performing laser oscillation in a high-voltage pulse power supply device according to a first embodiment. [Figure 7] FIG. 2 is a second diagram showing a configuration example of a high-voltage pulse power supply device according to the first embodiment; [Figure 8] 1 is a flowchart showing the operation of the gate control unit of the high-voltage pulse power supply device according to the first embodiment. [Figure 9] FIG. 1 is a diagram showing an example of the configuration of a processing circuit in a case where the processing circuit of a gate control unit provided in the high-voltage pulse power supply device according to the first embodiment is realized by a processor and a memory. [Figure 10] FIG. 1 is a diagram showing an example of the configuration of a processing circuit in a gate control unit provided in a high-voltage pulse power supply device according to a first embodiment when the processing circuit is realized by dedicated hardware. [Figure 11] FIG. 10 is a diagram showing a configuration example of a high-voltage pulse power supply device according to a second embodiment. [Figure 12] FIG. 10 is a diagram showing a configuration example of a gas laser oscillator according to a third embodiment. [Figure 13] FIG. 10 is a diagram showing a configuration example of a laser processing machine according to a fourth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, a high-voltage pulse power supply device, a gas laser oscillator, and a laser processing machine according to embodiments of the present disclosure will be described in detail with reference to the drawings.

[0011] Embodiment 1 (Component) Fig. 1 is a first diagram showing a configuration example of a high-voltage pulse power supply device 10 according to embodiment 1. The high-voltage pulse power supply device 10 includes a main power supply circuit unit 11 and a gate control unit 12. In the example of Fig. 1, a discharge electrode unit 13 is connected to the high-voltage pulse power supply device 10 as a load.

[0012] The main power supply circuit 11 includes a DC power supply V1, a positive inductor Lpi, a negative inductor Lni, a capacitor Ci, and a full-bridge inverter Invi. Here, i is an integer between 1 and n, where n is an integer greater than or equal to 2. In the first embodiment, the main power supply circuit 11 includes n positive inductors Lpi, n negative inductors Lni, capacitors Ci, and full-bridge inverters Invi. In the example of FIG. 1, a configuration where n=4 is illustrated, but n can be freely selected depending on the required voltage. In the example of FIG. 1, the main power supply circuit 11 includes a DC power supply V1, positive inductors Lp1 to Lp4 including the positive inductor Lpi, negative inductors Ln1 to Ln4 including the negative inductor Lni, capacitors C1 to C4 including the capacitor Ci, and full-bridge inverters Inv1 to Inv4 including the full-bridge inverter Invi. The full-bridge inverter Invi includes a semiconductor switching element Si-j. Here, j is an integer between 1 and 4. That is, the full-bridge inverter Invi is composed of four semiconductor switching elements Si-1, Si-2, Si-3, and Si-4. Here, an example is shown in which each arm has one semiconductor switching element Si-j, but m semiconductor switching elements Si-j may be connected in parallel to match the flowing current. Therefore, the main power supply circuit unit 11 includes 4×m×n semiconductor switching elements Si-j. In the following description, the semiconductor switching element Si-j may be referred to as the ij-th switch.

[0013] FIG. 2 shows a configuration example of the full-bridge inverter Invi used in the main power supply circuit unit 11. FIG. 2 is a diagram showing a configuration example of the full-bridge inverter Invi included in the high-voltage pulse power supply device 10 according to the first embodiment. The full-bridge inverter Invi has a pair of input terminals, and the pair of input terminals are connected in parallel to both ends of a capacitor Ci. As described above, the full-bridge inverter Invi includes semiconductor switching elements Si-1, Si-2, Si-3, and Si-4. The full-bridge inverter Invi has a left leg LegLi in which semiconductor switching elements Si-1 and Si-4 are connected in series, a right leg LegRi in which semiconductor switching elements Si-2 and Si-3 are connected in series, and the left leg LegLi and the right leg LegRi are connected in parallel. As shown in FIG. 2, the output terminal of the left leg LegLi is designated Npi, and the output terminal of the right leg LegRi is designated Nni.

[0014] In Figure 1, the semiconductor switching elements Si-j are MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), but it is preferable to use elements made of silicon, silicon carbide, gallium nitride, etc. Examples of semiconductor switching elements Si-j other than MOSFETs include transistors and IGBTs (Insulated Gate Bipolar Transistors).

[0015] The DC power supply V1 has a positive inductor Lp4 connected to its positive output terminal and a negative inductor Ln4 connected to its negative output terminal. Although the DC power supply V1 is depicted as a battery in Figure 1, it actually outputs a DC voltage obtained by AC (Alternating Current) / DC (Direct Current) conversion of the AC voltage supplied from an external commercial AC power supply.

[0016] The discharge electrode unit 13 that generates laser oscillation includes resonance reactors L1 and L2 and a pair of discharge electrodes T. Here, the discharge electrode unit 13 uses a dielectric barrier discharge that can obtain a stable discharge without generating an arc, i.e., a spark. When generating a dielectric barrier discharge, the discharge electrode T may have a structure in which a metal electrode is covered with a dielectric. Examples of materials that can be used as the dielectric that covers the metal electrode include glass, alumina, and ceramic.

[0017] In the discharge electrode unit 13, a stable dielectric barrier discharge is generated between the discharge electrodes T by applying a high-frequency voltage between the discharge electrodes T with a laser medium such as CO2 filled between them. When the laser medium in the discharge electrode unit 13 is excited by a discharge power equal to or greater than a specified power, laser oscillation occurs due to stimulated emission from the laser medium. Furthermore, since the discharge electrode T has a capacitance component and a resistance component, the discharge electrode unit 13 forms a series resonant circuit using reactors L1 and L2 during discharge to efficiently supply power to the discharge electrode T, and a resonant current flows through the discharge electrode T. Typically, the capacitance of the discharge electrode T is about several nF, and from the perspective of miniaturizing the reactors L1 and L2, the resonant frequency of the discharge electrode unit 13 is often several hundred kHz to several MHz.

[0018] (connection) Next, the connections of each component will be explained. A capacitor Ci is connected to the input of each full-bridge inverter Invi. Capacitor Ci is made of ceramic, film, or other materials that can be driven at high frequencies, and it is desirable to select one with a capacitance sufficiently larger than the required supply charge. A positive-side inductor Lpi is connected to the positive terminal of capacitor Ci, and a negative-side inductor Lni is connected to the negative terminal of capacitor Ci. Furthermore, the positive-side inductor Lpi is connected in series with the positive-side inductor Lp(i+1), and the negative-side inductor Lni is connected in series with the negative-side inductor Ln(i+1). The bottom positive-side inductor Lpn, which is connected in series with the positive-side inductor Lpi, is connected to the positive side of the DC power supply V1, and the bottom negative-side inductor Lnn, which is connected in series with the negative-side inductor Lni, is connected to the negative side of the DC power supply V1. That is, one end of the positive inductor Lpi is connected to one end of the capacitor Ci, and the other end is connected to one end of the positive inductor Lp(i+1) and one end of the capacitor C(i+1), or the DC power supply V1. Also, one end of the negative inductor Lni is connected to the other end of the capacitor Ci, and the other end is connected to one end of the negative inductor Ln(i+1) and the other end of the capacitor C(i+1), or the DC power supply V1.

[0019] With respect to the output section of the full-bridge inverter Invi, the output terminal Nni of the right leg LegRi is connected to the output terminal Np(i+1) of the left leg LegL(i+1) of the full-bridge inverter Inv(i+1). In the full-bridge inverters Inv1 to INVn connected in this manner, the positive-side output terminal Np1 of the left leg LegL1 of the uppermost full-bridge inverter Inv1 is connected to the reactor L1 of the discharge electrode unit 13, and the output terminal Nnn of the right leg LegRn of the lowermost full-bridge inverter Invn is connected to the reactor L2 of the discharge electrode unit 13. That is, the main power supply circuit 11 has output terminals of the full-bridge inverters Inv1 to Inv4 connected in series, and includes a pair of power supply output terminals: the positive-side output terminal Np1 of the full-bridge inverter Inv1 that is not connected to the full-bridge inverter Inv2, and the negative-side output terminal Nn4 of the full-bridge inverter Inv4 that is not connected to the full-bridge inverter Inv3. The reactor L1 is connected to one end of the discharge electrode T, and the reactor L2 is connected to the other end of the discharge electrode T. In the full-bridge inverter Invi, the gates of the semiconductor switching elements Si-1, Si-2, Si-3, and Si-4 are connected to a gate control unit 12 for performing a switching operation.

[0020] (function) The function of each component will be described. The DC power supply V1 applies a DC voltage to charge each capacitor Ci. The gate control unit 12 controls the on / off, i.e., switching operation, of the semiconductor switching elements Si-j included in each full-bridge inverter Invi, alternately turning on and off pairs of diagonal semiconductor switching elements of the full-bridge inverter Invi to obtain an AC output from the high-voltage pulse power supply device 10. The gate control unit 12 controls the on / off of the semiconductor switching elements Si-j included in each full-bridge inverter Invi using gate signals for the semiconductor switching elements Si-j included in each full-bridge inverter Invi. Specifically, the gate control unit 12 turns on the semiconductor switching elements Si-1 and Si-3 of the full-bridge inverter Invi to obtain a positive output, and turns on the semiconductor switching elements Si-2 and Si-4 of the full-bridge inverter Invi to obtain a negative output. The outputs of each full-bridge inverter Invi are synchronized by the gate control unit 12. Therefore, the output voltages of the full-bridge inverters Invi are superimposed, and the voltage output to the discharge electrode unit 13 is a value obtained by multiplying the voltage of the DC power supply V1 by n.

[0021] In the full-bridge inverter Invi, in the left leg LegLi in which the semiconductor switching elements Si-1 and Si-4 are connected in series, the semiconductor switching elements Si-1 and Si-4 are not turned on at the same time. Similarly, in the right leg LegRi in which the semiconductor switching elements Si-2 and Si-3 are connected in series, the semiconductor switching elements Si-2 and Si-3 are not turned on at the same time.

[0022] When a pulse current flows through the discharge electrode 13, the charge stored in the capacitor Ci is released to the full-bridge inverter Invi. When the charge on the capacitor Ci decreases, the DC power supply V1 charges the capacitor Ci. Because each capacitor Ci is connected to a positive-side inductor Lpi and a negative-side inductor Lni, when the semiconductor switching elements Si-j of the full-bridge inverter Invi are activated, high-frequency components such as pulse currents are limited by the positive-side inductor Lpi and the negative-side inductor Lni, thereby isolating the DC power supply V1 from the capacitor Ci. After the switching operation of the semiconductor switching elements Si-j of the full-bridge inverter Invi stops, the DC power supply V1 begins charging the capacitor Ci. Therefore, users of the high-voltage pulse power supply 10 should determine the inductance of the positive-side inductor Lpi and the negative-side inductor Lni based on the output pulse width. For larger pulse widths, users should select positive-side inductors Lpi and negative-side inductors Lni with sufficiently large inductance. A method for estimating the inductance based on the circuit specifications will be described later.

[0023] Therefore, assuming that the charging voltage of capacitor Ci is 1 kV, the high-voltage pulse power supply 10 of this embodiment can generate an AC voltage output of ±4 kV when n = 4. The high-voltage pulse power supply 10 can easily generate high-frequency high voltages by providing insulation using positive-side inductors Lpi and negative-side inductors Lni and by configuring the full-bridge inverters Invi in ​​multiple stages, without using a matching transformer as in Patent Document 1. Furthermore, the high-voltage pulse power supply 10 does not necessarily operate all of the semiconductor switching elements Si-j of the full-bridge inverters Invi simultaneously; the output voltage waveform can be freely changed by intentionally changing the operation timing. Therefore, the high-voltage pulse power supply 10 is characterized by its resistance to breakdown of the semiconductor switching elements Si-j even if they malfunction.

[0024] (Estimated inductance of insulating inductor) The procedure for estimating the inductance of an insulating inductor will be explained using the drawings. First, the amount of charge discharged from capacitor Ci to full-bridge inverter Invi when a discharge current is generated is determined. FIG. 3 is a diagram showing a simulation of the relationship between current and time when a discharge current is generated in high-voltage pulse power supply device 10 according to embodiment 1. When a resonant current is generated in discharge electrode section 13, the waveform of the current can be approximated to a sine wave. In capacitor Ci, the amplitude of the discharge current at this time is defined as I A The effective value of the discharge current is I RMS The time during which the discharge current is generated is t on Then, the discharged charge Q d is calculated using equation (1).

[0025]

number

[0026] Next, the amount of charge to be charged is calculated. During the discharging from capacitor Ci to full-bridge inverter Invi, capacitor Ci is not charged from DC power supply V1. After the semiconductor switching element Si-j of full-bridge inverter Invi finishes switching operation and capacitor Ci stops passing discharge current to full-bridge inverter Invi, DC power supply V1 starts charging capacitor Ci. FIG. 4 is a diagram showing a simulation of the relationship between time and current flowing when DC power supply V1 charges capacitor Ci in high-voltage pulse power supply device 10 according to embodiment 1. Here, the charging start time is set to t=0, and the current flowing from DC power supply V1 through positive-side inductor Lpi and negative-side inductor Lni during charging is set to I(t) as a function of time. For the purpose of rough calculation, current I(t) is calculated by dividing the maximum value I of the charging current at t=0. Max It is taken as t and decreases monotonically during charging. c The time when charging is completed is t=t c The minimum value (t c ) = 0. Then, the charge Q c is calculated using equation (2).

[0027]

number

[0028] Charge Q discharged from capacitor Ci to full-bridge inverter Invi d and the charge Q that the DC power supply V1 charges the capacitor Ci c is equal to Q d =Q c Therefore, from equations (1) and (2), the charging time t c Solving for this, we obtain equation (3).

[0029]

number

[0030] Furthermore, when the DC power supply V1 charges the capacitor Ci, the maximum value of the induced electromotive force generated in the positive inductor Lpi and the negative inductor Lni can be expressed by equation (4) as a first-order approximation, similar to equation (2) for the current change, where the inductance of the positive inductor Lpi and the negative inductor Lni is L.

[0031]

number

[0032] Here, when the DC power supply V1 charges the capacitor Ci, the voltage V applied to the positive inductor Lpi and the negative inductor Lni is L , and the voltage V across the capacitor Ci c can be expressed by equation (5) assuming that it is equal to the input voltage V from the DC power supply V1.

[0033]

number

[0034] Substituting equations (3) and (5) into equation (4) and solving for L, we obtain equation (6).

[0035]

number

[0036] The inductance L of the positive inductor Lpi and the negative inductor Lni can be roughly calculated from equation (6), and the input voltage V from the DC power supply V1 and the effective value I of the discharge current of the capacitor Ci are obtained. RMS , and the discharge time t of the capacitor Ci on The maximum value of the charging current I flowing through the positive inductor Lpi and the negative inductor Lni is calculated by multiplying the above by two. Max This allows the inductance L of the positive inductor Lpi and the negative inductor Lni to be set to an optimum value for insulation between the positive inductor Lpi and the negative inductor Lni and the capacitor Ci. In addition, in order to satisfy equation (5), the voltage V applied to the capacitor Ci c Therefore, the user of the high-voltage pulse power supply 10 must select a capacitor Ci with a large capacitance C, which can store a large charge relative to the charge released by the discharge current.

[0037] (Gate control overview) Next, control by the gate control unit 12 provided in the high-voltage pulse power supply 10 of the first embodiment will be described with reference to Figures 5 and 6. As shown in Figure 1, the high-voltage pulse power supply 10 uses a DC power supply V1 as a common input power supply for each full-bridge inverter Invi, and the connection between the DC power supply V1 and each charging capacitor Ci is insulated by a positive-side inductor Lpi and a negative-side inductor Lni. However, since the positive-side inductor Lpi and the negative-side inductor Lni utilize the property that an induced electromotive force in the opposite direction is generated in response to a current displacement, this function works for a steep current displacement with a short duration but does not work for a current displacement with a long duration. Therefore, the high-voltage pulse power supply 10 needs to drive the full-bridge inverter Invi by limiting the pulse width using the gate control unit 12.

[0038] (Discharge gate control) High-voltage pulse power supply apparatus 10 is used in a variety of devices, such as gas laser oscillators. A gas laser oscillator using high-voltage pulse power supply apparatus 10 must control the laser output depending on the application, and the power input to the discharge space is constantly controlled by high-voltage pulse power supply apparatus 10. FIG. 5 is a diagram schematically illustrating the timing of switch-over operations and the time course of output voltages for switching control for efficiently generating a discharge current in high-voltage pulse power supply apparatus 10 according to embodiment 1. In FIG. 5, the upper part shows the timing of switching control and output voltages for each semiconductor switching element in a power supply using a matching transformer as disclosed in Patent Document 1 as a comparative example, and the lower part shows the timing of switching control and output voltages for each semiconductor switching element Si-j in high-voltage pulse power supply apparatus 10. Here, a state in which gate control unit 12 outputs a positive voltage that turns on semiconductor switching elements Si-1 and Si-3 and turns off semiconductor switching elements Si-2 and Si-4 is referred to as State A; a state in which gate control unit 12 outputs a negative voltage that turns off semiconductor switching elements Si-1 and Si-3 and turns on semiconductor switching elements Si-2 and Si-4 is referred to as State B; and a state in which all semiconductor switching elements Si-1, Si-2, Si-3, and Si-4 are turned off is referred to as State C. In the switching control of the power supply device of the comparative example using a matching transformer, there is no restriction on the pulse width, so switching from State A to State B and from State B to State A is repeatedly performed. Note that in the following description, State A may be referred to as the first state, State B as the second state, and State C as the third state.

[0039] In contrast to this, in the present embodiment, the high-voltage pulse power supply 10 provides insulation using the positive-side inductor Lpi and the negative-side inductor Lni, and therefore it is difficult to continue repeating the switching from state A to state B and from state B to state A for a long period of time. Therefore, the high-voltage pulse power supply 10 temporarily stops the repeated operation of switching from state A to state B and from state B to state A, and performs an operation of switching to state C. In the lower part of Fig. 5, the high-voltage pulse power supply 10 performs control to switch from state B to state C once, and then switch from state C to state A. In this way, the gate control unit 12 alternately switches between state A, in which semiconductor switching elements Si-1 and Si-3 are turned on and semiconductor switching elements Si-2 and Si-4 are turned off, and state B, in which semiconductor switching elements Si-1 and Si-3 are turned off and semiconductor switching elements Si-2 and Si-4 are turned on, to generate a discharge current from capacitor Ci, and switches to state C, in which semiconductor switching elements Si-1 to Si-4 are all turned off, to charge capacitor Ci.

[0040] From equation (6), the time that the high-voltage pulse power supply 10 can operate in state A or state B is determined by the inductance L of the positive-side inductor Lpi and the negative-side inductor Lni. The high-voltage pulse power supply 10 can extend its operating time by increasing the inductance L of the positive-side inductor Lpi and the negative-side inductor Lni. Because the high-voltage pulse power supply 10 needs to charge capacitor Ci when operating in state C, users of the high-voltage pulse power supply 10 must determine the inductance L so that capacitor Ci can be charged in time. The charging time of capacitor Ci varies depending on factors such as the capacitance of capacitor Ci. Therefore, the time durations of states A, B, and C are determined based on the inductance L of the positive-side inductor Lpi and the negative-side inductor Lni, and the capacitance of capacitor Ci.

[0041] (laser oscillation gate control) FIG. 6 is a diagram schematically illustrating switching control during laser oscillation in the high-voltage pulse power supply 10 according to the first embodiment. Specifically, FIG. 6 illustrates switching control for each semiconductor switching element Si-j in the high-voltage pulse power supply 10 and the timing of laser output in a gas laser oscillator incorporating the high-voltage pulse power supply 10. In a gas laser oscillator incorporating the high-voltage pulse power supply 10, the reactors L1 and L2 and the discharge electrode T of the discharge electrode unit 13 resonate to efficiently transmit discharge power. Therefore, if the operation of the semiconductor switching elements Si-j of the full-bridge inverter Invi is simply stopped in response to a laser-off signal, as in state C, the discharge upon the next laser-on signal becomes unstable, resulting in a slow rise of the laser light. Furthermore, because the switching frequency of the semiconductor switching elements Si-j of the full-bridge inverter Invi is determined by the resonant frequency, a gas laser oscillator incorporating the high-voltage pulse power supply 10 cannot efficiently input discharge power to the discharge space at an appropriate frequency, resulting in unstable discharge and making it difficult to control the laser output. Therefore, a gas laser oscillator using high-voltage pulse power supply device 10 must maintain discharge and adjust power while achieving matching even during the laser off period.

[0042] Therefore, in this embodiment, as shown in FIG. 6, the high-voltage pulse power supply device 10 performs a preliminary discharge by applying a three-pulse group pulse ps to the semiconductor switching elements Si-j of the full-bridge inverter Invi, which maintains stable discharge even when the laser is off, but which maintains discharge at a constant cycle so that the discharge does not reach the laser light oscillation threshold. When the laser is on, the high-voltage pulse power supply device 10 applies a main pulse pg to the semiconductor switching elements Si-j. The high-voltage pulse power supply device 10 can obtain laser output at time t1 after applying the main pulse pg. In the example of FIG. 6, the group pulse ps is set to three pulses because two or fewer pulses result in only a small amount of resonant current, preventing discharge. Four pulses could result in oscillation. The repetition frequency of the group pulse ps for preliminary discharge is determined as follows: (A) A frequency that allows a constant discharge state to be maintained by preliminary discharge. (B) Because capacitor Ci needs to be charged when the laser is off, a frequency that allows charging even during operation with the group pulse ps for preliminary discharge is set.

[0043] (Fault diagnosis function) In the first embodiment, a case where a fault diagnosis function is added to the high-voltage pulse power supply 10 shown in Fig. 1 will be described with reference to Fig. 7. Fig. 7 is a second diagram showing a configuration example of a high-voltage pulse power supply 10a according to the first embodiment. In the high-voltage pulse power supply 10a, fault determination requires determining (a) whether insulation by the positive-side inductor Lpi and the negative-side inductor Lni is performed correctly during pulse operation of the semiconductor switching elements Si-j of the full-bridge inverter Invi, (b) whether the semiconductor switching elements Si-j of the full-bridge inverter Invi are faulty, and (c) whether the capacitor Ci is being properly charged.

[0044] Therefore, in order to monitor the input / output current of capacitor Ci, high-voltage pulse power supply apparatus 10a shown in Fig. 7 adds to high-voltage pulse power supply apparatus 10 shown in Fig. 1 a current sensor Mi and a window comparator Pi that connects the outputs of two positive-side comparators Ppi and negative-side comparators Pni in parallel and determines whether a voltage signal VMi based on the measurement result from current sensor Mi is between two threshold voltages. As before, i = 1 to n, where n is an integer equal to or greater than 2. That is, high-voltage pulse power supply apparatus 10a includes current sensors M1 to M4 including current sensor Mi, and window comparators P1 to P4 including window comparator Pi.

[0045] The current sensor Mi measures the current flowing from the positive side of the capacitor Ci to the input of the full-bridge inverter Invi, and the current charging the capacitor Ci from the DC power supply V1 through the positive-side inductor Lpi and negative-side inductor Lni. That is, the current sensor Mi measures the current flowing between the capacitor Ci and the positive-side inductor Lpi and the full-bridge inverter Invi. Although the example in Figure 7 shows a CT (Current Transformer) type current sensor Mi, current sensors using other current measurement principles can also be used. The current sensor Mi outputs its measurement results, with the current in the charging direction of the capacitor Ci considered to be the positive side and the current in the discharging direction considered to be the negative side.

[0046] The measurement result of the current sensor Mi is converted into a voltage signal VMi, which is input to the positive-side comparator Ppi and the negative-side comparator Pni. The process of converting the measurement result of the current sensor Mi into the voltage signal VMi may be performed by a conversion unit (not shown) or may be performed by the current sensor Mi. When the current sensor Mi converts the measurement result of the current sensor Mi into the voltage signal VMi, the current sensor Mi outputs the voltage signal VMi at the time of output.

[0047] The window comparator Pi compares a voltage signal VMi based on the measurement result of the current sensor Mi with a positive threshold voltage Vrefp and a negative threshold voltage Vrefn. Specifically, in the window comparator Pi, the positive comparator Ppi compares the input voltage signal VMi with the positive threshold voltage Vrefp. If the voltage signal VMi is greater than the positive threshold voltage Vrefp, the positive comparator Ppi outputs a comparison result indicating that the voltage signal VMi is greater than the positive threshold voltage Vrefp. Similarly, the negative comparator Pni compares the input voltage signal VMi with the negative threshold voltage Vrefn. If the voltage signal VMi is less than the negative threshold voltage Vrefn, the negative comparator Pni outputs a comparison result indicating that the voltage signal VMi is less than the negative threshold voltage Vrefn. As a result, when the voltage signal VMi obtained by converting the measurement result of the current sensor Mi into a voltage is greater than the positive threshold voltage Vrefp, the window comparator Pi can output a comparison result indicating that the voltage signal VMi is greater than the positive threshold voltage Vrefp from the output terminal Oi to the gate control unit 12. Furthermore, when the voltage signal VMi obtained by converting the measurement result of the current sensor Mi into a voltage is smaller than the negative threshold voltage Vrefn, the window comparator Pi can output a comparison result indicating that the voltage signal VMi is smaller than the positive threshold voltage Vrefp from the output terminal Oi to the gate control unit 12.

[0048] Furthermore, when the voltage signal VMi, which is obtained by converting the measurement result of the current sensor Mi into a voltage, is equal to or less than the positive threshold voltage Vrefp and equal to or greater than the negative threshold voltage Vrefn, the window comparator Pi does not output a comparison result indicating that the voltage signal VMi is greater than the positive threshold voltage Vrefp or a comparison result indicating that the voltage signal VMi is less than the negative threshold voltage Vrefn.

[0049] The operation performed by the gate control unit 12 based on the comparison result obtained from the window comparator Pi will be described.

[0050] If the gate control unit 12 obtains a comparison result in the determination (a) that the voltage signal VMi is greater than the positive threshold voltage Vrefp within the time period during which the gate signal is being sent to the semiconductor switching elements Si-j of the full-bridge inverter Invi of each stage, the gate control unit 12 determines that insulation is not being provided by the positive-side inductor Lpi and the negative-side inductor Lni, and immediately stops sending gate signals to the semiconductor switching elements Si-1 to Si-4 of the full-bridge inverter Invi.

[0051] If the gate control unit 12 obtains a comparison result in the determination of (b) that the voltage signal VMi is smaller than the negative threshold voltage Vrefn within the time period during which the gate signal is being sent to the semiconductor switching elements Si-j of the full-bridge inverter Invi of each stage, the gate control unit 12 determines that there is an abnormality in the full-bridge inverter Invi and immediately stops sending the gate signal to the semiconductor switching elements Si-1 to Si-4 included in the full-bridge inverter Invi.

[0052] If the gate control unit 12 obtains a comparison result in the determination of (c) that the voltage signal VMi has exceeded the positive threshold voltage Vrefp within a time period during which no gate signal is being sent to the semiconductor switching elements Si-j of the full-bridge inverter Invi, it determines that there is an abnormality in the charging of the capacitor Ci, and immediately stops sending gate signals to the semiconductor switching elements Si-1 to Si-4 of the full-bridge inverter Invi.

[0053] By utilizing the above mechanism, if an abnormality occurs in the semiconductor switching element Si-j or the like during power supply operation, the user of the high-voltage pulse power supply device 10a can immediately detect it. Furthermore, the high-voltage pulse power supply device 10a does not necessarily need to operate all full-bridge inverters Invi simultaneously, and by utilizing this detection mechanism and driving full-bridge inverters Invi other than the failed full-bridge inverter Invi, it is possible to avoid machine downtime, although the power supply output will decrease.

[0054] The operation of the fault diagnosis function by the gate control section 12 will be described using a flowchart. Fig. 8 is a flowchart showing the operation of the gate control section 12 of the high-voltage pulse power supply apparatus 10a according to the first embodiment.

[0055] If the voltage signal VMi is greater than the positive-side threshold voltage Vrefp during the time that the gate signal is being sent to the semiconductor switching element Si-j (step S1: Yes), the gate control unit 12 determines that insulation by the positive-side inductor Lpi and the negative-side inductor Lni is not being provided (step S2), and immediately stops sending the gate signal to the semiconductor switching element Si-j (step S3).

[0056] If the voltage signal VMi is equal to or less than the positive threshold voltage Vrefp during the time that the gate signal is being sent to the semiconductor switching element Si-j (step S1: No) and the voltage signal VMi is smaller than the negative threshold voltage Vrefn during the time that the gate signal is being sent to the semiconductor switching element Si-j (step S4: Yes), the gate control unit 12 determines that there is an abnormality in the full-bridge inverter Invi (step S5) and immediately stops sending the gate signal to the semiconductor switching element Si-j (step S3).

[0057] If the voltage signal VMi is equal to or greater than the negative threshold voltage Vrefn during the time when the gate signal is being sent to the semiconductor switching element Si-j (step S4: No) and the voltage signal VMi exceeds the positive threshold voltage Vrefp during the time when the gate signal is not being sent to the semiconductor switching element Si-j (step S6: Yes), the gate control unit 12 determines that there is an abnormality in the charging of the capacitor Ci (step S7) and immediately stops sending the gate signal to the semiconductor switching element Si-j (step S3).

[0058] If the voltage signal VMi is equal to or lower than the positive threshold voltage Vrefp during the time when the gate signal is not being sent to the semiconductor switching element Si-j (step S6: No), the gate control unit 12 determines that the high-voltage pulse power supply device 10 is operating normally (step S8).

[0059] Next, the hardware configuration of the gate control unit 12 provided in the high-voltage pulse power supply device 10, 10a according to embodiment 1 will be described. In the high-voltage pulse power supply device 10, 10a, the gate control unit 12 is realized by a processing circuit. The processing circuit may be a memory that stores a program and a processor that executes the program stored in the memory, or it may be dedicated hardware. The processing circuit is also called a control circuit.

[0060] FIG. 9 is a diagram showing an example of the configuration of a processing circuit 90 when the processing circuit of the gate control unit 12 included in the high-voltage pulse power supply 10, 10a according to the first embodiment is realized by a processor 91 and a memory 92. The processing circuit 90 shown in FIG. 9 is a control circuit and includes a processor 91 and a memory 92. When the processing circuit 90 is configured with the processor 91 and the memory 92, each function of the processing circuit 90 is realized by software, firmware, or a combination of software and firmware. The software or firmware is written as a program and stored in the memory 92. The processor 91 reads and executes the program stored in the memory 92 to realize each function of the processing circuit 90. That is, the processing circuit 90 includes the memory 92 for storing a program that results in the processing of the gate control unit 12 included in the high-voltage pulse power supply 10, 10a. This program can also be said to be a program executed by the gate control unit 12 included in the high-voltage pulse power supply 10, 10a realized by the processing circuit 90. This program may be provided by a storage medium on which the program is stored or by other means such as a communication medium.

[0061] Here, the processor 91 is, for example, a CPU (Central Processing Unit), a processing device, an arithmetic device, a microprocessor, a microcomputer, or a DSP (Digital Signal Processor), etc. Furthermore, the memory 92 is, for example, a non-volatile or volatile semiconductor memory such as a RAM (Random Access Memory), a ROM (Read Only Memory), a flash memory, an EPROM (Erasable Programmable ROM), or an EEPROM (registered trademark) (Electrically EPROM), a magnetic disk, a flexible disk, an optical disk, a compact disk, a minidisk, or a DVD (Digital Versatile Disc).

[0062] FIG. 10 is a diagram showing an example of the configuration of a processing circuit 93 when the processing circuit of the gate control unit 12 included in the high-voltage pulse power supply device 10, 10a according to the first embodiment is realized by dedicated hardware. The processing circuit 93 shown in FIG. 10 corresponds to, for example, a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), or a combination thereof. The processing circuit 93 may be partially realized by dedicated hardware and partially realized by software or firmware. In this way, the processing circuit 93 can realize each of the above-described functions by dedicated hardware, software, firmware, or a combination thereof.

[0063] As described above, according to this embodiment, the high-voltage pulse power supply 10 includes a DC power supply V1, positive-side inductors Lp1 to Lp4 including a positive-side inductor Lpi, negative-side inductors Ln1 to Ln4 including a negative-side inductor Lni, capacitors C1 to C4 including a capacitor Ci, and full-bridge inverters Inv1 to Inv4 including a full-bridge inverter Invi. One end of the positive-side inductor Lpi is connected to one end of the capacitor Ci, and the other end is connected to one end of the positive-side inductor Lp(i+1) and one end of the capacitor C(i+1) or the DC power supply V1. One end of the negative-side inductor Lni is connected to the other end of the capacitor Ci, and the other end is connected to one end of the negative-side inductor Ln(i+1) and the other end of the capacitor C(i+1) or the DC power supply V1. This allows the high-voltage pulse power supply device 10 to suppress common-mode noise and prevent a decrease in power supply efficiency due to the generation of eddy currents without using a matching transformer on the output side.The high-voltage pulse power supply device 10 can output a desired voltage waveform by suppressing common-mode noise, and can also prevent a decrease in power supply efficiency due to the generation of eddy currents, thereby reducing losses and enabling highly efficient operation.

[0064] Embodiment 2 (When using a transformer) In the first embodiment, the high-voltage pulse power supply 10 or the high-voltage pulse power supply 10a insulates each stage by the positive-side inductor Lpi and the negative-side inductor Lni, but if the inductance L of the positive-side inductor Lpi and the negative-side inductor Lni increases, the pulse width output from the semiconductor switching element Si-j of the full-bridge inverter Invi can be increased, but if the repetition frequency is increased, the charging of the capacitor Ci cannot keep up, and the output voltage drops. In the second embodiment, a high-voltage pulse power supply that solves this problem will be described.

[0065] Fig. 11 is a diagram showing a configuration example of a high-voltage pulse power supply device 10b according to embodiment 2. High-voltage pulse power supply device 10b of embodiment 2 includes a main power supply circuit section 11b and a gate control section 12. In the example of Fig. 11, a discharge electrode section 13 is connected to high-voltage pulse power supply device 10b as a load.

[0066] The main power supply circuit unit 11b includes a DC power supply V1, a transformer Ti, a capacitor Ci, and a full-bridge inverter Invi. As in the first embodiment, i=1 to n, where n is an integer equal to or greater than 2. The main power supply circuit unit 11b is configured by replacing the positive-side inductor Lpi and the negative-side inductor Lni of the main power supply circuit unit 11 of the high-voltage pulse power supply device 10 of the first embodiment shown in FIG. 1 with a transformer Ti. That is, in the example of FIG. 11, the main power supply circuit unit 11b includes a DC power supply V1, transformers T1 to T4 including the transformer Ti, capacitors C1 to C4 including the capacitor Ci, and full-bridge inverters Inv1 to Inv4 including the full-bridge inverter Invi. The transformer Ti is composed of a positive-side inductor Lpi and a negative-side inductor Lni. In the second embodiment, the positive-side inductor Lpi is connected as the primary coil of the transformer Ti, and the negative-side inductor Lni is connected as the secondary coil of the transformer Ti. That is, the positive inductor Lpi is the primary coil of the transformer Ti, and the negative inductor Lni is the secondary coil of the transformer Ti. In addition, the polarity of the primary coil and the polarity of the secondary coil of the transformer Ti are opposite to each other.

[0067] In this configuration, due to the nature of the transformer Ti, when current flows through one coil, the inductance of the other coil sharing the core is reduced. As a result, the transformer Ti has an insulating function that increases the inductance of the semiconductor switching elements Si-j of the full-bridge inverter Invi when they are switched, and reduces the inductance when the capacitor Ci is charged, accelerating the charging of the capacitor Ci. Therefore, in the high-voltage pulse power supply device 10b, the pulse width output from the semiconductor switching elements Si-j of the full-bridge inverter Invi is large, and even if the repetition frequency is increased, the output voltage does not decrease and the desired output voltage can be obtained.

[0068] Although the high-voltage pulse power supply apparatus 10b of the second embodiment shown in Fig. 11 has been described based on the high-voltage pulse power supply apparatus 10 of the first embodiment shown in Fig. 1, the present invention is not limited to this. The high-voltage pulse power supply apparatus 10b of the second embodiment can also be applied to the high-voltage pulse power supply apparatus 10a of the first embodiment shown in Fig. 7.

[0069] Embodiment 3 (oscillator) The high-voltage pulse power supply devices 10 and 10a described in embodiment 1 and the high-voltage pulse power supply device 10b described in embodiment 2 can be used in gas laser oscillators. The following description will be given using the high-voltage pulse power supply device 10 as an example, but the high-voltage pulse power supply devices 10a and 10b can also be applied.

[0070] FIG. 12 is a diagram showing a configuration example of a gas laser oscillator 20 according to a third embodiment. The gas laser oscillator 20 includes a high-voltage pulse power supply 10 and a discharge electrode unit 13c. The high-voltage pulse power supply 10 has the same functions and configuration as those described in the first embodiment. The discharge electrode unit 13c includes resonance reactors L1 and L2, electrode plates E1 and E2, dielectrics D1 and D2, and a carbon dioxide pipe DT. Of the two output terminals of the high-voltage pulse power supply 10, one output terminal is connected to one terminal of the reactor L1, and the other output terminal is connected to one terminal of the reactor L2. The other terminal of the reactor L1 is connected to the electrode plate E1, and the other terminal of the reactor L2 is connected to the electrode plate E2. The dielectric D1 is connected to the back surface of the electrode plate E1, the dielectric D2 is connected to the back surface of the electrode plate E2, and the carbon dioxide pipe DT is connected between the dielectrics D1 and D2.

[0071] In gas laser oscillator 20, high-voltage pulse power supply 10 outputs a high-voltage pulse to discharge electrode 13c, which generates a discharge current in carbon dioxide pipe DT, exciting carbon dioxide molecules and causing laser oscillation. By configuring gas laser oscillator 20 using high-voltage pulse power supply 10 as described above, efficiency is improved and the repetition frequency of laser oscillation can be increased.

[0072] Embodiment 4 (laser processing machine) In the fourth embodiment, a case will be described in which the gas laser oscillator 20 described in the third embodiment is mounted on a laser processing machine and used.

[0073] Fig. 13 is a diagram showing an example of the configuration of a laser processing machine 30 according to embodiment 4. The laser processing machine 30 includes a gas laser oscillator 20, an interface 21, a control device 22, a transmission optical system 23, a calculation unit 24, a power meter 25, and a work table 26. In Fig. 13, the interface is abbreviated as I / F.

[0074] The interface 21 includes a terminal for inputting processing conditions by a user of the laser processing machine 30. The interface 21 is connected to the control device 22.

[0075] The control device 22 is connected to the gas laser oscillator 20, the transmission optical system 23, the calculation unit 24, the power meter 25, and the work table 26, and transmits and receives control signals to and from each of these components. When the laser processing machine 30 emits a laser, the control device 22 first transmits a control signal to the gas laser oscillator 20. Based on the control signal received from the control device 22, the gas laser oscillator 20 drives the high-voltage pulse power supply 10 to emit laser light. The transmission optical system 23, operated by the control device 22, shapes and positions the laser light emitted from the gas laser oscillator 20. At the same time, the work table 26, operated by the control device 22, adjusts the position of the laser light irradiated onto the workpiece 27. After determining the position, the transmission optical system 23 first irradiates the laser without the workpiece 27 present. The power meter 25, connected to the work table 26, measures the laser output from the transmission optical system 23. The power meter 25 transmits the measurement value to the calculation unit 24. The calculation unit 24 calculates a pulse irradiation pattern based on the measurement values ​​acquired from the power meter 25 and transmits the pulse irradiation pattern to the control device 22. The laser processing machine 30 places the workpiece 27 on the work table 26 and processes the workpiece 27 based on the pulse irradiation pattern determined in this manner.

[0076] The laser processing machine 30 is configured using the gas laser oscillator 20 as described above, and thus the repetition frequency of the laser oscillation can be increased, thereby improving production efficiency.

[0077] The configurations shown in the above embodiments are merely examples, and may be combined with other known technologies, or different embodiments may be combined with each other. It is also possible to omit or modify parts of the configurations as long as they do not deviate from the gist of the invention. [Explanation of symbols]

[0078] 10, 10a, 10b high voltage pulse power supply unit, 11, 11b main power supply circuit unit, 12 gate control unit, 13, 13c discharge electrode unit, 20 gas laser oscillator, 21 interface, 22 control device, 23 transmission optical system, 24 calculation unit, 25 power meter, 26 work table, 27 work, 30 laser processing machine, 90, 93 processing circuit, 91 processor, 92 memory, C1 to C4 capacitors, D1, D2 dielectric, DT carbon dioxide gas pipe, E1, E2 electrode plate, Inv1 to Inv4 full bridge inverter, I A Discharge current amplitude, I Max Maximum charging current, I RMS Effective value of discharge current, L1, L2 reactor, LegLi left leg, LegRi right leg, Ln1~Ln4 negative inductor, Lp1~Lp4 positive inductor, M1~M4 current sensor, Nn1~Nn4 negative output terminal, Np1~Np4 positive output terminal, O1~O4 output terminal, P1~P4 window comparator, Pn1~Pn4 negative comparator, Pp1~Pp4 positive comparator, pg main pulse, ps group pulse, S1-1~S1-4, S2-1~S2-4, S3-1~S3-4, S4-1~S4-4 semiconductor switching element, T discharge electrode, T1~T4 transformer, t c Charging time, t on Discharge time, V1 DC power supply, VM1~VM4 voltage signals, Vrefn negative threshold voltage, Vrefp positive threshold voltage.

Claims

1. n is an integer of 2 or more, and i is an integer from 1 to n, first to n-th capacitors including an i-th capacitor; a first full-bridge inverter to an n-th full-bridge inverter including an i-th full-bridge inverter having a pair of input terminals connected in parallel to both ends of the i-th capacitor; a gate control unit that controls on / off of semiconductor switching elements included in the first to nth full-bridge inverters by a gate signal; output terminals of the first full-bridge inverter to the nth full-bridge inverter are sequentially connected in series, and a pair of power supply output terminals is formed by an output terminal of the first full-bridge inverter that is not connected to a second full-bridge inverter and an output terminal of the nth full-bridge inverter that is not connected to an (n-1)th full-bridge inverter; a first positive-side inductor to an n-th positive-side inductor, including an i-th positive-side inductor having one end connected to one end of the i-th capacitor and the other end connected to one end of the (i+1)-th positive-side inductor, one end of the (i+1)-th capacitor, or a DC power supply; a first negative-side inductor to an n-th negative-side inductor, including an i-th negative-side inductor having one end connected to the other end of the i-th capacitor and having the other end connected to one end of the (i+1)-th negative-side inductor and the other end of the (i+1)-th capacitor or the DC power supply; the DC power supply having a positive output terminal connected to the nth positive inductor and a negative output terminal connected to the nth negative inductor; A high-voltage pulse power supply device comprising:

2. The inductance of the i-th positive-side inductor and the i-th negative-side inductor is set to be equal to or greater than the value obtained by dividing twice the value obtained by integrating the input voltage from the DC power supply, the effective value of the discharge current of the i-th capacitor, and the discharge time of the i-th capacitor by the square of the maximum value of the charge current flowing through the i-th positive-side inductor and the i-th negative-side inductor.

2. The high-voltage pulse power supply device according to claim 1.

3. the i-th full-bridge inverter includes an i-1th switch, an i-2nd switch, an i-3rd switch, and an i-4th switch, which are the semiconductor switching elements, the i-1st switch and the i-4th switch constituting an i-th left leg, and the i-2nd switch and the i-3rd switch constituting an i-th right leg; the gate control unit alternately switches between a first state in which the i-1 switch and the i-3 switch are turned on and the i-2 switch and the i-4 switch are turned off, and a second state in which the i-1 switch and the i-3 switch are turned off and the i-2 switch and the i-4 switch are turned on to generate a discharge current from the i capacitor, and switches to a third state in which all of the i-1 switch to the i-4 switch are turned off to charge the i capacitor; time durations of the first state, the second state, and the third state are determined based on the inductances of the i-th positive-side inductor and the i-th negative-side inductor, and the capacitance of the i-th capacitor; 2. The high-voltage pulse power supply device according to claim 1.

4. a first current sensor to an n-th current sensor including an i-th current sensor for measuring a current flowing between the i-th capacitor, the i-th positive-side inductor, and the i-th full-bridge inverter; a first window comparator to an n-th window comparator including an i-th window comparator that compares an i-th voltage signal based on a measurement result of the i-th current sensor with a positive threshold voltage and a negative threshold voltage; Equipped with The gate control unit, based on the comparison result obtained from the i window comparator, when the comparison result indicates that the i-th voltage signal is greater than the positive threshold voltage during the time that the gate signal is being transmitted to the semiconductor switching element included in the i-th full-bridge inverter, the transmission of the gate signal to the semiconductor switching element included in the i-th full-bridge inverter is stopped; When the comparison result indicates that the i-th voltage signal is smaller than the negative threshold voltage during the time when the gate signal is being transmitted to the semiconductor switching element included in the i-th full-bridge inverter, the transmission of the gate signal to the semiconductor switching element included in the i-th full-bridge inverter is stopped; when the comparison result indicates that the i-th voltage signal has exceeded the positive-side threshold voltage during a time when the gate signal is not being transmitted to the semiconductor switching element included in the i-th full-bridge inverter, the transmission of the gate signal to the semiconductor switching element included in the i-th full-bridge inverter is stopped.

2. The high-voltage pulse power supply device according to claim 1.

5. a first transformer to an n-th transformer including an ith transformer configured by the ith positive-side inductor and the ith negative-side inductor; The i-th positive inductor is a primary coil of the i-th transformer, and the i-th negative inductor is a secondary coil of the i-th transformer.

2. The high-voltage pulse power supply device according to claim 1.

6. 6. A gas laser oscillator comprising the high-voltage pulse power supply device according to claim 1.

7. A laser processing machine comprising the gas laser oscillator according to claim 6.

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