Code table generation device, memory system, and code table generation method
By dividing symbols into frequent and less frequent groups and treating the latter as a single representative symbol, the code table generation process is optimized, reducing processing time and circuit size, addressing inefficiencies in existing Huffman coding methods.
Patent Information
- Application Number
- JP2022030927
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-03-01
- Publication Date
- 2025-10-21
- Estimated Expiration
- 2042-03-01
AI Technical Summary
Existing code table generation methods, such as dynamic Huffman coding, require significant processing time or increased circuit size when dealing with a large number of symbol types, as they construct a Huffman tree for each symbol, which is inefficient.
The code table generation device divides symbols into top K frequent symbols and the remaining (N-K) symbols, treating the latter as a single representative symbol, reducing the number of leaf nodes in the Huffman tree construction process.
This approach reduces the processing time and circuit size required for generating a code table by minimizing the number of leaf nodes, thus optimizing the code table generation process.
Smart Images

Figure 0007757210000002 
Figure 0007757210000003 
Figure 0007757210000004
Abstract
Description
[Technical Field]
[0001] FIELD Embodiments of the present invention relate to a code table generation device, a memory system, and a code table generation method. [Background technology]
[0002] Dynamic Huffman coding is a variable-length coding method that dynamically generates a code table based on the frequency of occurrence of the symbols to be coded. The code table shows the correspondence between symbols and the code words assigned to those symbols. In dynamic Huffman coding, short code words are assigned to symbols that occur frequently, and long code words are assigned to symbols that occur infrequently.
[0003] More specifically, in dynamic Huffman coding, a Huffman tree is constructed in which one or more types of symbols that appear are each represented as a leaf node, and the code length of each symbol is determined using the constructed Huffman tree.
[0004] The process of constructing a Huffman tree and determining the code length of each symbol requires a processing amount proportional to the number of types of symbols that appear. Therefore, if there are many types of symbols that appear, the process of generating a code table will take a long time, or the circuit size of the device (for example, the number of gates) will increase in order to complete the code table generation within a specific time. [Prior art documents] [Patent documents]
[0005] [Patent Document 1] U.S. Patent No. 1,0694,217 [Non-patent literature]
[0006] [Non-Patent Document 1] L. Peter Deutsch, "DEFLATE Compressed Data Format Specification version 1.3", [online], RFC1951, May 1996, [Retrieved January 20, 2022], Internet<URL:https: / / datatracker.ietf.org / doc / html / rfc1951> Summary of the Invention [Problem to be solved by the invention]
[0007] An embodiment of the present invention provides a code table generation device, a memory system, and a code table generation method that can reduce the amount of processing required to generate a code table. [Means for solving the problem]
[0008] According to an embodiment, the code table generation device includes a frequency table generation unit, a frequency sorting unit, a symbol merging unit, a Huffman tree generation unit, a code length determination unit, and a code determination unit. The frequency table generation unit determines a code length based on the occurrence frequency of each input symbol. N pieces symbol and the N pieces are associated with the symbols N pieces The frequency sorting unit generates a frequency table including the occurrence frequency of the N pieces symbol and the above N pieces The symbol merging unit rearranges the occurrence frequencies of the symbols in descending order of occurrence frequency. N pieces From the symbols of, the top K symbols and the remaining (NK) symbols and (NK) pieces The symbol of M pieces and divide it into a set of symbols M pieces Each symbol corresponds to a set of M pieces The Huffman tree generator determines the frequency of occurrence associated with the root node of each of the K symbols. M pieces The code length determination unit generates a Huffman tree using the root nodes of the subtrees of the M pieces and based on the subtree of N pieces correspond to the symbols N pieces The code determining unit determines the code length of the N pieces Based on the code length of N pieces Assign each to the symbol N pieces Determine the sign of . The N is an integer greater than (K+M). The K is 1 or more, Less than N is an integer. The M is an integer equal to or greater than 2 and less than the (NK). [Brief explanation of the drawings]
[0009] [Figure 1] 1 is a block diagram showing an example of the configuration of an information processing system including a code table generation device according to a first embodiment. [Figure 2] FIG. 1 is a block diagram showing an example of the configuration of a code table generation device according to a comparative example. [Figure 3] 10 is a flowchart showing an example of the procedure of a code length determination process executed in a code table generation device according to a comparative example. [Figure 4] FIG. 10 is a diagram showing an example of the configuration of a frequency table used in a code table generation device according to a comparative example. [Figure 5] FIG. 10 is a diagram showing an example of a Huffman tree generated in a code table generation device according to a comparative example. [Figure 6] FIG. 10 is a diagram showing an example of code lengths determined in a code table generation device according to a comparative example. [Figure 7] 1 is a block diagram showing an example of the configuration of a compression device including a code table generation device according to a first embodiment. [Figure 8] FIG. 3 is a diagram showing an example of a frequency table (0th frequency table) generated in the code table generation device according to the first embodiment. [Figure 9] FIG. 3 is a diagram showing an example of a sorted frequency table (first frequency table) in the code table generation device according to the first embodiment. [Figure 10]1A and 1B are diagrams showing an example of a first frequency table and examples of a first partial table and a second partial table into which the first frequency table is divided, respectively, used in a code table generation device according to a first embodiment. [Figure 11] FIG. 2 is a diagram showing an example of a Huffman tree constructed in the code table generation device according to the first embodiment. [Figure 12] FIG. 2 is a diagram showing an example of a subtree of merge symbols used in the code table generation device according to the first embodiment. [Figure 13] FIG. 2 is a diagram showing an example of a pseudo program that assigns code bit strings to symbols, which is executed in the code table generation device according to the first embodiment. [Figure 14] 4 is a flowchart showing an example of the procedure of an encoding process executed in a compression device including a code table generation device according to the first embodiment. [Figure 15] 4 is a flowchart showing an example of the procedure of a code table generation process executed in the code table generation device according to the first embodiment. [Figure 16] FIG. 10 is a block diagram showing an example of the configuration of a compression device including a code table generation device according to a second embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0010] Hereinafter, embodiments will be described with reference to the drawings.
[0011] (First embodiment) 1 shows an example of the configuration of an information processing system including a code table generation device according to Embodiment 1. The information processing system 1 includes a host device 2 (hereinafter referred to as the host 2) and a memory system 3.
[0012] The memory system 3 is a semiconductor storage device configured to write data to a nonvolatile memory such as a NAND flash memory 5 and read data from the nonvolatile memory. The memory system 3 is realized, for example, as a solid state drive (SSD) including a NAND flash memory 5. The following describes an example in which the memory system 3 is realized as an SSD, but the memory system 3 may also be realized as a hard disk drive (HDD).
[0013] The host 2 may be a storage server that stores a large amount of diverse data in the memory system 3, or may be a personal computer.
[0014] The memory system 3 can be used as storage for the host 2. The memory system 3 may be built into the host 2, or may be connected to the host 2 via a cable or a network.
[0015] The interface for connecting the host 2 and the memory system 3 complies with SCSI, Serial Attached SCSI (SAS), ATA (AT Attachment), Serial ATA (SATA), PCI Express (PCIe) (registered trademark), Ethernet (registered trademark), Fibre channel, NVM Express (NVMe) (registered trademark), etc.
[0016] The memory system 3 includes a controller 4 and a NAND flash memory 5. The controller 4 can be realized by a circuit such as a system-on-a-chip (SoC).
[0017] The memory system 3 may include a random access memory (RAM) that is a volatile memory, such as a dynamic random access memory (DRAM) 6. Alternatively, a RAM such as a static random access memory (SRAM) may be built into the controller 4. The DRAM 6 may also be built into the controller 4.
[0018] The DRAM 6 is a volatile memory. A RAM such as the DRAM 6 is provided with, for example, a storage area for firmware (FW) and a cache area for a logical-physical address conversion table.
[0019] The NAND flash memory 5 includes multiple blocks. Each block includes multiple pages. A block functions as the smallest erase unit. A block is sometimes called an "erase block" or a "physical block." Each page includes multiple memory cells connected to the same word line. A page is the unit of data write and read operations. Note that a word line may also be used as the unit of data write and read operations.
[0020] There is an upper limit (maximum number of P / E cycles) to the number of program / erase cycles that can be performed on each block. One P / E cycle for a block includes an erase operation to erase all memory cells in the block, and a write operation to write data to each page of the block.
[0021] The controller 4 includes, for example, a host interface (host I / F) 11, a CPU 12, a NAND interface (NAND I / F) 13, a DRAM interface (DRAM I / F) 14, and a compression device 15. The host I / F 11, the CPU 12, the NAND I / F 13, the DRAM I / F 14, and the compression device 15 may be interconnected via a bus 10.
[0022] The controller 4 is electrically connected to the NAND flash memory 5 via a NAND I / F 13 that supports interface standards such as Toggle DDR and Open NAND Flash Interface (ONFI). The NAND I / F 13 functions as a NAND control circuit configured to control the NAND flash memory 5.
[0023] The controller 4 functions as a memory controller configured to control the NAND flash memory 5 .
[0024] The controller 4 may function as a flash translation layer (FTL) configured to perform data management and block management of the NAND flash memory 5. The data management performed by the FTL includes (1) management of mapping information indicating the correspondence between each logical address and each physical address of the NAND flash memory 5, and (2) processing for concealing the difference between page-based data read / write operations and block-based data erase operations. The block management includes management of bad blocks, wear leveling, and garbage collection.
[0025] A logical address is an address used by the host 2 to address a storage area in the memory system 3. Management of the mapping between each logical address and each physical address is performed using a logical-physical address conversion table. The controller 4 uses the logical-physical address conversion table to manage the mapping between each logical address and each physical address in specific management size units. A physical address corresponding to a certain logical address indicates the physical storage location in the NAND flash memory 5 where the data of this logical address is written. The logical-physical address conversion table may be loaded from the NAND flash memory 5 to the DRAM 6 when the memory system 3 is powered on.
[0026] Data can be written to one page only once per P / E cycle. Therefore, the controller 4 writes updated data corresponding to a certain logical address to a different physical storage location, rather than to the physical storage location where the previous data corresponding to this logical address is stored. The controller 4 then invalidates the previous data by updating the logical-physical address translation table so that the logical address is associated with this different physical storage location.
[0027] The host I / F 11 is a hardware interface that communicates between the memory system 3 and the host 2, which is an external device of the memory system 3. The host I / F 11 includes a circuit that receives various commands from the host 2, such as input / output (I / O) commands and various control commands. The I / O commands may include write commands and read commands. The control commands may include unmap commands (trim commands) and format commands. The host I / F 11 includes a circuit that transmits responses and data according to the commands to the host 2.
[0028] The DRAM I / F 14 functions as a DRAM control circuit configured to control access to the DRAM 6 .
[0029] The CPU 12 is a processor configured to control the host I / F 11, the NAND I / F 13, the DRAM I / F 14, and the compressor 15. The CPU 12 performs various processes by executing the FW loaded into the DRAM 6. In other words, the FW is a control program for controlling the operation of the CPU 12. In addition to the FTL processing described above, the CPU 12 can also perform command processing for processing various commands from the host 2. Note that some or all of the FTL processing and command processing may be performed by dedicated hardware within the controller 4.
[0030] The compression device 15 is a Huffman coding unit that compresses data by encoding the data to be written to the NAND flash memory 5. For example, the CPU 12 inputs write data received in response to a write command received from the host 2 as plaintext data to the compression device 15. The compression device 15 encodes the plaintext data input from the CPU 12. The compression device 15 has a configuration for implementing, for example, dynamic Huffman coding in order to compress the data.
[0031] Dynamic Huffman coding is a variable-length coding method that dynamically generates a code table using the frequency of occurrence of symbols to be coded. The code table includes information indicating N types of symbols and N variable-length codes (codewords) associated with each of the N types of symbols. In dynamic Huffman coding, short codewords are assigned to symbols that occur frequently, and long codewords are assigned to symbols that occur less frequently. Compression device 15 converts input symbols into codewords in accordance with this assignment. In other words, the codewords obtained by the conversion are variable-length codes. Note that the symbols are, for example, fixed-length data.
[0032] The symbol to be coded is one of N types of symbols. In the following, the case where N is 256 will be mainly illustrated.
[0033] Each of the 256 types of symbols is, for example, 1 byte of data. In this case, the 256 types of symbols correspond to values from 0 to 255, respectively. The values from 0 to 255 corresponding to each of the 256 types of symbols are also referred to as symbol numbers. Note that the number of types of symbols and the values corresponding to the symbols are merely examples, and may be changed depending on the characteristics of the data including the symbols to be encoded.
[0034] The compression device 15 includes a code table generation device 32. The code table generation device 32 is a device that generates a code table for converting symbols into variable-length codes. The code table generation device 32 may be a device provided within the compression device 15, or may be part of a circuit that realizes the compression device 15. Hereinafter, the code table generation device 32 is also referred to as a code table generation unit 32.
[0035] Here, the generation of a code table in a code table generation device 32A according to a comparative example will be described with reference to FIGS.
[0036] 2 is a block diagram showing the configuration of a code table generation device 32A according to a comparative example. The code table generation device 32A includes, for example, a frequency counting unit 321A, a frequency sorting unit 322A, a Huffman tree generation unit 324A, a code length determination unit 325A, and a canonical Huffman unit 326A.
[0037] The frequency counting unit 321A generates a frequency table 40A (hereinafter referred to as the 0th frequency table 40A) using the input symbols. The 0th frequency table 40A is a table that shows multiple symbols and the frequency of appearance of each of the multiple symbols. The frequency counting unit 321A sends the 0th frequency table 40A to the frequency sorting unit 322A.
[0038] The frequency sorting unit 322A sorts the entries in the 0th frequency table 40A in descending order of appearance frequency. The frequency table obtained by sorting is called a first frequency table 41A. The frequency sorting unit 322A sends the first frequency table 41A to the Huffman tree generation unit 324A.
[0039] The Huffman tree generator 324A generates a Huffman tree using the first frequency table 41A.
[0040] FIG. 3 is a flowchart showing an example of the procedure of the Huffman tree generation process executed by the Huffman tree generation unit 324A.
[0041] First, the Huffman tree generation unit 324A adds all symbols in the first frequency table 41A whose occurrence frequency is greater than 0 as leaf nodes on the Huffman tree (step S11). That is, the Huffman tree generation unit 324A generates a Huffman tree including leaf nodes corresponding to the number of symbols in the first frequency table 41A whose occurrence frequency is greater than 0. The number of symbols for which the Huffman tree is generated by the Huffman tree generation unit 324A (i.e., the number of leaf nodes of the generated Huffman tree) is up to N.
[0042] Next, the Huffman tree generator 324A selects node A with the lowest occurrence frequency and node B with the next lowest occurrence frequency from all leaf nodes and intermediate nodes that do not have a parent node in the Huffman tree (step S12). The Huffman tree generator 324A adds an intermediate node having the selected nodes A and B as its children to the Huffman tree (step S13). The Huffman tree generator 324A then sets the occurrence frequency of the added intermediate node to the sum of the occurrence frequencies of node A and node B (step S14).
[0043] The Huffman tree generator 324A determines whether the Huffman tree contains two or more leaf nodes and intermediate nodes that have no parent nodes (step S15). If the Huffman tree contains two or more leaf nodes and intermediate nodes that have no parent nodes (YES in step S15), the processing by the Huffman tree generator 324A proceeds to step S12. That is, the Huffman tree generator 324A further performs a procedure for adding leaf nodes that have no parent nodes and intermediate nodes that have intermediate nodes as their children.
[0044] If the Huffman tree contains less than two leaf nodes and intermediate nodes that do not have a parent node (NO in step S15), Huffman tree generation unit 324A ends the Huffman tree generation process.
[0045] By performing the above Huffman tree generation process, the Huffman tree generation unit 324A can generate a Huffman tree. The generated Huffman tree includes multiple leaf nodes corresponding to multiple symbols whose occurrence frequency is greater than 0. The Huffman tree generation unit 324A builds the Huffman tree bottom-up, starting with leaf nodes corresponding to symbols with low occurrence frequencies.
[0046] Returning to Fig. 2, the Huffman tree generation unit 324A sends the generated Huffman tree to the code length determination unit 325A.
[0047] The code length determination unit 325A determines the code length of each of the multiple symbols using the Huffman tree received from the Huffman tree generation unit 324A. The depth of a leaf node starting from the root node (i.e., the number of edges traced from the root node to the leaf node) corresponds to the code length of the corresponding symbol. Therefore, the code length determination unit 325A can determine the code length of the symbol using the Huffman tree. The code length determination unit 325A sends the determined code lengths of each of the multiple symbols to the canonical Huffman unit 326A.
[0048] The canonical Huffman unit 326A generates a code table using the code lengths of the multiple symbols received from the code length determination unit 325A. The canonical Huffman unit 326A generates the code table, for example, using the canonical Huffman method. The canonical Huffman method is a method that can determine the code bit string (variable length code) to be assigned to a symbol using only the code length of the symbol. A specific example of generating a code table using the canonical Huffman method will be described later with reference to FIG. 13.
[0049] A specific example in which the code length is determined using the first frequency table 41A will be described with reference to FIGS.
[0050] 4 shows an example of the configuration of a first frequency table 41A generated by the frequency counting unit 321A and sorted by the frequency sorting unit 322. The first frequency table 41A includes multiple entries corresponding to multiple symbols, respectively. Each of the multiple entries includes, for example, a symbol field and an occurrence frequency field.
[0051] The symbol field indicates the corresponding symbol. The occurrence frequency field indicates the occurrence frequency of the corresponding symbol. More specifically, the occurrence frequency field indicates, for example, the number of times the corresponding symbol appears in the input data to be processed.
[0052] In the following, the value shown in the symbol field will also be simply referred to as a symbol. The same applies to the values shown in the other fields of the first frequency table 41A and the values shown in the fields of the other tables.
[0053] In the example shown in Figure 4, the frequency of occurrence of symbol "a" is 120. The frequency of occurrence of symbol "b" is 60. The frequency of occurrence of symbol "c" is 29. The frequency of occurrence of symbol "d" is 14. The frequency of occurrence of symbol "e" is 4. The frequencies of occurrence of symbol "f" and symbol "g" are 3. The frequency of occurrence of symbol "h" is 2. The frequencies of occurrence of symbol "i" and symbol "j" are 0.
[0054] 5 shows an example of a Huffman tree 50 generated by the Huffman tree generation unit 324A. Here, an example is shown in which the Huffman tree generation unit 324A generates the Huffman tree 50 using the first frequency table 41A shown in FIG.
[0055] First, the Huffman tree generator 324A selects eight symbols "a," "b," "c," "d," "e," "f," "g," and "h" whose occurrence frequencies are greater than 0 from the frequency table 41. The Huffman tree generator 324A generates a Huffman tree 50 including eight leaf nodes 511, 521, 531, 541, 561, 562, 563, and 564 to which the eight selected symbols are respectively assigned. The occurrence frequency of the corresponding symbol is set in each leaf node.
[0056] The Huffman tree generator 324A selects leaf node 564 of symbol "h" with the lowest occurrence frequency and leaf node 563 of symbol "g" with the next lowest occurrence frequency from all leaf nodes and all intermediate nodes that do not have a parent node in the Huffman tree 50. The Huffman tree generator 324A then adds intermediate node 552, which has the selected leaf node 564 and leaf node 563 as its children, to the Huffman tree 50. The Huffman tree generator 324A sets the occurrence frequency of intermediate node 552 to the sum of the occurrence frequency of leaf node 564 and the occurrence frequency of leaf node 563 (=2+3=5).
[0057] Next, Huffman tree generation unit 324A selects leaf node 562 of symbol "f" with the lowest occurrence frequency and leaf node 561 of symbol "e" with the next lowest occurrence frequency from all leaf nodes and all intermediate nodes that do not have a parent node in Huffman tree 50. Huffman tree generation unit 324A then adds intermediate node 551, which has selected leaf node 562 and leaf node 561 as its children, to Huffman tree 50. Huffman tree generation unit 324A sets the occurrence frequency of added intermediate node 551 to the sum of the occurrence frequency of leaf node 562 and the occurrence frequency of leaf node 561 (=3+4=7).
[0058] Next, the Huffman tree generation unit 324A selects the intermediate node 552 with the lowest appearance frequency and the intermediate node 551 with the next lowest appearance frequency from all leaf nodes and all intermediate nodes that do not have a parent node in the Huffman tree 50. The Huffman tree generation unit 324A then adds the intermediate node 542, which has the selected intermediate node 552 and intermediate node 551 as its children, to the Huffman tree 50. The Huffman tree generation unit 324A sets the appearance frequency of the added intermediate node 542 to the sum of the appearance frequency of the intermediate node 552 and the appearance frequency of the intermediate node 551 (=5+7=12).
[0059] Similarly, Huffman tree generator 324A repeatedly adds intermediate nodes until the total number of leaf nodes and intermediate nodes without parent nodes in Huffman tree 50 is reduced to one or less (i.e., until root node 501 is the only node without a parent node). In this way, Huffman tree 50 shown in FIG. 5 can be constructed.
[0060] The code length determination unit 325A uses the constructed Huffman tree 50 to determine multiple code lengths associated with multiple symbols, respectively. Specifically, the code length determination unit 325A uses the constructed Huffman tree 50 to determine the code lengths of each of the eight symbols "a," "b," "c," "d," "e," "f," "g," and "h." The depth of a leaf node corresponding to one symbol, from the root node 501, indicates the code length of that symbol. For example, the depth of the leaf node 511 for the symbol "a" from the root node 501 is 1. Therefore, the code length of the symbol "a" is 1 bit. Also, for example, the depth of the leaf node 564 for the symbol "h" from the root node 501 is 6. Therefore, the code length of the symbol "h" is 6 bits.
[0061] FIG. 6 shows an example of the code length for each symbol determined by the code length determination unit 325A using the Huffman tree 50 shown in FIG.
[0062] Specifically, the code length of symbol "a" is 1 bit. The code length of symbol "b" is 2 bits. The code length of symbol "c" is 3 bits. The code length of symbol "d" is 4 bits. Furthermore, the code length of symbols "e", "f", "g", and "h" is each 6 bits.
[0063] As described above, in the code table generation device 32A according to the comparative example, the process of constructing the Huffman tree 50 and determining the code length of each symbol requires a processing amount proportional to the type of symbols that appear. Therefore, in the code table generation device 32A according to the comparative example, when there are many types of symbols that appear, the code table generation process takes a long time, or the circuit size (e.g., the number of gates) of the code table generation device 32A increases in order to complete the code table generation within a specific time.
[0064] Therefore, the code table generation device 32 according to this embodiment reduces the amount of processing required to build a Huffman tree. Specifically, the code table generation device 32 divides N types of symbols into the top K symbols in descending order of appearance frequency and the remaining (N K) symbols, and performs the process of building a Huffman tree by regarding the (N K) symbols as a single leaf node or M leaf nodes on the Huffman tree. Note that K is an integer greater than or equal to 1 and less than N. Therefore, (N K) is an integer greater than or equal to 1 and less than N. M is an integer smaller than (N K). As a result, the code table generation device 32 reduces the number of leaf nodes in the built Huffman tree, thereby reducing the amount of processing required to build a Huffman tree.
[0065] 7 shows an example of the configuration of the compression device 15. The compression device 15 includes, for example, a buffer unit 31, a code table generation unit 32 (code table generation device 32), a variable-length coding unit 33, a code table compression unit 34, and a packing unit 35.
[0066] The buffer unit 31 stores (buffers) the symbols input to the compression device 15. The buffer unit 31 delays the stored symbols, for example, until a specific timing, and then sends them to the variable-length coding unit 33.
[0067] The code table generator 32 generates a code table 49 using the symbols input to the compressor 15. The code table 49 includes information indicating a plurality of symbols and a plurality of variable-length codes (i.e., a plurality of code bit strings) respectively associated with the plurality of symbols.
[0068] More specifically, the code table generation unit 32 generates the code table 49 based on the frequency of occurrence of multiple symbols included in a specific unit of input data. The specific unit may be a specific amount of data, or a specific unit such as a file. When a specific unit is used as the unit, the code table generation unit 32 recognizes the specific unit of input data by detecting data indicating the end of the input data.
[0069] The code table generation unit 32 sends the generated code table 49 to the variable-length coding unit 33. In addition, the code table generation unit 32 sends the lengths of the variable-length codes (i.e., the code lengths) assigned to the symbols shown in the code table 49 to the code table compression unit 34.
[0070] The code table compression unit 34 compresses the code table 49. Specifically, the code table compression unit 34 performs compression processing on the multiple code lengths received from the code table generation unit 32. The compression processing on the multiple code lengths is, for example, as specified in the DEFLATE standard (RFC1951), a processing of rearranging the multiple code lengths in a specific symbol order, run-length encoding the rearranged multiple code lengths, and further Huffman encoding the result. The specific symbol order is, for example, an order that follows the alphabetical order of the corresponding multiple symbols. In other words, the multiple code lengths arranged in a specific symbol order are, for example, multiple code lengths rearranged to correspond to the multiple symbols arranged in alphabetical order. The code table compression unit 34 sends the data obtained by the compression processing (compressed code table 49) to the packing unit 35.
[0071] The variable-length coding unit 33 converts the symbols sent by the buffer unit 31 into variable-length codes (code bit strings) using the code table 49 sent by the code table generation unit 32. The variable-length coding unit 33 sends the variable-length codes obtained by the conversion to the packing unit 35.
[0072] The packing unit 35 sequentially concatenates one or more variable-length codes output from the variable-length coding unit 33 and outputs the result as compressed data (compressed stream) for each specific data size. This specific data size is, for example, 64 bits. The packing unit 35 also inserts the compressed code table 49 output from the code table compression unit 34 as a header of this compressed data. The compressed code table 49 is used to restore the code table 49 (decoding table) when the compressed data is decoded in the decompressor.
[0073] With the above configuration, the compression device 15 can convert input symbols into variable-length codes by dynamic Huffman coding. For example, if the input symbols are data requested by the host 2 to be written to the NAND flash memory 5, the CPU 12 writes compressed data including one or more variable-length codes and a compressed code table 49 to the NAND flash memory 5 via the NAND I / F 13.
[0074] The controller 4 may further include an ECC encoder and an ECC decoder. In this case, the ECC encoder generates error correction parity (ECC parity) for the compressed data output from the packing unit 35, and generates a codeword having the generated ECC parity and the compressed data. The CPU 12 is configured to write the codeword to the NAND flash memory 5 via the NAND I / F 13. That is, the CPU 12 is configured to write data based on the compressed data output from the compression device 15 to the NAND flash memory 5 via the NAND I / F 13. When the CPU 12 receives a read command from the host 2 via the host I / F 11, for example, the CPU 12 reads data based on the read command from the NAND flash memory 5 via the NAND I / F 13. The ECC decoder performs error correction processing on the read data. The read data that has undergone error correction processing is input as compressed data by the CPU 12 to a decompressor, and the decompressor decompresses the input compressed data. In response to a read command from the host 2, the CPU 12 transmits the decompressed data to the host 2. That is, in response to a read command from the host 2, the CPU 12 is configured to decompress data based on the data read from the NAND flash memory 5 and transmit the decompressed data to the host 2.
[0075] Note that a part or all of the compression device 15 may be realized as hardware such as a circuit, or may be realized as a program (that is, software) executed by at least one processor.
[0076] Next, a specific configuration of the code table generation unit 32 will be described. The code table generation unit 32 includes, for example, a frequency counting unit 321, a frequency sorting unit 322, a symbol merging unit 323, a Huffman tree generation unit 324, a code length determination unit 325, and a canonical Huffman unit 326.
[0077] The frequency counting unit 321 generates a frequency table 40 (hereinafter referred to as the 0th frequency table 40) based on the occurrence frequency of each input symbol. The frequency counting unit 321, for example, counts the number of occurrences of each input symbol to generate the 0th frequency table 40. The frequency counting unit 321 generates the 0th frequency table 40, for example, every time 4096 symbols are input. The 0th frequency table 40 is a table that indicates multiple symbols and multiple occurrence frequencies (e.g., the number of occurrences) associated with each of the multiple symbols. The frequency counting unit 321 sends the 0th frequency table 40 to the frequency sorting unit 322.
[0078] The frequency sorting unit 322 sorts the entries in the 0th frequency table 40 in descending order of appearance frequency. The frequency table obtained by sorting is called a first frequency table 41. The frequency sorting unit 322 sends the first frequency table 41 to the symbol merging unit 323.
[0079] FIG. 8 shows an example of the 0th frequency table 40 generated by the frequency counting unit 321. The 0th frequency table 40 includes N entries corresponding to N types of symbols. The N entries are assigned indexes ranging from 0 to N-1, starting from the top. Therefore, each of the N entries can be identified by its index. In the example shown in FIG. 8, N is 256. Each entry includes a symbol number field and an occurrence frequency field.
[0080] In an entry corresponding to a certain symbol, the symbol number field indicates the symbol number corresponding to that symbol, and the occurrence frequency field indicates the frequency (e.g., the number of times) at which the corresponding symbol appears among one or more symbols included in the input data.
[0081] In the 0th frequency table 40 shown in Fig. 8, for example, an entry with an index of 0 indicates that the occurrence frequency of the symbol with symbol number 0 is 3. For example, an entry with an index of 1 indicates that the occurrence frequency of the symbol with symbol number 1 is 16. Also, for example, an entry with an index of 253 indicates that the occurrence frequency of the symbol with symbol number 253 is 30.
[0082] 9 shows an example of the first frequency table 41 acquired by the frequency sorting unit 322. The first frequency table 41 is a table in which the 256 entries in the 0th frequency table 40 are sorted in descending order of appearance frequency. The 256 entries in the first frequency table 41 are assigned indexes from 0 to 255, starting from the top.
[0083] In the first frequency table 41 shown in Fig. 9, for example, an entry with an index of 0 indicates that the appearance frequency of the symbol with symbol number 64 is 50. For example, an entry with an index of 1 indicates that the appearance frequency of the symbol with symbol number 253 is 30. Also, for example, an entry with an index of 255 indicates that the appearance frequency of the symbol with symbol number 8 is 0.
[0084] In this way, the first frequency table 41 has 256 entries arranged in descending order of appearance frequency.
[0085] Return to Figure 7.
[0086] When constructing a Huffman tree, the symbol merging unit 323 performs processing to regard one or more symbols with low occurrence frequencies as one symbol (hereinafter referred to as a representative symbol) among all symbols (i.e., N symbols) included in the first frequency table 41. The symbol merging unit 323 includes, for example, a symbol distributing unit 371, a representative symbol frequency estimating unit 372, a merging symbol number counting unit 373, and a merging symbol addition code length determining unit 374.
[0087] The symbol distribution unit 371 divides the first frequency table 41 into a first partial table 431 and a second partial table 432. The first partial table 431 includes the top K entries of the N entries included in the first frequency table 41 in descending order of appearance frequency. The K entries are entries for the K symbols with the highest appearance frequency. The K symbols with the highest appearance frequency are also referred to as top symbols. The second partial table 432 includes the remaining (NK) entries after excluding the top K entries from the N entries included in the first frequency table 41. The (NK) entries are entries for the (NK) symbols with the lowest appearance frequency. The (NK) entries are more likely to include a symbol with an appearance frequency of 0 than the top K entries. The (NK) symbols with the lowest appearance frequency are also referred to as bottom symbols. The (NK) bottom symbols are considered as one representative symbol when constructing a Huffman tree. In other words, the representative symbol is a symbol that represents the (NK) bottom symbols.
[0088] The symbol distributor 371 sends the first partial table 431 to the Huffman tree generator 324. The symbol distributor 371 sends the second partial table 432 to the representative symbol frequency estimator 372, the merge symbol number counter 373, and the merge symbol addition code length determiner 374.
[0089] 10 shows (A) an example of a first frequency table 41, and (B) an example of a first partial table 431 and (C) an example of a second partial table 432 into which the first frequency table 41 is divided. In the example shown in FIG. 10, N is 256 and K is 32.
[0090] The first frequency table 41 shown in Fig. 10(A) is a table in which N entries are arranged in descending order of appearance frequency, similar to the first frequency table 41 shown in Fig. 9. The first frequency table 41 is divided into a first partial table 431 and a second partial table 432.
[0091] 10(B), the first partial table 431 includes the top K entries (i.e., the first K entries) from among the entries included in the first frequency table 41. The K entries in the first partial table 431 are assigned indexes from 0 to K-1, in order from the top.
[0092] 10(C), the second partial table 432 includes the remaining (NK) entries (224 entries in FIG. 10(C)) after excluding the top K entries from the entries included in the first frequency table 41. The (NK) entries in the second partial table 432 are assigned indexes from 0 to NK-1, respectively, starting from the top.
[0093] Return to Figure 7.
[0094] When constructing a Huffman tree, the representative symbol frequency estimation unit 372 estimates the appearance frequency of the representative symbol in order to regard the (NK) lower order symbols included in the second sub-table 432 as one representative symbol. The representative symbol frequency estimation unit 372 estimates the appearance frequency of the representative symbol, for example, by estimating the sum of the appearance frequencies of the (NK) lower order symbols.
[0095] Here, an example will be described in which an estimate of the sum of the occurrence frequencies of (NK) lower order symbols is calculated when N is 256 and K is 32. The representative symbol frequency estimation unit 372 calculates an estimate S of the sum of the occurrence frequencies of the lower order symbols by using the occurrence frequency F(i) of the symbol indicated in the entry identified by index i in the second sub-table 432, according to the following equation (1).
[0096]
number
[0097] In the calculation using formula (1), the 224 entries included in the second subtable 432 are divided into 16 indexes from the top, and 14 ranges (hereinafter referred to as index ranges) are set. Of the 14 index ranges, the kth index range from the top is referred to as the kth index range. k is a value from 0 to 13.
[0098] The representative symbol frequency estimation unit 372 calculates an estimate of the occurrence frequency for each index range from 0 to 13. Specifically, the representative symbol frequency estimation unit 372 calculates the estimate of the occurrence frequency corresponding to the k-th index range by multiplying the average of the occurrence frequency F(k×16) indicated in the first entry of the k-th index range and the occurrence frequency F(k×16+15) indicated in the last entry by the number of symbols included in one index range (16 in this case). Then, the representative symbol frequency estimation unit 372 calculates the sum of the estimates of the occurrence frequency corresponding to each index range from 0 to 13, to obtain an estimate S of the sum of the occurrence frequencies of the lower-order symbols.
[0099] In the calculation using equation (1), the number of additions required to calculate the estimated value S is reduced by assuming that the occurrence frequency corresponding to the index changes linearly from the first entry to the last entry of each index range. Note that this method of calculating the estimated value S is just one example, and other methods may also be used. For example, the number of index ranges set by dividing the 224 entries included in the second subtable 432 can be changed as appropriate, taking into account the amount of calculation required to calculate the estimated value S and the accuracy of the calculated estimated value S.
[0100] The representative symbol frequency estimation unit 372 sends the estimated value S of the sum of the occurrence frequencies of the lower order symbols to the Huffman tree generation unit 324 as the occurrence frequency of the representative symbol.
[0101] The Huffman tree generation unit 324 generates a Huffman tree using the first partial table 431 and the frequency of occurrence of the representative symbols. Specifically, among the K symbols and representative symbols included in the first partial table 431, each symbol with an occurrence frequency greater than 0 is arranged as a leaf node, and a Huffman tree generation process is performed. This Huffman tree generation process is the same as the Huffman tree generation process described above with reference to FIG. 3. Specifically, this Huffman tree generation process is the process of replacing all symbols with an occurrence frequency greater than 0 in the first frequency table 41A in step S11 of the Huffman tree generation process described above with reference to FIG. 3 with symbols with an occurrence frequency greater than 0 among the K symbols and representative symbols included in the first partial table 431. The Huffman tree generation unit 324 sends the generated Huffman tree to the code length determination unit 325.
[0102] 11 shows an example of a Huffman tree 60 generated by the Huffman tree generator 324. The Huffman tree 60 includes a root node 600, intermediate nodes 610, 611, 621, and 631, first-type leaf nodes 641, 642, 643, and 644, and a second-type leaf node 645.
[0103] Each of the first type leaf nodes 641, 642, 643, and 644 corresponds to a symbol whose occurrence frequency is greater than 0 among the symbols included in the first partial table 431. The number of first type leaf nodes is K at most.
[0104] The second type leaf node 645 corresponds to a representative symbol whose occurrence frequency is greater than 0. The number of second type leaf nodes is one at most.
[0105] Therefore, the number of symbols for which the Huffman tree generation unit 324 generates a Huffman tree (i.e., the number of leaf nodes of the generated Huffman tree) is at most (K+1). In contrast, as described above, the number of symbols for which the Huffman tree generation unit 324A of the code table generation device 32A according to the comparative example generates a Huffman tree is at most N. For example, when N is 256 and K is 32, the number of symbols for which the Huffman tree generation unit 324 generates a Huffman tree in the code table generation device 32 of this embodiment is significantly reduced from a maximum of 256 to a maximum of 33 (=32+1) compared to the Huffman tree generation unit 324A of the comparative example. As a result, the code table generation device 32 of this embodiment can reduce the time required for the code table generation process or reduce the circuit size (e.g., the number of gates) required to complete code table generation within a specific time period.
[0106] On the other hand, there is a concern that treating all symbols included in the second partial table 432 as one representative symbol may reduce the coding efficiency of dynamic Huffman coding. To address this issue, the K most frequently occurring upper symbols included in the first partial table 431 are treated as K symbols (i.e., K leaf nodes) on the Huffman tree, thereby ensuring the accuracy of dynamic Huffman coding. In other words, the number K of symbols included in the first partial table 431 is reduced to the extent that the accuracy of dynamic Huffman coding can be ensured. Furthermore, the (NK) lower-order symbols included in the second partial table 432 often occur less frequently. Therefore, even if a suboptimal code length is set for the lower-order symbols, the impact on coding efficiency is small.
[0107] Therefore, the code table generation device 32 of this embodiment can reduce the time required for the code table generation process while keeping the reduction in encoding efficiency within a range that is not problematic in practical use, or can reduce the circuit size required to complete code table generation within a specific time.
[0108] The merge symbol number counting unit 373 counts the number C of symbols included in the second partial table 432 whose occurrence frequency is greater than 0. C is an integer equal to or greater than 0. If the second partial table 432 does not include any symbols whose occurrence frequency is greater than 0, C is 0. A symbol included in the second partial table 432 whose occurrence frequency is greater than 0 is called a merge symbol. A merge symbol is a symbol included in the second partial table 432 that needs to be assigned a variable-length code. The number C of merge symbols counted by the merge symbol number counting unit 373 is the number of merge symbols represented by the representative symbol. The merge symbol number counting unit 373 sends the merge symbol number C to the merge symbol addition code length determination unit 374.
[0109] The merge symbol addition code length determination unit 374 determines, for each merge symbol, the code length to be added to the code length of the representative symbol (hereinafter referred to as the “addition code length”) using a subtree based on the second sub-table 432 and the number of merge symbols C. The merge symbol addition code length determination unit 374 sends the addition code length for each merge symbol to the code length determination unit 325.
[0110] The code length of each merge symbol is obtained by adding the added code length to the code length of the representative symbol. This is equivalent to determining a subtree having a leaf node corresponding to each merge symbol, and then determining the position on the Huffman tree 60 for the root node of that subtree by the Huffman tree generation process.
[0111] 12 shows an example of a subtree 65 of merge symbols used by the merge symbol addition code length determination unit 374. The subtree 65 is a binary tree with one leaf node 645 of the Huffman tree 60 as the root node. Here, the case where the number of merge symbols C is 5 is shown as an example.
[0112] Similar to the Huffman tree 60 described above with reference to FIG. 11, the Huffman tree 60 includes a root node 600, intermediate nodes 611, 621, 630, and 631, first-type leaf nodes 640, 641, 642, 643, and 644, and a second-type leaf node 645.
[0113] Each of the first type leaf nodes 641, 642, 643, and 644 corresponds to a symbol that has an appearance frequency greater than zero among the symbols included in the first sub-table 431.
[0114] The second type leaf node 645 corresponds to a representative symbol whose occurrence frequency is greater than 0. The second type leaf node 645 is the root node of the subtree 65. The occurrence frequency associated with the second type leaf node 645 is an estimate S of the sum of the occurrence frequencies of the merge symbols.
[0115] The subtree 65 has the leaf node 645 of the Huffman tree 60 as the root node, and includes intermediate nodes 650, 651, and 660, and leaf nodes 661, 662, 663, 670, and 671. The leaf nodes 661, 662, 663, 670, and 671 correspond to the five merge symbols, respectively.
[0116] Therefore, the code length of each merge symbol is determined by adding the depth (number of edges) of each leaf node 661, 662, 663, 670, 671 starting from the root node (i.e., leaf node 645) in the subtree 65 as the added code length to the code length of the representative symbol corresponding to leaf node 645.
[0117] From the viewpoint of reducing the amount of processing, it is desirable that the subtree 65 including C leaf nodes corresponding to the C merge symbols respectively has a structure that allows the sum code length of each merge symbol to be easily obtained using the number C of merge symbols.
[0118] For this reason, the merge symbol addition code length determination unit 374 employs a balanced binary tree as the subtree 65. Note that a structure other than a balanced binary tree may be used as the subtree 65. A balanced binary tree is a binary tree in which the difference in depth between all leaf nodes is at most 1. The merge symbol addition code length determination unit 374 determines the addition code length of each merge symbol by the following procedures (A1) and (A2).
[0119] (A1)2 D Find the smallest integer D that satisfies ≧C. (A2) Among the C merge symbols, the index on the second sub-table 432 is sorted in ascending order (i.e., in descending order of frequency of occurrence) (2 D -C) merge symbols are added together to make the code length (D-1) bits. D ) merge symbols is set to D bits.
[0120] In the example shown in Fig. 12, C = 5. Therefore, when D is calculated according to the above procedure, the merge symbol addition code length determination unit 374 calculates D as follows: 3 >5, the merge symbol addition code length determination unit 374 then calculates D=3. Then, the merge symbol addition code length determination unit 374 selects the five merge symbols in ascending order of index on the second sub-table 432, with the index being 3 (=2 3 The merge symbol addition code length determination unit 374 sets the addition code length of the remaining 2 (=2×5−2) merge symbols (corresponding to leaf nodes 661, 662, and 663) to 2 (=3−1) bits. 3 ) merge symbols (corresponding to leaf nodes 670 and 671) are set to have an addition code length of 3 bits.
[0121] Return to Figure 7.
[0122] The code length determination unit 325 determines the code length of each symbol with an occurrence frequency greater than 0 among the K most significant symbols included in the first partial table 431 and the code length of each C merge symbol, using the Huffman tree 60 generated by the Huffman tree generation unit 324 and the addition code length for each merge symbol determined by the merge symbol addition code length determination unit 374. The code length determination unit 325 includes, for example, a code length calculation unit 381 and a merge symbol code length addition unit 382. For ease of explanation, the following illustrates a case where the occurrence frequencies of all K most significant symbols are greater than 0 and C is 1 or greater. Note that, in practice, the K most significant symbols may include a symbol with an occurrence frequency of 0, or C may be 0. In this case, the code length determination unit 325 does not calculate the code length of any symbol with an occurrence frequency of 0 among the K most significant symbols.
[0123] The code length calculation unit 381 determines the code length of each of the K most significant symbols and the code length of the representative symbol using the Huffman tree 60 generated by the Huffman tree generation unit 324. Specifically, the code length calculation unit 381 determines the number of edges passed through in the Huffman tree 60 from the leaf nodes corresponding to each of the K most significant symbols and the representative symbol to the root node 600 as the code length of that symbol. In the example shown in FIG. 12 , for example, the code length of the most significant symbol corresponding to leaf node 640 is 1. For example, the code length of the most significant symbol corresponding to leaf node 643 is 4. Also, for example, the code length of the representative symbol corresponding to leaf node 645 is 3.
[0124] The code length calculation unit 381 sends the determined code length 45 of the representative symbol (hereinafter referred to as the 0th code length 45) to the merge symbol code length addition unit 382. The code length calculation unit 381 sends K code lengths 46 (hereinafter referred to as the first code lengths 46) corresponding to the determined K most significant symbols, respectively, to the code table compression unit 34 and the canonical Huffman unit 326. For the K most significant symbols, the first code lengths 46 determined using the Huffman tree 60 are used as they are by the code table compression unit 34 and the canonical Huffman unit 326.
[0125] The merge symbol code length adder 382 determines the code length of each of the C merge symbols (hereinafter also referred to as merge symbol code length) using the 0th code length 45 and C addition code lengths corresponding to the C merge symbols, respectively. Specifically, the merge symbol code length adder 382 determines the code length of each of the C merge symbols by adding the addition code length corresponding to that merge symbol to the 0th code length 45. The merge symbol code length adder 382 outputs the C merge symbol code lengths to the code table compressing unit 34 and the canonical Huffman unit 326.
[0126] The canonical Huffman unit 326 generates a code table 49 by the canonical Huffman method using the K first code lengths 46 sent by the code length calculation unit 381 and the C merge symbol code lengths sent by the merge symbol code length addition unit 382. The canonical Huffman method is a method that can determine the code bit string (variable length code) to be assigned to a symbol using only the code length of the symbol. In the canonical Huffman method, the code bit string is assigned to the symbol according to the following rules (B1) and (B2).
[0127] (B1) A code bit string assigned to a symbol with a shorter code length precedes a code bit string assigned to a symbol with a longer code length in lexicographical order. (B2) For any two symbols having the same code length, the code bit string assigned to the preceding symbol in symbol order precedes, in lexicographic order, the code bit string assigned to the succeeding symbol in symbol order.
[0128] For example, to determine the lexicographic order of a code bit string, the lexicographic order of the bit values "0" and "1" is defined as the order "0", "1". In this case, the lexicographic order of multiple code bit strings can be determined by comparing the orders (bit orders) of corresponding bit values contained in these multiple code bit strings, starting from the most significant bit.
[0129] More specifically, for example, "1'b0", "2'b10", "3'b110", and "3'b111" are four code bit strings arranged in dictionary order. Note that a data string with a bit value of 0 or 1 following "X'b" indicates an X-bit bit data string. Therefore, among these four code bit strings, the most significant bit of the 1-bit code bit string "1'b0" precedes the 2-bit code bit string "2'b10" in the bit order. The next most significant bit of the 2-bit code bit string "2'b10" precedes the 3-bit code bit string "3'b110" in the bit order. The least significant bit of the 3-bit code bit string "3'b110" precedes the 3-bit code bit string "3'b111".
[0130] 13 shows an example of a pseudo program for the canonical Huffman unit 326 to assign code bit strings to symbols. In the pseudo program, the variable code is used to calculate the code bit string to be assigned to the symbol.
[0131] First, the canonical Huffman unit 326 sets 0 (=1'b0) to code. Note that the number of bits in this code is in accordance with the smallest code length among multiple code lengths associated with multiple symbols to which code bit strings should be assigned.
[0132] Next, the canonical Huffman unit 326 determines, in one while loop, a code bit string to be assigned to one symbol in ascending order of code length, and in a specific symbol order if the code lengths are the same.
[0133] For example, in the first while loop, the canonical Huffman unit 326 selects the symbol with the shortest code length, which, if there are other symbols with the same code length, is the symbol that comes first in a specific symbol order, as the symbol to which the code bit sequence is assigned. The canonical Huffman unit 326 then assigns code (=1'b0) as the code bit sequence of the selected symbol. As mentioned above, the number of bits of code initially assigned depends on the minimum code length. In this example, it is assumed that the minimum code length is 1. The canonical Huffman unit 326 then adds 1 to code, performs a shift operation, and shifts the value to the left by the number of bits obtained by subtracting the code length of the current symbol from the code length of the next symbol, and sets the value obtained by this shift operation to code. For example, if the number of bits obtained by subtracting the code length of the current symbol from the code length of the next symbol is 1, then 2'b10, which is the value obtained by adding 1 to code (=1'b0) and shifting it one bit to the left, is set to code.
[0134] Also, for example, in the second while loop, the canonical Huffman unit 326 selects the symbol with the second shortest code length, or the symbol with the shortest code length that is second in a specific symbol order if there is another symbol with the same code length, as the symbol to which the code bit sequence is assigned. The canonical Huffman unit 326 assigns code (=2'b10) as the code bit sequence of the selected symbol. The canonical Huffman unit 326 then performs a shift operation to shift the value obtained by adding 1 to code to the left by the number of bits calculated by subtracting the code length of the current symbol from the code length of the next symbol, and sets the value obtained by this shift operation to code. For example, if the number of bits calculated by subtracting the code length of the current symbol from the code length of the next symbol is 1, the value 2'b11, which is the value obtained by adding 1 to code (=2'b10), to the left by one bit is set to code.
[0135] By performing such loop processing, the canonical Huffman unit 326 can assign a code bit sequence to each of the multiple symbols using the order relationship between the symbols and the multiple code lengths corresponding to the multiple symbols. In other words, by determining the order relationship between the symbols and the code length of each symbol, the canonical Huffman unit 326 can uniquely determine the code bit sequence to be assigned to each symbol.
[0136] As described above, the code table compressor 34 performs compression processing on the K first code lengths 46 corresponding to the K most significant symbols and the C merge symbol code lengths corresponding to the C merge symbols. For example, the code table compressor 34 rearranges the K first code lengths 46 corresponding to the K most significant symbols and the C merge symbol code lengths corresponding to the C merge symbols in a specific symbol order, runs the rearranged code lengths, and then Huffman-encodes the result. In this way, a compressed code table 49 is obtained.
[0137] As described above, the packing unit 35 sequentially concatenates one or more variable-length codes output from the variable-length coding unit 33 and outputs the result as compressed data for each specific data size. The packing unit 35 also inserts a compressed code table 49 as a header of the compressed data. In the canonical Huffman method, the order relationship between symbols and the code length of each symbol are determined, so that the code bit string to be assigned to each symbol can be uniquely determined. Therefore, it is possible to restore a code table (decoding table) used for decoding in the decompressor from the compressed code table 49. By encoding multiple code lengths in the code table compression unit 34, the overhead of the code amount of compressed data can be significantly reduced compared to when encoding the code bit string itself.
[0138] 14 is a flowchart showing an example of the procedure of the encoding process executed in the compression device 15. The encoding process is a process of converting one or more symbols included in data input to the compression device 15 (input data) into variable-length codes to obtain compressed data. The encoding process is executed, for example, in response to input of a specific unit of data to the compression device 15.
[0139] First, the buffer unit 31 stores one or more symbols included in the input data (step S101). Furthermore, the code table generation unit 32 performs a code table generation process (step S102). The code table generation process is a process for generating a code table 49 based on the occurrence frequency of each of one or more symbols included in the input data. An example of a specific procedure for the code table generation process will be described later with reference to the flowchart in Fig. 15. Note that steps S101 and S102 may be performed in parallel.
[0140] Next, the variable-length coding unit 33 converts each of the one or more symbols stored by the buffer unit 31 into a variable-length code using the generated code table 49 (step S103). Furthermore, the code table compression unit 34 compresses the code table 49 (step S104). Specifically, the code table compression unit 34 performs a compression process on a plurality of code lengths associated with a plurality of symbols, respectively. As described above, the compression process on a plurality of code lengths is, for example, a process of rearranging the plurality of code lengths in a specific symbol order, run-length coding the rearranged plurality of code lengths, and further Huffman coding the result. Note that steps S103 and S104 may be performed in parallel.
[0141] The packing unit 35 outputs compressed data including the compressed code table 49 and one or more concatenated variable-length codes (step S105), and ends the encoding process.
[0142] As described above, the compression device 15 can convert each of one or more symbols included in the input data into a variable-length code to obtain compressed data. For example, if the input data is data requested by the host 2 to be written to the NAND flash memory 5, the CPU 12 can write the compressed data obtained by compressing the input data to the NAND flash memory 5 via the NAND I / F 13.
[0143] Fig. 15 is a flowchart showing an example of the procedure of the code table generation process executed in the code table generation unit 32. The code table generation process corresponds to step S102 of the encoding process described above with reference to Fig. 14. Input data for the compression device 15 is input to the code table generation unit 32.
[0144] First, the frequency counting unit 321 of the code table generation unit 32 generates the 0th frequency table 40 using one or more symbols included in the input data (step S201). The frequency sorting unit 322 sorts the N entries included in the 0th frequency table in descending order of appearance frequency to obtain the first frequency table 41 (step S202). Then, the symbol distribution unit 371 obtains from the first frequency table 41 a first sub-table 431 including the top K entries and a second sub-table 432 including the remaining (NK) entries (step S203). The first sub-table 431 is sent to the Huffman tree generation unit 324. The second sub-table 432 is sent to the representative symbol frequency estimation unit 372, the merge symbol number counting unit 373, and the merge symbol addition code length determination unit 374.
[0145] The representative symbol frequency estimation unit 372 calculates an estimate of the occurrence frequency when the (NK) symbols in the second sub-table 432 are considered as one symbol (representative symbol) (step S204). The Huffman tree generation unit 324 generates a Huffman tree 60 having, as leaf nodes, each of the representative symbol and the K upper symbols whose occurrence frequency is greater than 0, based on the estimate of the occurrence frequency of the representative symbol and the occurrence frequencies of the K upper symbols in the first sub-table 431 (step S205). Here, it is assumed that the occurrence frequencies of all symbols in the representative symbol and the K upper symbols are greater than 0. The code length calculation unit 381 uses the Huffman tree 60 to determine the code length (0th code length) 45 of the representative symbol and the code lengths (K first code lengths) 46 of the K upper symbols (step S206). The code length 45 of the representative symbol is sent to the merge symbol code length addition unit 382. The code lengths 46 of the K most significant symbols are sent to the canonical Huffman unit 326 and the code table compression unit 34 .
[0146] Furthermore, the merge symbol number counting unit 373 acquires the number C of symbols (merge symbols) whose appearance frequency is greater than 0 among the (NK) symbols included in the second sub-table 432 (step S207). The merge symbol addition code length determination unit 374 determines the addition code length of each of the C merge symbols (C addition code lengths) using a subtree based on the number C of merge symbols and the second sub-table 432 (step S208). The C addition code lengths are sent to the merge symbol code length addition unit 382.
[0147] The procedure from step S204 to step S206 and the procedure from step S207 to step S208 may be performed in parallel.
[0148] Next, the merge symbol code length addition unit 382 adds the added code length of each merge symbol to the code length 45 of the representative symbol to determine the code length of each of the C merge symbols (step S209). The code lengths of the C merge symbols are sent to the canonical Huffman unit 326 and the code table compression unit 34.
[0149] The canonical Huffman unit 326 determines the variable-length codes to be assigned to the K upper symbols and the C merge symbols using the code length 46 of each of the K upper symbols and the code length of each of the C merge symbols (step S210), and then ends the code table generation process. The method of determining the variable-length codes to be assigned to symbols based on the code lengths is as described above with reference to FIG.
[0150] As described above, the code table generation unit 32 generates the code table 49 based on the frequency of occurrence of each of one or more symbols included in the input data. Since the code table generation unit 32 generates a Huffman tree having a maximum of (K+1) leaf nodes, the number of leaf nodes (symbols) to be used for Huffman tree generation is reduced compared to when a Huffman tree having a maximum of N leaf nodes is generated. Therefore, the code table generation unit 32 can reduce the amount of processing required to generate the code table 49.
[0151] (Second embodiment) The code table generation device 32 according to the first embodiment regards one or more lower-order symbols included in the second partial table 432 as one representative symbol to generate the Huffman tree 60. In contrast, the code table generation device 32 according to the second embodiment regards one or more lower-order symbols as two or more representative symbols to generate the Huffman tree 60. In the code table generation device 32 according to the second embodiment, it is expected that the decrease in coding efficiency can be reduced by increasing the number of representative symbols.
[0152] The configuration of the code table generation device 32 of the second embodiment is similar to that of the code table generation device 32 of the first embodiment. The second embodiment differs from the first embodiment only in the processing procedure for generating a Huffman tree 60 by regarding one or more lower-order symbols as two or more representative symbols, and for determining the addition code length using the subtrees of merge symbols represented by each of the two or more representative symbols. Below, the differences from the first embodiment will be mainly described.
[0153] Fig. 16 shows an example of the configuration of the compression device 15 including the code table generation device 32 (code table generation unit 32) when there are L representative symbols. L is an integer equal to or greater than 2. When L is 1, the configuration is the same as that of the code table generation device 32 of the first embodiment shown in Fig. 7. Fig. 16 illustrates the configuration of the code table generation unit 32 when there are two representative symbols (i.e., L = 2). Hereinafter, the two representative symbols will be referred to as the 0th representative symbol and the 1st representative symbol.
[0154] The code table generation unit 32 includes, for example, a frequency counting unit 321, a frequency sorting unit 322, a symbol merging unit 323, a Huffman tree generation unit 324, a code length determination unit 325, and a canonical Huffman unit 326. The frequency counting unit 321 and the frequency sorting unit 322 are as described above in the first embodiment.
[0155] Symbol merge unit 323 includes a symbol distributor 371. Symbol merge unit 323 further includes sets of representative symbol frequency estimators 372, merge symbol number counters 373, and merge symbol addition code length determiners 374, the number of which corresponds to the L representative symbols. In the example shown in Fig. 16, there is provided a set of 0th representative symbol frequency estimator 372-0, 0th merge symbol number counter 373-0, and 0th merge symbol addition code length determiner 374-0 corresponding to the 0th representative symbol, and a set of 1st representative symbol frequency estimator 372-1, 1st merge symbol number counter 373-1, and 1st merge symbol addition code length determiner 374-1 corresponding to the first representative symbol.
[0156] Code length determination unit 325 includes code length calculation unit 381. Code length determination unit 325 further includes merge symbol code length addition units 382, the number of which corresponds to the L representative symbols. In the example shown in Fig. 16, a 0th merge symbol code length addition unit 382-0 corresponding to the 0th representative symbol and a 1st merge symbol code length addition unit 382-1 corresponding to the 1st representative symbol are provided.
[0157] The symbol distributor 371 divides the first frequency table 41 into (L+1) partial tables. The first partial table 441 includes the top K entries of the N entries included in the first frequency table 41. The symbol distributor 371 divides the remaining (NK) entries, excluding the top K entries from the N entries, into L sets (symbol sets). Each of the L sets is included in one of the L partial tables.
[0158] Here, an example will be shown where N=256, K=32, and L=2. In this case, the symbol distributor 371 divides the first frequency table 41 into a first partial table 441, a second partial table 442, and a third partial table 443. The first partial table 441 includes 32 entries from index 0 to index 31 out of the 256 entries included in the first frequency table 41. The second partial table 442 includes 32 entries from index 32 to index 63 out of the 256 entries included in the first frequency table 41. The third partial table 443 includes 192 entries from index 64 to index 255 out of the 256 entries included in the first frequency table 41.
[0159] The symbol distributor 371 sends the first partial table 441 to the Huffman tree generator 324. The symbol distributor 371 sends the second partial table 442 to the 0th representative symbol frequency estimator 372-0, the 0th merge symbol number counter 373-0, and the 0th merge symbol addition code length determiner 374-0. The symbol distributor 371 sends the third partial table 443 to the first representative symbol frequency estimator 372-1, the first merge symbol number counter 373-1, and the first merge symbol addition code length determiner 374-1.
[0160] The operations of the 0th representative symbol frequency estimation unit 372-0 and the first representative symbol frequency estimation unit 372-1 are similar to those of the representative symbol frequency estimation unit 372 of the first embodiment.
[0161] Specifically, the 0th representative symbol frequency estimation unit 372-0 estimates the appearance frequency of the 0th representative symbol in order to regard one or more symbols (0th lower order symbols) included in the second sub-table 442 as one 0th representative symbol when constructing the Huffman tree 60. The 0th representative symbol frequency estimation unit 372-0 estimates the appearance frequency of the 0th representative symbol, for example, by estimating the sum of the appearance frequencies of one or more 0th lower order symbols. The 0th representative symbol frequency estimation unit 372-0 sends the appearance frequency of the 0th representative symbol to the Huffman tree generation unit 324.
[0162] Furthermore, when constructing the Huffman tree 60, the first representative symbol frequency estimation unit 372-1 estimates the appearance frequency of the first representative symbol in order to regard one or more symbols (first lower order symbols) included in the third sub-table 443 as one first representative symbol. The first representative symbol frequency estimation unit 372-1 estimates the appearance frequency of the first representative symbol, for example, by estimating the sum of the appearance frequencies of one or more first lower order symbols. The first representative symbol frequency estimation unit 372-1 sends the appearance frequency of the first representative symbol to the Huffman tree generation unit 324.
[0163] The Huffman tree generator 324 generates a Huffman tree 60 using the first sub-table 441 and the occurrence frequencies of each of the L representative symbols. More specifically, the Huffman tree generator 324 generates a Huffman tree having leaf nodes corresponding to each of the K higher order symbols and the L representative symbols whose occurrence frequency is greater than 0. Thus, the Huffman tree generator 324 performs processing to construct a Huffman tree having a maximum of (K+L) leaf nodes. The Huffman tree generator 324 sends the generated Huffman tree 60 to the code length determination unit 325 (more specifically, the code length calculation unit 381).
[0164] The operation of 0th merge symbol number counting unit 373-0 and 1st merge symbol number counting unit 373-1 is similar to that of merge symbol number counting unit 373 of the first embodiment. Furthermore, the operation of 0th merge symbol addition code length determination unit 374-0 and 1st merge symbol addition code length determination unit 374-1 is similar to that of merge symbol addition code length determination unit 374 of the first embodiment.
[0165] Specifically, 0th merge symbol number counting unit 373-0 and 0th merge symbol addition code length determination unit 374-0 determine the addition code length for each of C merge symbols (hereinafter referred to as 0th merge symbols) represented by the 0th representative symbol. C is an integer greater than or equal to 0. The 0th merge symbol is a symbol with an appearance frequency greater than 0 among the symbols included in second sub-table 442. 0th merge symbol addition code length determination unit 374-0 sends the determined addition code length to 0th merge symbol code length addition unit 382-0.
[0166] Furthermore, first merge symbol number counting unit 373-1 and first merge symbol additional code length determination unit 374-1 determine the additional code length for each of C' merge symbols (hereinafter referred to as first merge symbols) represented by the first representative symbol. C' is an integer greater than or equal to 0. A first merge symbol is a symbol with an appearance frequency greater than 0 among the symbols included in third sub-table 443. First merge symbol additional code length determination unit 374-1 outputs the determined additional code length to first merge symbol code length addition unit 382-1.
[0167] The code length determination unit 325 uses the Huffman tree 60, the added code length of the C 0th merge symbols, and the added code length of the C' 1st merge symbols to determine the code length of each of the K upper symbols, the code length of each of the C 0th merge symbols, and the code length of each of the C' 1st merge symbols included in the first partial table 441. Note that it is assumed here that the occurrence frequencies of all of the K upper symbols, the 0th representative symbol, and the 1st representative symbol are greater than 0.
[0168] Specifically, the code length calculation unit 381 of the code length determination unit 325 determines the code length of each of the K most significant symbols (first code length 46), the code length of the 0th representative symbol (hereinafter referred to as the 0th code length 471), and the code length of the first representative symbol (hereinafter referred to as the 0th code length 472) using the Huffman tree 60. The method of determining the code length of each symbol using the Huffman tree 60 is as described above.
[0169] The code length calculation unit 381 sends the determined 0th code length 471 of the 0th representative symbol to the 0th merge symbol code length addition unit 382-0. The code length calculation unit 381 sends the determined 0th code length 472 of the 1st representative symbol to the 1st merge symbol code length addition unit 382-1. The code length calculation unit 381 sends K first code lengths 46 corresponding to the determined K upper order symbols, respectively, to the code table compression unit 34 and the canonical Huffman unit 326.
[0170] The 0th merge symbol code length adder 382-0 determines the code length of each of the C 0th merge symbols (hereinafter referred to as the 0th merge symbol code length) using the 0th code length 471 and C added code lengths corresponding to the C 0th merge symbols, respectively. Specifically, the 0th merge symbol code length adder 382-0 determines the code length of each of the C 0th merge symbols by adding the added code length corresponding to that 0th merge symbol to the 0th code length 471. The 0th merge symbol code length adder 382-0 outputs the C 0th merge symbol code lengths to the code table compressing unit 34 and the canonical Huffman unit 326.
[0171] The first merge symbol code length adder 382-1 determines the code length of each of the C' first merge symbols (hereinafter referred to as the first merge symbol code length) using the 0'th code length 472 and the C' added code lengths corresponding to the C' first merge symbols, respectively. Specifically, the first merge symbol code length adder 382-1 determines the code length of each of the C' first merge symbols by adding the added code length corresponding to that first merge symbol to the 0'th code length 472. The first merge symbol code length adder 382-1 outputs the C' first merge symbol code lengths to the code table compressing unit 34 and the canonical Huffman unit 326.
[0172] The canonical Huffman unit 326 generates a code table 49 by the canonical Huffman method using K first code lengths 46, C zeroth merge symbol code lengths, and C' first merge symbol code lengths. The method for generating the code table 49 based on the code lengths is as described in the first embodiment.
[0173] The code table compression unit 34 performs compression processing on the K first code lengths 46, the C zeroth merge symbol code lengths, and the C' first merge symbol code lengths. For example, the code table compression unit 34 rearranges the K first code lengths 46, the C zeroth merge symbol code lengths, and the C' first merge symbol code lengths in a specific symbol order, runs the rearranged code lengths, and then Huffman-encodes the result. This results in a compressed code table 49.
[0174] In this way, the number L of representative symbols representing one or more lower-order symbols can be set arbitrarily. The code table generation unit 32 is provided with a set of representative symbol frequency estimation units 372, merge symbol number counting units 373, merge symbol addition code length determination units 374, and merge symbol code length addition units 382, the number of which corresponds to the number L of representative symbols.
[0175] By increasing the number L of representative symbols, the occurrence frequencies of the L representative symbols are estimated using each of the increased L partial tables. By using the occurrence frequencies of the increased L representative symbols, for example, when the tendency of the occurrence frequencies of one or more lower-order symbols changes significantly midway, the change in the tendency of the occurrence frequencies is more likely to be reflected in the generation of the Huffman tree 60. Therefore, by increasing the number L of representative symbols in the code table generation unit 32, it is possible to reduce the decrease in encoding efficiency in the compression device 15. The number L of representative symbols is determined, for example, taking into consideration the amount of processing required to generate the Huffman tree and encoding efficiency.
[0176] As described above, the code table generation device 32 according to the first and second embodiments can reduce the amount of processing required to generate a code table. The frequency counting unit 321 generates a frequency table containing multiple symbols and multiple occurrence frequencies associated with each of the multiple symbols based on the occurrence frequency of each input symbol. The frequency sorting unit 322 sorts the multiple symbols and their occurrence frequencies in the frequency table in descending order of occurrence frequency. The symbol merging unit 323 (more specifically, the symbol allocating unit 371) acquires the top K symbols and the remaining symbols from the sorted multiple symbols and divides the remaining symbols into one or more symbol sets. The symbol merging unit 323 (more specifically, the representative symbol frequency estimating unit 372) determines the occurrence frequency associated with the root node (i.e., the representative symbol) of each of one or more subtrees corresponding to one or more symbol sets. The Huffman tree generation unit 324 generates a Huffman tree 60 using the K symbols and the root node of each of the one or more subtrees. The code length determination unit 325 determines multiple code lengths corresponding to the multiple symbols based on the Huffman tree 60 and one or more subtrees. The canonical Huffman unit 326 determines multiple codes to assign to the multiple symbols based on the multiple code lengths. Note that K is an integer greater than or equal to 1 and less than or equal to the number of symbols.
[0177] As a result, code table generation device 32 generates a Huffman tree having a maximum number of leaf nodes corresponding to the sum of K and the number of one or more subtrees, which reduces the number of leaf nodes (symbols) to be used for Huffman tree generation compared to when a Huffman tree having a maximum number of leaf nodes corresponding to the number of symbols is generated. Therefore, code table generation device 32 can reduce the amount of processing required to generate a code table.
[0178] Each of the various functions described in the first and second embodiments may be realized by a circuit (processing circuit). An example of a processing circuit includes a programmed processor, such as a central processing unit (CPU). This processor performs each of the described functions by executing a computer program (a set of instructions) stored in a memory. This processor may be a microprocessor including electrical circuits. Examples of processing circuits also include a digital signal processor (DSP), an application specific integrated circuit (ASIC), a microcontroller, a controller, and other electrical circuit components. Each of the components other than the CPU described in these embodiments may also be realized by a processing circuit.
[0179] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims. [Explanation of symbols]
[0180] 1...information processing system, 2...host, 3...memory system, 4...controller, 5...NAND flash memory, 10...bus, 11...host I / F, 12...CPU, 13...NAND I / F, 14...DRAM I / F, 15...compression device, 31...buffer unit, 32...code table generation device (code table generation unit), 33...variable length coding unit, 34...code table compression unit, 35...packing unit, 321...frequency counting unit, 322...frequency sorting unit, 323...symbol merging unit, 324...Huffman tree generation unit, 325...code length determination unit, 326...canonical Huffman unit, 371...symbol distribution unit, 372...representative symbol frequency estimation unit, 373...merge symbol number counting unit, 374...merge symbol addition code length determination unit, 381...code length calculation unit, 382...merge symbol code length addition unit, 40...0th frequency table, 41...1st frequency table, 431...first partial table, 432...second partial table, 45...0th code length, 46...first code length, 49...code table.
Claims
1. a frequency table generating unit that generates a frequency table including N symbols and N occurrence frequencies associated with the N symbols, based on the occurrence frequencies of each of the input symbols; a frequency sorting unit that sorts the N symbols and the N occurrence frequencies in the frequency table in descending order of occurrence frequency; a symbol merging unit that acquires top K symbols and the remaining (N-K) symbols from the rearranged N symbols, divides the (N-K) symbols into M symbol sets, and determines occurrence frequencies associated with root nodes of M subtrees corresponding to the M symbol sets, respectively; a Huffman tree generator that generates a Huffman tree using the K symbols and the root nodes of each of the M subtrees; a code length determination unit that determines N code lengths corresponding to the N symbols, respectively, based on the Huffman tree and the M subtrees; a code determination unit that determines N codes to be assigned to the N symbols, respectively, based on the N code lengths; N is an integer greater than (K+M), K is an integer equal to or greater than 1 and less than N, A code table generating device, wherein M is an integer equal to or greater than 2 and less than (N−K).
2. Each of the M subtrees is a subtree having one or more leaf nodes, 2. The code table generation device according to claim 1, wherein the one or more leaf nodes correspond to one or more symbols included in one of the M symbol sets and having an occurrence frequency greater than zero.
3. 3. The code table generating device according to claim 1, wherein each of the M subtrees is a balanced binary tree.
4. The M subtrees include a first subtree, the M symbol sets include a first symbol set corresponding to the first subtree; 4. The code table generation device according to claim 1, wherein the symbol merging unit determines the occurrence frequency associated with the root node of the first subtree using an occurrence frequency associated with at least one of the one or more symbols included in the first symbol set.
5. 5. The code table generating device according to claim 1, wherein each of the N symbols has an occurrence frequency greater than zero.
6. A code table generation device according to any one of claims 1 to 5; a coding unit that converts the input symbols into codes based on the N codes respectively assigned to the N symbols; a non-volatile memory; a control unit that writes data including the code into the nonvolatile memory.
7. generating a frequency table including N symbols and N occurrence frequencies associated with the N symbols, based on the occurrence frequencies of the input symbols; From the N symbols, obtain the top K symbols in descending order of appearance frequency and the remaining (N−K) symbols; Dividing the (N−K) symbols into M symbol sets; determining a frequency of occurrence associated with the root node of each of M subtrees corresponding to the M symbol sets; generating a Huffman tree using the K symbols and the root node of each of the M subtrees; determining N code lengths corresponding to the N symbols based on the Huffman tree and the M subtrees; determining N codes to be assigned to the N symbols, respectively, based on the N code lengths; N is an integer greater than (K+M), K is an integer equal to or greater than 1 and less than N, A code table generation method in which the M is an integer equal to or greater than 2 and less than the (N−K).
8. Each of the M subtrees is a subtree having one or more leaf nodes, The code table generating method according to claim 7 , wherein the one or more leaf nodes correspond to one or more symbols included in one of the M symbol sets and having an occurrence frequency greater than 0.
9. 9. The code table generating method according to claim 7, wherein each of the M subtrees is a balanced binary tree.
10. The M subtrees include a first subtree, the M symbol sets include a first symbol set corresponding to the first subtree; 10. The code table generation method of claim 7, wherein determining an occurrence frequency associated with a root node of each of the M subtrees comprises determining an occurrence frequency associated with the root node of the first subtree using an occurrence frequency associated with at least one of the one or more symbols included in the first symbol set.
11. 11. The code table generating method according to claim 7, wherein each of the N symbols has an occurrence frequency greater than zero.
Citation Information
Patent Citations
Program, apparatus and method for processing information
JP2010093414A
Memory system
JP2021145237A
Efficient length limiting of compression codes
US10694217B2
Method for Compressed Data with Reduced Dictionary Sizes by Coding Value Prefixes
US20090174583A1
Data processing system and method for generating a structured listing of symbols
US6411958B1