Distance image pickup element and distance image pickup device

Abstract

To suppress discharge failure from easily occurring when discharging electric charge.SOLUTION: A distance image pickup element comprises a pixel circuit formed on a semiconductor substrate, the pixel circuit includes at least a photoelectric conversion element for generating a charge corresponding to light incident from a measuring object space, a charge accumulation part for accumulating the charge, a transfer transistor provided on a transfer path for transferring the charge from the photoelectric conversion element to the charge accumulation part, and a discharge transistor provided on a discharge path for discharging the charge from the photoelectric conversion element. The photoelectric conversion element has a rectangular surface in a plan view, and includes two discharge transistors, where the two discharge transistors are disposed to face each other in long sides of the photoelectric conversion element at positions axisymmetric to a y-axis that is parallel to short sides of the photoelectric conversion element and passes through a center of the photoelectric conversion element, and axisymmetric to an x-axis that is parallel to the long sides and passes through the center of the photoelectric conversion element.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present invention relates to a distance image pickup element and a distance image pickup device. [Background technology]

[0002] Time-of-Flight (hereinafter referred to as "TOF") distance image sensors have been developed that utilize the known speed of light to measure the distance between a measuring device and an object based on the time of flight of light in space (measurement space). TOF distance image sensors irradiate the measurement object with a pulse of light (e.g., near-infrared light) and measure the distance between the measuring device and the object based on the difference between the time the light pulse is irradiated and the time the light pulse (reflected light) reflected by the object in the measurement space returns, that is, the time of flight of light between the measuring device and the object (see, for example, Patent Document 1).

[0003] When using such a distance imaging device to accurately measure the distance to an object at a specified distance, the amount of charge generated by the pixel due to reflected light from the subject must be read out accurately by transferring it using multiple gates. In a TOF distance image sensor, a photoelectric conversion element converts the amount of incident light into an electric charge, accumulates the converted electric charge in a charge accumulation unit, and then converts an analog voltage corresponding to the amount of accumulated electric charge into a digital value using an AD converter. Furthermore, TOF distance image sensors determine the distance between the measuring device and the object using an analog voltage corresponding to the amount of charge and information on the time of flight of light between the measuring device and the object, which is included in the digital value.

[0004] In the range imaging device, the delay time from when a light pulse is emitted until the light pulse is reflected by the subject and returns is calculated by accumulating the charges generated by the photoelectric conversion element in each charge accumulation unit at a predetermined cycle, and then calculating the amount of charge accumulated in each charge accumulation unit.The distance from the range imaging device to the subject is then calculated using this delay time and the speed of light. Therefore, in order to transfer charges from the photoelectric conversion element to the charge accumulation section, a transfer gate (transistor) for transferring charges is provided in each of the photoelectric conversion element and the charge accumulation section, and a drain gate (transistor) for discharging the charges converted by the photoelectric conversion element during a period (drain period) in which the charges are discharged without being stored is also provided. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Patent No. 4235729 Summary of the Invention [Problem to be solved by the invention]

[0006] However, discharge failures, where the charge cannot be completely discharged, can occur due to the layout of the discharge gate. For example, if the discharge gate is located away from the center of the photoelectric conversion element, the potential gradient formed when the discharge gate is turned on is gentler than when the discharge gate is located closer to the center of the photoelectric conversion element. In this case, for example, if a large amount of external light is received during the drain period, the charge may not be completely discharged from the discharge gate. If the charge that cannot be discharged by the discharge gate enters the transfer gate, and the charge that has entered the transfer gate is accumulated in the charge storage section, this is one of the factors that degrades the accuracy of distance measurement.

[0007] The present invention has been made in view of the above circumstances, and provides a distance image pickup element and a distance image pickup device that can make it difficult for discharge failures to occur when discharging electric charges. [Means for solving the problem]

[0008] In order to solve the above-mentioned problems, the distance image pickup element of the present invention is a distance image pickup element in which a pixel circuit is formed on a semiconductor substrate, the pixel circuit including at least a photoelectric conversion element that generates charges in response to light incident from the space to be measured, a charge accumulation section that accumulates the charges, a transfer transistor provided on a transfer path that transfers the charges from the photoelectric conversion element to the charge accumulation section, and a charge discharge transistor provided on a discharge path that discharges the charges from the photoelectric conversion element, the photoelectric conversion element having a rectangular shape in a planar view on its surface, two charge discharge transistors are provided, and the two charge discharge transistors are arranged opposite each other at positions on the long sides of the photoelectric conversion element that are linearly symmetrical with respect to a y-axis that is parallel to the short sides of the photoelectric conversion element and passes through the center of the photoelectric conversion element, and an x-axis that is parallel to the long sides and passes through the center of the photoelectric conversion element.

[0009] The distance image pickup element of the present invention is characterized in that 2M (M is an integer and M≧2) transfer transistors are provided, and M transfer transistors are arranged on each of the long sides, facing each other at positions that are linearly symmetrical with respect to the x-axis.

[0010] The distance image pickup device of the present invention is characterized in that the channel length of the transfer transistor is longer than the channel length of the charge discharging transistor.

[0011] The distance imaging element of the present invention is characterized in that all or part of the channel region of the transfer transistor is channel-doped with n-type impurities.

[0012] The distance image pickup element of the present invention is characterized in that a microlens is formed on the surface side of the pixel circuit where the light is incident, and the optical axis of the microlens is perpendicular to the incident surface of the photoelectric conversion element and passes through the center of the incident surface.

[0013] The distance image capturing device of the present invention is characterized by comprising a light receiving unit equipped with any of the distance image capturing elements described above, and a distance image processing unit that calculates the distance from the distance image capturing element to a subject from the distance image captured by the distance image capturing element. [Effects of the Invention]

[0014] As described above, according to the present invention, it is possible to make it difficult for discharge failures to occur when discharging electric charges. [Brief explanation of the drawings]

[0015] [Figure 1] 1 is a block diagram showing a schematic configuration of a distance imaging device according to a first embodiment of the present invention. [Figure 2] 1 is a block diagram showing a schematic configuration of an imaging element (distance image sensor 32) used in a distance image capturing device 1 according to a first embodiment of the present invention. [Figure 3] FIG. 1 is a circuit diagram showing an example of the configuration of a pixel circuit 321 arranged in a light receiving area 320 of a distance image sensor 32 (distance image pickup element) which is a solid-state image pickup element used in the distance image pickup device 1 of the first embodiment of the present invention. [Figure 4] FIG. 3 is a diagram showing an example of an arrangement (layout pattern) of each transistor of a pixel circuit 321 according to the first embodiment. [Figure 5] 5 is a diagram showing an example of the arrangement relationship between the photoelectric conversion element PD, the transfer transistor G, and the charge discharging transistor GD in FIG. 4. FIG. [Figure 6] 10 is a diagram illustrating the transfer of charges from a photoelectric conversion element PD to a floating diffusion FD by a transfer transistor G. FIG. [Figure 7] 10 is a diagram illustrating the discharge of charges from a photoelectric conversion element PD to a power supply VDD by a charge discharging transistor GD. FIG. [Figure 8] FIG. 10 is a diagram showing an example of the arrangement relationship between a photoelectric conversion element PD, a transfer transistor G, and a charge discharging transistor GD in the second embodiment. [Figure 9]10A and 10B are diagrams illustrating the transfer of charges from a photoelectric conversion element PD to a floating diffusion FD by a transfer transistor G in the second embodiment. [Figure 10] FIG. 10 is a diagram showing an example of the arrangement relationship between a photoelectric conversion element PD, a transfer transistor G, and a charge discharging transistor GD in the third embodiment. [Figure 11] 10A and 10B are diagrams illustrating the transfer of charges from a photoelectric conversion element PD to a floating diffusion FD by a transfer transistor G in the third embodiment. [Figure 12] FIG. 10 is a diagram showing the positional relationship between a photoelectric conversion element PD and a microlens ML in a pixel circuit 321 according to the fourth embodiment. [Figure 13] 3 is a plan view showing a lens array in a part of a light receiving area 320 in which a plurality of pixel circuits 321 are arranged. [Figure 14] 11 is a cross-sectional view of a lens array of a pixel circuit 321 in which a microlens ML is provided in FIG. 10. FIG. [Figure 15] 11 is a cross-sectional view of a lens array of a pixel circuit 321 in which a microlens ML is provided in FIG. 10. FIG. DETAILED DESCRIPTION OF THE INVENTION

[0016] First Embodiment A first embodiment of the present invention will be described below with reference to the drawings. Fig. 1 is a block diagram showing the general configuration of a distance image pickup device 1. The distance image pickup device 1 includes a light source unit 2, a light receiving unit 3, and a distance image processing unit 4. Fig. 1 also shows a subject S, which is an object to measure the distance to in the distance image pickup device 1. The distance image pickup element is, for example, a distance image sensor 32 (described below) in the light receiving unit 3.

[0017] The light source section 2 irradiates a light pulse PO into a space to be photographed, in which a subject S, the distance of which is to be measured by the distance image pickup device 1, is present, under the control of the distance image processor 4. The light source section 2 is, for example, a surface-emitting semiconductor laser module such as a vertical cavity surface-emitting laser (VCSEL). The light source section 2 includes a light source device 21 and a diffuser plate 22.

[0018] The light source device 21 is a light source that emits laser light in a near-infrared wavelength band (for example, a wavelength band of 850 nm to 940 nm) that becomes the light pulse PO to be irradiated onto the subject S. The light source device 21 is, for example, a semiconductor laser light-emitting element. The light source device 21 emits pulsed laser light in response to control from the timing control unit 41. The diffusion plate 22 is an optical component that diffuses the laser light in the near-infrared wavelength band emitted by the light source device 21 to the extent of the surface to be irradiated onto the subject S. The pulsed laser light diffused by the diffusion plate 22 is emitted as a light pulse PO and is irradiated onto the subject S.

[0019] The light receiving unit 3 receives reflected light RL of the light pulse PO reflected by a subject S, the distance of which is to be measured in the range image pickup device 1, and outputs a pixel signal corresponding to the received reflected light RL. The light receiving unit 3 includes a lens 31 and a range image sensor 32. The lens 31 is an optical lens that guides the incident reflected light RL to the range image sensor 32. The lens 31 outputs the incident reflected light RL to the range image sensor 32 side, and causes the light to be received (incident) by pixel circuits provided in the light receiving region of the range image sensor 32.

[0020] The range image sensor 32 is an imaging element used in the range image capturing device 1. The range image sensor 32 has a plurality of pixels in a two-dimensional light receiving area. Each pixel circuit (pixel circuit 321) of the range image sensor 32 includes one photoelectric conversion element, a plurality of charge accumulation units corresponding to this one photoelectric conversion element, and components that distribute charge to each charge accumulation unit.

[0021] The range image sensor 32 distributes the charges generated by the photoelectric conversion elements to the respective charge accumulation sections under the control of the timing control section 41. The range image sensor 32 also outputs pixel signals according to the amount of charge distributed to the charge accumulation sections. The range image sensor 32 has a plurality of pixel circuits arranged in a two-dimensional matrix, and outputs pixel signals for one frame corresponding to each pixel circuit.

[0022] The distance image processing unit 4 controls the distance image pickup device 1 and calculates the distance to the subject S. The distance image processing unit 4 includes a timing control unit 41 and a distance calculation unit . The timing control unit 41 controls the timing of outputting various control signals required for distance measurement. The various control signals here include, for example, a signal that controls the irradiation of the light pulse PO, a signal that distributes the reflected light RL to multiple charge accumulation units, and a signal that controls the number of distributions per frame. The number of distributions refers to the number of times the process of distributing electric charges to the charge accumulation units CS (see FIG. 3) is repeated.

[0023] The distance calculation unit 42 outputs distance information calculated based on the pixel signals output from the range image sensor 32, which indicates the distance to the subject S. The distance calculation unit 42 calculates the delay time Td from when the light pulse PO is emitted until when the reflected light RL is received, based on the amount of charge accumulated in the multiple charge accumulation units CS. The distance calculation unit 42 calculates the distance from the range image pickup device 1 to the subject S in accordance with the calculated delay time Td.

[0024] With this configuration, in the distance image capturing device 1, the light source unit 2 irradiates a light pulse PO in the near-infrared wavelength band onto the subject S, and the light receiving unit 3 receives the reflected light RL reflected by the subject S, and the distance image processing unit 4 outputs distance information measuring the distance between the subject S and the distance image capturing device 1. Although FIG. 1 shows the distance image pickup device 1 having the distance image processing unit 4 built therein, the distance image processing unit 4 may be an element provided outside the distance image pickup device 1.

[0025] Next, there will be described the configuration of the distance image sensor 32 used as the imaging element in the distance image capturing device 1. Fig. 2 is a block diagram showing a schematic configuration of the imaging element (distance image sensor 32). As shown in FIG. 2, the distance image sensor 32 includes, for example, a light receiving area 320 in which a plurality of pixel circuits 321 are arranged, a control circuit 322, a vertical scanning circuit 323 having a distribution operation, a horizontal scanning circuit 324, and a pixel signal processing circuit 325.

[0026] Light receiving area 320 is an area in which a plurality of pixel circuits 321 are arranged, and in FIG. 2 an example is shown in which the pixel circuits are arranged in a two-dimensional matrix of 8 rows and 8 columns. Pixel circuits 321 accumulate electric charges corresponding to the amount of light received. Control circuit 322 controls the operation of the components of distance image sensor 32 in response to instructions from timing control unit 41 of distance image processing unit 4, for example.

[0027] The vertical scanning circuit 323 is a circuit that controls the pixel circuits 321 arranged in the light receiving region 320 for each row in accordance with control from the control circuit 322. The vertical scanning circuit 323 outputs a voltage signal corresponding to the amount of charge accumulated in each charge accumulation unit CS of the pixel circuit 321 to the pixel signal processing circuit 325.

[0028] The pixel signal processing circuit 325, under the control of the control circuit 322, performs predetermined signal processing (for example, noise suppression processing, A / D conversion processing, etc.) on the voltage signals output from the pixel circuits 321 of each column. Horizontal scanning circuit 324 is a circuit that outputs signals output from pixel signal processing circuit 325 sequentially in time series under control of control circuit 322. As a result, pixel signals corresponding to the amount of charge accumulated for one frame are sequentially output to distance image processing unit 4. In the following explanation, it is assumed that pixel signal processing circuit 325 performs A / D conversion processing and that the pixel signals are digital signals.

[0029] Here, we will explain the configuration of the pixel circuit 321 arranged in the light receiving region 320 provided in the distance image sensor 32. Fig. 3 is a circuit diagram showing an example of the configuration of the pixel circuit 321. The pixel circuit 321 in Fig. 3 is an example configuration including four pixel signal readout units.

[0030] The pixel circuit 321 includes one photoelectric conversion element PD, a charge discharging transistor GD (GD1 and GD2 described below), and four pixel signal readout units RU (RU1 to RU4) that output voltage signals from corresponding output terminals O. Each pixel signal readout unit RU includes a transfer transistor G, a floating diffusion FD, a charge storage capacitance C, a reset transistor RT, a source follower transistor SF, and a selection transistor SL. The floating diffusion FD and the charge storage capacitance C form a charge storage unit CS.

[0031] 3, the pixel signal readout unit RU1, which outputs a voltage signal from the output terminal O1, includes a transfer transistor G1 (transfer MOS transistor), a floating diffusion FD1, a charge storage capacitance C1, a reset transistor RT1, a source follower transistor SF1, and a selection transistor SL1. In the pixel signal readout unit RU1, the floating diffusion FD1 and the charge storage capacitance C1 form a charge storage unit CS1. The pixel signal readout units RU2, RU3, and RU4 have a similar configuration.

[0032] The photoelectric conversion element PD is a buried photodiode that photoelectrically converts incident light, generates charges corresponding to the incident light, and accumulates the generated charges. In this embodiment, the incident light is incident from the space to be measured. In the pixel circuit 321, the photoelectric conversion element PD photoelectrically converts incident light to generate electric charges, which are then distributed to each of the four charge accumulation units CS (CS1 to CS4), and voltage signals corresponding to the amount of the distributed electric charges are output to the pixel signal processing circuit 325. 3, the pixel circuit configuration arranged in the range image sensor 32 is not limited to the configuration including four pixel signal readout units RU (RU1 to RU4), but may be a pixel circuit configured to include 2M (M is an integer, M≧2) or more pixel signal readout units RU. In other words, the pixel circuit may be configured to include 2M (M is an integer, M≧2) or more transfer transistors G.

[0033] When the pixel circuit 321 of the range image pickup device 1 is driven, a light pulse PO is emitted for an irradiation time To, and reflected light RL is received by the range image sensor 32 after a delay time Td. The vertical scanning circuit 323 transfers the charges generated in the photoelectric conversion element PD to charge accumulation units CS1, CS2, CS3, and CS4 in this order in synchronization with the emission of the light pulse PO, and accumulates the charges in each of them. At this time, the vertical scanning circuit 323 turns on the transfer transistor G1, which is provided on a transfer path that transfers charges from the photoelectric conversion element PD to the charge accumulation unit CS1. As a result, the charges photoelectrically converted by the photoelectric conversion element PD are accumulated in the charge accumulation unit CS1 via the transfer transistor G1. Thereafter, the vertical scanning circuit 323 turns off the transfer transistor G1. This stops the transfer of charges to the charge accumulation unit CS1. In this way, the vertical scanning circuit 323 accumulates charges in the charge accumulation unit CS1. The same applies to the other charge accumulation units CS2, CS3, and CS4.

[0034] At this time, during the charge accumulation period in which charge is distributed to the charge accumulation sections CS, an accumulation cycle in which the accumulation drive signals TX1, TX2, TX3, and TX4 are supplied to the transfer transistors G1, G2, G3, and G4, respectively, is repeated. Then, charges corresponding to incident light are transferred from the photoelectric conversion element PD to the charge accumulation units CS1, CS2, CS3, and CS4, respectively, via the transfer transistors G1, G2, G3, and G4. A plurality of accumulation cycles are repeated during the charge accumulation period. As a result, charges are accumulated in the charge accumulation units CS1, CS2, CS3, and CS4, respectively, for each accumulation cycle of the charge accumulation units CS1, CS2, CS3, and CS4 during the charge accumulation period.

[0035] In addition, when the vertical scanning circuit 323 repeats the accumulation cycle of each of the charge accumulation units CS1, CS2, CS3, and CS4, after the transfer (allocation) of charges to the charge accumulation unit CS4 is completed, it turns on the charge discharge transistor GD provided on the discharge path that discharges charges from the photoelectric conversion element PD. As a result, before the accumulation cycle for the charge accumulation unit CS1 starts, the charge discharging transistor GD discards the charge generated in the photoelectric conversion element PD after the accumulation cycle for the immediately preceding charge accumulation unit CS4 (i.e., resets the photoelectric conversion element PD).

[0036] The vertical scanning circuit 323 then causes all of the pixel circuits 321 arranged in the light receiving region 320 to sequentially output voltage signals to the pixel signal processing circuit 325 in units of rows (horizontal arrangement) of the pixel circuits 321. Then, pixel signal processing circuit 325 performs signal processing such as A / D conversion processing on each of the input voltage signals, and outputs the signals to horizontal scanning circuit 324. The horizontal scanning circuit 324 outputs the processed voltage signals to the distance calculation unit 42 in the order of the columns of the light receiving regions 320 .

[0037] As described above, the vertical scanning circuit 323 repeatedly stores charge in the charge storage units CS and discards the charge photoelectrically converted by the photoelectric conversion elements PD over one frame. As a result, charge corresponding to the amount of light received by the distance image pickup device 1 over a predetermined time period is stored in each charge storage unit CS. The horizontal scanning circuit 324 outputs an electrical signal corresponding to the amount of charge stored in each charge storage unit CS for one frame to the distance calculation unit 42.

[0038] Due to the relationship between the timing of irradiating the light pulse PO and the timing of accumulating charges in each of the charge accumulation units CS (CS1 to CS4), the charge accumulation unit CS1 holds an amount of charge corresponding to external light components such as background light before irradiating the light pulse PO. Furthermore, the charge accumulation units CS2, CS3, and CS4 hold charges corresponding to the reflected light RL and external light components, respectively. The distribution (allocation ratio) of the amount of charge allocated to the charge accumulation units CS2 and CS3, or the charge accumulation units CS3 and CS4, is a ratio that corresponds to the delay time Td between when the light pulse PO is reflected by the subject S and when it enters the range image pickup device 1.

[0039] The distance calculation unit 42 uses this principle to calculate the delay time Td using the following equation (1) or (2). Td=To×(Q3-Q1) / (Q2+Q3-2×Q1) …(1) Td=To+To×(Q4-Q1) / (Q3+Q4-2×Q1) …(2) Here, To is the period during which the light pulse PO is irradiated, Q1 is the amount of charge accumulated in the charge accumulation unit CS1, Q2 is the amount of charge accumulated in the charge accumulation unit CS2, Q3 is the amount of charge accumulated in the charge accumulation unit CS3, and Q4 is the amount of charge accumulated in the charge accumulation unit CS4. For example, when Q4=Q1, the distance calculation unit 42 calculates the delay time Td using equation (1), and when Q2=Q1, the distance calculation unit 42 calculates the delay time Td using equation (2).

[0040] In equation (1), charges generated by reflected light are accumulated in the charge accumulation units CS2 and CS3, but not in the charge accumulation unit CS4. On the other hand, in equation (2), charges generated by reflected light are accumulated in the charge accumulation units CS3 and CS4, but not in the charge accumulation unit CS2. In addition, equation (1) or (2) is based on the premise that the amount of charge stored in the charge storage units CS2, CS3, and CS4 that corresponds to the external light component is the same as the amount of charge stored in the charge storage unit CS1.

[0041] The distance calculation unit 42 calculates the round trip distance to the subject S by multiplying the delay time obtained by equation (1) or (2) by the speed of light (velocity). Then, the distance calculation unit 42 calculates the distance to the subject S by dividing the calculated round trip distance by half.

[0042] FIG. 4 is a diagram showing an example of the arrangement (layout pattern) of each transistor of the pixel circuit 321 in this embodiment. FIG. 4 shows a layout pattern of the pixel circuit 321. 4 also shows the pattern layout of the transfer transistors G1, G2, G3, and G4, the source follower transistors SF1, SF2, SF3, and SF4, the select transistors SL1, SL2, SL3, and SL4, the reset transistors RT1, RT2, RT3, and RT4, the charge ejection transistors GD1 and GD2, and the photoelectric conversion element PD. Each of the above-mentioned transistors is an n-channel MOS transistor formed on a p-type semiconductor substrate.

[0043] For example, the reset transistor RT1 is composed of a drain RT1_D (n diffusion layer (n-type impurity diffusion layer)), a source RT1_S (n diffusion layer), and a gate RT1_G on a p-type semiconductor substrate. The contact RT1_C is a pattern indicating a contact that is provided in each diffusion layer of the drain RT1_D (n diffusion layer) and the source RT1_S (n diffusion layer) of the reset transistor RT1 and that connects to wiring (not shown). The other transfer transistors G1 to G4, source follower transistors SF1 to SF4, select transistors SL1 to SL4, reset transistors RT2 to RT4, and charge discharge transistors GD1 and GD2 have the same configuration.

[0044] The photoelectric conversion element PD is formed in a rectangular shape and is made up of a long side PDL1, a long side PDL2 parallel to and opposite the long side PDL1, a short side PDS1, and a short side PDS2 parallel to and opposite the short side PDS1. Here, the x-axis is an axis that is orthogonal to the short sides PDS1 (and PDS2) of the rectangle in the rectangular pattern of the photoelectric conversion element PD (i.e., parallel to the long sides PDL1 and PDL2 of the rectangle) and passes through the center O of the rectangle. Also, the y-axis is an axis that is orthogonal to the x-axis, i.e., orthogonal to the long sides PDL1 (and PDL2) of the rectangle (parallel to the short sides PDS1 and PDS2 of the rectangle) and passes through the center O of the rectangle.

[0045] The charge discharging transistor GD1 is arranged on the y-axis of the long side PDL1. The charge drain transistor GD2 is arranged on the y-axis of the long side PDL2. The charge discharging transistor GD2 is arranged at a position that is symmetrical with respect to the x-axis to the charge discharging transistor GD1. That is, the charge discharging transistor GD2 is arranged on the y-axis of the long side PDL2 so as to be symmetrical with respect to the x-axis to the charge discharging transistor GD1.

[0046] As described above, the charge discharging transistors GD1 and GD2 are arranged on the y-axis and at the same distance from the x-axis, and therefore are arranged at the same distance from the center O of the photoelectric conversion element PD. By arranging each of the charge discharging transistors GD1 and GD2 on the y-axis of the long side PDL1 or PDL2, the distance from the center O of the photoelectric conversion element PD to the charge discharging transistors GD1 and GD2 can be made shorter than when each of the charge discharging transistors GD1 and GD2 is arranged on the short side PDS1 or PDS2, thereby improving the discharge characteristics and making discharge defects less likely to occur.

[0047] The transfer transistors G1 and G2 are arranged at positions that are line-symmetrical with respect to the y-axis, with the charge discharging transistor GD1 sandwiched therebetween. The transfer transistors G3 and G4 are arranged at positions that are line-symmetrical with respect to the y-axis, with the charge discharging transistor GD2 sandwiched therebetween. The transfer transistors G3 and G4 are arranged in line symmetry with the transfer transistors G1 and G2 with respect to the x-axis.

[0048] As described above, the transfer transistors G1, G2, G3, and G4 are each disposed at the same distance from the x-axis and also at the same distance from the center O of the photoelectric conversion element PD. Moreover, each of the transfer transistors G1 to G4 has the same size (same channel length and channel width) and similar transistor characteristics. This allows the charges generated by the photoelectric conversion element PD to have the same transfer efficiency (transfer characteristics), and allows the charges to be stored in each of the charge storage units CS1 to CS4 with the same transfer characteristics, making it possible to calculate the distance between the subject and the distance image pickup device with high accuracy.

[0049] The reset transistors RT1 and RT2 are arranged symmetrically with respect to the x-axis with respect to the reset transistors RT3 and RT4, respectively. Moreover, each of the source follower transistors SF1 and SF2 is arranged symmetrically with respect to the x-axis with respect to each of the source follower transistors SF3 and SF4. Furthermore, each of the select transistors SL1 and SL2 is arranged symmetrically with respect to the x-axis with respect to the select transistors SL3 and SL4.

[0050] 4 shows the arrangement of each transistor on the semiconductor substrate of pixel circuit 321, and does not include the wiring patterns and charge storage capacitors (C1 to C4). Therefore, each of charge storage units CS1, CS2, CS3, and CS4 is arranged at the position of each of floating diffusions FD1, FD2, FD3, and FD4.

[0051] FIG. 5 is a diagram showing an example of the arrangement relationship between the photoelectric conversion element PD, the transfer transistor G, and the charge discharging transistor GD in FIG. FIG. 5 shows the positional relationship of the transfer transistors G1, G2, G3, and G4 and the charge discharging transistors GD1 and GD2 relative to the photoelectric conversion element PD.

[0052] The charge discharging transistor GD1 is formed of a drain GD1_D, a gate GD1_G, and a source (n diffusion layer of the photoelectric conversion element PD). The drain GD1_D is connected to a power supply VDD via a contact and a wiring. When an "H" level gate voltage is applied to the gate GD1_G, the charge discharging transistor GD1 transfers the charges (electrons) generated in the photoelectric conversion element PD to the drain GD1_D. Then, the drain GD1_D discharges the charges transferred from the photoelectric conversion element PD to the power supply VDD.

[0053] The charge discharging transistor GD2 has the same configuration as the charge discharging transistor GD1, and is formed of a drain GD2_D, a gate GD2_G, and a source (n diffusion layer of the photoelectric conversion element PD). The drain GD2_D is connected to a power supply VDD via a contact and a wiring. When an "H" level gate voltage is applied to the gate GD2_G of the charge discharging transistor GD2, the charge discharging transistor GD2 transfers the charge (electrons) generated in the photoelectric conversion element PD to the drain GD2_D. Then, the drain GD2_D discharges the charge transferred from the photoelectric conversion element PD to the power supply VDD.

[0054] The transfer transistor G1 is formed of a floating diffusion F1 as a drain G1_D, a gate G1_G, and a source (an n-type diffusion layer of the photoelectric conversion element PD). A charge storage portion CS1 is formed in the floating diffusion FD1. The drain G1_D is connected to the gate SF1_G of the source follower transistor SF1 and the source RT1_S of the reset transistor RT1 via contacts and wiring. When an "H" level gate voltage is applied to the gate G1_G, the transfer transistor G1 transfers the charges (electrons) generated in the photoelectric conversion element PD to the floating diffusion F1 serving as the drain G1_D. The floating diffusion FD1 then accumulates the charges transferred from the photoelectric conversion element PD. Each of the transfer transistors G2, G3, and G4 has the same configuration as the transfer transistor G1.

[0055] FIG. 6 is a diagram illustrating the transfer of charges from the photoelectric conversion element PD to the floating diffusion FD by the transfer transistor G. In FIG. FIG. 6(a) shows a cross-sectional structure of a semiconductor on which the pixel circuit 321 of FIG. 5 is formed, taken along line AA'. The photoelectric conversion element PD is, for example, a buried photodiode having a surface protection layer of a p+ diffusion layer (a diffusion layer of p-type impurities) provided on the surface.

[0056] The transfer transistor G1 is formed with the n diffusion layer of the photoelectric conversion element PD as its source and the n+ diffusion layer of the floating diffusion FD1 as its drain. The transfer transistor G1 is formed so that the length from the source to the drain is a channel length G1_L. The n+ diffusion layer of the floating diffusion FD1 is provided adjacent to an STI (Shallow trench isolation) and a p-well (p-diffusion layer) to suppress the outflow (discharge) of charges from the n+ diffusion layer (to prevent leakage current). When an "H" level gate voltage is applied to the gate G1_G of the transfer transistor G1, the transfer transistor G1 transfers the charges (electrons) generated in the photoelectric conversion element PD to the floating diffusion FD1, which is the drain. The floating diffusion FD1 then accumulates the charges transferred from the transfer transistor G1.

[0057] The transfer transistor G3 is formed with the n diffusion layer of the photoelectric conversion element PD as its source and the n+ diffusion layer of the floating diffusion FD3 as its drain. The transfer transistor G1 is formed so that the length from the source to the drain is a channel length G1_L. An STI and a p-well for preventing leakage current from the n+ diffusion layer are provided adjacent to the n+ diffusion layer of the floating diffusion FD3. When an "H" level gate voltage is applied to the gate G3_G of the transfer transistor G3, the transfer transistor G3 transfers the charges (electrons) generated in the photoelectric conversion element PD to the floating diffusion FD3, which is the drain. The floating diffusion FD3 then accumulates the charges transferred from the transfer transistor G3.

[0058] Fig. 6(b) shows the potential state in each region of the transfer transistor G1, the photoelectric conversion element PD, and the transfer transistor G3 shown in Fig. 6(a). In Fig. 6(b), the horizontal axis indicates the position in the region, and the vertical axis indicates the height of the potential (the potential (electric potential) is higher at the bottom). Figure 6(b) shows the potential state when an "H" level gate voltage is applied to the gate G1_G of the transfer transistor G1, while an "L" level gate voltage is applied to the gate G3_G of the transfer transistor G3.

[0059] Because the gate G3_G of the transfer transistor G3 is at the "L" level, a potential barrier PB is formed in the area of ​​the gate G3_G, and charge is not transferred from the photoelectric conversion element PD to the floating diffusion FD3, which is the drain of the transfer transistor G3 (electrons do not flow into the drain). On the other hand, since the gate G1_G of the transfer transistor G1 is at the "H" level, the potential (electric potential) in the area of ​​the gate G1_G rises (no potential barrier is formed), and charge is transferred from the photoelectric conversion element PD to the floating diffusion FD1, which is the drain of the transfer transistor G1 (electrons flow into the drain).

[0060] When an "H" level charge is applied to the gates G1_G, G2_G, G3_G, and G4_G of the transfer transistors G1, G2, G3, and G4, respectively, the shape of the potential drop (potential gradient) from the source (n diffusion layer of the photoelectric conversion element PD) to the drains G1_D, G2_D, G3_D, and G4_D is similar because the transfer transistors G1, G2, G3, and G4 are arranged so that they are similarly distant from the center O of the photoelectric conversion element PD. That is, when the distances from each of the transfer transistors G1, G2, G3, and G4 to the center O of the photoelectric conversion element PD are similar, the strength of the electric field extending from each of the transfer transistors G1, G2, G3, and G4 into the diffusion layer in the direction toward the center O of the photoelectric conversion element PD can be made similar. Making the strength of the electric field in the diffusion layer similar makes the shape of the potential drop in each region of the gates G1_G, G2_G, G3_G, and G4_G similar. According to this embodiment, the transfer transistors G2 and G3 have the same shape and are arranged in the same position, so that they have the same charge transfer efficiency.Furthermore, the transfer transistors G1 and G4 have the same shape and are arranged in the same position, so that they have the same charge transfer efficiency. That is, when each of the transfer transistors G1, G2, G3, and G4 transfers, for example, the same amount of charge from the photoelectric conversion element PD to each of the floating diffusions FD1, FD2, FD3, and FD4, the amount of charge stored in the floating diffusions FD1, FD2, FD3, and FD4 will be the same. As a result, according to this embodiment, the charge generated by the photoelectric conversion element PD can be stored in each of the charge storage units CS1 to CS4 with the same transfer efficiency (transfer characteristics), and the distance between the subject and the distance image pickup device can be calculated with high accuracy using the amount of charge stored in each of the charge storage units CS1 to CS4, using equation (1) or (2).

[0061] FIG. 7 is a diagram for explaining the discharge of charges from the photoelectric conversion element PD to the power supply VDD by the charge discharging transistor GD. FIG. 7(a) shows a cross-sectional structure of a semiconductor on which the pixel circuit 321 of FIG. 5 is formed, taken along the y axis. The charge discharging transistor GD1 is formed with the n diffusion layer of the photoelectric conversion element PD as its source and the n diffusion layer connected to the power supply VDD as its drain GD1_D. The charge discharging transistor GD1 is formed so that the length from the source to the drain is equal to the channel length GD1_L. An STI and a p-well for preventing leakage current from the n-diffusion layer of the drain GD1_D are provided adjacent to the n-diffusion layer. When an "H" level gate voltage is applied to the gate GD1_G, the charge discharging transistor GD1 transfers the charges (electrons) generated in the photoelectric conversion element PD to the drain GD1_D (discharges the charges of the photoelectric conversion element PD to the power supply VDD).

[0062] The charge discharging transistor GD2 is formed with the n diffusion layer of the photoelectric conversion element PD as its source and the n diffusion layer connected to the power supply VDD as its drain GD2_D. The charge discharging transistor GD1 is formed so that the length from the source to the drain is equal to the channel length GD1_L. An STI and a p-well for preventing leakage current from the n-diffusion layer of the drain GD1_D are provided adjacent to the n-diffusion layer. When an "H" level gate voltage is applied to the gate GD2_G of the charge discharging transistor GD2, the charge discharging transistor GD2 transfers the charge generated in the photoelectric conversion element PD to the drain GD2_D.

[0063] Fig. 7(b) shows the potential state in each region of the charge discharging transistor GD1, the photoelectric conversion element PD, and the readout charge discharging transistor GD2 shown in Fig. 7(a). In Fig. 7(b), the horizontal axis represents the position in the region, and the vertical axis represents the height of the potential (the lower the position, the higher the potential (electric potential)). FIG. 7(b) shows the potential state when an “H” level gate voltage is applied to the gate GD1_G of the charge discharging transistor GD1, and similarly, an “H” level gate voltage is applied to the gate GD2_G of the charge discharging transistor GD2.

[0064] Since the gate GD1_G of the charge discharging transistor GD1 is at the "H" level, the potential in the area of ​​the gate GD1_G rises (no potential barrier is formed), and charge is transferred from the photoelectric conversion element PD to the drain GD1_D of the charge discharging transistor GD1 (electrons are discharged to the power supply VDD connected to the drain GD1_D). On the other hand, since the gate GD2_G of the charge discharging transistor GD2 is at the “H” level, no potential barrier is formed in the area of ​​the gate GD2_G, similar to the gate GD1_G of the charge discharging transistor GD1, and charge is transferred from the photoelectric conversion element PD to the drain GD1_D of the charge discharging transistor GD1.

[0065] When an "H" level charge is applied to the gates GD1_G and GD2_G of the charge discharging transistors GD1 and GD2, respectively, the shape of the potential drop (potential gradient) from the source (n diffusion layer of the photoelectric conversion element PD) to the drains GD1_D and GD2_D is similar because the charge discharging transistors GD1 and GD2 are disposed at the same distance from the center O of the photoelectric conversion element PD.

[0066] Furthermore, because each of the charge drain transistors GD1 and GD2 is positioned on the y-axis, the distance from the center O of the photoelectric conversion element PD to the gates GD1_G and GD2_G is short. Therefore, when an "H" level charge is applied to the gates GD1_G and GD2_G of each of the charge drain transistors GD1 and GD2, the shape of the potential drop (potential gradient) from the source (n diffusion layer of the photoelectric conversion element PD) to each of the drains GD1_D and GD2_D is made steep, creating a state in which charges can easily move. This makes it easier for charges to be drained, improving drain characteristics and reducing the likelihood of discharge failures during discharge.

[0067] <Second embodiment> A second embodiment of the present invention will be described below with reference to the drawings. This embodiment differs from the above-described embodiment in that the channel length of the transfer transistor G is longer than the channel length of the charge discharging transistor GD.

[0068] FIG. 8 is a diagram showing an example of the arrangement relationship between the photoelectric conversion element PD, the transfer transistor G, and the charge discharging transistor GD in the pixel circuit 321 according to this embodiment. As shown in FIG. 8, the gate sizes (lengths in the y-axis direction) of the gates G1_G, G2_G, G3_G, and G4_G of the transfer transistors G1, G2, G3, and G4, respectively, are formed to be longer than the gate size of the charge discharging transistor GD.

[0069] FIG. 9 is a diagram illustrating the transfer of charges from the photoelectric conversion element PD to the floating diffusion FD by the transfer transistor G in this embodiment. FIG. 9(a) shows a cross-sectional structure of a semiconductor on which the pixel circuit 321 of FIG. 8 is formed, taken along line AA'.

[0070] The transfer transistor G1 is formed so that the length from the source to the drain is a channel length G1_L#, which is longer than the channel lengths GD1_L and GD2_L in FIG.

[0071] The transfer transistor G3 is formed so that the length from the source to the drain is a channel length G3_L#, which is longer than the channel lengths GD1_L and GD2_L in FIG.

[0072] Fig. 9(b) shows the potential state in each region of the transfer transistor G1, the photoelectric conversion element PD, and the transfer transistor G3 shown in Fig. 9(a). In Fig. 9(b), the horizontal axis indicates the position in the region, and the vertical axis indicates the height of the potential (the potential (electric potential) is higher at the bottom). Figure 9(b) shows the potential state when an "H" level gate voltage is applied to the gate G1_G of the transfer transistor G1, while an "L" level gate voltage is applied to the gate G3_G of the transfer transistor G3.

[0073] Since the gate G1_G of the transfer transistor G1 is at the "H" level, the potential (electric potential) in the region of the gate G1_G rises, and charges are transferred from the photoelectric conversion element PD to the floating diffusion FD1, which is the drain of the transfer transistor G1. In this case, since the channel length G1_L# is formed longer than the channel lengths GD1_L and GD2_L, when an "H" level gate voltage is applied to the gate G1_G of the transfer transistor G1, a stronger electric field can be formed in the x-axis direction than in the first embodiment. This makes it easier for charges to be transferred, improving transfer characteristics and making it less likely for transfer failures to occur during transfer.

[0074] <Third embodiment> A third embodiment of the present invention will be described below with reference to the drawings. This embodiment differs from the above-described embodiments in that the transfer transistor G is doped with n-type impurities. FIG. 10 is a diagram showing an example of the arrangement relationship between the photoelectric conversion element PD, the transfer transistor G, and the charge discharging transistor GD in the pixel circuit 321 according to this embodiment. As shown in Figure 10, doped regions G1_DD, G2_DD, G3_DD, and G4_DD doped with n-type impurities are formed from the drains G1_D, G2_D, G3_D, and G4_D of the transfer transistors G1, G2, G3, and G4, respectively, to all or part of the channel region. By forming the doping regions G1_DD, G2_DD, G3_DD, and G4_DD, even if the channel length G_L of the transfer transistor G is long, the potential gradient of the channel region can be made high when an "H" level gate voltage is applied to the gate G_G. Therefore, charges can be easily transferred in the transfer transistor G, and transfer traps can be suppressed.

[0075] FIG. 11 is a diagram illustrating the transfer of charges from the photoelectric conversion element PD to the floating diffusion FD by the transfer transistor G in this embodiment. FIG. 11(a) shows a cross-sectional structure of a semiconductor on which the pixel circuit 321 of FIG. 10 is formed, taken along line AA'.

[0076] The doping region G1_DD is formed by doping n-type impurities into the region between the n diffusion layer (source) of the photoelectric conversion element PD and the n+ diffusion layer (drain) of the floating diffusion FD1, and into the region surrounding the n+ diffusion layer of the floating diffusion FD1. The doping region G3_DD is formed by doping n-type impurities into the region between the n diffusion layer (source) of the photoelectric conversion element PD and the n+ diffusion layer (drain) of the floating diffusion FD3, and the region surrounding the n+ diffusion layer of the floating diffusion FD3.

[0077] Fig. 11(b) shows the potential state in each region of the transfer transistor G1, the photoelectric conversion element PD, and the transfer transistor G3 shown in Fig. 11(a). In Fig. 11(b), similar to Fig. 6(b), the horizontal axis indicates the position in the region, and the vertical axis indicates the height of the potential (the potential (electric potential) is higher at the bottom). Figure 11(b) shows the potential state when an "H" level gate voltage is applied to the gate G1_G of the transfer transistor G1 and an "L" level gate voltage is applied to the gate G3_G of the transfer transistor G3, similar to Figure 6(b).

[0078] 11(b) shows that a potential curve PC is formed in the region from the gate G1_G to the floating diffusion FD1. The solid line of the potential curve PC shows the potential state in this embodiment. The dotted line of the potential curve PC shows the potential state in FIG. 6. In this embodiment, a doped region G1_DD is formed from the gate G1_G to the floating diffusion FD1, so a potential curve PC is formed in which the potential (electrical potential) rises more steeply than in FIG. 6(b).

[0079] <Fourth embodiment> A fourth embodiment of the present invention will be described below with reference to the drawings. The fourth embodiment is a distance image pickup element (distance image sensor 32) in a distance image pickup device similar to the configuration in FIG. 2, and is configured such that a light-collecting microlens is provided for each of the pixel circuits 321 shown in FIG. FIG. 12 is a diagram showing the positional relationship between the photoelectric conversion element PD and the microlens ML of the pixel circuit 321. The microlenses ML are produced by thermally deforming a predetermined resin material, and are formed in positions that overlap with the arrangement regions of the pixel circuits 321 in plan view. The microlens ML is provided in each pixel circuit 321 at a position where the optical axis (the center of the microlens ML) overlaps with the center O of the photoelectric conversion element PD in a plan view.

[0080] FIG. 13 is a plan view showing a lens array in a part of the light receiving area 320 in which a plurality of pixel circuits 321 are arranged. The microlenses ML in a part of a 3×3 area in the light receiving region 320 are formed as a lens array, and the positional relationship between the pixel circuits 321 and the microlenses ML is shown. Here, the optical axis of each of the microlenses ML in the microlens array overlaps with the center O of the pixel circuit 321 that it overlaps in plan view.

[0081] FIG. 14 is a cross-sectional view of the lens array of the pixel circuit 321 in which the microlenses ML in FIG. 13 are provided. Fig. 14 shows the cross-sectional shape of the array of pixel circuits 321 taken along line B-B' in Fig. 13. Furthermore, the range image sensor 32, which is the range image pickup element in Fig. 11, is an FSI (Front Side Illumination) type in which light is incident from the surface on which the photodiode, which is the photoelectric conversion element PD, is formed.

[0082] A wiring layer 502 insulated by an insulating layer is formed on the semiconductor layer 501, and a dielectric layer 503 serving as passivation is formed on the wiring layer 502. The lens array (microlens array) of the microlenses ML is formed on the dielectric layer 503. The optical axis OA of each microlens ML in the microlens array is perpendicular to the surface of the photoelectric conversion element PD in the semiconductor layer 501, and passes through the center O of the pixel circuit 321 that it overlaps in plan view.

[0083] FIG. 15 is a cross-sectional view of the lens array of the pixel circuit 321 in which the microlenses ML in FIG. 13 are provided. Fig. 15 shows the cross-sectional shape of the lens array of pixel circuit 321 taken along line B-B' in Fig. 13. Furthermore, range image sensor 32, which is a range image pickup element, in Fig. 12 is a BSI (Back Side Illumination) type in which light is incident from the back surface on which a photodiode, which is a photoelectric conversion element PD, is formed.

[0084] A wiring layer 502 insulated by an insulating layer is formed on the semiconductor layer 501, and a dielectric layer 504 serving as passivation is formed below the semiconductor layer 501. The lens array of the microlenses ML is formed below the dielectric layer 504. The optical axis OA of each microlens ML in the lens array is perpendicular to the surface of the photoelectric conversion element PD in the semiconductor layer 501, and passes through the center O of the pixel circuit 321 that it overlaps in plan view.

[0085] With the above-described configuration, according to this embodiment, the microlens ML collects light incident on the pixel circuit 321 and irradiates it onto the photoelectric conversion element PD, thereby enabling efficient photoelectric conversion of the light incident on the pixel circuit 321 and improving the sensitivity to the incident light. In this embodiment, the arrangement of the microlens ML for the pixel circuit 321 of the first embodiment has been described, but it can also be applied to the pixel circuit 321 of the second and third embodiments, and the sensitivity to incident light can be improved. [Explanation of symbols]

[0086] 1...Distance image capturing device 2...Light source section 3...Light receiving section 31...Lens 32...Distance image sensor (distance image sensor) 321...Pixel circuit 322...Control circuit 323...Vertical scanning circuit 324...Horizontal scanning circuit 325...Pixel signal processing circuit 4...Distance image processing section 41...Timing control section 42...Distance calculation section CS…Charge storage section FD1, FD2, FD3, FD4...Floating diffusion G1, G2, G3, G4...Transfer transistors GD1, GD2...charge discharge transistors ML...micro lens PD...photoelectric conversion element PO...light pulse RT1, RT2, RT3, RT4...Reset transistors S…Subject SF1, SF2, SF3, SF4...Source follower transistors SL1, SL2, SL3, SL4...Selection transistors

Claims

1. a pixel circuit formed on a semiconductor substrate, the pixel circuit including at least a photoelectric conversion element that generates charges according to light incident from a space to be measured, a charge accumulation unit that accumulates the charges, a transfer transistor provided on a transfer path that transfers the charges from the photoelectric conversion element to the charge accumulation unit, and a charge discharge transistor provided on a discharge path that discharges the charges from the photoelectric conversion element; the photoelectric conversion element has a rectangular shape in a plan view on its surface, two of the charge draining transistors are provided; The two charge discharge transistors are arranged on the long sides of the photoelectric conversion element, facing each other, at positions that are linearly symmetrical with respect to a y-axis that is parallel to the short sides of the photoelectric conversion element and passes through the center of the photoelectric conversion element, and an x-axis that is parallel to the long sides and passes through the center of the photoelectric conversion element. A distance image pickup element characterized by:

2. 2M (M is an integer, M≧2) transfer transistors are provided; On each of the long sides, M transfer transistors are arranged facing each other at positions that are symmetrical with respect to the x-axis. The distance image pickup device according to claim 1 .

3. The channel length of the transfer transistor is longer than the channel length of the charge drain transistor.

3. The distance image pickup device according to claim 1 or 2.

4. The entire or a part of the channel region of the transfer transistor is channel-doped with n-type impurities.

4. The distance image pickup device according to claim 1, wherein the distance image pickup device is a distance image pickup element.

5. A microlens is formed on the surface of the pixel circuit where the light is incident, and the optical axis of the microlens is perpendicular to the incident surface of the photoelectric conversion element and passes through the center of the incident surface.

5. The distance image pickup device according to claim 1, wherein the distance image pickup device is a distance image pickup element.

6. a light receiving section including the distance image pickup element according to any one of claims 1 to 5; a distance image processing unit that calculates the distance from the distance image pickup element to the subject from the distance image picked up by the distance image pickup element; A distance image capturing device comprising:

Images