Power conversion device and method for determining abnormality in current detector
The power conversion device uses a system of current detectors, filters, and an abnormality determination unit to accurately identify issues in current detectors, addressing false detections due to load imbalance or pulsation, thereby maintaining system stability.
Patent Information
- Application Number
- JP2022122822
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2021-09-30
- Filing Date
- 2022-08-01
- Publication Date
- 2025-11-11
- Estimated Expiration
- 2042-08-01
AI Technical Summary
Existing methods for detecting abnormalities in current detectors of power conversion devices fail to accurately identify issues when there is load imbalance or current pulsation, leading to false detections and potential system instability.
A power conversion device with multiple current detectors, first and second filters to remove harmonic components, and an abnormality determination unit that calculates and filters products and squares of current detection values to determine the presence of abnormalities.
The solution allows for accurate detection of current detector abnormalities even in conditions of load imbalance or current pulsation, ensuring system stability and preventing false alarms.
Smart Images

Figure 0007767242000001 
Figure 0007767242000002 
Figure 0007767242000003
Abstract
Description
[Technical Field]
[0001] The present invention relates to a power conversion device and a method for determining an abnormality in a current detector. [Background technology]
[0002] Conventionally, a power conversion device that converts power from an AC power source into variable-voltage, variable-frequency power has been known. The power conversion device includes a current detector that measures the current flowing between the power source and the power conversion device, and controls the current to be a predetermined value. The power conversion device also includes a current detector that measures the current flowing between the power conversion device and a load device, and controls the current to be a predetermined value. The current detector that detects the current flowing between the power conversion device and an electric motor and the current detector that detects the current flowing between the power conversion device and the power source are essential for controlling the current in the power conversion device. Therefore, an abnormality in the current detector can cause the system to operate unstable, and in the worst case, can lead to an unplanned shutdown of the system.
[0003] The following methods are known as techniques for verifying the soundness of a current detector that detects the current flowing between a power conversion device and an electric motor. For example, a method is known in which the current of each phase flowing between the power conversion device and the electric motor is detected, and the effective current value of each phase is compared with the effective current value of the other phases to determine the phase in which an abnormality has occurred (see, for example, Patent Document 1).
[0004] Also, a method is known in which a determination is made as to whether the sum of the three-phase current detection values is zero, and if the determination result shows that the sum of the three-phase currents is not zero, a determination is made as to which phase an abnormality in the current detector has occurred by comparing the current values of each phase or determining their signs (see, for example, Patent Documents 2 and 3). [Prior art documents] [Patent documents]
[0005] [Patent Document 1] Patent No. 3737370 [Patent Document 2] Japanese Patent Application Laid-Open No. 2005-94912 [Patent Document 3] Japanese Patent Application Laid-Open No. 2006-50702 Summary of the Invention [Problem to be solved by the invention]
[0006] The technology described in Patent Document 1 can determine which phase has an abnormality when a balanced three-phase load is connected. However, when the three-phase load is unbalanced, a large amount of current flows in the phase with the smaller load, resulting in a discrepancy in the three-phase current effective values. This can lead to false detection of an abnormality in the current detector even when the current detector is functioning normally. Furthermore, in the techniques described in Patent Documents 2 and 3, if the current waveform contains current pulsations that are significant compared to the magnitude of the fundamental wave component of the current waveform, there is a risk that the current pulsations may cause false detection of an abnormality in the current detector. [Means for solving the problem]
[0007] A power conversion device according to an aspect of the present invention is a power conversion device provided between an AC power source and a load device, and includes a plurality of current detectors that detect, for each phase, a plurality of AC currents of multiple phases that flow between the AC power source and the power conversion device, or between the power conversion device and the load device; a first adder that calculates a first sum of the current detection values of the multiple phases detected by the plurality of current detectors; a first multiplier that calculates, for each of the multiple phases, a first product that is the product of the first sum and the current detection value; a first filter that reduces or removes harmonic components included in the plurality of first products; and a second filter that calculates, for each of the multiple phases, a second product that is the product of two of the current detection values of different phases. a second multiplier for calculating a square of the current detection value for each phase; a second adder for calculating a second sum of the plurality of second products; a second filter for reducing or removing harmonic components included in the second sum; a third multiplier for calculating a square of the current detection value for each phase; a third adder for calculating a third sum of the plurality of squares; a third filter for reducing or removing harmonic components included in the third sum; and an abnormality determination unit for generating degrees of abnormality for each of the plurality of current detectors based on the output of the first filter, the output of the second filter, and the output of the third filter, and determining whether or not there is an abnormality in the current detector based on the degrees of abnormality. A method for determining an abnormality in a current detector according to an aspect of the present invention is a method for determining an abnormality in a current detector that detects, for each phase, a current of multiple phases that flows between an AC power source and a load device to which power from the AC power source is supplied, and includes the steps of: calculating a first sum of current detection values detected by a plurality of the current detectors; calculating a first product, which is the product of the first sum and the current detection value, for each of the multiple phases; filtering the multiple first products to reduce or remove harmonic components; calculating a second product, which is the product of two of the current detection values for different phases; a second sum of the second products is calculated, the second sum is filtered to reduce or remove harmonic components, the square of the current detection value is calculated for each phase, a third sum of the squares is calculated, the third sum is filtered to reduce or remove harmonic components, and a degree of abnormality of each of the current detectors is generated based on the results of filtering the first products, the second sum, and the third sum; and an abnormality of the current detector is determined based on the degree of abnormality. [Effects of the Invention]
[0008] According to the present invention, an abnormality in a current detector can be correctly determined even if there is a load imbalance or current pulsation. [Brief explanation of the drawings]
[0009] [Figure 1] FIG. 1 is a diagram illustrating an example of a power conversion device according to a first embodiment of the present invention. [Figure 2] FIG. 2 is a diagram showing three converter power conversion sections provided in the converter unit. [Figure 3] FIG. 3 is a diagram showing three inverter power conversion units provided in the inverter unit. [Figure 4] FIG. 4 is a block diagram showing the details of the converter-side abnormality determiner. [Figure 5] FIG. 5 is a block diagram showing the details of the inverter-side abnormality determiner. [Figure 6]FIG. 6 is a block diagram illustrating various processes in the abnormality determination unit. [Figure 7] FIG. 7 is a flowchart showing an example of the abnormality determination process in the abnormality determination unit of FIG. [Figure 8] FIG. 8 is a diagram showing examples 1 to 9, which are specific examples of the process in step S106. [Figure 9] FIG. 9 shows examples 10 to 13, which are specific examples of the process in step S106. [Figure 10] FIG. 10 is a diagram showing examples 14 to 17 illustrating the relationship between the current waveform and the abnormality determination operation. [Figure 11] FIG. 11 is a diagram showing examples 18 to 21 illustrating the relationship between the current waveform and the abnormality determination operation. [Figure 12] FIG. 12 is a diagram showing an output waveform in Example 14. [Figure 13] FIG. 13 is a diagram showing an output waveform in Example 15. [Figure 14] FIG. 14 is a diagram showing an output waveform in Example 16. [Figure 15] FIG. 15 is a diagram showing an output waveform in Example 17. [Figure 16] FIG. 16 is a diagram showing an output waveform in Example 18. [Figure 17] FIG. 17 is a diagram showing an output waveform in Example 19. [Figure 18] FIG. 18 is a diagram showing an output waveform in Example 20. [Figure 19] FIG. 19 is a diagram showing an output waveform in Example 21. [Figure 20] FIG. 20 is a diagram illustrating an example of a power conversion device according to the second embodiment. [Figure 21] FIG. 21 is a block diagram of an inverter-side abnormality determiner of a power conversion device according to the second embodiment. [Figure 22] FIG. 22 is a block diagram showing details of an abnormality determination unit in the power conversion device. [Figure 23]FIG. 23 is a flowchart showing an example of an abnormality determination process according to the second embodiment. [Figure 24] FIG. 24 is a diagram showing examples 22 and 23, which are specific examples of the processing in steps S205 to S213. [Figure 25] FIG. 25 is a diagram showing examples 24 and 25, which are specific examples of the processing in steps S205 to S213. [Figure 26] FIG. 26 is a diagram showing an output waveform in Example 22. [Figure 27] FIG. 27 is a diagram showing an output waveform in Example 23. [Figure 28] FIG. 28 is a diagram showing an output waveform in Example 24. [Figure 29] FIG. 29 is a diagram showing an output waveform in Example 25. [Figure 30] FIG. 30 is a block diagram showing an example of the configuration of a converter-side abnormality determiner in the third embodiment of the present invention. [Figure 31] FIG. 31 is a block diagram showing an example of the configuration of an inverter-side abnormality determiner in the third embodiment of the present invention. [Figure 32] FIG. 32 is a diagram illustrating an example of an output waveform in the third embodiment. [Figure 33] FIG. 33 is a diagram illustrating an example of a power conversion device according to the fourth embodiment. [Figure 34] FIG. 34 is a diagram illustrating an example of a power conversion device according to the fifth embodiment. [Figure 35] FIG. 35 is a block diagram showing an example of a partial configuration including a converter-side output estimator and an inverter-side output estimator. [Figure 36] FIG. 36 is a diagram illustrating a modified example of the fifth embodiment. [Figure 37] FIG. 37 is a diagram for explaining abnormality determination in a configuration that does not include a power conversion device. [Figure 38] FIG. 38 is a diagram illustrating another example of a current detector. [Figure 39]FIG. 39 is a diagram illustrating an example of a power conversion device according to a modification of the second embodiment. [Figure 40] FIG. 40 is a block diagram of an abnormality determination section in an inverter-side abnormality determiner of a power conversion device according to a modification of the second embodiment. [Figure 41] FIG. 41 is a block diagram of an abnormality determination unit in a converter-side abnormality determiner of a power conversion device according to a modification of the second embodiment. [Figure 42] FIG. 42 is a diagram showing an example of time-dependent changes in the speed, speed change rate (acceleration), and load of the electric motor. [Figure 43] FIG. 43 is a flowchart showing an example of an abnormality determination process in a modified example of the second embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0010] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The embodiments are examples for explaining the present invention, and appropriate omissions and simplifications have been made for clarity of explanation. Furthermore, not all of the elements and combinations thereof described in the embodiments are necessarily essential to the solution of the invention. When there are multiple components having the same or similar functions, they may be described using the same reference numeral with different subscripts. Furthermore, when it is not necessary to distinguish between these multiple components, the subscripts may be omitted in the description.
[0011] -First embodiment- A power conversion device according to a first embodiment of the present invention will be described with reference to Figs. 1 to 19. Fig. 1 is a diagram showing an example of the configuration of a power conversion device 100 according to the first embodiment. The power conversion device 100 receives AC power from an AC power supply 1, converts the AC power using a converter unit 2 and an inverter unit 3, and outputs the converted AC power to an electric motor 4. In Fig. 1, the power conversion device 100 includes the converter unit 2, the inverter unit 3, a converter control device 5, and an inverter control device 6. The power conversion device 100 also includes a converter-side abnormality determiner 71, an inverter-side abnormality determiner 72, and a display device 73.
[0012] A converter unit (also called a converter) 2 receives AC power from an AC power source 1 and converts it into DC power. An inverter unit (also called an inverter) 3 converts the DC power output by the converter unit 2 into AC power of a desired voltage and frequency. An electric motor 4 is driven by this converted AC power. The electric motor 4 is equipped with a speed detector 7. A converter control device 5 controls the converter unit 2. An inverter control device 6 controls the inverter unit 3.
[0013] <Converter Unit 2> 1 and 2, the converter unit 2 includes three converter power conversion sections 21R, 21S, and 21T corresponding to the R, S, and T phases, a P wiring 40, a C wiring 41, an N wiring 42, a converter P-side smoothing capacitor 22 (smoothing capacitor), a converter N-side smoothing capacitor 23 (smoothing capacitor), a converter P-side DC voltage detector 24, a converter N-side DC voltage detector 25, an R-phase current detector 26, an S-phase current detector 27, and a T-phase current detector 28. The three converter power conversion sections 21R, 21S, and 21T are connected as shown in FIG.
[0014] The converter unit 2 is a so-called three-level converter that converts AC power input to a converter power conversion section 21 into DC power with a positive potential (first potential) level, a neutral (zero) potential (second potential) level, and a negative potential (third potential) level. The positive potential level is connected by a P wiring 40, the neutral potential level is connected by a C wiring 41, and the negative potential level is connected by an N wiring 42. The converter P-side smoothing capacitor 22 suppresses fluctuations in DC voltage between the P wiring 40 and the C wiring 41. The converter N-side smoothing capacitor 23 suppresses fluctuations in DC voltage between the C wiring 41 and the N wiring 42. The converter P-side DC voltage detector 24 measures the voltage across the converter P-side smoothing capacitor 22. The converter N-side DC voltage detector 25 measures the voltage across the converter N-side smoothing capacitor 23.
[0015] Each of the converter power conversion units 21R, 21S, and 21T is composed of four transistors each made of an IGBT (Insulated Gate Bipolar Transistor) and six diodes. The four transistors (first to fourth transistors) are connected in series between a P wiring 40 and an N wiring 42. Diodes (first to fourth diodes) are connected in anti-parallel to the first to fourth transistors, respectively. If the first to fourth transistors have parasitic diodes, the parasitic diodes may also serve as the anti-parallel diodes (first to fourth diodes).
[0016] The collector of the first transistor is connected to P wiring 40. The emitter of the fourth transistor is connected to N wiring 42. The fifth and sixth diodes are connected in series, and the cathode of the fifth diode is connected to the connection point between the first and second transistors. The anode of the sixth diode is connected to the connection point between the third and fourth transistors. The connection point between the anode of the fifth diode and the cathode of the sixth diode is connected to C wiring 41.
[0017] 2, the R-phase power line is connected to the connection point between the second transistor and the third transistor of converter power conversion unit 21R. The S-phase power line is connected to the connection point between the second transistor and the third transistor of converter power conversion unit 21S. The T-phase power line is connected to the connection point between the second transistor and the third transistor of converter power conversion unit 21T. However, P wiring 40, C wiring 41, and N wiring 42, which are DC power lines of converter power conversion units 21R, 21S, and 21T, are shared by converter power conversion units 21R, 21S, and 21T.
[0018] As described above, the R, S, and T phases of the three-phase AC power supply 1 are input separately to the corresponding converter power conversion units 21R, 21S, and 21T, but the DC power converted by the converter power conversion units 21R, 21S, and 21T is shared and used. That is, the three-phase AC power (voltage) of the R, S, and T phases is converted into a single DC power (voltage). The three converter power conversion units 21R, 21S, and 21T are integrally controlled by the converter control device 5.
[0019] As described above, the converter unit 2 is provided with the R-phase current detector 26, the S-phase current detector 27, and the T-phase current detector 28, which detect the currents flowing through the R-phase, S-phase, and T-phase of the three-phase AC. R ,I S ,I T The signal is input to the converter-side abnormality determiner 71 and the converter control device 5. The signal of the voltage detection value detected by the DC voltage detectors 24 and 25 is input to the converter control device 5.
[0020] <Inverter Unit 3> 1 and 3, the inverter unit 3 includes three inverter power conversion sections 31U, 31V, and 31W, a P wiring 40, a C wiring 41, an N wiring 42, an inverter P-side smoothing capacitor 32, an inverter N-side smoothing capacitor 33, a U-phase current detector 34, a V-phase current detector 35, and a W-phase current detector 36. The inverter unit 3 is a so-called three-level inverter, and converts DC power having a positive potential (first potential) level, a neutral (zero) potential (second potential) level, and a negative potential (third potential) level into AC power for the motor 4. The positive potential levels of the inverter unit 3 and the converter unit 2 are connected by the P wiring 40, the neutral potential levels are connected by the C wiring 41, and the negative potential levels are connected by the N wiring 42.
[0021] Each of inverter power conversion units 31U, 31V, and 31W is configured with four IGBT transistors and six diodes. The configuration of inverter power conversion units 31U, 31V, and 31W, which includes four IGBT transistors and six diodes, is substantially the same as the configuration of converter power conversion units 21R, 21S, and 21T, which includes four transistors and six diodes. Therefore, a redundant description will be omitted here.
[0022] While the three converter power conversion units 21R, 21S, and 21T generate DC power (voltage) from three-phase AC power (voltage), the three inverter power conversion units 31U, 31V, and 31W generate three-phase (U-phase, V-phase, and W-phase) AC power (voltage) from the DC power (voltage). Note that the three-phase AC power (voltage) of the R-phase, S-phase, and T-phase has different voltages and frequencies from the three-phase AC power (voltage) of the U-phase, V-phase, and W-phase.
[0023] The three inverter power conversion units 31U, 31V, and 31W are integrally controlled by the inverter control device 6. As described above, the inverter unit 3 is provided with a U-phase current detector 34, a V-phase current detector 35, and a W-phase current detector 36, which detect the currents flowing in the U-phase, V-phase, and W-phase of the three-phase AC. The current detection values I detected by the current detectors 34, 35, and 36 are U ,IV ,I W This signal is input to inverter-side abnormality determiner 72 and inverter control device 6. The outputs of inverter power conversion units 31U, 31V, 31W are outputs of power conversion device 100. The output of power conversion device 100 is directly connected to electric motor 4, which is a three-phase electric motor.
[0024] Converter Control Device 5 1, the converter control device 5 is configured to include a DC voltage command generator 51, a DC voltage controller 52, a current controller 53, and a pulse generator 54. The DC voltage command generator 51 generates a DC voltage command value indicating the voltage value of the DC voltage to be output from the converter unit 2, and outputs it to the DC voltage controller 52. The DC voltage command value from the DC voltage command generator 51, the terminal voltage of the converter P-side smoothing capacitor 22 detected by the DC voltage detector 24, and the terminal voltage of the converter N-side smoothing capacitor 23 detected by the DC voltage detector 25 are input to the DC voltage controller 52.
[0025] The DC voltage controller 52 calculates a converter output current command value based on the DC voltage command value from the DC voltage command generator 51 and the inter-terminal voltage values from the DC voltage detectors 24 and 25, and outputs the calculation result to the current controller 53. Specifically, the DC voltage controller 52 calculates the converter output current command value so that the sum of the DC voltage detection values input from the DC voltage detectors 24 and 25 matches the DC voltage command value.
[0026] The current controller 53 receives the converter output current command value from the DC voltage controller 52 and the current detection value I detected by the current detectors 26, 27, and 28. R ,I S ,I T The current controller 53 calculates a converter voltage command value so that the current detection values corresponding to the converter output current output from the current detectors 26, 27, and 28 coincide with the converter output current command value input from the DC voltage controller 52, and outputs the converter voltage command value to the pulse generator 54.
[0027] Pulse generator 54 generates pulse signals for controlling the on / off of each switching element of converter power conversion units 21R, 21S, and 21T based on the input converter voltage command value, and outputs the generated pulse signals to converter power conversion unit 21. Specifically, pulse generator 54 generates pulse signals for on / off control so that the output voltages of converter power conversion units 21R, 21S, and 21T coincide with the converter output voltage command value input from current controller 53.
[0028] As described above, the converter control device 5 performs the various calculation processes described above so that the DC power converted from the AC power in the converter unit 2 has a desired value, and outputs signals to control the converter power conversion sections 21R, 21S, and 21T.
[0029] Inverter control device 6 1, the inverter control device 6 is configured to include a speed command generator 61, a speed controller 62, a current controller 63, and a pulse generator 64. The speed command generator 61 outputs a speed command value indicating the speed at which the electric motor 4 is to be operated to the speed controller 62. The speed command value from the speed command generator 61 and the speed detection value of the electric motor 4 detected by the speed detector 7 are input to the speed controller 62.
[0030] The speed controller 62 calculates an inverter output current command value so that the speed detection value input from the speed detector 7 provided in association with the electric motor 4 coincides with the speed command value input from the speed command generator 61, and outputs the inverter output current command value to the current controller 63. The current controller 63 receives the inverter output current detection values (current detection values I U ,I V ,I W ) and the inverter output current command value from the speed controller 62. The current controller 63 receives the inverter output current detection value (current detection value I U ,I V ,I W) coincides with the inverter output current command value, and outputs the inverter voltage command value to the pulse generator 64.
[0031] Pulse generator 64 generates a pulse signal for controlling the on / off of each switching element of inverter power conversion units 31U, 31V, and 31W based on the input inverter output voltage command value. Specifically, pulse generator 64 generates a pulse signal for on / off control so that the output voltage from inverter power conversion unit 31 coincides with the inverter output voltage command value input from current controller 63.
[0032] As described above, the inverter control device 6 controls the inverter power conversion sections 31U, 31V, 31W in the inverter unit 3 so that the output torque and speed of the electric motor 4 satisfy desired characteristics.
[0033] <Configuration Related to Abnormality Determination in Power Conversion Device 100> 1, the power conversion device 100 includes, as components related to abnormality determination, a converter-side abnormality determiner 71, an inverter-side abnormality determiner 72, and a display 73. The display 73 receives an output signal from the converter-side abnormality determiner 71 and an output signal from the inverter-side abnormality determiner 72.
[0034] Although detailed description will be given later, the converter side abnormality determiner 71 detects the current detection value I R ,I S ,I T Based on the detected current values I input from the current detectors 34, 35, and 36 for the three-phase AC currents of the U, V, and W phases, the inverter-side abnormality determiner 72 determines whether or not there is an abnormality in the current detectors 26, 27, and 28. U ,I V ,I WBased on the results, it is determined whether or not there is an abnormality in the current detectors 34, 35, and 36. The processing of the converter-side abnormality determiner 71 and the inverter-side abnormality determiner 72 is implemented by, for example, a processor (not shown) executing a program stored in a memory.
[0035] The display 73 is configured with a display device capable of displaying information, such as a liquid crystal display, and displays the determination information of the converter-side abnormality determiner 71 and the inverter-side abnormality determiner 72, as well as various other information.
[0036] <Converter-side abnormality judgement device 71> 4 is a block diagram showing the details of converter-side abnormality determiner 71. Converter-side abnormality determiner 71 includes adder 711, multipliers 712R, 712S, and 712T, filters 713R, 713S, and 713T, multipliers 714R, 714S, and 714T, adder 715, filter 716, multipliers 714CR, 714CS, and 714CT, adder 715C, filter 716C, and abnormality determination unit 717.
[0037] The current detection value I detected by the R-phase current detector 26 R is input to the adder 711 and the multipliers 712R, 714R, 714CT, and 714CS. The current detection value I S is input to the adder 711, the multiplier 712S, and the multipliers 714S, 714CT, and 714CR. The current detection value I T are input to adder 711, multiplier 712T, and multipliers 714T, 714CR, and 714CS, respectively.
[0038] The adder 711 calculates the current detection value I R ,I S ,I T Sum of I C0 (=I R +I S +I T ) is calculated. The calculated sum I C0is input to each of the multipliers 712R, 712S, and 712T. The multiplier 712R multiplies the detected current value I R and Sum I C0 Product D R The multiplier 712S calculates the detected current value I S and Sum I C0 Product D S The multiplier 712T calculates the detected current value I T and Sum I C0 Product D T The product D output from the multipliers 712R, 712S, and 712T is calculated. R ,D S ,D T are input to the filters 713R, 713S, and 713T of the corresponding phases. R Reduce or remove high frequency components from F R The filters 713R, 713S, 713T, 716, and 716C in the abnormality determination unit 717 reduce or remove high frequency components contained in the input signal, but hereinafter this will simply be referred to as "removing." The filter 713S reduces or removes the product D S Remove high frequency components from F S The filter 713T outputs the product D T Remove high frequency components from F T The F output from the filters 713R, 713S, and 713T is R ,F S ,F T is input to the abnormality determination unit 717.
[0039] The first and second input terminals of the multiplier 714R are connected to the current detection value I R are input, and the product of these inputs, i.e., the current detection value I R Squared I R 2 is output from the multiplier 714R. The first and second input terminals of the multiplier 714S receive the current detection value I S are input, and the product of these inputs, i.e., the current detection value I S Squared I S 2is output from the multiplier 714S. The first and second input terminals of the multiplier 714T receive the current detection value I T are input, and the product of these inputs, i.e., the current detection value I T Squared I T 2 is output from the multiplier 714T. The squared I output from the multipliers 714R, 714S, and 714T is R 2 ,I S 2 ,I T 2 is input to adder 715. Adder 715 adds three squares I R 2 ,I S 2 ,I T 2 The sum of (I R 2 +I S 2 +I T 2 ) is output from the adder 715. R 2 +I S 2 +I T 2 ) is input to filter 716. Filter 716 converts the sum (I R 2 +I S 2 +I T 2 ) and remove the high frequency components from the sum (I R 2 +I S 2 +I T 2 ) is the DC component of H C is output to the abnormality determination unit 717.
[0040] Current detection value I R ,I S The multiplier 714CT receives the inputs I R I S The detected current value I S ,I T The multiplier 714CR receives the inputs I S IT The detected current value I T ,I R The multiplier 714CS receives the inputs I T I R The product I output from the multipliers 714CR, 714CS, and 714CT is S I T ,I T I R ,I R I S are input to adder 715C. Adder 715C adds the three products I S I T ,I T I R ,I R I S The sum of (I S I T +I T I R +I R I S ) is output from the adder 715C. S I T +I T I R +I R I S ) is input to filter 716C. Filter 716C converts the sum (I S I T +I T I R +I R I S ) and remove the high frequency components from the sum (I S I T +I T I R +I R I S ) is the DC component of C is output to the abnormality determination unit 717.
[0041] The abnormality determination unit 717 determines whether the input F R ,F S ,F T ,H C ,K C Based on this, it is determined whether or not there is an abnormality in the current detectors 26, 27, 28. Details of the comprehensive determination of abnormality in the abnormality determining unit 717 will be described later.
[0042] <Inverter side abnormality judgement device 72> 5 is a block diagram showing the details of the inverter-side abnormality determiner 72. The inverter-side abnormality determiner 72 includes an adder 721, multipliers 722U, 722V, and 722W, filters 723U, 723V, and 723W, multipliers 724U, 724V, and 724W, an adder 725, a filter 726, multipliers 724CU, 724CV, and 724CW, an adder 725C, a filter 726C, and an abnormality determination unit 727.
[0043] The current detection value I detected by the U-phase current detector 34 U is input to the adder 721 and the multipliers 722U, 724U, 724CV, and 724CW. The current detection value I V is input to the adder 721 and the multipliers 722V, 724V, 724CW, and 724CU. The current detection value I W are input to the adder 721 and the multipliers 722W, 724W, 724CU, and 724CV, respectively.
[0044] The adder 721 calculates the current detection value I U ,I V ,I W Sum of I I0 (=I U +I V +I W ) is calculated. The calculated sum I I0 is input to each of the multipliers 722U, 722V, and 722W. The multiplier 722U multiplies the current detection value I U and Sum I I0 Product D U The multiplier 722V calculates the current detection value I V and Sum I I0 Product D V The multiplier 722W calculates the detected current value I W and Sum I I0 Product D W The product D output from the multipliers 722U, 722V, and 722W is calculated. U ,D V ,DW are input to the filters 723U, 723V, and 723W of the corresponding phases, respectively.
[0045] The filter 723U is a product D U Reduce or remove high frequency components from F U The filters 723U, 723V, 723W, 726, and 726C in the abnormality determination unit 727 reduce or remove high frequency components contained in the input signal, but hereinafter this will simply be referred to as "removing." The filter 723V reduces or removes the product D V Remove high frequency components from F V The filter 723W outputs the product D W Remove high frequency components from F W The F output from the filters 723U, 723V, and 723W is U ,F V ,F W is input to the abnormality determination unit 727.
[0046] The first and second input terminals of the multiplier 724U are connected to the current detection value I U are input, and the product of these inputs, i.e., the current detection value I U Squared I U 2 is output from the multiplier 724U. The first and second input terminals of the multiplier 724V are respectively supplied with the current detection value I V are input, and the product of these inputs, i.e., the current detection value I V Squared I V 2 is output from the multiplier 724V. The first and second input terminals of the multiplier 724W are respectively supplied with the current detection value I W are input, and the product of these inputs, i.e., the current detection value I W Squared I W 2 is output from the multiplier 724W. The squared I output from the multipliers 724U, 724V, and 724W is U 2 ,I V 2 ,I W 2are input to an adder 725. The adder 725 adds three squares I U 2 ,I V 2 ,I W 2 The sum of (I U 2 +I V 2 +I W 2 ) is output from the adder 725. U 2 +I V 2 +I W 2 ) is input to filter 726. Filter 726 converts the sum (I U 2 +I V 2 +I W 2 ) and remove the high frequency components from the sum (I U 2 +I V 2 +I W 2 ) is the DC component of H I is output to the abnormality determination unit 727.
[0047] Current detection value I U ,I V The multiplier 724CW, which receives the inputs I U I V The detected current value I V ,I W The multiplier 724CU, which receives inputs I V I W The detected current value I W ,I U The multiplier 724CV, which receives the inputs I W I U The product I output from the multipliers 724CU, 724CV, and 724CW is V I W ,I W I U ,I U I Vare input to adder 725C. Adder 725C adds the three products I V I W ,I W I U ,I U I V The sum of (I V I W +I W I U +I U I V ) is output from the adder 725C. V I W +I W I U +I U I V ) is input to filter 726C. Filter 726C outputs the sum (I U I V +I V I W +I W I U ) and remove the high frequency components from the sum (I U I V +I V I W +I W I U ) is the DC component of I is output to the abnormality determination unit 727.
[0048] The abnormality determination unit 727 determines whether the input F U ,F V ,F W ,H I ,K I Based on this, it is determined whether or not there is an abnormality in the current detectors 34, 35, and 36. Details of the abnormality determination in the abnormality determination unit 727 will be described later.
[0049] <Detailed Description of Each Process in the Abnormality Decision Units 71 and 72> The processing of each component in the converter-side abnormality judger 71 and the inverter-side abnormality judger 72 shown in Figures 4 and 5 will be described in more detail. R ,I S ,I T and the true value of the current I RT ,IST ,I TT The relationship between these can be expressed by the following equations (1) to (3). R , G S , G T represents the detection gain in the current detectors 26, 27, and 28. I R =I RT ×G R …(1) I S =I ST ×G S …(2) I T =I TT ×G T …(3)
[0050] Similarly, the current detection value I of the current detectors 34, 35, and 36 on the inverter side U ,I V ,I W and the true value of the current I UT ,I VT ,I WT The relationship between these can be expressed by the following equations (4) to (6). U ,G V ,G W represents the detection gain in the current detectors 34, 35, and 36. I U =I UT ×G U …(4) I V =I VT ×G V …(5) I W =I WT ×G W …(6)
[0051] In addition, the true value of the current actually flowing, I RT ,I ST ,I TT and I UT ,I VT ,I WT Regarding this, the following equations (7) and (8) hold true according to Kirchhoff's current law. I RT +I ST +I TT =0 …(7) IUT +I VT +I WT =0 …(8)
[0052] <<Explanation of various quantities related to current detectors 34, 35, and 36>> First, before describing the operation of the inverter-side abnormality determiner 72 to determine abnormality, various quantities relating to abnormalities in the current detectors 34, 35, and 36 will be described. 4 and the inverter-side abnormality judger 72 shown in Fig. 5 have similar configurations, so the inverter-side abnormality judger 72 will be used as a representative in the following detailed description of the processes in the abnormality judgers 71 and 72. Note that, although not explained here, the relational expressions related to the converter-side abnormality judger 71 can also be similarly explained by replacing the subscripts U, V, and W with R, S, and T in the relational expressions related to the inverter-side abnormality judger 72 described below.
[0053] Current true value I of U phase, V phase, and W phase UT ,I VT ,I WT For example, if the waveform of the true current is a sine wave and the amplitude of the true current is I IA When the phase difference between the sinusoidal waveforms of the true current values of the phases is 2π / 3 (radians), it is expressed by the following equations (9) to (11). I UT =I IA ×cos(ωt) …(9) I VT =I IA ×cos(ωt-2π / 3) …(10) I WT =I IA ×cos(ωt-4π / 3) …(11) However, I IA is the current amplitude as mentioned above, t is time, and ω=2πf is the angular frequency (f is frequency).
[0054] Furthermore, from equations (4) to (6) and equations (9) to (11), the current detection values I U ,I V ,I Wis expressed by equations (12) to (14). I U =G U I IA ×cos(ωt) …(12) I V =G V I IA ×cos(ωt-2π / 3) …(13) I W =G W I IA ×cos(ωt-4π / 3) …(14)
[0055] When all of the current detectors 34, 35, and 36 are normal, the detection gain G U ,G V ,G W The value of is 1, and the detected values I of the current detectors 34, 35, and 36 U ,I V ,I W and the true value I UT ,I VT ,I WT On the other hand, when the current detectors 34, 35, and 36 are abnormal (for example, when a detection gain abnormality occurs), the detected value I U ,I V ,I W and the true value I UT ,I VT ,I WT and the detection gain G U ,G V ,G W The value of is other than 1 (for example, 0.9 or 1.1). Whether the current detectors 34, 35, and 36 are normal or abnormal depends on the detection gain G U ,G V ,G W It can be determined by the value of
[0056] (Absolute abnormality level A U ,A V ,A W (Introduction of Here, the absolute abnormality degree A is used as information indicating the absolute abnormality degree of the current detectors 34, 35, and 36. U ,A V ,A W Introduce. [Definition] Absolute abnormality level A U ,A V ,A W is the detection gain G U ,G V ,G W are defined so that the following equations (15) to (17) hold. G U =1+A U …(15) G V =1+A V …(16) G W =1+A W …(17)
[0057] Absolute abnormality level A U ,A V ,A W If is 0, the corresponding detection gain G U ,G V ,G W is 1, which indicates that the current detectors 34, 35, and 36 are normal. On the other hand, the absolute abnormality degree A U ,A V ,A W If is a value other than 0, the corresponding detection gain G U ,G V ,G W becomes a value other than 1, which indicates that the current detectors 34, 35, and 36 are abnormal. U ,A V ,A W is information that indicates the degree of abnormality, with the further away from 0 these values are, the greater the impact of the abnormality.
[0058] Absolute abnormality level A U ,A V ,A W Using the above equations (12) to (14), the current detection value I U ,I V ,I W is expressed by the following equations (18) to (20). I U =(1+A U )×I IA ×cos(ωt) …(18) I V=(1+A V )×I IA ×cos(ωt-2π / 3) …(19) I W =(1+A W )×I IA ×cos(ωt-4π / 3) …(20)
[0059] Here, if the U-phase current detector 34, the V-phase current detector 35, and the W-phase current detector 36 are all normal, G U =G V =G W =1, the following equation (21) holds. G U +G V +G W =3 …(21) On the other hand, if one of the U-phase current detector 34, the V-phase current detector 35, and the W-phase current detector 36 is abnormal, U ≠ 1 and G V =G W =1", "G V ≠ 1 and G U =G W =1" and "G W ≠ 1 and G U =G V = 1", so equation (21) does not hold and G U +G V +G W ≠3. Furthermore, if two or three of the U-phase current detector 34, the V-phase current detector 35, and the W-phase current detector 36 are abnormal, U +G V +G W =3 or G U +G V +G W ≠ 3. Note that G U +G V +G W = 3 is true when the deviations from 1 in the detection gain of the abnormal current detector cancel each other out. If the deviations do not cancel each other out, G U +G V +G W ≠3.
[0060] (Relative detection gain G U0 ,G V0 ,G W0 (Introduction of Here, the relative detection gain G is set so that the sum of the gains is always 3. U0 ,G V0 ,G W0 and variable B I will be newly introduced. [Definition] Relative detection gain G U0 ,G V0 ,G W0 and variable B I is defined as a quantity that is set so that the following equations (22), (23) to (25) hold. G U0 +G V0 +G W0 =3 …(22) I U =G U0 B I ×cos(ωt) …(23) I V =G V0 B I ×cos(ωt-2π / 3) …(24) I W =G W0 B I ×cos(ωt-4π / 3) …(25)
[0061] Comparing equations (23) to (25) and equations (12) to (14), the detection gain G U ,G V ,G W and the relative detection gain G U0 ,G V0 ,G W0 The following equations (26) to (28) hold between G U0 B I =G U I IA …(26) G V0 B I =G V I IA …(27) G W0 B I =G W IIA …(28) From equations (26) to (28) and equation (22), the variable B I is the detection gain G U ,G V ,G W , and the current amplitude I IA Using this, it is expressed by the following equation (29). B I =(G U +G V +G W )×I IA / (G U0 +G V0 +G W0 ) =(G U +G V +G W )×I IA / 3 …(29)
[0062] (Relative anomaly A U0 ,A V0 ,A W0 (Introduction of Here, the relative abnormality degree A of the current detectors 34, 35, and 36 U0 ,A V0 ,A W0 Introduce. [Definition] Relative anomaly level A U0 ,A V0 ,A W0 is defined as a quantity that is set so that the following equations (30) to (32) hold. G U0 =1+A U0 …(30) G V0 =1+A V0 …(31) G W0 =1+A W0 …(32)
[0063] The above relative anomaly level A U0 ,A V0 ,A W0 Using this, the above-mentioned equations (23) to (25) can be expressed by the following equations (33) to (35). I U =(1+A U0 )×BI ×cos(ωt) …(33) I V =(1+A V0 )×B I ×cos(ωt-2π / 3) …(34) I W =(1+A W0 )×B I ×cos(ωt-4π / 3) …(35) Furthermore, from equation (22) and equations (30) to (32), the relative abnormality degree A U0 ,A V0 ,A W0 The following equation (36) holds for the sum of A U0 +A V0 +A W0 =0 …(36) Therefore, the relative anomaly A U0 ,A V0 ,A W0 is the absolute abnormality level A, which indicates the degree of abnormality. U ,A V ,A W is normalized so that equation (36) holds.
[0064] On the other hand, absolute abnormality level A U ,A V ,A W Regarding the current detectors 34, 35, and 36, if all of them are normal (G U =G V =G W =1) is obtained from equations (15) to (17) and (21) as follows: A U +A V +A W = 0, but if one or more of the current detectors 34, 35, and 36 are abnormal, A U +A V +A W =0 or A U +A V +A W ≠0.
[0065] <<Operation of the inverter-side abnormality judger 72>> As mentioned above, the converter-side abnormality judger 71 shown in Fig. 4 and the inverter-side abnormality judger 72 shown in Fig. 5 have similar configurations, so the operation of the inverter-side abnormality judger 72 and the converter-side abnormality judger 71 will be explained using the inverter-side abnormality judger 72 in Fig. 5 as a representative. Note that although the operation of the inverter-side abnormality judger 72 will be explained below, the operation of the converter-side abnormality judger 71 can also be explained in a similar manner by replacing the subscripts U, V, and W with R, S, and T.
[0066] When the currents shown in the above-mentioned equations (9) to (11) are flowing, the respective outputs I I0 ,D U ,D V ,D W ,F U ,F V ,F W ,I U 2 +I V 2 +I W 2 ,H I ,I U I V +I V I W +I W I U and K. I This article explains: First, the sum I output from the adder 721 in FIG. I0 (=I U +I V +I W ) is expressed by the following equation (37). I I0 =I U +I V +I W =B I ×(A U0 ×cos(ωt)+A V0 ×cos(ωt-2π / 3) +A W0 ×cos(ωt-4π / 3)) …(37)
[0067] Output D of multipliers 722U, 722V, 722W U,D V ,D W are expressed by the following equations (38) to (40). In the equations (38) to (40), the symbol √(X) represents X 1 / 2 and so on below. D U =(I U +I V +I W )×I U = 1 / 2 × B I 2 A U0 ×(1+A U0 )×(1+cos(2ωt)) -1 / 4×B I 2 A V0 ×(1+A U0 )×(1+cos(2ωt)-√(3)×sin(2ωt)) -1 / 4×B I 2 A W0 ×(1+A U0 )×(1+cos(2ωt)+√(3)×sin(2ωt)) …(38) D V =(I U +I V +I W )×I V =-1 / 4×B I 2 A U0 ×(1+A V0 )×(1+cos(2ωt)-√(3)×sin(2ωt)) +1 / 2×B I 2 A V0 ×(1+A V0 )×(1+cos(2ωt-4π / 3)) -1 / 4×B I 2 A W0 ×(1+A V0 )×(1-2×cos(2ωt)) …(39) D W =(I U +I V +I W )×I W =-1 / 4×B I 2 A U0 ×(1+A W0 )×(1+cos(2ωt)+√(3)×sin(2ωt)) -1 / 4×B I 2 A V0 ×(1+A W0 )×(1-2×cos(2ωt)) +1 / 2×B I 2 A W0 ×(1+A W0 )×(1+cos(2ωt-8π / 3)) …(40)
[0068] The filters 723U, 723V, and 723W are U , D V , D W A filter is applied to remove the high frequency components contained in the U , D V , D W F, which is the DC component of U ,F V ,F W The output is D expressed by equations (38) to (40). U , D V , D W When a filter process is performed to remove high frequency components, that is, when the periodic changes of the trigonometric functions are removed, the output F of the filters 723U, 723V, and 723W is U ,F V ,F W is expressed by the following equations (41) to (43). F U = 1 / 4 × B I 2 ×(2A U0 -A V0 -A W0 )×(1+A U0 ) …(41) F V = 1 / 4 × B I 2 ×(2A V0 -A W0 -A U0 )×(1+AV0 ) …(42) F W = 1 / 4 × B I 2 ×(2A W0 -A U0 -A V0 )×(1+A W0 ) …(43) Furthermore, by substituting the above-mentioned equation (36) into equations (41) to (43) and rearranging them, the output F of the filters 723U, 723V, and 723W is U ,F V ,F W is expressed by the following equations (44) to (46). F U =3 / 4×B I 2 A U0 ×(1+A U0 ) …(44) F V =3 / 4×B I 2 A V0 ×(1+A V0 ) …(45) F W =3 / 4×B I 2 A W0 ×(1+A W0 ) …(46)
[0069] The output of adder 725 (I U 2 +I V 2 +I W 2 ) is expressed by the following equation (47). I U 2 +I V 2 +I W 2 =B I 2 ×(1+A U0 ) 2 ×(1+cos(2ωt)) / 2 +B I 2 ×(1+A V0 ) 2 ×(1+cos(2ωt-4π / 3)) / 2 +BI 2 ×(1+A W0 ) 2 ×(1+cos(2ωt-8π / 3)) / 2 …(47)
[0070] The filter 726 receives the input I U 2 +I V 2 +I W 2 A filter is applied to remove the high frequency components contained in I U 2 +I V 2 +I W 2 H, which is the DC component of I The output is I expressed by the above equation (47). U 2 +I V 2 +I W 2 When a filter process is performed to remove high frequency components, that is, when the periodic change of the trigonometric function is removed, the output H of the filter 726 of the second system is I is expressed by the following equation (48): Note that the above equation (36) was used in the calculation process. H I =3 / 2×B I 2 +1 / 2×B I 2 ×(A U0 2 +A V0 2 +A W0 2 ) …(48)
[0071] The output of adder 725C (I U I V +I V I W +I W I U ) is expressed by the following equation (49). I U I V +I V I W +I WI U =-1 / 4×B I 2 ×(1+A U0 )×(1+A V0 )×(1+cos(2ωt)-√(3)×sin(2ωt)) -1 / 4×B I 2 ×(1+A V0 )×(1+A W0 )×(1+2×cos(2ωt)) -1 / 4×B I 2 ×(1+A W0 )×(1+A U0 )×(1+cos(2ωt)+√(3)×sin(2ωt)) …(49)
[0072] The filter 726C is configured to filter the input I U I V +I V I W +I W I U A filter is applied to remove the high frequency components contained in I U I V +I V I W +I W I U K is the DC component of I The output is I expressed by the above equation (49). U I V +I V I W +I W I U When a filter process is performed to remove high frequency components, that is, when the periodic change of the trigonometric function is removed, the output K of the filter 726C is I is expressed by the following equation (50): Note that the above equation (36) was used in the calculation process. K I =-3 / 4×B I 2 -1 / 4×B I 2 ×(A U0 A V0 +A V0 A W0 +AW0 A U0 ) …(50)
[0073] 《Processing in Abnormality Judgment Unit 727》 In the abnormality judgment process in the abnormality judgment unit 727 of the inverter-side abnormality judge 72 shown in FIG. 5, the normalized abnormality degree calculation value A described below U0C0 ,A V0C0 ,A W0C0 is used. FIG. 6 is a block diagram for explaining various processes in the abnormality judgment unit 727. The abnormality judgment unit 727 includes arithmetic units 7271 to 7275 that perform arithmetic processes related to U0C0 ,A V0C0 ,A W0C0 A. The abnormality judgment unit 727 calculates the normalized abnormality degree calculation value A U ,F V ,F W ,H I ,K I based on U0C0 ,A V0C0 ,A W0C0 .
[0074] <Arithmetic Unit 7271> The above-mentioned equations (48) related to H I and equations (50) related to K I are rearranged using the above-mentioned equation (36), and the following equations (51) and (52) are obtained. 2×H I =3×B I 2 +2×B I 2 ×(A V0 2 +A W0 2 +A V0 A W0 ) …(51) 8×K I =-6×B I 2 +2×B I 2 ×(A V0 2 +A W02 +A V0 A W0 ) …(52) From equations (51) and (52), the relative anomaly degree A U0 ,A V0 ,A W0 Eliminating this gives the following equation (53). B I 2 =(2H I -8K I ) / 9 …(53) That is, the calculation unit 7271 calculates the DC component H I ,K I From equation (53), B I 2 Calculate.
[0075] <Arithmetic section 7272~7274> By rearranging the above equations (44) to (46), the relative anomaly degree A is obtained as shown in the following equations (54) to (56). U0 ,A V0 ,A W0 We obtain quadratic equations for 3B I 2 A U0 2 +3B I 2 A U0 -4F U =0 …(54) 3B I 2 A V0 2 +3B I 2 A V0 -4F V =0 …(55) 3B I 2 A W0 2 +3B I 2 A W0 -4F W =0 …(56) Apply the quadratic equation formula to each of equations (54) to (56) and the solution obtained is A. U0C ,AV0C ,A W0C Then, A U0C ,A V0C ,A W0C is given by the following equations (57) to (59). A U0C =(-3B I 2 +√(9B I 4 +48B I 2 F U )) / (6B I 2 ) …(57) A V0C =(-3B I 2 +√(9B I 4 +48B I 2 F V )) / (6B I 2 ) …(58) A W0C =(-3B I 2 +√(9B I 4 +48B I 2 F W )) / (6B I 2 ) …(59) A calculated using equations (57) to (59) U0C ,A V0C ,A W0C (Relative anomaly A U0 ,A V0 ,A W0 Here, the calculated value of the degree of anomaly A is referred to as the calculated value of the degree of anomaly. As described above (for example, equations (33) to (35)), it is assumed that the current is a sinusoidal current. Therefore, the calculated value of the degree of anomaly A calculated by equations (57) to (59) is U0C ,A V0C ,A W0C represents the degree of abnormality of the U, V, and W phases in an ideal state without current pulsation.
[0076] In FIG. 6, the calculation unit 7272 calculates the DC component F Uand B calculated by the calculation unit 7271 I 2 Based on this, the abnormality degree calculation value A, which represents the degree of abnormality of the U phase, is calculated using equation (57). U0C The calculation unit 7273 calculates the DC component F V and B I 2 Based on this, the abnormality degree calculation value A, which represents the degree of abnormality of the V phase, is calculated using equation (58). V0C The calculation unit 7274 calculates the DC component F W and B I 2 Based on this, the abnormality degree calculation value A, which represents the degree of abnormality of the W phase, is calculated using equation (59). W0C Calculate.
[0077] In the formula for solving a quadratic equation, the sign immediately before √ can be positive or negative, but in equations (57) to (59) it is positive. For example, if the abnormality level is zero, the right side of equation (57) must be zero. If the abnormality level is zero, F calculated by equation (44) U If the sign immediately before the square root in equation (57) is negative, the numerator (-3B I 2 -√(9B I 4 +48B I 2 F U )) will never be zero.
[0078] <Arithmetic unit 7275> Calculated abnormality value A U0C ,A V0C ,A W0C represents the degree of abnormality of the U, V, and W phases in an ideal state where there is no current pulsation. Therefore, if the current waveform does not contain a pulsating component, the calculated abnormality value A U0C ,A V0C ,A W0C The sum of these is the relative anomaly A U0 ,A V0 ,A W0 In other words, if the current waveform does not contain a pulsating component, A U0C +A V0C +A W0COn the other hand, if the current waveform contains pulsating components, A U0C +A V0C +A W0C >0.
[0079] (Normalized abnormality calculation value A U0C0 ,A V0C0 ,A W0C0 (Introduction of Therefore, the normalized anomaly calculation value A such that the following equation (60) holds true U0C0 ,A V0C0 ,A W0C0 will be newly introduced. [Definition] Normalized anomaly calculation value A U0C0 ,A V0C0 ,A W0C0 is defined as a quantity that is set so that the following equations (60) to (63) hold. A U0C0 +A V0C0 +A W0C0 =0 …(60) A U0C0 =A U0C -(A U0C +A V0C +A W0C ) / 3 …(61) A V0C0 =A V0C -(A U0C +A V0C +A W0C ) / 3 …(62) A W0C0 =A W0C -(A U0C +A V0C +A W0C ) / 3 …(63)
[0080] The second term on the right side of each of equations (61) to (63) is the calculated anomaly value A to satisfy equation (60). U0C ,A V0C ,A W0C This can be considered as a correction term for the current waveform, which contains pulsating components. U0C +A V0C +A W0C Even if the normalized anomaly calculation value A U0C0 ,A V0C0 ,AW0C0 If so, A U0C0 +A V0C0 +A W0C0 =0 is true.
[0081] The calculation unit 7275 in FIG. 6 calculates the abnormality degree calculation value A calculated by the calculation units 7272 to 7274. U0C ,A V0C ,A W0C Based on this, the normalized anomaly calculation value A U0C0 ,A V0C0 ,A W0C0 Calculate.
[0082] If the current flowing through the current detector has a variable frequency due to, for example, a variable operating frequency of the motor 4, it is desirable that the inverter-side abnormality judger 72 varies the time constant (or cutoff frequency) of the filter used in Fig. 5 according to the operating frequency so that the AC component contained in the filter input can be largely removed even when the operating frequency of the motor 4 is low. Although not shown in Fig. 1, a speed command is input from the speed command generator 61 to the inverter-side abnormality judger 72 as information on the operating frequency (speed information). Furthermore, instead of the speed command, the speed detection value of the motor 4 detected by the speed detector 7 may be used. Alternatively, the time constant of the filter may be set in advance so as to significantly reduce the AC component contained in the filter input even during low-speed operation. Furthermore, when the operating frequency of the electric motor 4 is extremely low, the time constant of the filter becomes extremely large. Therefore, when the operating frequency of the electric motor 4 is low, the abnormality determination described below may not be performed.
[0083] <Abnormality Determination Processing in Abnormality Determination Unit 727> Fig. 7 is a flowchart showing an example of the abnormality determination process in the abnormality determination unit 727 of Fig. 6. The procedure of the abnormality determination process will be described below with reference to the flowchart of Fig. 7.
[0084] Step S101 When the abnormality determination process is started in the abnormality determination unit 727, the process proceeds to step S101. In step S101, the abnormality determination unit 727 determines the current detection value I U ,I V ,I W The abnormality determination unit 727 determines whether all of the detected current values I U ,I V ,I W If it is determined that all of the detected current values I are zero (Yes), the process proceeds to step S102. U ,I V ,I W If at least one of these is not zero (No), the process proceeds from step S101 to step S103.
[0085] Step S102 When the process proceeds from step S101 to step S102, it is determined in step S102 that there is an abnormality in inverter power conversion units 31U, 31V, and 31W. Then, abnormality determination unit 727 outputs a command to display unit 73 to cause display unit 73 to display information indicating that there is an abnormality in inverter power conversion units 31U, 31V, and 31W (for example, a display saying "power conversion unit abnormality"). When the process of step S102 is completed, the process proceeds to step S115. The process of step S115 will be described later.
[0086] <Step S103> In step S103, the abnormality determination unit 727 determines the current detection value I output from the current detectors 34, 35, and 36. U ,I V ,I W In step S103, it is determined whether any of the current detection values I U ,I V ,I W If it is determined that either of the current detection values I is continuously zero (Yes), the process proceeds to step S104. U ,I V ,I WIf it is determined that none of the values are continuously zero (No), the process proceeds to step S105.
[0087] Step S104 If the determination in step S103 is Yes, it is considered that an abnormality, such as a break or looseness, has occurred in the current detection loop (wiring for current detection) for detecting current used by the current detectors 34, 35, and 36. If the process proceeds from step S103 to step S104, a command to display information indicating that there is an abnormality in the current detection loop (for example, a message saying "Current detection loop abnormality") is output to the display 73 in step S104. Once the process of step S104 is completed, the process proceeds to step S115. The process of step S115 will be described later.
[0088] Step S105 In step S105, the abnormality determination unit 727 performs the calculation process by the above-mentioned calculation units 7271 to 7275 to obtain the normalized abnormality degree calculation value A U0C0 ,A V0C0 ,A W0C0 Calculate.
[0089] Step S106 Step S106 is a step for determining whether or not all of the current detectors 34 to 36 are normal. The abnormality determination unit 727 determines the calculated normalized abnormality degree A U0C0 ,A V0C0 ,A W0C0 Regarding |A U0C0 |,|A V0C0 |,|A W0C0 It is determined whether the maximum value among | is greater than a predetermined value α (for example, 3%, which will be described later). In other words, it is determined whether equation (64) holds. Note that MAX(a, b, c) represents the maximum value among the values a, b, and c. MAX(|A U0C0 |,|A V0C0 |,|A W0C0 |) > Predetermined value α …(64)
[0090] If it is determined in step S106 that the formula (64) is true (Yes), the process proceeds from step S106 to step S107. On the other hand, if it is determined in step S106 that the formula (64) is not true (No), that is, |A U0C0 |,|A V0C0 |,|A W0C0 If all of | are equal to or smaller than the predetermined value α, the process proceeds from step S106 to step S116. The process of step S116 will be described later.
[0091] Step S107 In step S107, the abnormality determination unit 727 determines whether the following equation (65) is satisfied: U0C0 |,|A V0C0 |,|A W0C0 |), and [MIN] is MIN(|A U0C0 |,|A V0C0 |,|A W0C0 |). Note that MIN(a, b, c) represents the smallest one of the values a, b, and c. The predetermined value β is a preset value (for example, 50%, which will be described later). ([MAX]-2×[MIN]) / [MAX] > Predetermined value β …(65) If it is determined in step S107 that equation (65) is true (Yes), the process proceeds from step S107 to step S108. On the other hand, if it is determined that equation (65) is not true (No), the process proceeds from step S107 to step S109. Note that, as will be described in detail later, equation (65) is an equation for determining whether or not two or more of the three current detectors 34 to 36 are abnormal; if equation (65) is not true (No), it is determined that only one is abnormal, and if equation (65) is true (Yes), it is determined that two or three are abnormal.
[0092] The above-mentioned predetermined values α and β may be either constant or variable. For example, in principle, when the current is 0, the degree of abnormality of the current detector becomes invisible, making it difficult to diagnose the abnormality. In order to avoid erroneous judgment when the current value is small, the detected current value I U ,I V ,I WThe predetermined values α and β may be made variable depending on the magnitude of the
[0093] Step S108 In step S108, the abnormality determination unit 727 determines that two or more of the current detectors 34, 35, and 36 are abnormal, and outputs a command to the display unit 73 to display information indicating that two or more current detectors are abnormal (for example, a message saying "Multiple current detectors abnormal") on the display unit 73. When the processing of step S108 is completed, the process proceeds to step S115.
[0094] In addition, if the average value of the abnormality degrees of the multiple current detectors 34, 35, and 36 is 0, that is, the relative abnormality degree A U0 ,A V0 ,A W0 The average value of the calculated values is 0 (i.e., (A U0C +A V0C +A W0C ) / 3=0), then, from equations (61) to (63), A U0C0 =A U0C , A V0C0 =A V0C , A W0C0 =A W0C Therefore, the estimated value of the degree of anomaly A U1 ,A V1 ,A W1 is the calculated normalized anomaly value A U0C0 ,A V0C0 ,A W0C0 Using A U1 =A U0C0 ,A V1 =A V0C0 ,A W1 =A W0C0 It can be expressed as follows.
[0095] <Step S109> In step S109, the abnormality determination unit 727 calculates MAX(|A U0C0 |,|A V0C0 |,|A W0C0 |) is |A U0C0 In other words, it is determined whether or not the formula (66) holds. MAX(|A U0C0 |,|AV0C0 |,|A W0C0 |)=|A U0C0 | ...(66) If it is determined in step S109 that equation (66) holds (Yes), the process proceeds from step S109 to step S110. On the other hand, if it is determined that equation (66) does not hold (No), the process proceeds from step S109 to step S111.
[0096] <Step S110> In step S110, the abnormality determination unit 727 determines that the U-phase current detector 34 is abnormal, and outputs a command to the display unit 73 to cause the display unit 73 to display information indicating that the U-phase current detector 34 is abnormal (for example, a message saying "U-phase current detector abnormal") When the processing of step S110 is completed, the process proceeds to step S115. The estimated value A of the degree of abnormality of the V-phase current detector 35 and the W-phase current detector 36 V1 ,A W1 A V1 =A W1 = 0, the estimated value A of the degree of abnormality of the U-phase current detector 34 U1 can be calculated using the following equation (67). A U1 =(3×A U0C0 ) / (2-A U0C0 ) …(67)
[0097] Equation (67) can be estimated, for example, as follows: Equation (67a) is obtained from the above-mentioned equations (26) and (29). G U =G U0 ×(G U +G V +G W ) / 3 …(67a) Equation (67a) expresses the absolute anomaly A U ,A V ,A W and relative anomaly A U0 When expressed using the formula, the following formula (67b) is obtained. 1+A U =(1+A U0 )×(A U +A V +AW +3) / 3 …(67b) A V =A W = 0, the following equation (67c) is obtained: 1+A U =(1+A U0 )×(A U +3) / 3 A U =(3×A U0 ) / (2-A U0 ) …(67c) The relative anomaly A on the right side of equation (67c) U0 Instead of the normalized anomaly calculation value A U0C0 The abnormality level A is U If we assume that the estimated value of is , we obtain the above equation (67).
[0098] Note that the equation (65) in step S107 is composed of three elements (A U0C0 ,A V0C0 ,A W0C0 ) can be classified into two elements with high similarity and one element with low similarity to those two elements. Equation (65) is an example of a determination method, and instead of using equation (65), a similar determination may be made using, for example, any clustering analysis method.
[0099] Step S111 In step S111, the abnormality determination unit 727 determines whether |A U0C0 |,|A V0C0 |,|A W0C0 The largest of | is |A V0C0 |, that is, whether or not the formula (68) holds. MAX(|A U0C0 |,|A V0C0 |,|A W0C0 |)=|A V0C0 | ...(68) If it is determined in step S111 that equation (68) holds (Yes), the process proceeds from step S111 to step S112. On the other hand, if it is determined that equation (68) does not hold (No), the process proceeds from step S111 to step S113.
[0100] <Step S112> In step S112, the abnormality determination unit 727 determines that there is an abnormality in the V-phase current detector 35, and outputs a command to the display unit 73 to cause the display unit 73 to display information indicating that there is an abnormality in the V-phase current detector 35 (for example, a message saying "V-phase current detector abnormal") When the processing of step S112 is completed, the process proceeds to step S115. The estimated value A of the degree of abnormality of the U-phase current detector 34 and the W-phase current detector 36 U1 ,A W1 A U1 =A W1 = 0, the estimated value A of the degree of abnormality of the V-phase current detector 35 V1 can be calculated using the following equation (69): Equation (69) can be obtained in the same manner as in the case of equation (67) above. A V1 =(3×A V0C0 ) / (2-A V0C0 ) …(69)
[0101] <Step S113> In step S113, the abnormality determination unit 727 determines whether |A U0C0 |,|A V0C0 |,|A W0C0 The largest of | is |A W0C0 It is determined whether |, that is, whether the formula (70) holds. MAX(|A U0C0 |,|A V0C0 |,|A W0C0 |)=|A W0C0 | ...(70) If it is determined in step S113 that the formula (70) is true (Yes), the process proceeds from step S113 to step S114. On the other hand, if it is determined that the formula (70) is not true (No), the process proceeds from step S113 to step S116.
[0102] <Step S114> In step S114, the abnormality determination unit 727 determines that the W-phase current detector 36 is abnormal, and outputs a command to the display 73 to display information indicating that the W-phase current detector 36 is abnormal (for example, "W-phase current detector abnormal") on the display 73. When the processing of step S114 is completed, the process proceeds to step S115. The estimated value A of the degree of abnormality of the U-phase current detector 34 and the V-phase current detector 35 U1 ,A V1 A U1 =A V1 = 0, the estimated value A of the degree of abnormality of the W-phase current detector 36 W1 is expressed by the following equation (71): Equation (71) is obtained in the same manner as in the case of equation (67) above. A W1 =(3×A W0C0 ) / (2-A W0C0 ) …(71)
[0103] Step S115 In step S115, the next process is executed following steps S102, S104, S108, S110, S112, and S114. In step S115, the abnormality determination unit 727 outputs a command to the display unit 73 to cause the display unit 73 to display information urging the user to inspect (for example, a message saying "Please inspect and replace the abnormal part"). Then, the series of abnormality determination processes ends.
[0104] Step S116 In step S116, the abnormality determination unit 727 determines that all of the current detectors, U-phase current detector 34, V-phase current detector 35, and W-phase current detector 36, are normal. In this case, it is not necessary to display on the display 73 that all of the current detectors 34 to 36 are normal, but it may of course be displayed. Then, the series of abnormality determination processes ends.
[0105] <<Supplementary explanation of the flowchart process>> Here, a supplementary explanation will be added regarding the determination process in the flowchart (steps S106, S107, S109, S111, and S113). <Step S106> Specific examples of the process in step S106 will be described with reference to Examples 1 to 13 shown in FIGS. 8 and 9. First, calculation results for the case where one current detector is abnormal will be described using Examples 1 to 3. In Example 1 of FIG. 8, G U =0.94,G V =1,G W = 1, and only the U-phase current detector 34 is abnormal. In this case, the normalized abnormality degree calculation value A U0C0 ,A V0C0 ,A W0C0 As, A U0C0 =-4.08%,A V0C0 =2.04%,A W0C0 =2.04% is output. Therefore, the MAX(|A U0C0 |,|A V0C0 |,|A W0C0 |) is 4.08%. Similarly, in Examples 2 and 3 of FIG. 8, the left side of equation (64) is 10.53%. In this way, as the degree of abnormality of the current detector increases, the left side of equation (64) becomes a large value. Note that in Example 3, G U and G W But it's not exactly 100%.
[0106] Next, the case where there are two abnormal current detectors will be explained using Examples 4 to 9. Examples 4 and 5 are U <100% and G W >100% and (G U +G W ) / 2=100% abnormality. Comparing Example 4 and Example 5, it can be seen that the greater the abnormality of the current detector, the larger the value of the left side of equation (64). Also, in Examples 6 and 7, G U <100% and G W >100% and (G U +G W ) / 2<100%. Comparing Example 6 and Example 7, the greater the degree of abnormality of the current detector, the larger the value of the left side of Equation (64). Also, in Examples 8 and 9, U <100% and G W<100% abnormality. In this case as well, it can be seen that the greater the degree of abnormality of the current detector, the larger the value of the left side of equation (64) becomes.
[0107] Next, the case where three current detectors are abnormal will be described using Examples 10 and 11 in FIG. 9. Examples 10 and 11 are U <100% and G V >100% and G W >100% abnormality. Comparing Example 10 and Example 11, Example 11, in which the degree of abnormality of the current detector is greater, has a larger value on the left side of equation (64).
[0108] Finally, the case where there are no abnormal current detectors will be described using Examples 12 and 13 in FIG. 9. In Example 12, G U =1,G V =1,G W =1, and the value of the left side of equation (64) is 0. On the other hand, in Example 13 where there is an individual difference between normal current detectors 34 and 36, the value of the left side of equation (64) is 0.1%, which is slightly larger than 0.
[0109] As described above, if there are zero abnormal current detectors, the left side of equation (64) will be 0 or close to 0, and if there are one or more abnormal current detectors, the left side of equation (64) will be greater than 0. Furthermore, if there are one or more abnormal current detectors, the greater the degree of abnormality of the current detectors, the greater the value of the left side of equation (64). Therefore, in step S106, MAX(|A U0C0 |,|A V0C0 |,|A W0C0 |) with a predetermined value (a suitable threshold value, for example, 3% in the above case), it is possible to determine whether or not there is an abnormality in the current detector.
[0110] <Step S107> As mentioned above, the equation (65) in step S107 is composed of three elements (A U0C0 ,A V0C0 ,A W0C0) can be classified into two elements with high similarity and one element with low similarity to those two elements. The reason why equation (65) was used as the judgment formula will be explained below using specific numerical values (Examples 1 to 11 shown in FIGS. 8 and 9). The determination formula in step S107 is rewritten as follows: ([MAX]-2×[MIN]) / [MAX] > Predetermined value β …(65) where [MAX]=MAX(|A U0C0 |,|A V0C0 |,|A W0C0 |), [MIN]=MIN(|A U0C0 |,|A V0C0 |,|A W0C0 |).
[0111] First, the case where there is one abnormal current detector will be described using Examples 1 to 3. U0C0 ,A V0C0 ,A W0C0 is expressed as "A U0C0 +A V0C0 +A W0C0 = 0" is true. Therefore, in the case of Example 1, A U0C0 =-2×A V0C0 =-2×A W0C0 and the left side of equation (65) becomes 0. Similarly, in Example 2, the left side of equation (65) becomes 0.
[0112] In either case, |A U0C0 |,|A V0C0 |,|A W0C0The magnitude of the | value is (abnormal, normal, normal) = (large, small, small), and "large = 2 × small" holds. In this case, the quantity "(large - 2 × small) / large" (i.e., the left side of equation (65)) is 0. Also, in Example 3, where there is individual variation in normal current detectors, (normal, normal, abnormal) = (5.16%, 5.37%, 10.35%) = (small, small', large), and "large ≒ 2 × small." In this case, the quantity "(large - 2 × small) / large" is not 0, but is a value very small compared to 100%. In Example 3, (10.53% - 2 × 5.16%) / 10.53% ≒ 0.020, which is 2%. To summarize the above, if there is one abnormal current detector, the quantity "(large - 2 × small) / large" (i.e., the left side of equation (65)) will be 0% or a value that is very small compared to 100%.
[0113] The case where two current detectors are abnormal will be explained using Examples 4 to 9. Examples 4 and 5 are U <100% and G W >100% and (G U +G W ) / 2=100% abnormality. In examples 4 and 5, the value of the left side of equation (65) is 100%. In examples 6 and 7, G U <100% and G W >100% and (G U +G W ) / 2<100% abnormality, and the value of the left side of equation (65) is 75%.
[0114] In all of Examples 4 to 7, |A U0C0 |,|A V0C0 |,|A W0C0 The value of | is (abnormal, normal, abnormal') = (large, small, large or large'). Furthermore, in the cases of examples 4 and 5, small = |A V0C0 |=0, large=|A U0C0 |=|A W0C0 |, and the quantity "(large - 2 × small) / large", that is, the left side of equation (65) is 100%. Also, in the case of examples 6 and 7, "large = |A U0C0 |”, “small=|A W0C0|', and a magnitude relationship such as 'large > (5 × small)' holds. Here, if 'large > (5 × small)', that is, 'small < (large / 5)', then the following formula holds. (Large-2×Small)>(Large-2×(Large / 5))=(3 / 5)×Large In this case, "(large - 2 × small) / large", that is, the left side of equation (65), becomes a value greater than 3 / 5 (= 60%).
[0115] In addition, in Examples 8 and 9, the current detectors 34 and 36 are abnormal, and G U <100% and G W <100% and G U =G W In this case, the value of the left side of equation (65) is 0. In this case, |A U0C0 |,|A V0C0 |,|A W0C0 The value of | is (abnormal, normal, abnormal) = (small, large, small), and "large = (2 × small)." As a result, as in Examples 1 and 2 above, the quantity "(large - 2 × small) / large" (i.e., the left side of equation (65)) becomes 0%. To summarize the above, when there are two abnormal current detectors, the quantity “(large – 2 × small) / large” (i.e., the left side of equation (65)) will be greater than 60% except for examples 8 and 9.
[0116] The case where three current detectors are abnormal will be explained using Examples 10 and 11. Examples 10 and 11 are U <100% and G V >100% and G W >100% abnormality, and the left side of equation (65) is 33.3%. In this case, |A U0C0 |,|A V0C0 |,|A W0C0 The values of | are large, medium, and small, with large = (3 × small). In this case, the quantity "(large - 2 × small) / large", that is, the left side of equation (65), becomes "(3 × small - 2 × small) / 3 × small = 33.3%".
[0117] As a result, in Examples 4 to 7, 10, and 11, where two or more current detectors are abnormal, the quantity "(large - 2 × small) / large = ([MAX] - 2 × [MIN]) / [MAX]," i.e., the left side of equation (65), is significantly greater than 0%. By employing equation (65), where "([MAX] - 2 × [MIN]) / [MAX]" is greater than a suitable predetermined value β, as the determination condition, it becomes possible to determine whether more than one of the three current detectors is abnormal. Referring to the examples shown in Figures 8 and 9, the predetermined value β can be set to, for example, 20%.
[0118] As mentioned above, the equation (65) in step S107 is composed of three elements (A U0C0 ,A V0C0 ,A W0C0 ) can be classified into two highly similar elements and one element that is less similar to those two elements. If classification is possible, the left side of equation (65) will be a small value, and if the similarity between the three elements is low, equation (65) will be a large value. Therefore, even if two of the three current detectors have the same abnormality level, as in Examples 8 and 9, the left side of equation (65) will be a small value (zero in Figure 8), and in principle, there is a possibility that the number of abnormal current detectors will be mistakenly detected as one. However, since the possibility that two of the three current detectors will simultaneously have the same abnormality level is extremely low, even if equation (65) is used for judgment, it is possible to practically perform abnormality judgment without false detection.
[0119] In addition, three elements (A U0C0 ,A V0C0 ,A W0C0 The formula for determining whether or not the three elements (A) can be classified into two elements with high similarity and one element with low similarity to the two elements is not limited to the above formula (65). In the above example, U0C0 ,A V0C0 ,A W0C0) can be classified into two elements with high similarity and one element with low similarity to the two elements (in the cases of Examples 1 and 2), formula (65) takes a small value, and when the similarity between the three elements is low (in the cases of Examples 4 to 7, 10, and 11), formula (65) takes a large value. Therefore, any judgment formula whose value is significantly different between Examples 1 and 2 and Examples 4 to 7, 10, and 11 can be used instead of formula (65).
[0120] <Steps S109, S111, and S113> A specific example of the processing in steps S109, S111, and S113 will be described using examples 1 to 3 in FIG. 8 in which one current detector is abnormal.
[0121] In Example 1, the U-phase current detector 34 is abnormal, and |A U0C0 |=4.08%,|A V0C0 |=2.04%,|A W0C0 |=2.04%, so equation (66) is established. Therefore, the determination in step S109 is YES, and an abnormality in the U-phase current detector 34 is notified in step S110.
[0122] In example 2, the V-phase current detector 35 is abnormal, and |A U0C0 |=5.26%,|A V0C0 |=10.53%,|A W0C0 |=5.26%, so equation (66) in step S109 does not hold, but equation (68) in step S111 holds. Therefore, after a NO determination is made in step S109, a YES determination is made in step S111, and an abnormality in the V-phase current detector 35 is notified in step S112.
[0123] In Example 3, the W-phase current detector 36 is abnormal, and |A U0C0 |=5.16%,|A V0C0 |=5.37%,|A W0C0|=10.53%, equation (66) in step S109 and equation (68) in step S111 do not hold, but equation (70) holds. Therefore, after NO is determined in steps S109 and S111, YES is determined in step S113, and an abnormality in the W-phase current detector 36 is notified in step S114.
[0124] As described above, in the process from step S109 to step S114 in the flowchart of FIG. 7, a plurality of absolute values (|A U0C0 |,|A V0C0 |,|A W0C0 |) are compared with each other, and a process is performed to determine that the current detector of the phase corresponding to the maximum absolute value is abnormal.
[0125] <Modification of the flowchart> 7, in step S106, it is determined whether all of the current detectors 34-36 are normal, and steps S107-S114 are added to perform a more detailed abnormality determination. Of course, if it is only necessary to determine whether all of the current detectors 34-36 are normal, steps S107-S114 may be omitted. Although this reduces strictness, it is a simplified determination, which reduces the determination time and enables a quick response.
[0126] 7, steps S107 and S108 may be omitted. In this case, if step S109 is Yes, the current detector with the highest degree of abnormality is determined to be the U-phase current detector 34. If step S111 is Yes, the current detector with the highest degree of abnormality is determined to be the V-phase current detector 35. If step S113 is Yes, the current detector with the highest degree of abnormality is determined to be the W-phase current detector 36. In this case, even if the condition for step S107 is Yes, the current detector with the highest degree of abnormality can be determined.
[0127] <Current waveform, output of filters 723U, 723V, 723W, and abnormality detection operation> Here, a specific current waveform is shown as an example, and the current waveform and the output F of the filters 723U, 723V, and 723W are compared. U ,F V ,F W and the relationship with the anomaly determination operation will be described. Figures 10 and 11 show the analysis conditions used in the waveform examples shown in Figures 12 to 19 described later, and the results of calculating the gain of each current detector based on the waveform examples. In the calculations in Figures 10 and 11, as an example, the predetermined value α on the right side of equation (64) used in step S105 was set to 3%, and the predetermined value β on the right side of equation (65) used in step S107 was set to 50%.
[0128] (Example 14, Figure 12) Example 14 in Fig. 10 shows the analysis conditions and calculation results when one current detector (U-phase current detector 34) is abnormal. In Example 14, the U-phase current detector 34 has a detection gain G U = 94%, and the three-phase load (Y connection) of the motor 4 is balanced. U ,I V ,I W , the output of adder 721 I I0 , output D of multipliers 722U~722W U , D V ,D W and the output F of filters 723U~723W U ,F V ,F W 10A and 10B are diagrams illustrating examples of waveforms of the signals.
[0129] The upper graph in Figure 12 shows the current detection value I U ,I V ,I W and output I I0 (=I U +I V +I W The graph at the bottom of FIG. 12 shows the time change of the output D U ,D V ,D W and the output F of each of the filters 723U, 723V, and 723W. U ,F V ,F WAs shown in Figure 12, the output I I0 fluctuates at a non-zero current value. U shows a relatively large value on the negative side, and the output F of the filters 723V and 723W V ,F W indicates a predetermined same value on the positive side.
[0130] When the technique described in Patent Document 1 is applied to the waveform example shown in FIG. 12, the effective value becomes the value shown in the "effective value based on the known technique" column in FIG. 10. On the other hand, in the case of this embodiment, as shown in Example 14 of FIG. 10, the left side of Equation (65) becomes 0%, and further, A U0C0 =-4.08%,A V0C0 =A W0C0 = 2.04% and equation (66) is established, it is estimated that there is an abnormality in the U-phase current detector 34. Furthermore, the estimated value A U1 Calculating A U1 =-6.00%, and therefore, an abnormality in the U-phase current detector 34 can be correctly determined.
[0131] (Example 15, Figure 13) Example 15 of FIG. 10 and FIG. 13 will be described. Example 15 shows the analysis conditions and calculation results when one current detector (U-phase current detector 34) is abnormal. As in Example 14, Example 15 shows the analysis conditions and calculation results when the U-phase current detector 34 has a detection gain G U = 94%, and the three-phase load (Y connection) of motor 4 is balanced, but the difference from Example 14 is that the fundamental wave current waveform contains current pulsation (white Gaussian noise).The standard deviation of the white Gaussian noise was set to 10% of the fundamental wave current amplitude.
[0132] Figure 13 shows the current detection value I U ,I V ,I W , the output of adder 721 I I0 and the output F of filters 723U~723W U ,F V ,F W1 is a diagram showing an example of the waveform of the output F U ,F V ,F W It can be seen that the waveform of the output D of the multipliers 722U to 722W is the same as that of the example 14 in which no current pulsation is included. U , D V ,D W Since the pulsation changes rapidly over time and is difficult to describe, U ,D V ,D W The waveforms are omitted.
[0133] Calculating the left side of equation (65) for the waveform example shown in Figure 13 gives 1.92% as shown in example 15 of Figure 10. Furthermore, A U0C0 =-4.17%,A V0C0 =2.13%,A W0C0 = 2.05% and equation (66) is established, it is estimated that there is an abnormality in the U-phase current detector 34. Furthermore, the estimated value A U1 Calculating A U1 =-6.13%, and therefore, an abnormality in the U-phase current detector 34 can be correctly determined.
[0134] (Example 16, Figure 14) An example 16 in FIG. 10 and FIG. 14 will be described. Example 16 shows the analysis conditions and calculation results when all the current detectors 34, 35, and 36 are normal. In Example 16, the current detectors 34, 35, and 36 are G U =G V =G W = 100%, and the three-phase load (Y connection) of the motor 4 is unbalanced. The U-phase load is 88% of the V-phase load and the W-phase load. Figure 14 shows the current detection value I U ,I V ,I W , the output of adder 721 I I0 , output D of multipliers 722U~722W U ,D V ,D W and the output F of filters 723U~723W U ,F V ,FW 10A and 10B are diagrams illustrating examples of waveforms of the signals.
[0135] As can be seen from the waveform example in Figure 14, the current detection value I U However, the current detection value I of the V phase and W phase with a large load V and I W The normalized anomaly calculation value A calculated in Example 16 is larger than U0C0 ,A V0C0 ,A W0C0 Based on this, the MAX(|A U0C0 |,|A V0C0 |,|A W0C0 |) becomes 0, and all the current detectors 34, 35, and 36 are determined to be normal, so that it can be correctly determined that the current detectors are normal.
[0136] To demonstrate the features and effects of the first embodiment, a comparison will be made with the case where the method of Patent Document 1 is applied. When the effective value is calculated based on the method of Patent Document 1 under the conditions shown in Fig. 14, the value is as shown in the "Effective value based on the known method" column in Fig. 10. Therefore, if a judgment is made based on this calculated effective value, there is a possibility that the U-phase current detector 34, whose current effective value is larger than those of the other phases, may be erroneously judged to be abnormal.
[0137] (Example 17, Figure 15) Example 17 of FIG. 10 and FIG. 15 will be described. Example 17 shows the analysis conditions and calculation results when one current detector (V-phase current detector 35) is abnormal. In Example 17, the V-phase current detector 35 has a detection gain G V = 106%, and the three-phase load (Y connection) of the motor 4 is unbalanced. The U-phase load is 88% of the V-phase load and the W-phase load. Figure 15 shows the current detection value I U ,I V ,I W , the output of adder 721 I I0 , output D of multipliers 722U~722W U , D V ,D W and the output F of filters 723U~723W U ,FV ,F W 10A and 10B are diagrams illustrating examples of waveforms of the signals.
[0138] Calculating the left side of equation (65) for the waveform example shown in Figure 15, the result is 13.25% as shown in Example 15 of Figure 10. Furthermore, A U0C0 =-2.13%,A V0C0 =3.77%,A W0C0 =-1.63% and equation (68) is established, it is estimated that there is an abnormality in the V-phase current detector 35. In addition, the estimated value A of the degree of abnormality based on equation (69) V1 Calculating A V1 =5.76%, and therefore, an abnormality in the V-phase current detector 35 can be correctly determined.
[0139] To demonstrate the features and effects of the first embodiment, a comparison will be made with the case where the method of Patent Document 1 is applied. When the effective value is calculated based on the method of Patent Document 1 under the conditions shown in Fig. 15, the value is as shown in the "Effective value based on the known method" column in Fig. 10. Therefore, if a judgment is made based on this calculated effective value, there is a possibility that the W-phase current detector 36, whose current effective value is smaller than those of the other phases, may be erroneously judged to be abnormal.
[0140] (Example 18, Figure 16) Example 18 of FIG. 11 and FIG. 16 will be described. Example 18 shows the analysis conditions and calculation results when one current detector (V-phase current detector 35) is abnormal. In Example 18, the V-phase current detector 35 has a detection gain G V = 106%, an abnormality occurred, the three-phase load (Y connection) of motor 4 was unbalanced, and the fundamental current waveform contained current pulsation (white Gaussian noise). Regarding the unbalance, the U-phase load was 88% of the V-phase load and W-phase load, and the standard deviation of the white Gaussian noise was 10% of the fundamental current amplitude.
[0141] FIG. 16 shows the current detection value I U ,I V ,I W , the output of adder 721 I I0 and the output F of filters 723U~723W U,F V ,F W In Example 18, which includes current pulsation, the output D U ,D V ,D W Since the pulsation changes rapidly over time and is difficult to describe, U ,D V ,D W The waveforms are omitted.
[0142] Calculating the left side of equation (65) for the waveform example shown in Figure 16, the result is 17.89% as shown in example 18 of Figure 11. Furthermore, A U0C0 =-2.26%,A V0C0 =3.83%,A W0C0 =-1.57% and equation (68) is established, it is estimated that there is an abnormality in the V-phase current detector 35. In addition, the estimated value A of the degree of abnormality based on equation (69) V1 Calculating A V1 =5.86%, and therefore, an abnormality in the V-phase current detector 35 can be correctly determined.
[0143] To demonstrate the features and effects of the first embodiment, a comparison will be made with the case where the method of Patent Document 1 is applied. When the effective value is calculated based on the method of Patent Document 1 under the conditions shown in Fig. 16, the value is as shown in the "Effective value based on the known method" column in Fig. 11. Therefore, if a judgment is made based on this calculated effective value, there is a possibility that the W-phase current detector 36, whose current effective value is smaller than those of the other phases, may be erroneously judged to be abnormal.
[0144] (Example 19, Figure 17) Example 19 of Fig. 11 and Fig. 17 will be described. Example 19 shows the analysis conditions and calculation results when two current detectors (U-phase current detector 34 and W-phase current detector 36) are abnormal. In Example 19, the U-phase current detector 34 has a detection gain G U = 94% abnormal, V-phase current detector 35 detection gain G V = 100% is normal, W-phase current detector 36 has detection gain G W= 106%, the three-phase load (Y connection) of motor 4 is balanced, and the fundamental current waveform contains current pulsation (white Gaussian noise).The standard deviation of the white Gaussian noise is set to 10% of the fundamental current amplitude.
[0145] Figure 17 shows the current detection value I U ,I V ,I W , the output of adder 721 I I0 and the output F of filters 723U~723W U ,F V ,F W In Example 19, which includes current pulsation, the output D U ,D V ,D W Since the pulsation changes rapidly over time and is difficult to describe, U ,D V ,D W The waveforms are omitted.
[0146] When the left side of equation (65) is calculated for the waveform example shown in FIG. 17, the result is 95.05%, which is larger than the predetermined value β=50%, as shown in Example 19 of FIG. 11, so the determination in step S107 of FIG. 7 is YES, and it is estimated that multiple current detectors are abnormal. Furthermore, A U0C0 =-6.06%,A V0C0 =0.12%,A W0C0 = 5.94% is calculated, and the normalized anomaly calculation value A, which represents the relative anomaly U0C0 ,A V0C0 ,A W0C0 The average value of A is 0. U1 =A U0C0 =-6.06%,A V1 =A V0C0 =0.12%,A W1 =A W0C0 =5.94%, which means that the estimation can be performed with a small error even when the current pulsation is large.
[0147] (Example 20, Figure 18) An example 20 in FIG. 11 and an example 20 in FIG. 18 will be described. Example 20 shows the analysis conditions and calculation results when two current detectors (U-phase current detector 34 and W-phase current detector 36) are abnormal. In Example 20, the U-phase current detector 34 has a detection gain G U = 94%, the W-phase current detector 36 has a detection gain of G W = 106%, which indicates an abnormality, and the three-phase load (Y connection) of the motor 4 is unbalanced. Regarding the unbalance, the U-phase load is 88% of the V-phase load and the W-phase load. U ,I V ,I W , the output of adder 721 I I0 , output D of multipliers 722U~722W U ,D V ,D W and the output F of filters 723U~723W U ,F V ,F W 10A and 10B are diagrams illustrating examples of waveforms of the signals.
[0148] When the left side of equation (65) is calculated for the waveform example shown in FIG. 18, the result is 84.33%, which is larger than the predetermined value β=50%, as shown in example 20 of FIG. 11, so the determination in step S107 of FIG. 7 is YES, and it is estimated that multiple current detectors are abnormal. Furthermore, A U0C0 =-6.56%,A V0C0 =0.51%,A W0C0 = 6.04% is calculated, and the normalized anomaly calculation value A, which represents the relative anomaly U0C0 ,A V0C0 ,A W0C0 The average value of A can be considered to be 0. Therefore, as explained in step S108 above, U1 =A U0C0 =-6.56%,A V1 =A V0C0 =0.51%,A W1 =A W0C0 = 6.04%, which means that estimation can be performed with little error even when the three-phase load imbalance is large.
[0149] To demonstrate the features and effects of the first embodiment, a comparison will be made with the case where the method of Patent Document 1 is applied. When the effective value is calculated based on the method of Patent Document 1 under the conditions shown in Fig. 18, the value is as shown in the "Effective value based on the known method" column in Fig. 11. Therefore, if a judgment is made based on this calculated effective value, there is a possibility that the W-phase current detector 36, whose current effective value is larger than those of the other phases, may be erroneously judged to be abnormal.
[0150] (Example 21, Figure 19) An example 21 in FIG. 11 and an example 22 in FIG. 19 are explained. Example 21 shows the analysis conditions and calculation results when two current detectors (U-phase current detector 34 and W-phase current detector 36) are abnormal. In Example 21, the U-phase current detector 34 has a detection gain G U = 94%, the W-phase current detector 36 has a detection gain of G W = 106%, an abnormality occurred, the three-phase load (Y connection) of motor 4 was unbalanced, and the fundamental current waveform contained current pulsation (white Gaussian noise). Regarding the unbalance, the U-phase load was 88% of the V-phase load and W-phase load, and the standard deviation of the white Gaussian noise was 10% of the fundamental current amplitude.
[0151] Figure 19 shows the current detection value I U ,I V ,I W , the output of adder 721 I I0 and the output F of filters 723U~723W U ,F V ,F W In Example 21, which includes current pulsation, the output D U ,D V ,D W Since the pulsation changes rapidly over time and is difficult to describe, U ,D V ,D W The waveforms are omitted.
[0152] When the left side of equation (65) is calculated for the waveform example shown in FIG. 19, the result is 81.53%, which is larger than the predetermined value β=50%, as shown in example 21 of FIG. 11, so the determination in step S107 of FIG. 7 is YES, and it is estimated that multiple current detectors are abnormal. Furthermore, A U0C0 =-6.61%,A V0C0 =0.61%,A W0C0 = 6.00% is calculated, and the normalized anomaly calculation value A, which represents the relative anomaly U0C0 ,A V0C0 ,A W0C0 The average value of A is 0. U1 =A U0C0 =-6.61%,A V1 =A V0C0 =0.61%,A W1 =A W0C0 =6.00%, which means that estimation can be performed with little error even when there is a large imbalance in the three-phase load and current pulsation.
[0153] To demonstrate the features and effects of the first embodiment, a comparison will be made with the case where the method of Patent Document 1 is applied. When the effective value is calculated based on the method of Patent Document 1 under the conditions shown in Fig. 19, the value is as shown in the "Effective value based on the known method" column in Fig. 11. Therefore, if a judgment is made based on this calculated effective value, there is a possibility that the W-phase current detector 36, whose current effective value is larger than those of the other phases, may be erroneously judged to be abnormal.
[0154] (Effect on three-phase imbalance) As can be seen from Examples 14 to 21, in the first embodiment described above, F used in the calculations of Equations (57) to (59) U ,F V ,F W Absolute value of |F U |,|F V |,|F W | is I U ,I V ,I W and I I0 When the phase difference approaches 0 degrees or 180 degrees, the value becomes large (for example, Figure 12 in Example 14). U ,I V ,IW and I I0 When the phase difference between the two approaches 90 degrees or 270 degrees, the value becomes small (for example, Figure 14 in Example 16). In this way, even when a three-phase imbalance occurs, the I U ,I V ,I W ,I I0 Since the amount of phase change is small, the abnormality determination in this embodiment can correctly determine the abnormality as described above even when a three-phase imbalance occurs.
[0155] On the other hand, the method described in Patent Document 1 judges an abnormality based on the effective value, but when the three-phase load is unbalanced, more current flows to the phase with the lesser load, resulting in a larger effective value. Therefore, when a three-phase imbalance occurs, there is a possibility of misjudgment as described above.
[0156] (Effect on current pulsation) As shown in Figure 5, filters 723U, 723V, and 723W remove AC components including the fundamental frequency of the current waveform. Therefore, even if the current waveform contains a large current pulsation component or the fundamental frequency of the current waveform and the current pulsation frequency are close to each other, the pulsation component is sufficiently removed. U ,F V ,F W Since abnormality is judged based on this, it can be judged correctly.
[0157] (Summary of the effects of the first embodiment) In the power conversion device 100 according to the first embodiment, the outputs of the multipliers 722U, 722V, and 722W, that is, the current detection value I U ,I V ,I W and the sum of the detected current values I I0 Product D U ,D V ,D W By using this, even if the three-phase load (motor 4) connected to the power conversion device 100 is unbalanced, an abnormality in the current detector in the power conversion device 100 can be appropriately detected.
[0158] Furthermore, since filters 723U, 723V, 723W, 726, and 726C remove AC components including the fundamental frequency of the current waveform, even when the magnitude of the current pulsation is not negligible compared to the fundamental frequency of the current waveform or when the frequency of the current pulsation is close to the fundamental frequency of the current waveform, the current pulsation can be sufficiently removed. Therefore, even when the AC current contains many current pulsation components or when the current pulsation has a frequency close to the fundamental frequency of the current waveform, an abnormality in the current detector in power conversion device 100 can be properly detected.
[0159] Furthermore, the output F of the filters 723U, 723V, and 723W U ,F V ,F W , the output of filter 726 H I and the output K of filter 726C I Based on this, the relative anomaly degree A U0 ,A V0 ,A W0 The standardized anomaly calculation value A is an estimate of U0C0 ,A V0C0 ,A W0C0 By calculating the normalized abnormality degree calculation value A, it is possible to determine whether or not there is an abnormality in each of the current detectors 34, 35, and 36. U0C0 ,A V0C0 ,A W0C0 can be calculated with a small error.
[0160] Furthermore, since the degree of abnormality of the current detector can be estimated, it is possible to predict the period until the estimated degree of abnormality exceeds a predetermined threshold at which the current detector is judged to be abnormal, i.e., the period until an abnormality occurs, and preparations can be made in advance to prevent abnormalities from occurring and to respond when an abnormality does occur.
[0161] In addition, a display is provided recommending inspection and replacement of a current detector that is faulty, which encourages inspection and replacement of the current detector as its deterioration progresses before the power conversion device 100 experiences an unplanned shutdown such as a trip due to a current detector fault.
[0162] Although the above description has been given of the effects of the inverter-side abnormality determiner 72, the converter-side abnormality determiner 71 also provides the same effects.
[0163] -Second embodiment- In the first embodiment described above, the current detection values I U ,I V ,I W Based on this, the normalized abnormality calculation value A is the relative abnormality. U0C0 ,A V0C0 ,A W0C0 Calculate the normalized abnormality calculation value A U0C0 ,A V0C0 ,A W0C0 On the other hand, in a second embodiment described below, an absolute degree of abnormality is calculated, and an abnormal current detector is determined based on the calculated absolute degree of abnormality.
[0164] Fig. 20 is a diagram showing an example of the configuration of a power conversion device 101 according to a second embodiment of the present invention. In Fig. 20, the same components as those in the power conversion device 100 according to the first embodiment shown in Fig. 1 are denoted by the same reference numerals.
[0165] The power conversion device 101 of the second embodiment differs from the power conversion device 100 of the first embodiment mainly in the following configuration. A signal related to the operating conditions of the AC power supply 1 is input from the converter control device 5 to the converter-side abnormality determiner 71. The signal related to the power supply operating conditions includes, for example, an active current, a reactive current, a pulse command, and detected values of DC voltage input from each of the DC voltage detectors 24 and 25. Furthermore, a signal related to the operating conditions of the electric motor 4 is input from the inverter control device 6 to the inverter-side abnormality determiner 72. The signal related to the electric motor operating conditions includes, for example, the speed of the electric motor 4, the excitation current of the electric motor 4, the torque current, a pulse command, and detected values of DC voltage input from each of the DC voltage detectors 24 and 25.
[0166] 20 have similar configurations, the inverter-side abnormality judger 72 will be described as a representative, as in the first embodiment. Although not described here, the configuration and relational expressions related to the converter-side abnormality judger 71 can also be similarly described by replacing the subscripts U, V, and W with R, S, and T in the configuration and relational expressions related to the inverter-side abnormality judger 72 described below.
[0167] 21 is a block diagram of the inverter-side abnormality determiner 72 of the power conversion device 101 according to the second embodiment. In the second embodiment, the inverter control device 6 sends a signal S I Furthermore, as will be described later, the configuration of the abnormality determination unit 727 is different from that of the abnormality determination unit 727 of the first embodiment shown in FIG.
[0168] 22 is a block diagram showing details of the abnormality determination unit 727 in the power conversion device 101. In addition to the calculation units 7271 to 7275 included in the abnormality determination unit 727 (see FIG. 6) described in the first embodiment, the abnormality determination unit 727 includes calculation units 7276, 7279, and 7280, an operating condition determination unit 7277, and a storage unit 7278. The abnormality determination unit 727 includes a DC component F output from the filters 723U, 723V, 723W, 726, and 726C shown in FIG. U ,F V ,F W ,H I ,K I and the current detection value I U ,I V ,I W and motor operating conditions (signals related to motor operating conditions) S I is entered.
[0169] <Arithmetic unit 7276> The calculation units 7271 to 7275 perform the same calculation processing as the calculation units 7271 to 7275 shown in FIG. 6, and calculate the input DC component F U ,F V ,F W ,HI ,K I Based on this, the normalized anomaly degree is calculated as A U0C0 ,A V0C0 ,A W0C0 As described above, the calculation unit 7271 calculates H I ,K I Based on "B I 2 =(2H I -8K I ) / 9" from the calculation unit 7271. I 2 is input, and B expressed by the following equation (72) I Output. B I =√(2H I -8K I ) / 3 …(72)
[0170] <Storage section 7278> Here, it is assumed that at time t=t1, all the current detectors 34, 35, and 36 are in a normal state. That is, at time t=t1, G U =G V =G W = 1 (= 100%). In the following, time t1 will be referred to as the reference time t1. U =G V =G W If you assign =1, the output will be B I (t1) and current amplitude I IA The relationship with (t1) is expressed by the following equation (73): Output B I (t1) is the output B at reference time t1 I and the current amplitude I IA (t1) is the current amplitude I at reference time t1 IA is. B I =(G U +G V +G W )×I IA / 3 …(29) B I (t1)=I IA (t1) …(73) The storage unit 7278 stores the output B at the reference time t1.I (t1) is the motor operating condition S at the reference time t1. I It is stored in association with (t1).
[0171] <Operation condition determination unit 7277> The operation condition determination unit 7277 receives the motor operation condition S from the inverter control device 6. I (t), and B calculated by the calculation unit 7276 I The operation condition determination unit 7277 determines the motor operation conditions S I (t) and B stored in the memory unit 7278 I (t1) Motor operating condition S I Determine whether the operating conditions are the same as those of (t1). I (t)=S I If it is (t1), the determination result SD=YES and B stored in the storage unit 7278 are stored. I (t1) and output. On the other hand, S I (t)≠S I If (t1), or if B I If (t1) is not stored, only the determination result SD=NO is output.
[0172] <Arithmetic unit 7279> The calculation unit 7279 receives the B calculated by the calculation unit 7276. I (t) and B output from the operating condition determination unit 7277 I (t1) is input. The calculation unit 7279 calculates B I (t) and B I (t1), calculates J(t) expressed by equation (75) described later, and outputs the calculated J(t).
[0173] Assume that at any time t, the current detector is either normal or abnormal. Here, the output B at any time t is I (t) is the normal output B at the reference time t1 described above. I Using (t1), it is expressed as the following equation (74a). B I (t)=J(t)×BI (t1) …(74a)
[0174] From equations (73) and (74a), the output B at any time t I (t) is the current amplitude I IA The coefficient J(t) in equation (74b) is the normal output B I (t1) in equation (74b). That is, J(t) in equation (74b) is the output B at the reference time t1 when all the current detectors are normal. I Output B based on (t1) I is a coefficient that represents the proportion of (t). B I (t)=J(t)×I IA (t1) …(74b) J(t)=B I (t) / B I (t1) …(75)
[0175] Here, at a certain time t2, the motor operating condition S I (t2) is the motor operating condition S at the reference time t1. I Assuming that (t1) is equal to I IA (t2)=I IA (t1) holds. J(t2) at time t2 is the equation (75) rewritten as t = t2, but the numerator on the right hand side at that time = B I (t2) is expressed by the following equation (76a) by using the above equation (29). B I (t2)=(G U (t2)+G V (t2)+G W (t2))×I IA (t2) / 3 …(76a)
[0176] Also, the denominator on the right side of equation (75) = B I (t1) is I from equation (73). IA (t1). As a result, equation (76b) holds for J(t2) at time t2. J(t2)=(GU (t2)+G V (t2)+G W (t2)) / 3 …(76b) That is, B in the normal state at the reference time t1 I (t1) and the reference time t1 and the motor operating conditions are the same (S I (t2)=S I (t1)) B at a certain time t2 I (t2) into equation (75) to find J(t2), and the detection gain G at time t2 U (t2), G V (t2), G W The average value of (t2) can be calculated.
[0177] <Arithmetic unit 7280> The calculation unit 7280 receives the normalized abnormality calculation value A calculated by the calculation unit 7275. U0C0 (t),A V0C0 (t),A W0C0 The calculation unit 7280 receives the normalized anomaly degree calculation value A(t) and the J(t) calculated by the calculation unit 7279. U0C0 (t),A V0C0 (t),A W0C0 Based on (t) and J(t), the estimated absolute anomaly degree A at time t is calculated using the equations (77) to (79) described below. U2 (t),A V2 (t),A W2 Calculate (t).
[0178] As mentioned above, J(t) expressed by equation (75) is the detection gain G U (t),G V (t),G W (t) is the average value of the detection gain G U is "G U =G U0 ×(G U +G V +G W ) / 3”. Since the relationship of “gain = (degree of abnormality + 1)”, the estimated value A of the absolute degree of abnormality of the current detectors 34, 35, and 36 at time t is U2(t),A V2 (t),A W2 (t) is the calculated normalized anomaly value A U0C0 (t),A V0C0 (t),A W0C0 (t) and J(t) can be calculated using the following equations (77) to (79). A U2 (t)=(A U0C0 (t)+1)×J(t)-1 …(77) A V2 (t)=(A V0C0 (t)+1)×J(t)-1 …(78) A W2 (t)=(A W0C0 (t)+1)×J(t)-1 …(79)
[0179] Therefore, when all the current detectors 34, 35, and 36 are normal, I (t1) is stored in advance, and B at time t where the operating conditions are the same as time t1 I If J(t) can be calculated by equation (75) using (t), the absolute degree of abnormality of each of the current detectors 34, 35, and 36 at time t can be calculated.
[0180] <Regarding the processing operation of the abnormality determination unit 727> Fig. 23 is a flowchart showing an example of the abnormality determination process in the abnormality determination section 727 of Fig. 22. The procedure of the abnormality determination process will be described below with reference to the flowchart of Fig. 23.
[0181] Steps S201 to S204 The processing in steps S201 to S204 is the same as that in steps S101 to S104 in Fig. 7. That is, steps S101 to S104 can be read as steps S201 to S204, and a description thereof will be omitted here.
[0182] Step S205 In step S205, the abnormality determination unit 727 calculates the normalized abnormality degree calculated value A at the current time t by the calculation units 7271 to 7275. U0C0 (t),A V0C0 (t),AW0C0 (t) and B by the calculation unit 7276 I Calculate (t).
[0183] Step S206 In step S206, the abnormality judgment unit 727 judges whether the judgment result SD output from the operating condition judgment unit 7277 is YES or NO, and if SD=YES, proceeds to step S207, and if SD=NO, terminates the series of abnormality judgment processes.
[0184] Step S207 In step S207, the abnormality determination unit 727 calculates J(t), A U2 (t),A V2 (t),A W2 Calculate (t).
[0185] Step S208 In step S208, the abnormality determination unit 727 calculates the estimated absolute abnormality degree A calculated in step S207. U2 (t),A V2 (t),A W2 Absolute value of (t) |A U2 (t)|,|A V2 (t)|,|A W2 (t)| is greater than a predetermined value γ. That is, it is determined whether all of the following equations (80) to (82), which indicate that each of the current detectors 34, 35, and 36 is abnormal, are not satisfied. |A U2 |>Predetermined value γ …(80) |A V2 |>Predetermined value γ …(81) |A W2 |>Predetermined value γ …(82) If none of the conditions are met (YES), it is determined that all of the current detectors 34, 35, 36 are normal, and the process proceeds to step S215. On the other hand, if it is determined in step S209 that any one of the conditions (80) to (82) is met, the process proceeds to step S210.
[0186] Step S209 In step S209, abnormality determination unit 727 determines whether only one of equations (80) to (82) is true, that is, whether only one of current detectors 34, 35, and 36 is abnormal. If the determination in step S209 is YES, the process proceeds to step S210. On the other hand, if two or three of the following equations (80) to (82) are true, the determination in step S209 is NO, and the process proceeds to step S211.
[0187] <Step S210> In step S210, the abnormality determination unit 727 determines that the current detector of one phase is abnormal, and causes the display 73 to display abnormality information indicating the abnormality, for example, a display such as "U-phase current detector abnormal," "V-phase current detector abnormal," or "W-phase current detector abnormal." Note that the abnormality determination unit 727 determines that the U-phase current detector 34 is abnormal if only equation (80) is satisfied, determines that the V-phase current detector 35 is abnormal if only equation (81) is satisfied, and determines that the W-phase current detector 36 is abnormal if only equation (82) is satisfied. Then, the process proceeds to step S214.
[0188] Step S211 In step S211, abnormality determination unit 727 determines whether two of equations (80) to (82) are true, that is, whether any two of current detectors 34, 35, and 36 are abnormal. If the determination in step S211 is YES, the process proceeds to step S212. On the other hand, if all of equations (80) to (82) are true, the determination in step S211 is NO, and the process proceeds to step S213.
[0189] <Step S212> In step S212, the abnormality determination unit 727 determines that the current detectors of the two phases are abnormal, and causes the display 73 to display information indicating the abnormality, such as "U-phase current detector and V-phase current detector abnormal," "U-phase current detector and W-phase current detector abnormal," or "V-phase current detector and W-phase current detector abnormal." Note that the abnormality determination unit 727 determines that the U-phase current detector 34 and the V-phase current detector 35 are abnormal if equations (80) and (81) are satisfied; determines that the U-phase current detector 34 and the W-phase current detector 36 are abnormal if equations (80) and (82) are satisfied; and determines that the V-phase current detector 35 and the W-phase current detector 36 are abnormal if equations (81) and (82) are satisfied. Then, the process proceeds to step S214.
[0190] <Step S213> In step S213, the abnormality determination unit 727 determines that the three phase current detectors 34, 35, and 36 are abnormal, and displays information indicating the abnormality, for example, a message saying "U-phase, V-phase, and W-phase current detectors abnormal," on the display 73. Then, the process proceeds to step S214.
[0191] <Step S214> In step S214, the next process is executed following steps S202, S204, S210, S212, and S213. In step S214, the abnormality determination unit 727 outputs a command to the display unit 73 to display information prompting the user to perform an inspection (for example, a message saying "Please inspect and replace the abnormal part") on the display unit 73. Then, the series of abnormality determination processes ends.
[0192] Step S215 In step S215, the abnormality determination unit 727 determines that the U-phase current detector 34, the V-phase current detector 35, and the W-phase current detector 36 are all normal. In this case, it is not necessary to display on the display 73 that all of the current detectors 34, 35, and 36 are normal, but it is of course acceptable to display this information. Then, the series of abnormality determination processes ends.
[0193] 23 is executed at predetermined time intervals. I (t1) and motor operating conditions S I The storage of (t1) is performed, for example, by storing a predetermined B I and motor operating conditions S I Alternatively, in step S215 of FIG. 23, the S input to the operating condition determination unit 7277 is stored. I (t) and B I (t) is stored in the storage unit 7278, the motor operation condition S obtained at the timing t1 when the operation is still normal after the start of the operation is added. I (t1) and B I (t1) may be stored in the storage unit 7278.
[0194] <Supplementary explanation of the processing in steps S205 to S213> Here, a supplementary explanation of steps S205 to S213 in the flowchart of FIG. 23 will be given using examples 22 to 25 shown in FIGS.
[0195] (When one current detector is abnormal) First, an example 22 in which one current detector is abnormal will be described with reference to Fig. 24 and Fig. 26. In example 22, as shown in Fig. 26, the U-phase current detector 34 gradually deteriorates over time, and at time t=t2, the absolute abnormality degree A U A U =-15%. U ,A V ,A W As can be seen from the above equations (18) to (20), the current amplitude I IA On the other hand, the normalized anomaly calculation value A in Figure 26 U0C0 ,A V0C0 ,A W0C0 is calculated by the calculation unit 7275. Also, for J in FIG. I By storing (t1) in memory unit 7278, calculation can be performed by calculation unit 7279.
[0196] As shown in Figure 26, the absolute anomaly level A U ,A V ,A W are all 0% at time t1, and then the A of the U phase U Only the A U The decrease in the normalized anomaly calculation value A U0C0 (t) decreases, and the normalized anomaly calculation value A V0C0 (t),A W0C0 (t) also increases. Also, J(t), which was 100% at time t1, also increases. U The normalized anomaly calculation value A at time t2 in Fig. 26 decreases from 100%. U0C0 (t2),A V0C0 (t2),A W0C0 The calculation results of (t2) and J(t2) are shown in Example 22 of Figure 24. U0C0 (t2)=-10.53%,A V0C0 (t2)=A W0C0 (t2)=5.26% and J(t2)=0.95. The calculation result of the calculation unit 7280 based on these is A U2 =-15%,A V2 =0%,A W2 =0%, and the assumed absolute abnormality A U ,A V ,A W This shows that the degree of anomaly can be calculated correctly.
[0197] (When two current detectors are abnormal) Next, an example 23 in which two current detectors are abnormal will be described with reference to Figs. 24 and 27. In the example shown in Fig. 27, all of the current detectors 34, 35, and 36 are normal at time t1. However, thereafter, the U-phase current detector 34 and the V-phase current detector 35 become abnormal, and the absolute abnormality degree A U ,A V gradually decreases over time, and at time t2, A U =-10%,A V As a result, the normalized abnormality calculation value A calculated by the calculation unit 7275 is U0C0 (t),A V0C0 (t),A W0C0(t) and J(t) calculated by the calculation unit 7279 change as shown in FIG.
[0198] At time t2, A U =-10%,A V = -5%, the calculated normalized anomaly value A U0C0 (t2),A V0C0 (t2),A W0C0 (t2) and J(t2) are A U0C0 (t2)=-5.26%,A V0C0 (t2)=0%,A W0C0 (t2)=5.26% and J(t2)=0.95. The calculation result of the calculation unit 7280 based on these is A U2 =-10%,A V2 =-5%,A W2 =0%, and the assumed absolute abnormality A U ,A V ,A W This shows that the degree of anomaly can be calculated correctly.
[0199] (When three current detectors are abnormal) An example 24 in which three current detectors are abnormal will be described with reference to Fig. 25 and Fig. 28. As shown in Fig. 28, after time t1, all of the current detectors 34, 35, and 36 become abnormal, and the absolute abnormality degree A U As the absolute anomaly A V ,A W gradually increases, and at time t2, A U =-10%,A V =5%,A W As a result, the normalized abnormality calculation value A U0C0 (t),A V0C0 (t),A W0C0 (t) and J(t) calculated by the calculation unit 7279 change as shown in FIG.
[0200] At time t2, A U =-10%,A V =5%,A W= 20%, the calculated normalized anomaly value A U0C0 (t2),A V0C0 (t2),A W0C0 (t2) and J(t2) are A U0C0 (t2)=-14.29%,A V0C0 (t2)=0%,A W0C0 (t2)=14.29% and J(t2)=1.05. The calculation result of the calculation unit 7280 based on these is A U2 =-10%,A V2 =5%,A W2 = 20%, and the assumed absolute abnormality A U ,A V ,A W This shows that the degree of anomaly can be calculated correctly.
[0201] Example 25, which is another example of the case where three current detectors are abnormal, will be described with reference to Figures 25 and 29. As shown in Figure 29, after time t1, all of the current detectors 34, 35, and 36 exhibit abnormalities, and the absolute abnormality degree A U ,A V ,A W gradually decreases, and at time t2, A U =A V =A W =-10%.
[0202] At time t2, A U =A V =A W = -10%, the calculated normalized anomaly value A U0C0 (t2),A V0C0 (t2),A W0C0 (t2) and J(t2) are A U0C0 (t2)=A V0C0 (t2)=A W0C0 (t2)=0% and J(t2)=0.9. The calculation result of the calculation unit 7280 based on these is A U2 =A V2 =A W2 =-10%, and the absolute abnormality level A U ,A V ,A WThis shows that the degree of anomaly can be calculated correctly.
[0203] B calculated by the above formula (27) I is a quantity proportional to the average value of the detection gains of the multiple current detectors. Therefore, when the current detectors 34, 35, and 36 are normal, B I (t1) is stored in advance, and B I Calculated value B for the operating conditions equivalent to the motor operating conditions in (t1) I J(t) calculated using (t) represents the degree of change in the average value of the detection gain at the current time (time t) based on the normal case. Therefore, the estimated absolute abnormality value A U2 ,A V2 ,A W2 is the normalized anomaly calculation value A, which is the relative anomaly degree of J(t). U0C0 (t),A V0C0 (t),A W0C0 (t), it can be calculated using equations (77) to (79).
[0204] In this way, in the second embodiment, B stored in the storage unit 7278 I Calculate J(t) based on (t1), and compare J(t) with the normalized anomaly calculation value A U0C0 (t),A V0C0 (t),A W0C0 (t) and the estimated absolute anomaly A U2 ,A V2 ,A W2 Therefore, even if one or more current detectors become abnormal, the estimated absolute abnormality value A U2 ,A V2 ,A W2 can be calculated with high accuracy, and the estimated value A U2 ,A V2 ,A W2 By using this, abnormalities in the current detectors 34, 35, and 36 can be determined with high accuracy.
[0205] The same processing as that for the abnormality levels of the current detectors 26, 27, and 28 provided in the converter unit 2 is performed, and similar effects can be achieved.
[0206] <<Prevention and response to abnormalities through display>> In the second embodiment described above, the estimated value A of the absolute abnormality, which is information on the abnormality degree of the current detector, U2 ,A V2 ,A W2 can be calculated with high accuracy using equations (77) to (79), so the calculated absolute anomaly estimate A U2 ,A V2 ,A W2 may be displayed on the display 73. As a result, it is possible to grasp the signs of an abnormality in advance, and to prevent the abnormality from occurring or to prepare in advance for a response when an abnormality does occur.
[0207] Furthermore, the occurrence of an abnormality may be predicted as follows: The abnormality determination unit 727 uses the history of the abnormality degree of the current detectors 34, 35, and 36 before the abnormality is determined by the equations (80) to (82), for example, the estimated value A U2 (t),A V2 (t),A W2 Absolute value of (t) |A U2 (t)|,|A V2 (t)|,|A W2 (t)| and the normalized anomaly calculation value A U0C0 ,A V0C0 ,A W0C0 The system stores a history, which is time-series data of the above. Then, based on the stored history, it may predict the period from the present time until the degree of abnormality exceeds a preset threshold value for abnormality determination (predetermined value γ or predetermined value α), i.e., the period until an abnormality occurs, and display the prediction result on the display 73. As a result, it is possible to grasp the signs of an abnormality in advance, and to prevent the occurrence of an abnormality or to prepare in advance for a response when an abnormality occurs.
[0208] In the above description, the inverter-side abnormality determiner 72 has been taken as an example, but the converter-side abnormality determiner 71 can also be configured in the same way.
[0209] -Third embodiment- A power conversion device according to a third embodiment of the present invention will be described with reference to Figs. 30 to 32. Fig. 30 is a block diagram showing an example of the configuration of a converter-side abnormality determinator 71D of the power conversion device according to the third embodiment of the present invention. Fig. 31 is a block diagram showing an example of the configuration of an inverter-side abnormality determinator 72D of the power conversion device according to the third embodiment of the present invention. Note that the configuration of the power conversion device other than the converter-side abnormality determinator 71D and the inverter-side abnormality determinator 72D is the same as that of the power conversion device 100 shown in Fig. 1, and is therefore not shown in the figures.
[0210] Converter-side abnormality determinator 71D shown in Fig. 30 has a configuration in which filters 718R, 718S, and 718T and adder-subtractors 719R, 719S, and 719T are added to converter-side abnormality determinator 71 shown in Fig. 4. Similarly, inverter-side abnormality determinator 72D shown in Fig. 31 has a configuration in which filters 728U, 728V, and 728W and adder-subtractors 729U, 729V, and 729W are added to inverter-side abnormality determinator 72 shown in Fig. 5. Therefore, the following description will be given using inverter-side abnormality determinator 72D shown in Fig. 31 as a representative example.
[0211] In the inverter side abnormality judgement unit 72D, the filters 728U, 728V, and 728W respectively receive the current detection value I of the corresponding phase of the three-phase AC. U ,I V ,I W The first input terminals of the adder-subtractors 729U, 729V, and 729W are respectively supplied with the current detection values I of the corresponding phases of the three-phase AC. U ,I V ,I W The second input terminal of the adder / subtractor 729U receives the output I of the filter 728U. UDC The second input terminal of the adder / subtractor 729V receives the output I of the filter 728V. VDCThe second input terminal of the adder / subtractor 729W receives the output I of the filter 728W. WDC Each of the adder-subtractors 729U, 729V, and 729W outputs a signal I obtained by subtracting the input of the second input terminal from the input of the first input terminal. UA ,I VA ,I WA are output respectively.
[0212] Output I of adder / subtractor 729U UA is input to the adder 721D and the multipliers 722U, 724U, 724CW, and 724CV. The output I of the adder / subtractor 729V VA is input to the adder 721D and the multipliers 722V, 724V, 724CW, and 724CU. The output I of the adder / subtractor 729W WA are input to adder 721D and multipliers 722W, 724W, 724CU, and 724CV, respectively.
[0213] Other configurations of the inverter-side abnormality judger 72D are the same as those of the inverter-side abnormality judger 72 shown in Fig. 5. An abnormality judgement unit 727D in the inverter-side abnormality judger 72D performs either the abnormality judgement processing shown in Fig. 7 of the first embodiment or the abnormality judgement processing shown in Fig. 23 of the second embodiment. The same applies to the abnormality judgement unit 717D in the converter-side abnormality judger 71D.
[0214] Next, the operations of the newly added filters 728U, 728V, and 728W and the adder-subtractors 729U, 729V, and 729W will be described with reference to Fig. 31. The filter 728U is a filter for converting the input waveform (AC current detection value I U ) and removes the DC component I UDC Similarly, the current detection value I V ,I W Remove the AC component contained in VDC ,I WDC are output respectively.
[0215] The adder / subtractor 729U calculates the input current detection value I U The offset component from I UDC is subtracted, and the current detection value I U AC component I contained in UA Similarly, the adder-subtractors 729V and 729W each output the current detection value I V ,I W The offset component from I VDC ,I WDC is subtracted, and the current detection value I V ,I W AC component I contained in VA ,I WA Output.
[0216] <Current waveform example> 32 is a diagram showing an example of output waveforms of the filter 728U and the adder / subtractor 729U. As shown in FIG. 32, the current detection value I U is offset in the positive direction. The current detection value I U is input to the filter 728U, the offset component I UDC is output from the filter 728U. The current detection value I U offset component I UDC Subtracting this gives the current detection value I U AC component I with the offset component removed UA Although not shown in the figure, I V ,I VDC ,I VA and I in the W phase W ,I WDC ,I WA The same is true for .
[0217] As described above, in the third embodiment, the current detection value I U ,I V ,I W The offset component (DC component) contained in I UDC ,I VDC ,I WDC AC component I removed UA ,I VA ,I WA5 in the first embodiment. U ,I V ,I W Even if a DC component is included in the detection gain of the current detectors 34, 35, and 36, the degree of abnormality (absolute abnormality degree or relative abnormality degree) can be detected with high accuracy.
[0218] <Another example of removing offset components contained in current detection values> In the inverter-side abnormality determiner 72D of the third embodiment shown in FIG. 31, the current detection value I U ,I V ,I W In order to remove the offset component contained in the current detection value I, filters 728U, 728V, and 728W and adder-subtractors 729U, 729V, and 729W are used. U ,I V ,I W In order to remove the offset component contained in the signal, the configuration is not limited to the above, and for example, instead of the filters 728U, 728V, and 728W and the adder-subtractors 729U, 729V, and 729W, a high-pass filter or the like may be used to pass frequencies other than the DC (offset component).
[0219] -Fourth embodiment- A power conversion apparatus according to a fourth embodiment of the present invention will be described with reference to Fig. 33. Fig. 33 is a diagram showing an example of the configuration of a power conversion apparatus 102 according to the fourth embodiment. In Fig. 33, the same components as those in the power conversion apparatus 100 according to the first embodiment shown in Fig. 1 are denoted by the same reference numerals. In the power conversion apparatus 102, the three-level converter unit 2 and inverter unit 3 in the power conversion apparatus 100 shown in Fig. 1 are replaced with a two-level converter unit 2B and inverter unit 3B shown in Fig. 33.
[0220] 《2-level converter unit 2B》 In the power conversion device 102 of Fig. 33, the converter unit 2B and inverter unit 3B are configured as two levels, which simplifies the circuits of each converter unit 2B and inverter unit 3B. For example, the number of transistors is reduced, and the C wiring (41) of the neutral point (zero) potential in Fig. 1 is no longer necessary, leaving only the P wiring 40 of a positive potential and the N wiring 42 of a negative potential. Because the C wiring 41 in Fig. 1 is not present, the DC voltage detector that detects the DC voltage is composed of a single DC voltage detector 29 that detects the potential between the electrodes of the smoothing capacitors 22 and 23 on the converter side.
[0221] The converter power conversion sections 21BR, 21BS, and 21BT in the converter unit 2B are configured with two IGBT transistors and two diodes. The two transistors are connected in series, with the collector of the first transistor connected to a P wiring 40 and the emitter of the second transistor connected to an N wiring 42. A diode is connected in anti-parallel to each of the two transistors.
[0222] Although Fig. 33 shows only one (converter power conversion unit 21BS) of the three converter power conversion units 21BR, 21BS, 21BT, in reality, three converter power conversion units 21BR, 21BS, 21BT are provided corresponding to the R phase, S phase, and T phase of the three-phase AC. In Fig. 33, the S-phase power line is connected to the connection point between the first transistor and the second transistor of converter power conversion unit 21BS, and S-phase power is input to converter power conversion unit 21BS.
[0223] 33, an R-phase power line is connected to a connection point between the first transistor and the second transistor of converter power conversion unit 21BR, and R-phase power is input to converter power conversion unit 21BR. Similarly, although not shown, a T-phase power line is connected to a connection point between the first transistor and the second transistor of converter power conversion unit 21BT, and T-phase power is input to converter power conversion unit 21BT. However, P wiring 40 and N wiring 42, which are DC power lines for the three converter power conversion units 21BR, 21BS, and 21BT, are shared by converter power conversion units 21BR, 21BS, and 21BT.
[0224] The R, S, and T phases of the three-phase AC from AC power supply 1 are input separately to three converter power conversion units 21BR, 21BS, and 21BT, but the DC power converted by converter power conversion units 21BR, 21BS, and 21BT is shared and used. That is, the three-phase AC power (voltage) of R, S, and T phases is converted into a single common DC power (voltage). The three converter power conversion units 21BR, 21BS, and 21BT are integrally controlled by converter control device 5.
[0225] Converter unit 2B is equipped with R-phase current detector 26, S-phase current detector 27, and T-phase current detector 28, which detect the currents flowing in the R-phase, S-phase, and T-phase of the three-phase AC, respectively. Furthermore, smoothing capacitors 22 and 23 in converter unit 2B shown in FIG. 33 are a direct representation of smoothing capacitors 22 and 23 in converter unit 2 shown in FIG. 1, but since there is no C wiring 41 (neutral point potential), smoothing capacitors 22 and 23 may be combined into a single capacitor. Note that, as shown in FIG. 33, when smoothing capacitors 22 and 23 are connected in series, the capacitance of the combined capacitor decreases, but the withstand voltage of the voltage across the combined capacitor increases.
[0226] 《Two-level inverter unit 3B》 In Fig. 33, inverter unit 3B is obtained by replacing the three-level inverter unit 3 in Fig. 1 with a two-level inverter unit. The configuration of the two-level inverter unit 3B is a common modification and configuration to the two-level converter unit 2B in Fig. 33, so duplicated explanations will be omitted.
[0227] Power conversion device 102 In the power conversion device 102 shown in FIG. 33, the configuration other than the converter unit 2B and the inverter unit 3B is generally the same as that of the power conversion device 100 of the first embodiment shown in FIG. 1, and therefore redundant description will be omitted where appropriate. As described above, the power conversion device 102 includes a two-level converter unit 2B and an inverter unit 3B. Although current pulsation differs due to the difference between the three-level and two-level conversion methods (pulse waveforms), in the power conversion device 102 too, the converter-side abnormality determiner 71 performs processing similar to that in the first embodiment based on the current detection values of the current detectors 26, 27, and 28, thereby appropriately determining whether there is an abnormality in the current detectors 26, 27, and 28. Furthermore, the inverter-side abnormality determiner 72 performs processing similar to that in the first embodiment based on the current detection values of the current detectors 34, 35, and 36, thereby appropriately determining whether there is an abnormality in the current detectors 34, 35, and 36.
[0228] As described above, in the fourth embodiment, even when the power conversion device 102 includes a two-level converter unit 2B and inverter unit 3B, it is possible to appropriately determine abnormalities in the current detectors 34, 35, and 36. Furthermore, by providing a two-level converter unit 2B and inverter unit 3B, it is possible to simplify the circuit configurations of the converter unit 2B and the inverter unit 3B.
[0229] -Fifth embodiment- A power conversion apparatus according to a fifth embodiment of the present invention will be described with reference to Figs. 34 and 35. Fig. 34 is a diagram showing an example of the configuration of a power conversion apparatus 103 according to the fifth embodiment. In Fig. 34, the same components as those in the power conversion apparatus 100 according to the first embodiment shown in Fig. 1 are denoted by the same reference numerals. The power conversion apparatus 103 according to the fifth embodiment is configured by newly adding a converter-side output estimator 74 and an inverter-side output estimator 75 to the power conversion apparatus 100 according to the first embodiment.
[0230] The converter side output estimator 74 estimates the current detection values I from the plurality of current detectors 26, 27, and 28 corresponding to the R phase, S phase, and T phase of the three-phase AC. R ,I S ,I T Based on this, the current detection value that should be detected when the current detector showing an abnormality is normal is estimated.
[0231] The method for estimating the actual current detection value in converter-side output estimator 74 utilizes the relationship shown in equations (2) and (3) above, i.e., the relationship that if each current detector is normal, the combined current value obtained by adding together the current detection values of converter-side current detectors 26, 27, and 28 is zero. Because of this relationship that the combined current value is zero, if one current detector is abnormal, the combined current detection value of the abnormal current detector can be accurately estimated by subtracting from zero the value obtained by adding together the current detection values of the two healthy current detectors.
[0232] <Configuration example of converter side output estimator 74> Next, an example of the specific configuration and operation of the converter-side output estimator 74 will be described. Fig. 35 is a block diagram showing an example of a partial configuration including the converter-side output estimator 74 and the inverter-side output estimator 75. The block diagram in Fig. 35 shows the relationship between the converter-side output estimator 74, the converter-side abnormality determiner 71, and the converter control device 5, and the relationship between the inverter-side output estimator 75, the inverter-side abnormality determiner 72, and the inverter control device 6. Note that Fig. 35 illustrates a case where an abnormality occurs in the T-phase current detector 28 and the W-phase current detector 36.
[0233] The converter side abnormality judger 71 receives the current detection value I R ,I S ,I T The converter side abnormality judger 71 receives the current detection value I R ,I S ,I T Whether an abnormality has occurred in any of the current detectors 26 to 28 is determined based on whether the composite current value obtained by adding the current detectors 26 to 28 is zero. When the converter-side abnormality determiner 71 determines that any of the current detectors 26 to 28 is abnormal, it outputs abnormality information indicating the abnormal current detector to the converter-side output estimator 74. Here, it is assumed that the T-phase current detector 28 is abnormal, so that the I T Abnormal information is output.
[0234] The converter side output estimator 74 calculates I T When abnormality information is input, the current detection value I R and the current detection value I of the S-phase current detector 27 S The sum of and is subtracted from zero to obtain the estimated value I that is estimated to be detected when the T-phase current detector 28 is normal. TH Then, the calculated estimated value I TH is input to the selection unit 74a of the converter side output estimator 74. The current detection value I T and the estimated value I TH The selection unit 74a to which is input is I T If abnormal information is input, the estimated value ITH Select and output, I T If no abnormality information is input, the current detection value I T Then, the converter side output estimator 74 selects and outputs I T When abnormality information is input, the current detection value I R ,I S and the estimated value I TH is output to the converter control device 5. On the other hand, I T If no abnormality information is input, the converter side output estimator 74 uses the current detection value I R ,I S ,I T is output to the converter control device 5.
[0235] With this configuration, even if an abnormality occurs in the T-phase current detector 28, the current detection value I T Instead, a suitable estimate I TH As a result, the detected current value I R ,I S and the estimated value I TH Based on this, for example, a "standby operation" as described later can be performed. Note that, even when there is an abnormality in the R-phase current detector 26 or the S-phase current detector 27, the same processing operation is performed, and the current detection value I R Instead of I, we use an appropriate estimate RH Or, the current detection value I S Instead of I, we use an appropriate estimate SH will be output.
[0236] <Configuration example of inverter side output estimator 75> The inverter-side output estimator 75 has the same configuration as the converter-side output estimator 74, except that the R phase is replaced with the U phase, the S phase with the V phase, and the T phase with the W phase in the inverter-side output estimator 75. FIG. 35 shows a configuration in which an abnormality occurs in the W-phase current detector 36. The inverter-side output estimator 75 calculates the current detection values I from the multiple current detectors 34, 35, and 36 corresponding to the U, V, and W phases of the three-phase AC. U ,I V ,I WThe method for estimating the actual current detection value is the same as that in the converter side output estimator 74.
[0237] That is, the current detection value I U and the current detection value I of the V-phase current detector 27 V The sum of and is subtracted from zero to obtain the estimated value I that is estimated to be detected when the W-phase current detector 28 is normal. WH The selection unit 75a calculates I W If abnormal information is input, the estimated value I WH Select and output, I W If no abnormality information is input, the current detection value I W The inverter side output estimator 75 selects and outputs I W If abnormal information is input, the current detection value I U ,I V and the estimated value I WH is output to the converter control device 5, and I W If no abnormality information is input, the current detection value I U ,I V ,I W is output to the converter control device 5.
[0238] Although the power conversion device 103 in Fig. 34 is a three-level system, the configuration in the fifth embodiment can be similarly applied to the two-level system shown in Fig. 33. The processes performed by the converter-side abnormality determiner 71 and the converter-side output estimator 74, and the processes performed by the inverter-side abnormality determiner 72 and the inverter-side output estimator 75 are performed, for example, by software in which a processor (not shown) executes a program stored in a memory.
[0239] In the power conversion device 103 according to the fifth embodiment, when it is determined that a current detector has an abnormality, an estimated value is calculated as the current detection value when the abnormal current detector is normal, based on the current detection values of healthy current detectors other than the abnormal current detector. This configuration allows the power conversion device 103 to continue to be used without replacing the abnormal current detector. For example, the power conversion device 203 can be operated continuously for a predetermined period until the next regular inspection. This operation method is referred to as "standby operation." By performing this "standby operation," it is possible to avoid "unplanned shutdown" of the power conversion device 103 due to an abnormality in the current detector.
[0240] <<Modification of the Fifth Embodiment>> Next, a modification of the fifth embodiment will be described with reference to Fig. 36. In this modification of the fifth embodiment, the configurations of the converter-side output estimator 74 and the inverter-side output estimator 75 are replaced from the configuration shown in Fig. 35 with the configuration shown in Fig. 36. In this modification, the converter-side output estimator 74 and the inverter-side output estimator 75 in Fig. 36 have the same functions as in the fifth embodiment shown in Fig. 35.
[0241] Then, the estimated value of the absolute degree of abnormality of each current detector is input as the abnormality degree information output from the converter-side abnormality judger 71 to the converter-side output estimator 74, and as the abnormality degree information output from the inverter-side abnormality judger 72 to the inverter-side output estimator 75. For example, the estimated value of the abnormality degree is the estimated value A of the absolute degree of abnormality described in the second embodiment. U2 ,A V2 ,A W2 36, the converter-side abnormality determinator 71 and the inverter-side abnormality determinator 72 described in the second embodiment are used as the converter-side abnormality determinator 71 and the inverter-side abnormality determinator 72. In the following, the inverter-side output estimator 75 will be described as a representative example.
[0242] As explained in the second embodiment, the calculation unit 7280 of the abnormality determination unit 727 included in the inverter-side abnormality determiner 72 calculates the normalized abnormality degree calculation value A U0C0 ,A V0C0 ,A W0C0 Based on J(t), the absolute anomaly estimate A U2 ,A V2 ,A W2 In the modification of the fifth embodiment, as shown in FIG. 36, the estimated absolute abnormality degree A U2 ,A V2 ,A W2 is output as abnormality degree information from the inverter-side abnormality judger 72 to the inverter-side output estimator 75. Similarly, the converter-side abnormality judger 71 outputs the estimated absolute abnormality degree A R2 ,A S2 ,A T2 is output as abnormality level information.
[0243] The inverter side output estimator 75 estimates the input current detection value I U ,I V ,I W and the estimate of absolute anomaly A U2 ,A V2 ,A W2 Based on this, the estimated value I is used as the current detection value when it is assumed that the current detectors 34, 35, and 36 are normal. UH ,I VH ,I WH is calculated using the following equations (83) to (85). I UH =I U ×(1+A U2 ) …(83) I VH =I V ×(1+A V2 ) …(84) I WH =I W ×(1+A W2 ) …(85) Then, the inverter side output estimator 75 calculates the estimated value I UH ,I VH ,I WH is output to the inverter control device 6.
[0244] The converter-side output estimator 74 may be configured by replacing the U phase with the R phase, the V phase with the S phase, and the W phase with the T phase in the above description. R ,I S ,I T and the estimate of absolute anomaly A R2 ,A S2 ,A T2 Based on the estimated value I RH ,I SH ,I TH Calculate the estimated value I RH ,I SH ,I TH is output to the converter control device 5.
[0245] As described above, in the power conversion device 103 according to the modification of the fifth embodiment, when it is determined that one or more of the current detectors 34, 35, and 36 are abnormal, the estimated value A of the absolute abnormality degree is U2 ,A V2 ,A W2 Based on this, the current detection value (i.e., estimated value I UH ,I VH ,I WH As a result, even if an abnormality occurs in multiple current detectors, the estimated value I UH ,I VH ,I WH By using this, it becomes possible to use the power conversion device 103 without replacing the current detector with an abnormality. For example, the power conversion device can be operated continuously for a predetermined period until the next regular inspection.
[0246] In the first to fifth embodiments described above, abnormality determination has been described for a current detector in a power conversion device interposed between the AC power supply 1 and the electric motor 4 as a load. However, the present invention is not limited to such a configuration, and for example, an AC converter (e.g., a transformer) that converts AC into AC voltage may be provided between the AC power supply 1 and the converter unit 2. Alternatively, an AC converter (e.g., a transformer) that converts AC into AC voltage may be provided between the inverter unit 3 and the electric motor 4. The present invention can also be applied to the abnormality determination of current detectors arranged in all phases (e.g., three phases) between the power converter (converter unit 2) and the power source, or between the power converter (inverter unit 3) and the load (motor 4) in the above configuration.
[0247] <<Regarding abnormality determination in a configuration without a power conversion device>> In the first to fifth embodiments described above, the abnormality determination of the current detectors 26 to 28 and 34 to 36 that detect the current of each phase of the three-phase AC wiring of the power conversion device has been described. However, the abnormality determination methods described in the first to fourth embodiments are not limited to being applicable to current detectors provided in the power conversion device.
[0248] Fig. 37 is a diagram showing an example of such a configuration. Fig. 37 shows a configuration in which three-phase AC power from an AC power supply 1 is directly supplied to an electric motor 4, which is a three-phase load, and a U-phase current detector 34, a V-phase current detector 35, and a W-phase current detector 36 are provided in the three-phase AC wiring input to the electric motor 4. The current detection values I U ,I V ,I W is input to the abnormality determiner 72B. The abnormality determiner 72B is a device that determines whether there is an abnormality in the current detectors 34, 35, and 36 that include a current detection loop, and has the same configuration and function as the inverter-side abnormality determiner 72 described in any of the first to third embodiments described above.
[0249] The electric motor 4 may be star-connected or delta-connected. Although Fig. 37 illustrates the electric motor 4 as a three-phase load, the load is not limited to an electric motor. Although Fig. 37 illustrates the case of three-phase AC, the load is not necessarily limited to three phases and may be multi-phase other than three phases.
[0250] 37, the three-phase AC power of the AC power supply 1 is directly supplied to the electric motor 4 which is a three-phase load, but an AC converter (for example, a transformer or an AC-AC power converter) may be provided between the AC power supply 1 and the electric motor 4. In this case, it becomes easier to adjust the appropriate voltage between the three-phase AC voltage supplied by the AC power supply 1 and the electric motor 4 which is a three-phase load.
[0251] According to the embodiment of the present invention described above, the following advantageous effects are achieved.
[0252] (C1) As shown in FIGS. 1 and 5, the power conversion device 100 provided between the AC power source 1 and the electric motor 4, which is a load device, includes current detectors 34, 35, and 36 that detect, for each phase, a multi-phase AC current flowing between the AC power source 1 and the power conversion device 100 or between the power conversion device 100 and the electric motor 4, and current detection values I U ,I V ,I W The first sum of I I0 (=I U +I V +I W ), and an adder 721 that calculates the first sum I I0 and the current detection value I U ,I V ,I W The first product D is the product of U ,D V ,D W for each of the U phase, V phase, and W phase; and U ,D V ,D W and a second product I, which is the product of two current detection values of different phases. V I W ,IW I U ,I U I V and a plurality of second products I V I W ,I W I U ,I U I V The second summation (I U I V +I V I W +I W I U ), and an adder 725C that calculates a second sum (I U I V +I V I W +I W I U ) and a filter 726C that reduces or removes the harmonic components contained in the current detection value I U ,I V ,I W Squared I U 2 ,I V 2 ,I W 2 and multipliers 724U to 724W for calculating the third sum (I U 2 +I V 2 +I W 2 ), and an adder 725 that calculates the third sum (I U 2 +I V 2 +I W 2 ) and the filter 726 that reduces or removes the harmonic components contained in the output F of the filters 723U to 723W. U ,F V ,F W , the output K of the filter 726C I and the output of filter 726, H I and an abnormality determination unit 727 that generates the abnormality degrees of the current detectors 34, 35, and 36 based on the abnormality degrees and determines whether the current detectors 34, 35, and 36 are abnormal based on the abnormality degrees.
[0253] In the above configuration, the product D calculated by the multipliers 722U to 722W is U ,D V ,D W By using this, even if the three-phase load (motor 4) connected to the power conversion device 100 is unbalanced, it is possible to properly detect an abnormality in the current detector in the power conversion device 100. Furthermore, since the filters 723U, 723V, 723W, 726, and 726C reduce or remove harmonic components contained in the input signal, it is possible to sufficiently remove current pulsation even if the frequency of the current pulsation is close to the fundamental frequency of the current waveform. Therefore, the output F U ,F V ,F W ,K I and H I By determining whether the current detectors 34, 35, and 36 are abnormal based on the degree of abnormality based on the above, it is possible to correctly determine whether the current detectors 34, 35, and 36 are abnormal, even if the three-phase load is unbalanced or the current waveform contains current pulsation of a magnitude that cannot be ignored or a current pulsation of a frequency close to the current fundamental wave frequency.
[0254] 1, current detectors 26, 27, and 28 are also provided between the AC power supply 1 and the power conversion device 100, and the converter-side abnormality determiner 71 has the same configuration and function as the inverter-side abnormality determiner 72. Therefore, the converter-side configuration also achieves the same effects as those described above.
[0255] (C2) Furthermore, as shown in FIG. 6, the power conversion device 100 converts the output F U ,F V ,F W , the output K of the filter 726C I and the output of filter 726, H I Based on this, the degree of abnormality of the current detectors 34, 35, and 36 is calculated as the sum (A U0C0 +A V0C0 +A W0C0 ) is always set to zero. U0C0,A V0C0 ,A W0C0 The abnormality determination unit 727 further includes a calculation unit 7275 that calculates the plurality of normalized abnormality degree calculation values A U0C0 ,A V0C0 ,A W0C0 If the maximum value among the absolute values of these is greater than a preset abnormality determination threshold (predetermined value α), that is, if equation (64) is established, it is determined that at least one of the multiple current detectors 34, 35, and 36 is abnormal. MAX(|A U0C0 |,|A V0C0 |,|A W0C0 |) > Predetermined value α …(64)
[0256] Output F U ,F V ,F W ,H I ,K I Based on this, the normalized anomaly degree is calculated as A U0C0 ,A V0C0 ,A W0C0 By calculating the normalized abnormality degree calculation value A, it is possible to determine whether or not there is an abnormality in each of the current detectors 34, 35, and 36. U0C0 ,A V0C0 ,A W0C0 can be calculated with a small error.
[0257] (C3) As shown in FIG. 7, the abnormality determination unit 727 calculates a plurality of normalized abnormality degree calculation values A U0C0 ,A V0C0 ,A W0C0 It is determined whether the current detectors 34, 35, and 36 can be classified into two elements with high similarity and one element with low similarity to those two elements, that is, whether the above-mentioned formula (65) is satisfied. If formula (65) is satisfied and classification is possible, it is determined that only one of the multiple current detectors 34, 35, and 36 is abnormal. If formula (65) is not satisfied and classification is not possible, it is determined that two or more of the current detectors 34, 35, and 36 are abnormal. As a result, it is possible to identify whether one or two or more current detectors are abnormal.
[0258] (C4) As shown in FIG. 7, the abnormality determination unit 727 calculates a plurality of normalized abnormality degree calculation values A U0C0 ,A V0C0 ,A W0C0 The magnitude of the absolute value of each of the normalized anomaly degree calculation values is compared, and the current detector corresponding to the normalized anomaly degree calculation value with the largest absolute value is determined to be abnormal. As a result, it is possible to identify which current detector is abnormal.
[0259] (C5) As shown in FIGS. 20 to 23, the power conversion device 101 calculates the average value of the detection gain (G U +G V +G W ) / 3 and current amplitude I IA The product of (B I (t1)) is the operating condition S of the load device 4. I (t1) and the output H of the filters 726 and 726C. I ,K I Based on this, a physical quantity (B I (t)) by equation (72), and a calculation unit 7276, I (t1), Operating condition S I B calculated by the calculation unit 7276 under the same operating conditions as (t1) I (t), output F of filter 723U~723W U ,F V ,F W , the output K of the filter 726C I and the output of filter 726, H I Based on this, an estimated value A of the absolute degree of abnormality representing the absolute amount of the abnormality degree of the current detectors 34, 35, and 36 is calculated. U2 (t),A V2 (t),A W2 The abnormality determination unit 727 further includes calculation units 7279 and 7280 for calculating the absolute abnormality degree estimate A U2 (t),A V2 (t),A W2 Based on (t), it is determined whether the current detectors 34, 35, and 36 are abnormal.
[0260] BI is a quantity proportional to the average value of the detection gain of the current detectors 34, 35, and 36. Therefore, when the current detectors 34, 35, and 36 are normal, B I (t1) is stored in advance, and B I (t1), B I Calculated value B for the operating conditions equivalent to the motor operating conditions in (t1) I (t) is used to estimate the absolute anomaly A U2 (t),A V2 (t),A W2 Therefore, even if one or more current detectors become abnormal, the estimated absolute abnormality value A U2 ,A V2 ,A W2 can be calculated with high accuracy, and the estimated value A U2 ,A V2 ,A W2 By using this, abnormalities in the current detectors 34, 35, and 36 can be determined with high accuracy.
[0261] 20, current detectors 26, 27, and 28 are also provided between the AC power supply 1 and the power conversion device 101, and the converter-side abnormality determiner 71 has the same configuration and function as the inverter-side abnormality determiner 72. A storage unit (not shown) included in the converter-side abnormality determiner 71 stores the product of the average value of the detection gain and the current amplitude when the current detectors 26, 27, and 28 are normal, in association with the operating conditions of the AC power supply 1. Therefore, the converter-side configuration also achieves the same effects as those described above.
[0262] (C6) Furthermore, the output F of filters 723U to 723W U ,F V ,F W , the output K of the filter 726C I and the output of filter 726, H I Based on the above, a normalized abnormality degree calculation value A is calculated, which represents the degree of abnormality of each of the current detectors 34, 35, and 36 and is set so that the sum of the normalized abnormality degrees for the plurality of phases is always zero. U0C0 ,A V0C0 ,A W0C0The calculation units 7279 and 7280 are provided with a calculation unit 7275 that calculates B I (t) and B I (t1), and the normalized abnormality calculation value A calculated by the calculation unit 7275 U0C0 ,A V0C0 ,A W0C0 Based on this, the absolute anomaly estimate A U2 (t),A V2 (t),A W2 (t) can be calculated. B I (t) and B I The ratio to (t1) represents the degree of change in the average value of the detection gain at the present time (time t) with the normal case as the reference.
[0263] (C7) For example, it is desirable to change the filter settings (e.g., time constant or cutoff frequency) of at least one of the filters shown in Fig. 1, i.e., filters 723U to 723W, filter 726C, and filter 726, in accordance with the frequency of the AC current flowing through current detectors 34, 35, and 36. It is preferable to change the settings of all filters. Even when the frequency of the AC current changes, it is possible to appropriately reduce or remove the AC component contained in the filter input.
[0264] (C8) The predetermined value α on the right side of equation (64), which is the abnormality determination threshold, is preferably changed according to the magnitude of the AC current flowing through the current detectors 34, 35, and 36. For example, in principle, when the current is 0, the degree of abnormality of the current detector becomes invisible, making abnormality diagnosis difficult. In order to avoid erroneous determination when the current value is small, the current detection value I U ,I V ,I W The predetermined value α is changed depending on the magnitude of the
[0265] (C9) As shown in FIG. 31, at least one of the plurality of current detectors further includes filters 728U to 728W and adder-subtractors 729U to 729W that function as filters for removing or reducing DC components contained in the current detection value, and the current detection value I U ,I V ,IW Alternatively, the outputs of adders / subtractors 729U to 729W may be used instead. The filter function is preferably provided for all of the U, V, and W phases as shown in Fig. 31, but may be provided for at least one phase. Also, instead of the filter function consisting of filter 728U and adder / subtractor 729U, a high-pass filter or the like may be used to pass frequencies other than DC.
[0266] (C10) As shown in FIGS. 34 and 35, when the abnormality determination unit 717 (see FIG. 4) determines that the current detectors 26, 27, and 28 are abnormal, the power conversion device 103 determines that the current detection value I R ,I S Based on this, the current detection value I TH The converter side output estimator 74 estimates the current detection value I of the current detectors 26 and 27 that are not determined to be abnormal. R ,I S and the current detection value I estimated by the converter side output estimator 74. TH As a result, the current detection value I R ,I S and the estimated value I TH Based on this, the power conversion device 203 can be operated continuously for a predetermined period until the next regular inspection, for example. Note that a similar configuration can also be adopted on the inverter side to which the electric motor 4 is connected, and similar effects can be achieved.
[0267] (C11) As shown in FIGS. 34 and 36, when the abnormality determination unit 727 (see FIG. 5) determines that the current detectors 34, 35, and 36 are abnormal, the power conversion device 103 calculates the estimated value A of the absolute abnormality degree of the current detectors 34, 35, and 36. U2 (t),A V2 (t),A W2 (t) and the current detection value I of current detectors 34, 35, and 36 U ,I V ,I W Based on this, the current detection value (i.e., estimated value I UH ,IVH ,I WH ) of the current detectors 34, 35, and 36. U ,I V ,I W Instead, the estimated value I estimated by the inverter side output estimator 75 UH ,I VH ,I WH Based on this, the driving operation continues.
[0268] As a result, even if an abnormality occurs in more than one of the current detectors 34, 35, and 36, the estimated value I UH ,I VH ,I WH By using this, it becomes possible to use the power conversion device 103 without replacing the current detector with an abnormality. For example, the power conversion device can be operated continuously for a predetermined period until the next regular inspection. Note that a similar configuration can also be used on the converter side to which the AC power supply 1 is connected, and the same effects can be achieved.
[0269] (C12) As shown in Fig. 1, the power conversion device 100 further includes a display 73 as an information presenting unit that presents abnormality information when the abnormality determination unit 727 determines an abnormality in the current detectors 34, 35, 36. By displaying the abnormality information on the display 73, for example, it is possible to quickly notify the occurrence of an abnormality in the power conversion device 100 and the details of the abnormality, and it is possible to quickly respond to the abnormality.
[0270] In the above-described embodiment, the configuration in which the display 73 is provided as the information presentation unit that presents the abnormality information has been exemplified, but the information presentation unit is not limited to the display 73. For example, the abnormality information may be transmitted to a higher-level device (e.g., a main controller) of the power conversion device 100. The higher-level device to which the information has been input automatically performs abnormality countermeasure processing, thereby enabling a more rapid response.
[0271] (C13) Furthermore, a display 73 is provided as an information presenting unit that presents abnormality information, and the abnormality determining unit 727 has a history of a plurality of abnormality degrees, for example, an estimated value A of the absolute abnormality degree. U2(t),A V2 (t),A W2 Absolute value of (t) |A U2 (t)|,|A V2 (t)|,|A W2 (t)| and the normalized anomaly calculation value A U0C0 ,A V0C0 ,A W0C0 Based on this history, the period until an abnormality occurs in the current detectors 34, 35, and 36 is predicted, and the predicted result is displayed as abnormality information on the display 73. As a result, it is possible to grasp the signs of an abnormality in advance, and to prevent the abnormality from occurring and to prepare in advance for a response when an abnormality does occur.
[0272] (C14) As shown in FIG. 5, a method for determining an abnormality in current detectors 34, 35, and 36 that detect, for each phase, a current of multiple phases flowing between an AC power source 1 and an electric motor 4 to which power from the AC power source 1 is supplied, wherein the current detection values I U ,I V ,I W The first summation (I U +I V +I W ) and calculate the first sum (I U +I V +I W ) and current detection value I U ,I V ,I W The first product (D U ,D V ,D W ) for each of the plurality of phases, and a plurality of first products (D U ,D V ,D W ) is filtered to reduce or eliminate harmonic components, and the second product I V I W ,I W I U ,I U I V and calculating the second products I V I W ,I W I U ,IU I V The second summation (I U I V +I V I W +I W I U ) and calculate the second sum (I U I V +I V I W +I W I U ) is filtered to reduce or eliminate harmonic components, and the detected current value I U ,I V ,I W Squared I U 2 ,I V 2 ,I W 2 Calculate each phase individually and use multiple squared I U 2 ,I V 2 ,I W 2 The third summation (I U 2 +I V 2 +I W 2 ) and calculate the third sum (I U 2 +I V 2 +I W 2 ) is filtered to reduce or eliminate harmonic content, and a plurality of first products (D U ,D V ,D W ) filtering result F U ,F V ,F W and the second sum (I U I V +I V I W +I W I U ) filtering result K I and the third sum (I U 2 +I V 2 +I W2 ) filtering result H I The degree of abnormality of each of the current detectors 34, 35, and 36 is generated based on the above, and the abnormality of each of the current detectors 34, 35, and 36 is determined based on the degree of abnormality.
[0273] First product D U ,D V ,D W By using this, even if the three-phase load (motor 4) connected to the power conversion device 100 is unbalanced, it is possible to appropriately detect an abnormality in the current detector in the power conversion device 100. In addition, the filtering result F, which is the result of reducing or removing the harmonic components, U ,F V ,F W ,K I ,H I By using the filter processing result F, the current pulsation can be sufficiently removed even if the frequency of the current pulsation is close to the fundamental frequency of the current waveform. U ,F V ,F W ,K I ,H I By determining whether the current detectors 34, 35, and 36 are abnormal based on the degree of abnormality based on the above, it is possible to correctly determine whether the current detectors 34, 35, and 36 are abnormal, even if the three-phase load is unbalanced or the current waveform contains current pulsation of a magnitude that cannot be ignored or a current pulsation of a frequency close to the current fundamental wave frequency.
[0274] The present invention is not limited to the above-described embodiments, and various modifications are possible without departing from the spirit of the present invention. For example, the above-described embodiments are merely examples for the purpose of explaining the present invention in an easy-to-understand manner, and the present invention is not necessarily limited to those including all of the configurations described above. Furthermore, it is possible to replace part of the configuration of one embodiment with part of the configuration of another embodiment, and it is also possible to add, delete, or replace part or all of the configuration of another embodiment with the configuration of one embodiment.
[0275] For example, various configurations such as those described below are also possible. Other examples of current detectors In the example shown in Fig. 1, current detectors 34, 35, and 36 are provided between the inverter unit 3 and the load, i.e., the electric motor 4, and an inverter-side abnormality judger 72 judges whether the current detectors 34, 35, and 36 are abnormal. However, the placement of the current detectors is not limited to between the inverter unit and the electric motor. For example, as shown in Fig. 38, a three-shunt circuit configuration may be used in which shunt resistors 34B, 35B, and 36B are provided on the DC power supply side of the inverter unit 31 to serve as current detectors.
[0276] Shunt resistors 34B, 35B, and 36B for measuring AC current are provided on the N wiring 42 side of each of inverter power conversion units 31U, 31V, and 31W. When inverter power conversion units 31U, 31V, and 31W operate and AC current flows through shunt resistors 34B, 35B, and 36B, respectively, shunt resistors 34B, 35B, and 36B detect and measure the AC current of the U phase, V phase, and W phase of the three-phase AC. Note that shunt resistors 34B, 35B, and 36B may also be provided on the P wiring 40 side to detect AC current. While FIG. 38 illustrates a configuration in which shunt resistors are provided in inverter unit 31, current detectors 26, 27, and 28 may also be replaced with shunt resistor current detectors in the three converter power conversion units 21R, 21S, and 21T of converter unit 2 in FIG. 1.
[0277] <<Location of current detector and abnormality detector>> In the above-described embodiment, the converter-side abnormality judger 71 judges whether current detectors 26, 27, and 28 have an abnormality, and the inverter-side abnormality judger 72 judges whether current detectors 34, 35, and 36 have an abnormality. However, it is not essential to provide an abnormality judger on both the converter side and the inverter side as described above, and the abnormality judger may be provided on either the converter side or the inverter side depending on the situation. Even in this case, the abnormality judgement method described in the above-described embodiment can be applied.
[0278] Transistor In the above-described power conversion devices 100 to 103, the transistors constituting the converter power conversion unit and the inverter power conversion unit have been described as being IGBTs (Insulated Gate Bipolar Transistors). However, the transistors are not limited to IGBTs, and may be MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors) or superjunction MOSFETs.
[0279] <<Number of power converter levels>> In the first embodiment shown in Fig. 1 and the fourth embodiment shown in Fig. 33, a three-level converter or a two-level converter is shown as an example. However, the number of levels of the level converter is not limited to three or two. The abnormality detection process for a current detector in the present invention can also be applied to abnormality detection for current detectors arranged in all phases between a power converter and a power source or between a power converter and a load in any multi-level converter (for example, five levels or seven levels).
[0280] Software and hardware processing The processes performed by the converter-side abnormality determiner 71, converter-side output estimator 74, inverter-side abnormality determiner 72, and inverter-side output estimator 75 are assumed to be processed by software in which a processor (not shown) executes a program stored in memory. However, these configurations are not limited to software processing, and some or all of these processes may be performed by hardware circuits.
[0281] <<Modification of the Second Embodiment>> A modified example of the second embodiment will be described. In the modified example of the second embodiment, even during operation in which optional control is effective, the absolute degree of abnormality is calculated, and an abnormal current detector is determined based on the calculated absolute degree of abnormality. The modified example of the second embodiment has the effect of being able to calculate the absolute degree of abnormality even when the pulse command when the current detector is normal and the pulse command when the current detector is abnormal due to optional control during operation do not match.
[0282] In a modification of the second embodiment described below, the absolute degree of abnormality is calculated, and an abnormal current detector is determined based on the calculated absolute degree of abnormality.
[0283] Fig. 39 is a diagram showing an example of the configuration of a power conversion device 104 according to a modified example of the second embodiment of the present invention. In Fig. 39, the same components as those in the power conversion device 101 according to the second embodiment shown in Fig. 20 are denoted by the same reference numerals.
[0284] The power conversion device 104 of the modified example of the second embodiment differs from the power conversion device 101 of the second embodiment mainly in the following configuration. The converter-side abnormality determiner 71 receives a signal (AC power operating condition S C In addition to the signal (motor operating condition S I (t)) is input to the inverter side abnormality determiner 72. I In addition to (t), AC power operating conditions S C (t) is entered.
[0285] In the modification of the second embodiment, the converter-side abnormality judger 71 has a configuration similar to that of the converter-side abnormality judger 71 of the first embodiment shown in Fig. 4. Moreover, the inverter-side abnormality judger 72 has a configuration similar to that of the inverter-side abnormality judger 72 of the second embodiment shown in Fig. 21. However, as will be described later, the configurations of the abnormality judgement units 717 and 727 are different from each other.
[0286] Fig. 40 is a block diagram of the abnormality determination unit 727 in the inverter-side abnormality determiner 72 of the power conversion device 104 according to a modification of the second embodiment. The modification of the second embodiment differs from the abnormality determination unit 727 of the second embodiment shown in Fig. 22 in that the abnormality determination unit 727 has calculation units 7276B, 7279B, 7280B, an operating condition determination unit 7277B, and a memory unit 7278B instead of the calculation units 7276, 7279, 7280, an operating condition determination unit 7277, and a memory unit 7278B shown in Fig. 22.
[0287] Fig. 41 is a block diagram of an abnormality determination unit 717 in the converter-side abnormality determiner 71 of the power conversion device 104 according to a modification of the second embodiment. Although not shown, the abnormality determination unit 717 according to the second embodiment has a configuration similar to that of the abnormality determination unit 727 in the inverter-side abnormality determiner 72 shown in Fig. 22. In contrast, the modification of the second embodiment differs from the abnormality determination unit 717 according to the second embodiment in that the abnormality determination unit 717 includes calculation units 7176B, 7179B, 7180B, an operating condition determination unit 7177B, and a storage unit 7178B, similar to the abnormality determination unit 727 shown in Fig. 40.
[0288] In the modification of the second embodiment, the converter-side abnormality judger 71 and the inverter-side abnormality judger 72 shown in Fig. 39 have similar configurations. Furthermore, the blocks of the abnormality judgement unit 727 in the inverter-side abnormality judger 72 shown in Fig. 40 and the blocks of the abnormality judgement unit 717 in the converter-side abnormality judger 71 shown in Fig. 41 have similar functions. Therefore, as in the second embodiment, the calculation units 7276B, 7279B, 7280B, the operating condition judgement unit 7277B, and the memory unit 7278B of the abnormality judgement unit 727 in the inverter-side abnormality judger 72 will be described as representatives, and the calculation units 7176B, 7179B, 7180B, the operating condition judgement unit 7177B, and the memory unit 7178B of the abnormality judgement unit 717 in the converter-side abnormality judger 71 will not be described. Although not explained here, the configuration and relational expressions related to the converter-side abnormality judger 71 can be similarly explained by replacing the subscripts U, V, and W with R, S, and T in the configuration and relational expressions related to the inverter-side abnormality judger 72 described below.
[0289] <Arithmetic unit 7276B> The calculation unit 7276B receives the signal S relating to the motor operating conditions from the inverter control device 6. I Based on this, the estimated value of AC power (estimated inverter power value) P output by the inverter unit 3 to the motor 4 is calculated. I For example, the inverter output current command value output by the speed controller 62 and the inverter voltage command value output by the current controller 63 are calculated based on the motor operating conditions S I (t) is obtained from the inverter control device 6, and based on the product of these, the inverter power estimation value P I Instead of using the current command value output by the speed controller 62, the current detection values detected by the current detectors 34, 35, and 36 may be used. Also, the estimated value of AC power (estimated inverter power value) P IThe calculation method of is not limited to the above example. For example, one or both of the current values of multiple phases (at least one of the current detection values, the current estimation values, and the current command values) and the voltage values of multiple phases (at least one of the voltage detection values, the voltage estimation values, and the voltage command values) may be calculated based on the motor operating condition S I (t) from the inverter control device 6, and an estimated inverter power P I It is sufficient to be able to calculate
[0290] <Operating condition determination unit 7277B> The operation condition determination unit 7277B receives the motor operation condition S from the inverter control device 6. I (t), AC power operating conditions S from the converter control device 5 C (t), and P calculated by the calculation unit 7276B I The operation condition determination unit 7277B determines the motor operation conditions S I (t) and AC power operating conditions S C (t) and P stored in the memory unit 7278B I (t1) Motor operating condition S I (t1) and AC power operating conditions S C (t1) and (t2) are determined to be under the same operating conditions. I (t)=S I (t1) and S C (t)=S C If it is (t1), the judgment result is SD I =YES and P stored in the memory unit 7278B I (t1) is output. Meanwhile, S I (t)≠S I (t1) or S C (t)≠S C If (t1), or if P I If (t1) is not stored, the judgment result SD I In addition, the operation condition determination unit 7277B outputs only the motor operation condition S I (t) and AC power operating conditions S CIt is not limited to using both of (t), for example, motor operation condition S I (t) or AC power operation condition S C Only one of (t) may be used for determining the operation condition. In the storage unit 7278B, a plurality of motor operation conditions S I (t) or AC power operation condition S C (t), and a plurality of motor operation conditions S I (t) or AC power operation condition S C (t) and the corresponding inverter power estimation values P I may be stored respectively.
[0291] <Determination method in the operation condition determination unit 7277B> For the above determination in the operation condition determination unit 7277B, for example, the estimated values of the speed of the motor 4 and the load of the motor 4 included in the motor operation condition S I (t) from the inverter control device 6 may be used. FIG. 42 is a diagram showing an example of the time change of the speed, speed change rate (acceleration), and load of the motor 4. In FIG. 42, at times t3 to t4, t7 to t8, and time t 11 ~t 12 , since the speed is constant (acceleration is 0) and the same, and the load is the same, the operation condition determination unit 7277B determines that the motor operation condition is the same operation condition during these times. Also, at times t5 to t6 and time t9 to t 10 , since the speed is constant (acceleration is 0) and the same, and the load is the same, the operation condition determination unit 7277B determines that the motor operation condition is the same operation condition during these times. Also, at times t4 to t5 and time t 12 ~t 13 when the speed changes, since the speed change rate (acceleration) shown in FIG. 42(b) is the same, the operation condition determination unit 7277B defines an arbitrary Δt A satisfying 0 < Δt A < t5 - t4, and for the time t4 + Δt A and time t 12 + Δt AOn the other hand, at times t4 to t5 and t8 to t9, the accelerations do not match, so the operating condition determination unit 7277B determines that the motor operating conditions are not the same between these times. For convenience of explanation, it is assumed in FIG. 42(c) that the load does not change over time and is constant. However, if, for example, the load changes over time between times t5 to t6 and t9 to t 10 If the loads are inconsistent between these times, the operating condition determining unit 7277B determines that the motor operating conditions are not the same between these times.
[0292] In the judgment of the operation condition judgment unit 7277B, the AC power operation condition S input from the converter control device 5 C The determination of the operating conditions based on (t) can be performed in the same manner as above. For example, the estimated value of the AC power (estimated converter power value) P C (t) under AC power operating conditions S C (t) is input from the converter control device 5 to the operating condition determination unit 7277B, and S stored in the storage unit 7278B C (t1) and S C In addition, any information relating to the operating state of the converter unit 2 may be used as the AC power operating condition S C The converter control device 5 inputs the information (t) to the operating condition determining unit 7277B, and the operating condition determining unit 7277B can determine whether the operating conditions are the same or not based on the information.
[0293] <Arithmetic unit 7279B> The calculation unit 7279B receives the P calculated by the calculation unit 7276B. I (t) and P output from the operating condition determination unit 7277B I (t1) is input. The calculation unit 7279B calculates P I (t) and P I (t1) and J expressed by equation (86) below. I (t) and calculate the calculated JI Output (t).
[0294] At a certain time t2, the motor operating conditions (speed and torque of the motor 4) S I (t2) is the motor operating condition S at the reference time t1. I (t1). The power estimate P at time t2 is assumed to be equal to I (t2) is the normal power estimation value P I Using (t1), it is expressed as the following equation (86). P I (t2)=J I (t2)×P I (t1) …(86) However, J in equation (86) I (t2) is the power estimation value P at the reference time t1 when all current detectors are normal. I The power estimation value P at a certain time t2 based on (t1) I This is a coefficient that represents the proportion of (t2).
[0295] Also, the average absolute gain G at any time t IMEAN (t) is defined by the following equation (87). G IMEAN (t)=(G U (t)+G V (t)+G W (t)) / 3 …(87)
[0296] Furthermore, the true power output from the inverter unit 3 to the motor 4 is P ITRUE Since the power required to rotate the electric motor 4 at the same speed, torque and acceleration is almost the same, S I (t2)=S I If (t1), the true power P ITRUE The following equation (88) holds true for P ITRUE (t2)=P ITRUE (t1) …(88)
[0297] At a certain time t2, the true power P ITRUE(t2) and the estimated power value P I The relationship with (t2) is the average gain G IMEAN It is expressed by equation (89) using the above formula. If all the current detectors are normal (average gain G IMEAN At the reference time t1, the true power P ITRUE (t1) and the power estimate P I The relationship of (t1) is expressed by equation (90). P I (t2)=G IMEAN (t2)×P ITRUE (t2) …(89) P I (t1)=P ITRUE (t1) …(90)
[0298] From equations (88) to (90), the estimated power value P I (t2) and the normal power estimation value P I The relationship with (t1) is expressed by equation (91). P I (t2)=G IMEAN (t2)×P I (t1) …(91)
[0299] That is, P in the normal state at the reference time t1 I (t1) and the reference time t1 and the motor operating conditions are the same (S I (t2)=S I (t1)) P at some time t2 I Substituting (t2) into equation (86) gives J I (t2) and the detection gain G U (t2), G V (t2), G W (t2) average value G IMEAN (t2) can be calculated.
[0300] <Arithmetic unit 7280B> The calculation unit 7280B receives the normalized abnormality degree calculation value A calculated by the calculation unit 7275. U0C0 (t),A V0C0 (t),A W0C0 (t) and J calculated by the calculation unit 7279BI (t) is input to the calculation unit 7280B. U0C0 (t),A V0C0 (t),A W0C0 (t) and J I (t) and the estimated absolute anomaly A at time t. U2 (t),A V2 (t),A W2 The method for calculating the estimated value of the absolute abnormality degree is to replace J in the equations (77) to (79) described in the second embodiment with J I Just replace it with.
[0301] Therefore, when all the current detectors 34, 35, and 36 are normal, I (t1) is stored in advance, and P at time t where the operating conditions are the same as time t1 is calculated. I (t) I If it is possible to calculate the absolute degree of abnormality of each of the current detectors 34, 35, and 36 at time t, it is possible to calculate the absolute degree of abnormality of each of the current detectors 34, 35, and 36 at time t.
[0302] <Regarding the processing operation of the abnormality determination unit 727> Fig. 43 is a flowchart showing an example of the abnormality determination process in the abnormality determination section 727 of Fig. 40. The procedure of the abnormality determination process will be described below with reference to the flowchart of Fig. 43.
[0303] Steps S301 to S304 The processing in steps S301 to S304 is the same as that in steps S201 to S204 in Fig. 23. That is, steps S201 to S204 can be read as steps S301 to S304, and a description thereof will be omitted here.
[0304] Step S305 In step S305, the abnormality determination unit 727 calculates the normalized abnormality degree calculated value A at the current time t by the calculation units 7271 to 7275. U0C0 (t),A V0C0 (t),A W0C0 (t) and P by the calculation unit 7276B I Calculate (t).
[0305] Step S306 In step S306, the abnormality determination unit 727 determines the determination result SD I Determine whether it is YES or NO, and SD I If YES, proceed to step S307. I If NO, the series of abnormality determination processes is terminated.
[0306] Step S307 In step S307, the abnormality determination unit 727 calculates J by the calculation units 7279B and 7280B. I (t),A U2 (t),A V2 (t),A W2 Calculate (t).
[0307] Steps S308 to S315 The processing in steps S308 to S315 is the same as that in steps S208 to S215 in Fig. 23. That is, steps S208 to S215 can be read as steps S308 to S315, and a description thereof will be omitted here.
[0308] The series of abnormality determination processes shown in Fig. 43 are executed at predetermined time intervals. I (t1), motor operating conditions S I (t1) and AC power operating conditions S C The storage of (t1) is performed, for example, by storing a predetermined P I , motor operating conditions S I and AC power operating conditions S C Alternatively, in step S315 of FIG. 43, the S input to the operating condition determination unit 7277B is stored. I (t), S C (t) and P I (t) is stored in the storage unit 7278B, and the motor operating conditions S I (t1), AC power operating conditions S C(t1) and P I (t1) may be stored in the storage unit 7278B.
[0309] Furthermore, even when a modified example of the second embodiment is used instead of the second embodiment, it is still applicable to the same embodiments as the third embodiment and thereafter.
[0310] According to the modification of the second embodiment of the present invention described above, the following advantageous effects are achieved.
[0311] (C15) As shown in FIGS. 39 to 43, the power conversion device 104 calculates an estimated inverter power P I and a calculation unit 7276B that calculates the inverter power estimated value P when the current detectors 34, 35, and 36 are normal. I (t1) is the operating condition of at least one of the AC power source 1 and the electric motor 4 (electric motor operating condition S I (t1), AC power operating conditions S C (t1)) and the memory unit 7278B stores the motor operation conditions S I (t1), AC power operating conditions S C (t1) and the inverter power estimated value P I (t1) and operating conditions S I (t1), S C The inverter power estimated value P calculated by the calculation unit 7276B under the same operating conditions as (t1) I (t1) I Based on this, the average value G of the detection gain of the current detectors 34, 35, and 36 is calculated. IMEAN A calculation unit 7279B for calculating (t), and J I , output F of filter 723U~723W U ,F V ,F W , the output K of the filter 726C I and the output of filter 726, H I Based on this, an estimated value A of the absolute degree of abnormality representing the absolute amount of the abnormality degree of the current detectors 34, 35, and 36 is calculated. U2(t),A V2 (t),A W2 The abnormality determination unit 727 further includes calculation units 7279B and 7280B for calculating the absolute abnormality degree estimate A U2 (t),A V2 (t),A W2 Based on (t), it is determined whether the current detectors 34, 35, and 36 are abnormal.
[0312] P I is a quantity proportional to the average value of the detection gain of the current detectors 34, 35, and 36. Therefore, when the current detectors 34, 35, and 36 are normal, P I (t1) is stored in advance, and P I (t1),P I Calculated value P for the operating conditions equivalent to the motor operating conditions in (t1) I (t) is used to estimate the absolute anomaly A U2 (t),A V2 (t),A W2 Therefore, as in the second embodiment, even if one or more current detectors become abnormal, the estimated absolute abnormality degree A U2 ,A V2 ,A W2 can be calculated with high accuracy, and the estimated value A U2 ,A V2 ,A W2 By using this, abnormalities in the current detectors 34, 35, and 36 can be determined with high accuracy.
[0313] 39, current detectors 26, 27, and 28 are also provided between the AC power supply 1 and the power conversion device 104, and the converter-side abnormality determiner 71 has the same configuration and function as the inverter-side abnormality determiner 72. A storage unit 7179B included in the converter-side abnormality determiner 71 stores an estimated value of the converter power when the current detectors 26, 27, and 28 are normal, in association with the operating conditions of at least one of the AC power supply 1 and the electric motor 4. Therefore, the converter-side configuration also achieves the same effects as those described above.
[0314] (C16) Furthermore, the output F of filters 723U to 723W U ,F V ,F W , the output K of the filter 726C I and the output of filter 726, H I Based on the above, a normalized abnormality degree calculation value A is calculated, which represents the degree of abnormality of each of the current detectors 34, 35, and 36 and is set so that the sum of the normalized abnormality degrees for the plurality of phases is always zero. U0C0 ,A V0C0 ,A W0C0 The calculation units 7279B and 7280B are provided with a calculation unit 7275 for calculating J I and the normalized abnormality calculation value A calculated by the calculation unit 7275 U0C0 ,A V0C0 ,A W0C0 Based on this, the absolute anomaly estimate A U2 (t),A V2 (t),A W2 (t) may be calculated. I represents the degree of change in the average value of the detection gain at the current time (time t) based on the normal case.
[0315] (C17) In the power conversion device 104, when the abnormality determination unit 727 determines that the current detectors 34, 35, and 36 are abnormal, the estimated value A of the absolute abnormality degree of the current detectors 34, 35, and 36 is U2 (t),A V2 (t),A W2 (t) and the current detection value I of current detectors 34, 35, and 36 U ,I V ,I W Based on this, the current detection value (i.e., estimated value I UH ,I VH ,I WH ) of the current detectors 34, 35, and 36. U ,I V ,I W Instead, the estimated value I estimated by the inverter side output estimator 75 UH ,I VH ,IWH Based on this, the operation may continue.
[0316] As a result, even if multiple ones of the current detectors 34, 35, and 36 malfunction, UH , I VH , I WH by using [I], [I], and [I], it becomes possible to use the power conversion device 104 without replacing the malfunctioning current detector. For example, the power conversion device can be continuously operated for a predetermined period until the next regular inspection. Note that the same configuration can be adopted on the converter side to which the AC power supply 1 is connected, and the same operational effects can be achieved.
Explanation of Signs
[0317] 1... AC power supply, 2, 2B... Converter unit, 3, 3B... Inverter unit, 4... Electric motor, 5... Converter control device, 6... Inverter control device, 7... Speed detector, 26 - 28, 34 - 36... Current detectors, 21R - 21T, 21BR - 21BT... Converter power conversion section, 31U - 31W... Inverter power conversion section, 34B, 35B, 36B... Shunt resistors, 71, 71D... Converter side abnormality judgment device, 72, 72D... Inverter side abnormality judgment device, 72B... Abnormality judgment device, 73... Display, 74... Converter side output estimator, 75... Inverter side output estimator, 100, 101, 102, 103, 104... Power conversion devices, 711, 715, 715C, 721, 725, 725C... Adders, 712R - 712T, 714R - 714T, 714CR - 714CT, 722U - 722W, 724U - 724W, 724CU - 724CW... Multipliers, 713R~713T,716,716C,718R~718T,723U~723W,726,726C,728U~728W...filters, 717,727,717D,727D...Abnormality judgment department, 719R~719T, 729U~729W...adder / subtractor, 7271~7276,7276B,7279,7279B,7280,7280B...Arithmetic unit, 7277, 7277B...Operating condition determination unit, 7278,7278B…Storage section
Claims
1. A power conversion device provided between an AC power source and a load device, a plurality of current detectors that detect, for each phase, a plurality of phases of AC current flowing between the AC power supply and the power conversion device or between the power conversion device and the load device; a first adder that calculates a first sum of current detection values of a plurality of phases detected by the plurality of current detectors; a first multiplication unit that calculates a first product, which is a product of the first sum and the current detection value, for each of the plurality of phases; a first filter that reduces or removes harmonic components included in each of the first products; a second multiplication unit that calculates second products that are products of the two current detection values of different phases; a second adder that calculates a second sum of the second products; a second filter that reduces or removes harmonic components included in the second sum; a third multiplication unit that calculates the square of the current detection value for each phase; a third adder that calculates a third sum of the plurality of squares; a third filter that reduces or removes harmonic components included in the third sum; an abnormality determination unit that generates an abnormality degree for each of the plurality of current detectors based on the output of the first filter, the output of the second filter, and the output of the third filter, and determines an abnormality in the current detector based on the abnormality degree.
2. The power conversion device according to claim 1, a first calculation unit that calculates a plurality of relative abnormality degrees based on an output of the first filter, an output of the second filter, and an output of the third filter, the relative abnormality degrees being set so that a sum of the relative abnormality degrees for a plurality of phases is always zero; The abnormality determination unit A power conversion device that determines that at least one of the current detectors is abnormal when the maximum value among the absolute values of the relative abnormality degrees is greater than a preset abnormality determination threshold.
3. The power conversion device according to claim 2, The abnormality determination unit determining whether the plurality of relative abnormality degrees can be classified into two elements having a high degree of similarity and one element having a low degree of similarity to the two elements; If classification is possible, it is determined that only one of the plurality of current detectors is abnormal; If classification is not possible, the power conversion device determines that two or more of the current detectors are abnormal.
4. The power conversion device according to claim 2, The abnormality determination unit The power conversion device compares the magnitude of the absolute value of each of the plurality of relative abnormality degrees, and determines that the current detector corresponding to the relative abnormality degree with the largest absolute value is abnormal.
5. The power conversion device according to claim 1, a storage unit that stores a third product of an average value of detection gains and a current amplitude when the plurality of current detectors are normal, in association with an operating condition of the AC power supply or the load device; a second calculation unit that calculates a physical quantity corresponding to the product of an average value of detection gains of the plurality of current detectors and a current amplitude based on outputs of the second filter and the third filter; a third calculation unit that calculates absolute degrees of abnormality that represent absolute amounts of the plurality of degrees of abnormality based on the third product, the physical quantity calculated by the second calculation unit under the same operating conditions as the operating conditions, the output of the first filter, the output of the second filter, and the output of the third filter, The power conversion device, wherein the abnormality determination unit determines abnormalities in the plurality of current detectors based on the plurality of absolute abnormality degrees.
6. The power conversion device according to claim 5, a fourth calculation unit that calculates, based on the output of the first filter, the output of the second filter, and the output of the third filter, a relative abnormality degree that represents the degree of abnormality of each of the plurality of current detectors and that is set so that a sum of the degrees of abnormality for a plurality of phases is always zero; The third calculation unit A power conversion device that calculates a plurality of absolute degrees of abnormality based on the ratio between the physical quantity calculated by the second calculation unit and the third product and the relative degree of abnormality calculated by the fourth calculation unit.
7. The power conversion device according to claim 1, A power conversion device that changes a filter setting of at least one of the first filter, the second filter, and the third filter in accordance with a frequency of an AC current flowing through a plurality of the current detectors.
8. The power conversion device according to claim 2, The power conversion device changes the abnormality determination threshold in accordance with the magnitude of the AC current flowing through the current detector.
9. The power conversion device according to claim 1, a fourth filter for removing or reducing a DC component included in the current detection value for at least one of the plurality of current detectors; A power conversion device that uses an output of the fourth filter instead of the current detection value.
10. The power conversion device according to claim 1, an output estimation unit that, when the abnormality determination unit determines that the current detector is abnormal, estimates a current detection value that would be obtained if the current detector determined to be abnormal were normal, based on a current detection value of the current detector that is not determined to be abnormal; The power conversion device continues to operate based on the current detection value of the current detector that is not determined to be abnormal and the current detection value estimated by the output estimation unit.
11. The power conversion device according to claim 5, an output estimation unit that, when the abnormality determination unit determines that the current detector is abnormal, estimates each of the current detection values that would be obtained if the current detector were normal, based on the absolute abnormality degrees of the current detectors and the current detection values of the current detectors; The power conversion device continues to operate based on a plurality of current detection values estimated by the output estimation unit, instead of the current detection value of the current detector.
12. The power conversion device according to claim 1, The power conversion device further includes an information presenting unit that presents abnormality information when the abnormality determining unit determines that the current detector has an abnormality.
13. The power conversion device according to claim 1, further comprising an information presenting unit that presents abnormality information; The abnormality determination unit generating a history of a plurality of the abnormality degrees; predicting a period until an abnormality occurs in the current detector based on the history; The power conversion device causes the information presentation unit to present a prediction result as the abnormality information.
14. 1. A method for determining an abnormality in a current detector that detects, for each phase, a multi-phase current flowing between an AC power source and a load device to which power from the AC power source is supplied, the method comprising: calculating a first sum of the current detection values detected by the plurality of current detectors; calculating a first product, which is a product of the first sum and the current detection value, for each of the plurality of phases; filtering the first products to reduce or eliminate harmonic components, respectively; calculating second products that are products of the two current detection values of different phases; calculating a second sum over a plurality of said second products; filtering the second sum to reduce or eliminate harmonic components; calculating the square of the current detection value for each phase; calculating a third sum over a plurality of said squares; filtering the third sum to reduce or eliminate harmonic components; generating abnormality degrees of the current detectors based on the filtered results of the first products, the filtered results of the second sums, and the filtered results of the third sums; A method for determining an abnormality in a current detector, the method determining an abnormality in the current detector based on the degree of abnormality.
15. The power conversion device according to claim 1, a power calculation unit that calculates an estimated value of power passing through the plurality of phases based on at least one of current values and voltage values in the plurality of phases; a storage unit that stores the estimated value of power when the plurality of current detectors are normal in association with an operating condition of at least one of the AC power supply and the load device; a fifth calculation unit that calculates a second physical quantity corresponding to an average value of detection gains of the plurality of current detectors based on a ratio between the estimated value of power stored in the storage unit in association with the operating condition and the estimated value of power calculated by the power calculation unit under the same operating condition as the operating condition; and a sixth calculation unit that calculates absolute degrees of abnormality that represent absolute amounts of the plurality of degrees of abnormality based on the second physical quantity, the output of the first filter, the output of the second filter, and the output of the third filter, The power conversion device, wherein the abnormality determination unit determines abnormalities in the plurality of current detectors based on the plurality of absolute abnormality degrees.
16. 16. The power conversion device according to claim 15, a seventh calculation unit that calculates, based on the output of the first filter, the output of the second filter, and the output of the third filter, a relative abnormality degree that represents the degree of abnormality of each of the plurality of current detectors and that is set so that a sum of the degrees of abnormality for a plurality of phases is always zero; The sixth calculation unit a power conversion device that calculates a plurality of absolute abnormality degrees based on the second physical quantity and the relative abnormality degrees calculated by the seventh calculation unit;
17. 16. The power conversion device according to claim 15, an output estimation unit that, when the abnormality determination unit determines that the current detector is abnormal, estimates each of the current detection values that would be obtained if the current detector were normal, based on the absolute abnormality degrees of the current detectors and the current detection values of the current detectors; The power conversion device continues to operate based on a plurality of current detection values estimated by the output estimation unit, instead of the current detection value of the current detector.
Citation Information
Patent Citations
Fault detection device of current sensor
JP2005094912A
Fault detector for current sensor
JP2006050702A
Power conversion device and module
JP2008312360A
Current sensor abnormality diagnostic device
JP2018061400A
Driving unit
JP2019103315A