Method for manufacturing vertical cavity surface emitting laser element

Abstract

A vertical resonator-type surface light emission laser element according to the present invention includes a semiconductor layer, a substrate, a first mirror, and a second mirror. The semiconductor layer includes an active layer made of a first material. The substrate is bonded to the semiconductor layer, is made of a second material having a higher bandgap energy than the first material, and transmits light having a specific wavelength. The first mirror is provided on the opposite side of the semiconductor layer from the substrate and reflects the light having a specific wavelength. The second mirror is provided on the opposite side of the substrate from the semiconductor layer and reflects the light having a specific wavelength.

Description

[Technical Field]

[0001] The present technology relates to a vertical cavity surface emitting laser element, which is a semiconductor laser element, a vertical cavity surface emitting laser element array, and a method for manufacturing a vertical cavity surface emitting laser element. [Background technology]

[0002] A vertical cavity surface emitting laser (VCSEL) element is a type of semiconductor laser element that resonates light in a direction perpendicular to the substrate surface and emits laser light in the same direction.

[0003] Generally, VCSEL devices have a post-type mesa structure, as described in Patent Document 1 below. This structure involves forming a circular post mesa with a diameter of approximately 30 μm using methods such as dry etching, and then forming a current confinement structure by selectively oxidizing high-Al composition AlGaAs or AlAs. The supplied current is injected into the active layer with high efficiency due to the current confinement structure. Furthermore, the refractive index of the selectively oxidized region is reduced to approximately half, providing an effect equivalent to that of a lens, reducing diffraction loss and enabling light confinement. It is also highly suitable for mass production, and is beginning to become widely used, including in smartphones. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2001-210908 Summary of the Invention [Problem to be solved by the invention]

[0005] Meanwhile, research into GaN-based VCSEL elements has become more active in recent years, with blue- and green-emitting VCSEL elements using GaN being known from previous research. When using VCSEL elements for displays, a red-emitting VCSEL element that oscillates at or below a wavelength of 650 nm is required, but growing an active layer that can be used in red-emitting VCSEL elements on a GaN substrate requires the growth of an InGaN layer with a high In composition, which poses a high level of technical difficulty.

[0006] For this reason, VCSEL elements formed on GaAs substrates have been investigated, but VCSEL elements formed on GaAs substrates are prone to carrier overflow and have insufficient heat dissipation, resulting in a decrease in output power at high temperatures.

[0007] In view of the above circumstances, an object of the present technology is to provide a vertical-cavity surface-emitting laser element formed using a GaAs substrate and suitable for high output, a vertical-cavity surface-emitting laser element array, and a method for manufacturing the vertical-cavity surface-emitting laser element. [Means for solving the problem]

[0008] In order to achieve the above object, a vertical cavity surface emitting laser device according to an embodiment of the present technology includes a semiconductor layer, a substrate, a first mirror, and a second mirror. The semiconductor layer includes an active layer made of a first material. The substrate is bonded to the semiconductor layer and is made of a second material having a higher bandgap energy than the first material, and is transparent to light of a specific wavelength. The first mirror is provided on the opposite side of the semiconductor layer from the substrate, and reflects light of the wavelength. The second mirror is provided on the opposite side of the substrate to the semiconductor layer and reflects light of the wavelength.

[0009] The second material may be a material of a different group V from that of the first material.

[0010] The first material may be AlGaAs, GaAs, InGaAs, InGaP, AlInGaP, AlGaInAs or GaInAsP.

[0011] The second material may be GaN.

[0012] The second material may have a higher thermal conductivity than the first material.

[0013] The energy level difference between the first material and the second material may be 100 meV or more.

[0014] The first material and the second material may have different crystal structures.

[0015] The second mirror may be a concave mirror whose surface on the substrate side is concave.

[0016] The vertical cavity surface emitting laser element may have a current confinement structure formed by ion implantation, oxidation confinement, or buried tunnel junction.

[0017] the semiconductor layer further includes a spacer layer located between the active layer and the substrate; The spacer layer may have a thickness of 10 nm or more and 1000 nm or less.

[0018] The first mirror and the second mirror may be a DBR (Distributed Bragg Reflector), a metal mirror, or a diffraction grating.

[0019] The DBR may be a dielectric DBR made of a dielectric material or a semiconductor DBR made of a semiconductor material.

[0020] The vertical cavity surface emitting laser element may emit laser light by transmitting through the first mirror or the second mirror.

[0021] In order to achieve the above object, a vertical cavity surface-emitting laser element array according to an embodiment of the present technology includes an array of vertical cavity surface-emitting laser elements, each of which includes a semiconductor layer, a substrate, a first mirror, and a second mirror. The semiconductor layer includes an active layer made of a first material. The substrate is bonded to the semiconductor layer and is made of a second material having a higher bandgap energy than the first material, and is transparent to light of a specific wavelength. The first mirror is provided on the opposite side of the semiconductor layer from the substrate, and reflects light of the wavelength. The second mirror is provided on the opposite side of the substrate to the semiconductor layer and reflects light of the wavelength.

[0022] In order to achieve the above object, a manufacturing method of a vertical-cavity surface-emitting laser element according to one aspect of the present technology includes bonding a semiconductor layer having an active layer made of a first material to a substrate made of a second material having a band gap energy higher than that of the first material and transmitting light of a specific wavelength, to form a structure including the semiconductor layer, the substrate, a first mirror provided on an opposite side of the semiconductor layer from the substrate and reflecting light of the wavelength, and a second mirror provided on an opposite side of the substrate from the semiconductor layer and reflecting light of the wavelength. [Brief explanation of the drawings]

[0023] [Figure 1] 1 is a cross-sectional view of a VCSEL element according to an embodiment of the present technology. [Figure 2] FIG. 2 is an exploded schematic view of the VCSEL element. [Figure 3] FIG. 2 is a plan view of the VCSEL element. [Figure 4] FIG. 2 is a cross-sectional view of a semiconductor layer included in the VCSEL element. [Figure 5] FIG. 2 is a band diagram showing the energy bands of the active layer and substrate of the VCSEL element. [Figure 6] FIG. 2 is a cross-sectional view of the VCSEL element bonded to a support substrate. [Figure 7] 3A to 3C are schematic diagrams illustrating the operation of the VCSEL element. [Figure 8] FIG. 2 is a band diagram showing the operation of the VCSEL element. [Figure 9] FIG. 2 is a band diagram showing an example of calculation of band alignment of the VCSEL element. [Figure 10] 3A to 3C are schematic diagrams illustrating a method for manufacturing the VCSEL element. [Figure 11] 3A to 3C are schematic diagrams illustrating a method for manufacturing the VCSEL element. [Figure 12] 3A to 3C are schematic diagrams illustrating a method for manufacturing the VCSEL element. [Figure 13] 3A to 3C are schematic diagrams illustrating a method for manufacturing the VCSEL element. [Figure 14] 3A to 3C are schematic diagrams illustrating a method for manufacturing the VCSEL element. [Figure 15] 3A to 3C are schematic diagrams illustrating a method for manufacturing the VCSEL element. [Figure 16] 3A to 3C are schematic diagrams illustrating a method for manufacturing the VCSEL element. [Figure 17] 5A to 5C are schematic diagrams illustrating a second method for manufacturing the VCSEL element. [Figure 18] 5A to 5C are schematic diagrams illustrating a second method for manufacturing the VCSEL element. [Figure 19] 5A to 5C are schematic diagrams illustrating a second method for manufacturing the VCSEL element. [Figure 20] 5A to 5C are schematic diagrams illustrating a second method for manufacturing the VCSEL element. [Figure 21] 5A to 5C are schematic diagrams illustrating a second method for manufacturing the VCSEL element. [Figure 22] 5A to 5C are schematic diagrams illustrating a third method for manufacturing the VCSEL element. [Figure 23] 5A to 5C are schematic diagrams illustrating a third method for manufacturing the VCSEL element. [Figure 24] 5A to 5C are schematic diagrams illustrating a third method for manufacturing the VCSEL element. [Figure 25] 5A to 5C are schematic diagrams illustrating a third method for manufacturing the VCSEL element. [Figure 26]5A to 5C are schematic diagrams illustrating a third method for manufacturing the VCSEL element. [Figure 27] 5A to 5C are schematic diagrams illustrating a third method for manufacturing the VCSEL element. [Figure 28] 5A to 5C are schematic diagrams illustrating a third method for manufacturing the VCSEL element. [Figure 29] 5A to 5C are schematic diagrams illustrating a third method for manufacturing the VCSEL element. [Figure 30] 5A to 5C are schematic diagrams illustrating a third method for manufacturing the VCSEL element. [Figure 31] 5A to 5C are schematic diagrams illustrating a third method for manufacturing the VCSEL element. [Figure 32] FIG. 10 is a cross-sectional view of a VCSEL device according to a modified example of the present technology. [Figure 33] FIG. 10 is a cross-sectional view of a VCSEL device according to a modified example of the present technology. [Figure 34] FIG. 10 is a cross-sectional view of a VCSEL device according to a modified example of the present technology. DETAILED DESCRIPTION OF THE INVENTION

[0024] A VCSEL (Vertical Cavity Surface Emitting Laser) element according to an embodiment of the present technology will be described.

[0025] [VCSEL element configuration] Fig. 1 is a cross-sectional view of a VCSEL device 100 according to this embodiment, and Fig. 2 is an exploded schematic view of the VCSEL device 100. Fig. 3 is a plan view of the VCSEL device 100. As shown in these figures, the VCSEL device 100 includes a semiconductor layer 101, a substrate 102, a first mirror 103, and a second mirror 104.

[0026] The semiconductor layer 101 is a layer that generates laser oscillation, and has a first main surface 101a, a second main surface 101b, an ion-implanted region 101c, and a non-ion-implanted region 101d, as shown in FIG. 2. The first main surface 101a is the main surface on the first mirror 103 side. The second main surface 101b is the main surface opposite the first main surface 101a, and is the main surface on the substrate 102 side. FIG. 4 is a schematic diagram of the semiconductor layer 101, without illustrating the ion-implanted region 101c and the non-ion-implanted region 101d. As shown in the figure, the semiconductor layer 101 includes an active layer 111 and a spacer layer 112.

[0027] The active layer 111 is a layer on the first principal surface 101a side of the semiconductor layer 101. The active layer 111 is made of a first material, and emits and amplifies spontaneously emitted light by carrier recombination. The first material is a material that can be grown as a crystal on a GaAs substrate, and specifically is AlGaAs, GaAs, InGaAs, InGaP, AlInGaP, AlGaInAs, or GaInAsP.

[0028] The active layer 111 is composed of multiple layers of quantum well layers 111a with small band gap energy and barrier layers 111b with large band gap energy stacked alternately. The quantum well layers 111a and barrier layers 111b are made of one or more of the above-mentioned materials. When the active layer 111 is made of multiple materials, the material with the largest band gap energy is designated as the first material.

[0029] The spacer layer 112 is a layer on the second main surface 101b side of the semiconductor layer 101. The spacer layer 112 is located between the active layer 111 and the substrate 102, and adjusts the distance between the first mirror 103 and the second mirror 104. The spacer layer 112 is made of GaAs. The thickness of the spacer layer 112 is preferably 10 nm or more and 1000 nm or less.

[0030] The ion-implanted region 101c (see FIG. 2) is a region in the semiconductor layer 101 into which ions such as boron are implanted, and is insulated by the ion implantation. As shown in FIG. 3, the ion-implanted region 101c is provided on the outer periphery of the semiconductor layer 101 and surrounds the non-ion-implanted region 101d in the layer surface directions (X and Y directions). The non-ion-implanted region 101d is a region in the semiconductor layer 101 into which ions are not implanted. As shown in FIG. 2, the non-ion-implanted region 101d is provided on the inner periphery of the semiconductor layer 101 and is surrounded by the non-ion-implanted region 101d in the layer surface directions (X and Y directions). Current flowing through the semiconductor layer 101 cannot pass through the ion-implanted region 101c and is concentrated in the non-ion-implanted region 101d. That is, the ion-implanted region 101c and the non-ion-implanted region 101d form a current confinement structure.

[0031] The substrate 102 is bonded to the semiconductor layer 101 and has a first major surface 102a, a second major surface 102b, and a lens 102c, as shown in FIG. 2. The first major surface 102a is the major surface on the semiconductor layer 101 side and is bonded to the second major surface 101b of the semiconductor layer 101. The second major surface 102b is the major surface on the opposite side to the first major surface 102a and is the major surface on the second mirror 104 side. The lens 102c protrudes toward the second mirror 104 and forms a curved surface on the second major surface 102b. The substrate 102 transmits light of a specific wavelength. This specific wavelength is the oscillation wavelength (hereinafter referred to as wavelength λ) of the VCSEL device 100, which will be described later.

[0032] The substrate 102 is made of a second material having a higher bandgap energy than the first material, which is the material of the active layer 111. FIG. 5 is a band diagram showing the energy bands of the active layer 111 and the substrate 102, and the difference between the conductor (Ev) and valence (Ec) bandgap energy indicates the bandgap energy. In the figure, the bandgap energy of the first material is indicated as Eg1, and the bandgap energy of the second material is indicated as Eg2. The energy level difference between the valence (Ec) bandgap energy of the quantum well layer 111a and the barrier layer 111b in the active layer 111 is indicated as ΔEc 、The energy level difference between the valence electrons (Ec) of the first and second materials is shown as ΔE. As shown in the figure, the band gap energy Eg2 of the second material is larger than the band gap energy Eg1 of the first material. The energy level difference ΔE between the valence electrons (Ec) of the first and second materials is preferably 100 meV or more. Furthermore, it is preferable that the second material have a higher thermal conductivity than the first material.

[0033] Specifically, the second material is a material having a different Group V (N, P, As, Sb, Bi) from the first material. When the first material is AlGaAs, GaAs, InGaAs, InGaP, AlInGaP, AlGaInAs, or GaInAsP, the second material can be GaN. The second material can also have a different crystal structure from the first material. For example, the crystal structure of the first material can be a zincblende structure, and the crystal structure of the second material can be a wurtzite structure.

[0034] The first mirror 103 (see FIG. 2) is provided on the side of the semiconductor layer 101 opposite to the substrate 102, i.e., on the first major surface 101a side, and reflects light of wavelength λ. As shown in FIG. 2, the first mirror 103 has a first major surface 103a and a second major surface 103b. The first major surface 103a is the major surface on the side opposite to the semiconductor layer 101, and the second major surface 103b is the major surface on the semiconductor layer 101 side. As shown in FIG. 2, the first mirror 103 can be a DBR (Distributed Bragg Reflector) in which low-refractive-index layers 131 and high-refractive-index layers 132 are alternately stacked. This DBR can be a dielectric DBR made of a dielectric material or a semiconductor DBR made of a semiconductor material. Instead of a DBR, the first mirror 103 can be a metal mirror or a diffraction grating.

[0035] The second mirror 104 (see FIG. 2) is provided on the side of the substrate 102 opposite to the semiconductor layer 101, i.e., on the second main surface 102b side, and reflects light of wavelength λ. As shown in FIG. 2, the second mirror 104 has a first main surface 104a and a second main surface 104b. The first main surface 104a is the main surface on the substrate 102 side, and the second main surface 104b is the main surface opposite to the first main surface 104a. The second main surface 102b of the substrate 102 is formed into a curved surface by the lens 102c, and the second mirror 104 is a concave mirror in which the first main surface 104a is concave.

[0036] 2, the second mirror 104 can be a DBR in which low-refractive-index layers 141 and high-refractive-index layers 142 are alternately stacked. This DBR can be a dielectric DBR made of a dielectric material or a semiconductor DBR made of a semiconductor. Instead of a DBR, the second mirror 104 can be a metal mirror or a diffraction grating.

[0037] The VCSEL element 100 has the above-described configuration. The first mirror 103 side of the VCSEL element 100 may be p-type and the second mirror 104 side may be n-type. Alternatively, the first mirror 103 side may be n-type and the second mirror 104 side may be p-type. Furthermore, the VCSEL element 100 may be supported by a support substrate. FIG. 6 is a cross-sectional view showing the VCSEL element 100 supported on a support substrate 105. As shown in the figure, the second mirror 104 is bonded to the support substrate 105 by an adhesive layer 106 such as wax, and the VCSEL element 100 is supported by the support substrate 105. Alternatively, the first mirror 103 side of the VCSEL element 100 may be bonded to the support substrate 105.

[0038] [VCSEL element operation] The operation of the VCSEL device 100 will now be described. FIG. 7 is a schematic diagram showing the operation of the VCSEL device 100. When a voltage is applied to the VCSEL device 100, a current ("C" in FIG. 7) passes through the semiconductor layer 101. Because the ion-implanted region 101c is insulated, the current is injected into the non-ion-implanted region 101d. This injected current generates spontaneous emission light ("P" in FIG. 7) due to carrier recombination in the non-ion-implanted region 101d of the active layer 111. The spontaneous emission light F travels in the stacking direction (Z direction) of the VCSEL device 100, passes through the semiconductor layer 101 and substrate 102, and is reflected by the first mirror 103 and the second mirror 104.

[0039] Because the first mirror 103 and the second mirror 104 are configured to reflect light having a wavelength λ, the component of the spontaneously emitted light with wavelength λ forms a standing wave between the first mirror 103 and the second mirror 104 and is amplified by the active layer 111. When the injection current exceeds a threshold, the light forming the standing wave generates laser oscillation. The laser light thus generated (indicated by "L" in FIG. 7) passes through the first mirror 103 and is emitted from the first major surface 103a. Here, because the second mirror 104 is formed as a concave mirror, the light reflected by the second mirror 104 is focused (light constriction) on the non-ion-implanted region 101d of the active layer 111, thereby suppressing diffraction loss due to optical field confinement in the layer plane direction. Note that the VCSEL device 100 may be configured so that the laser light passes through the second mirror 104 and is emitted from the second major surface 104b.

[0040] [Effects of VCSEL elements] The effects of the VCSEL element 100 will now be described. Generally, in a VCSEL element, carrier overflow from the active layer reduces the laser light output. In particular, if the energy level difference (ΔEc in FIG. 5) between the quantum well layer and the barrier layer in the active layer is small, carrier overflow is likely to occur at high temperatures. For example, in an active layer that can be grown on a GaAs substrate and produces red light, the energy level difference ΔEc is small, about 100 meV, and carrier overflow at high temperatures becomes a problem. Furthermore, if the VCSEL element has poor heat dissipation properties, the VCSEL element will become hot, causing carrier overflow.

[0041] In the VCSEL device 100, a substrate 102 with high bandgap energy is bonded to the semiconductor layer 101, and carrier overflow is suppressed by the substrate 102. FIG. 8 is a schematic diagram showing how the substrate 102 suppresses carrier overflow. As shown in the figure, the substrate 102 has a high bandgap energy Eg2, so the outflow of carriers from the active layer 111 (indicated by the arrow "F" in the figure), i.e., carrier overflow, is suppressed. This prevents a decrease in the output power of the laser light at high temperatures and improves high-temperature characteristics.

[0042] Furthermore, by using a material with high thermal conductivity for the substrate 102, heat from the semiconductor layer 101 is dissipated via the substrate 102. This suppresses temperature rise in the semiconductor layer 101, which also suppresses carrier overflow. As a result, the high-temperature characteristics of the VCSEL device 100 can be further improved.

[0043] [Band alignment calculation example] 9 shows an example of band alignment calculation for the VCSEL device 100. The substrate 102 is made of GaN, the quantum well layer 111a is made of GaAs, and the barrier layer 111b is made of Al. 0.4 The calculation was performed assuming that the first material (Al 0.4 The energy level difference ΔE between the first material (GaAs) and the second material (GaN) is large at 330 meV, and by combining GaN and GaAs, it is possible to suppress carrier overflow.

[0044] [VCSEL element manufacturing method] A method for manufacturing the VCSEL device 100 will now be described.

[0045] (Manufacturing method 1) 10 to 16 are schematic diagrams showing manufacturing method 1 of VCSEL device 100. As shown in Fig. 10, a first mirror 103 and a semiconductor layer 101 are formed on a substrate 151. Substrate 151 is a substrate on which crystal growth of first mirror 103 and semiconductor layer 101 is possible, and is made of GaAs. Next, ions are implanted into the outer periphery of semiconductor layer 101, forming an ion-implanted region 101c and a non-ion-implanted region 101d as shown in Fig. 11.

[0046] Next, as shown in FIG. 12, the substrate 102 is bonded to the second main surface 101b of the semiconductor layer 101. The substrate 102 can be bonded by surface activated bonding or adhesive. A transparent conductive material such as ITO (Indium Tin Oxide) can be used as the adhesive. Next, as shown in FIG. 13, a patterned resist layer R is formed on the second main surface 102b of the substrate 102. The resist layer R is made of photoresist and can be patterned by photolithography. Next, the resist layer R is heated. This causes the resist layer R to flow, forming a lens shape as shown in FIG. 14.

[0047] Next, the substrate 102 is etched using the lens-shaped resist layer R as an etching mask, forming lenses 102c as shown in FIG. 15. It is also possible to use the lens-shaped resist layer R as the lenses 102c without etching the substrate 102. Next, as shown in FIG. 16, a second mirror 104 is formed on the second main surface 102b of the substrate 102. Finally, the substrate 151 is removed by etching or the like to produce the VCSEL device 100 (see FIG. 1). Note that before removing the substrate 151, the second mirror 104 may be bonded to the support substrate 105 with an adhesive layer 106 (see FIG. 6), and then the substrate 151 may be removed.

[0048] In this manufacturing method, since the substrate 102 is bonded to the semiconductor layer 101, the semiconductor layer 101 and the substrate 102 may have different crystal structures. Specifically, the semiconductor layer 101 may have a zinc blende structure such as GaAs, and the substrate 102 may have a wurtzite structure such as GaN.

[0049] (Manufacturing method 2) 17 to 21 are schematic diagrams showing a second manufacturing method for the VCSEL device 100. As shown in Fig. 17, a semiconductor layer 101 is formed on a substrate 151. The substrate 151 is made of GaAs and is a substrate on which crystal growth of the semiconductor layer 101 is possible. Next, ions are implanted into the outer periphery of the semiconductor layer 101 to form an ion-implanted region 101c and a non-ion-implanted region 101d as shown in Fig. 18.

[0050] Next, as shown in FIG. 19, the substrate 102 is bonded to the second main surface 101b of the semiconductor layer 101. The substrate 102 can be bonded by surface activated bonding or adhesion. A transparent conductive material such as ITO can be used as the adhesive. Next, as shown in FIG. 20, lenses 102c are formed on the substrate 102. The lenses 102c can be formed by the same method as in manufacturing method 1.

[0051] 21, second mirror 104 is formed on second main surface 102b of substrate 102. Finally, substrate 151 is removed by etching or the like, and first mirror 103 is formed to produce VCSEL device 100 (see FIG. 1). Note that before removing substrate 151, second mirror 104 may be bonded to support substrate 105 with adhesive layer 106 (see FIG. 6), and then substrate 151 may be removed.

[0052] In this manufacturing method, since the substrate 102 is bonded to the semiconductor layer 101, the semiconductor layer 101 and the substrate 102 can have different crystal structures.

[0053] (Manufacturing method 3) 22 to 31 are schematic diagrams illustrating a manufacturing method 3 of the VCSEL device 100. As shown in FIG. 22, a semiconductor layer 101 is formed on a substrate 151. The substrate 151 is a substrate on which crystal growth of the semiconductor layer 101 is possible, and is made of GaAs. Next, as shown in FIG. 23, a substrate 102 is bonded to the second main surface 101b of the semiconductor layer 101. The bonding of the substrate 102 can be performed by surface activated bonding or adhesion. A transparent conductive material such as ITO can be used as the adhesive. Next, as shown in FIG. 24, a support substrate 122 is bonded to the second main surface 102b of the substrate 102 using an adhesive layer 121 such as wax. Next, as shown in FIG. 25, the substrate 151 is removed by etching or the like.

[0054] Next, as shown in FIG. 26, a support substrate 124 is bonded to the first main surface 101a of the semiconductor layer 101 using an adhesive layer 123 such as wax. The support substrate 124 is a substrate that is transparent to the exposure wavelength of the next process. The adhesive layer 121 and the support substrate 122 are then removed. Next, as shown in FIG. 27, a resist layer R made of photoresist is formed on the second main surface 102b of the semiconductor layer 101. A patterned mask M is then formed on the support substrate 124. Next, light having the above-mentioned exposure wavelength is irradiated from above the mask M to perform exposure. The areas of the resist layer R that are not shielded by the mask M are modified, improving their solubility. Next, the modified areas of the resist layer R are removed, and a patterned resist layer R is formed as shown in FIG. 28.

[0055] Next, as shown in FIG. 29, ions are implanted from above the resist layer R. Ions are implanted into regions of the semiconductor layer 101 where the ions are not blocked by the resist layer R, forming ion-implanted regions 101c. On the other hand, ions are not implanted into regions of the semiconductor layer 101 where the ions are blocked by the resist layer R, forming non-ion-implanted regions 101d. Next, as shown in FIG. 30, lenses 102c are formed in the substrate 102. The lenses 102c can be formed using the resist layer R in a manner similar to manufacturing method 1.

[0056] Next, as shown in Fig. 31, second mirror 104 is formed on second main surface 102b of substrate 102. Finally, adhesive layer 123 and support substrate 124 are removed, and first mirror 103 is formed to produce VCSEL device 100 (see Fig. 1). Note that before removing support substrate 124 and the like, second mirror 104 may be bonded to support substrate 105 with adhesive layer 106 (see Fig. 6), and then support substrate 124 and the like may be removed.

[0057] In this manufacturing method, since the substrate 102 is bonded to the semiconductor layer 101, the semiconductor layer 101 and the substrate 102 can have different crystal structures. Furthermore, in this manufacturing method, ion implantation (see FIG. 29) and lens formation (see FIG. 30) are performed using the same resist layer R. As a result, no misalignment occurs between the non-ion-implanted regions 101d and the lenses 102c, i.e., no misalignment occurs between current confinement and light confinement, making it possible to reduce loss in the VCSEL device 100.

[0058] [Variations] In the above description, the VCSEL device 100 has a current confinement structure formed by ion implantation, but other current confinement structures may also be used. Figure 32 is a cross-sectional view of a VCSEL device 100 having a current confinement structure formed by oxidation. As shown in the figure, this VCSEL device 100 has an oxidized region 103c and a non-oxidized region 103d formed in the first mirror 103.

[0059] The oxidized region 103c is a region where the constituent material of the first mirror 103 is oxidized and is insulated by oxidation. The oxidized region 103c is provided on the outer periphery of the first mirror 103 and surrounds the non-oxidized region 103d in the layer surface directions (X and Y directions). The non-oxidized region 103d is a region where the constituent material of the first mirror 103 is not oxidized and is provided on the inner periphery of the first mirror 103 and surrounded by the oxidized region 103c in the layer surface directions (X and Y directions).

[0060] The current flowing through the semiconductor layer 101 and the first mirror 103 cannot pass through the oxidized region 103c and is concentrated in the non-oxidized region 103d. That is, the oxidized region 103c and the non-oxidized region 103d form a current confinement structure. The oxidized region and the non-oxidized region may be provided in the semiconductor layer 101. Alternatively, the VCSEL device 100 may have a current confinement structure using a buried tunnel junction, in which a tunnel junction layer that allows current to pass is buried in the inner peripheral region in the layer surface direction (XY direction).

[0061] In addition, in the VCSEL device 100, the second mirror 104 is a concave mirror. 33 is a cross section of a VCSEL device 100 in which the second mirror 104 is not a concave mirror. As shown in the figure, the substrate 102 does not have a lens 102c, and the second mirror 104 may be a flat mirror.

[0062] Furthermore, in the VCSEL device 100, the semiconductor layer 101 has been described as including the active layer 111 and the spacer layer 112, but the semiconductor layer 101 may include only the active layer 111. Figure 34 is a cross-sectional view of the VCSEL device 100 in which the semiconductor layer 101 includes only the active layer 111. As shown in the figure, the substrate 102 may be bonded to the active layer 111.

[0063] [VCSEL element array] The VCSEL element 100 according to this embodiment can be used to form a VCSEL element array in which a plurality of VCSEL elements 100 are arranged. This VCSEL element array can be a simultaneous emission type VCSEL element array that has a common electrode and in which a plurality of VCSEL elements 100 emit light simultaneously. Alternatively, it can be an independently driven VCSEL element array that has independent electrodes and in which each VCSEL element 100 can emit light individually.

[0064] [About this disclosure] The effects described in this disclosure are merely examples and are not limiting, and other effects may also be present. The description of multiple effects above does not necessarily mean that these effects are exhibited simultaneously. It means that at least one of the effects described above can be obtained depending on the conditions, etc., and effects not described in this disclosure may also be exhibited. Furthermore, at least two of the characteristic features described in this disclosure can be arbitrarily combined.

[0065] The present technology can also be configured as follows. (1) a semiconductor layer including an active layer made of a first material; a substrate bonded to the semiconductor layer, made of a second material having a band gap energy higher than that of the first material, and transmitting light of a specific wavelength; a first mirror provided on the opposite side of the semiconductor layer from the substrate, the first mirror reflecting light of the wavelength; a second mirror provided on the opposite side of the substrate from the semiconductor layer and reflecting light of the wavelength; A vertical cavity surface emitting laser element comprising: (2) The vertical cavity surface emitting laser element according to (1) above, The second material is a material having a different group V from the first material. Vertical-cavity surface-emitting laser element. (3) The vertical cavity surface emitting laser element according to (2) above, The first material is AlGaAs, GaAs, InGaAs, InGaP, AlInGaP, AlGaInAs, or GaInAsP. Vertical-cavity surface-emitting laser element. (4) The vertical cavity surface emitting laser element according to (3) above, The second material is GaN. Vertical-cavity surface-emitting laser element. (5) The vertical cavity surface emitting laser element according to any one of (1) to (4) above, The second material has a higher thermal conductivity than the first material. Vertical-cavity surface-emitting laser element. (6) The vertical cavity surface emitting laser element according to any one of (1) to (5) above, The energy level difference between the first material and the second material is 100 meV or more. Vertical-cavity surface-emitting laser element. (7) The vertical cavity surface emitting laser element according to any one of (1) to (6) above, The first material and the second material have different crystal structures. Vertical-cavity surface-emitting laser element. (8) The vertical cavity surface emitting laser element according to any one of (1) to (7), The second mirror is a concave mirror whose surface on the substrate side is concave. Vertical-cavity surface-emitting laser element. (9) The vertical cavity surface emitting laser element according to any one of (1) to (8), It has a current confinement structure formed by ion implantation, oxidation confinement, or buried tunnel junction. Vertical-cavity surface-emitting laser element. (10) The vertical cavity surface emitting laser element according to any one of (1) to (9), the semiconductor layer further includes a spacer layer located between the active layer and the substrate; The thickness of the spacer layer is 10 nm or more and 1000 nm or less. Vertical-cavity surface-emitting laser element. (11) The vertical cavity surface emitting laser element according to any one of (1) to (10) above, The first mirror and the second mirror are DBRs (Distributed Bragg Reflectors), metal mirrors, or diffraction gratings. Vertical-cavity surface-emitting laser element. (12) The vertical cavity surface emitting laser element according to (11) above, The DBR is a dielectric DBR made of a dielectric material or a semiconductor DBR made of a semiconductor material. Vertical-cavity surface-emitting laser element. (13) The vertical cavity surface emitting laser element according to any one of (1) to (12) above, The laser light is transmitted through the first mirror or the second mirror and emitted. Vertical-cavity surface-emitting laser element. (14) A vertical cavity surface emitting laser element array in which a plurality of vertical cavity surface emitting laser elements are arranged, wherein the vertical cavity surface emitting laser elements are: a semiconductor layer including an active layer made of a first material; a substrate bonded to the semiconductor layer, made of a second material having a band gap energy higher than that of the first material, and transmitting light of a specific wavelength; a first mirror provided on the opposite side of the semiconductor layer from the substrate, the first mirror reflecting light of the wavelength; a second mirror provided on the opposite side of the substrate from the semiconductor layer, the second mirror reflecting light of the wavelength; A vertical cavity surface emitting laser element array comprising: (15) A semiconductor layer having an active layer made of a first material is bonded to a substrate made of a second material having a band gap energy higher than that of the first material and transmitting light of a specific wavelength, to form a structure including the semiconductor layer, the substrate, a first mirror provided on the semiconductor layer opposite the substrate and reflecting light of the wavelength, and a second mirror provided on the substrate opposite the semiconductor layer and reflecting light of the wavelength. A method for manufacturing a vertical cavity surface emitting laser element. [Explanation of symbols]

[0066] 100...VCSEL element 101...Semiconductor layer 102... Circuit board 103...1st mirror 104...Second mirror 105...Support substrate 106...Adhesive layer 111...Active layer 112...Spacer layer

Claims

1. A semiconductor layer having an active layer made of a first material is bonded to a substrate made of a second material having a band gap energy higher than that of the first material and transmitting light of a specific wavelength; forming a patterned resist layer on the substrate; Ions are implanted from above the resist layer, and a current confinement structure is formed in the semiconductor layer, the current confinement structure being composed of an ion-implanted region where ions are not blocked by the resist layer and ions are implanted, and a non-ion-implanted region where ions are blocked by the resist layer and ions are not implanted, After forming the current confinement structure, the resist layer is heated to form a lens shape in the resist layer; etching the substrate using the resist layer in the lens shape as an etching mask to form a lens shape on the substrate; forming a first mirror on the semiconductor layer that reflects light of the wavelength; A second mirror that reflects light of the wavelength is formed on the lens-shaped substrate. A method for manufacturing a vertical cavity surface emitting laser element.

2. 2. A method for manufacturing a vertical cavity surface emitting laser device according to claim 1, comprising the steps of: The second material is a material having a different group V from the first material. A method for manufacturing a vertical cavity surface emitting laser element.

3. 3. A method for manufacturing a vertical cavity surface emitting laser device according to claim 2, comprising the steps of: The first material is AlGaAs, GaAs, InGaAs, InGaP, AlInGaP, AlGaInAs, or GaInAsP. A method for manufacturing a vertical cavity surface emitting laser element.

4. 4. A method for manufacturing a vertical cavity surface emitting laser device according to claim 3, comprising the steps of: The second material is GaN. A method for manufacturing a vertical cavity surface emitting laser element.

5. 2. A method for manufacturing a vertical cavity surface emitting laser device according to claim 1, comprising the steps of: The second material has a higher thermal conductivity than the first material. A method for manufacturing a vertical cavity surface emitting laser element.

6. 2. A method for manufacturing a vertical cavity surface emitting laser device according to claim 1, comprising the steps of: The energy level difference between the first material and the second material is 100 meV or more. A method for manufacturing a vertical cavity surface emitting laser element.

7. 2. A method for manufacturing a vertical cavity surface emitting laser device according to claim 1, comprising the steps of: The first material and the second material have different crystal structures. A method for manufacturing a vertical cavity surface emitting laser element.

8. 2. A method for manufacturing a vertical cavity surface emitting laser device according to claim 1, comprising the steps of: The second mirror is a concave mirror whose surface facing the substrate is concave. A method for manufacturing a vertical cavity surface emitting laser element.

9. 2. A method for manufacturing a vertical cavity surface emitting laser device according to claim 1, comprising the steps of: the semiconductor layer further comprises a spacer layer located between the active layer and the substrate; The thickness of the spacer layer is 10 nm or more and 1000 nm or less. A method for manufacturing a vertical cavity surface emitting laser element.

10. 2. A method for manufacturing a vertical cavity surface emitting laser device according to claim 1, comprising the steps of: The first mirror and the second mirror are a DBR (Distributed Bragg Reflector), a metal mirror, or a diffraction grating. A method for manufacturing a vertical cavity surface emitting laser element.

11. 11. A method for manufacturing a vertical cavity surface emitting laser device according to claim 10, comprising the steps of: The DBR is a dielectric DBR made of a dielectric material or a semiconductor DBR made of a semiconductor material. A method for manufacturing a vertical cavity surface emitting laser element.

12. 2. A method for manufacturing a vertical cavity surface emitting laser device according to claim 1, comprising the steps of: The laser light is transmitted through the first mirror or the second mirror and emitted. A method for manufacturing a vertical cavity surface emitting laser element.

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