radar equipment

Abstract

To provide a radar device capable of improving compensation accuracy.SOLUTION: A transmission antenna and a reception antenna of a radar device are arranged such that, in a set of virtual antennas in which virtual positions overlap and combinations of a transmission circuit and a reception circuit do not match among a group of virtual antennas, at least Ns+Nr-2 specific sets in which the combinations of the transmission circuit and the reception circuit do not overlap with other sets are included, at least one set of different-wire-length sets in which the virtual positions overlap and wire lengths do not match is included, and the total number of belonging sets which belong to at least one of the specific sets and the different-wire-length sets is at least Ns+Nr-1. A control unit, with respect to a detection signal for the same target among reception signals between the virtual antennas, compensates for a phase difference corresponding to the wire length difference between the virtual antennas, a phase difference between different reception circuits, a phase difference between different transmission circuits, a phase difference due to a delay of a clock signal, according to a comparison result for each of a plurality of targets having different distances.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] This disclosure relates to radar technology. [Background technology]

[0002] Patent Document 1 discloses a radar system including a receive channel configured to generate a first digital intermediate frequency signal based on a reflected signal, the reflected signal being reflected from a reflector at a known position and angle, and a reference receive channel configured to generate a second digital IF signal based on the reflected signal. The system also includes a digital mismatch compensation circuit element coupled to receive the first digital IF signal and the second digital IF signal, the digital mismatch compensation circuit element configured to process the first digital IF signal and the second digital IF signal to compensate for a mismatch between the receive channel and the reference receive channel. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 6969562 Summary of the Invention [Problem to be solved by the invention]

[0004] In Patent Document 1, the phase difference between the receive channel and the reference receive channel is affected not only by routing delay mismatch but also by the target position and the phase difference between circuits. The system in Patent Document 1 cannot compensate for these phase differences, which may result in poor compensation accuracy.

[0005] An object of the present disclosure is to provide a radar device that can improve compensation accuracy. [Means for solving the problem]

[0006] The technical means of the present disclosure for solving the problems will be described below. Note that the claims and the reference characters in parentheses in this section indicate the correspondence with the specific means described in the embodiments described later in detail, and do not limit the technical scope of the present disclosure.

[0007] A first aspect of the present disclosure is a radio communication system including a plurality of transmit antennas (TX) and a plurality of receive antennas (RX); Ns transmitting circuits (3) connected to the transmitting antenna and outputting a transmitting signal; Nr receiving circuits (4) connected to the receiving antennas and configured to acquire received signals; a clock generating unit (2a) that outputs a clock signal to each receiving circuit; a control unit (6) for processing the received signals; Equipped with Ns and Nr are each an integer of 2 or more, The plurality of transmitting antennas and the plurality of receiving antennas are At least one of them is arranged at uneven intervals, Among a set of virtual antenna pairs whose virtual positions overlap among groups of virtual antennas (V) assumed for each transmitting antenna for a plurality of receiving antennas in accordance with a phase difference of received signals between the receiving antennas and whose combinations of transmitting circuits and receiving circuits do not match, at least Ns+Nr-2 unique pairs of virtual antenna pairs whose combinations of transmitting circuits and receiving circuits do not overlap with other pairs are included; At least one different wiring length pair is included, which is a pair of virtual antennas whose virtual positions overlap and whose wiring lengths do not match, and the total number of belonging groups, which are groups of virtual antennas belonging to at least one of the specific group and the different wiring length group, is at least Ns+Nr-1 groups; The control unit The radar device compensates for the phase difference corresponding to the difference in wiring length between the virtual antennas, the phase difference between different transmission circuits, the phase difference between different reception circuits, and the phase difference due to a delay in the clock signal, in accordance with the comparison results for multiple targets at different distances, for detection signals of the same target in reception signals between virtual antennas in at least Ns+Nr-1 belonging groups.

[0008] A second aspect of the present disclosure provides a wireless communication system including a plurality of equally spaced transmit antennas (TX) and a plurality of equally spaced receive antennas (RX); Ns transmitting circuits (3) connected to the transmitting antenna and outputting a transmitting signal; Nr receiving circuits (4) connected to the receiving antennas and configured to acquire received signals; a clock generating unit (2a) that outputs a clock signal to each receiving circuit; a control unit (6) for processing the received signals; Equipped with Ns and Nr are each an integer of 2 or more, The plurality of transmitting antennas and the plurality of receiving antennas are Among a set of virtual antenna pairs whose virtual positions overlap among groups of virtual antennas (V) assumed for each transmitting antenna for a plurality of receiving antennas in accordance with a phase difference of received signals between the receiving antennas and whose combinations of transmitting circuits and receiving circuits do not match, at least Ns+Nr-2 unique pairs of virtual antenna pairs whose combinations of transmitting circuits and receiving circuits do not overlap with other pairs are included; At least one different wiring length pair is included, which is a pair of virtual antennas whose virtual positions overlap and whose wiring lengths do not match, and the total number of belonging groups, which are groups of virtual antennas belonging to at least one of the specific group and the different wiring length group, is at least Ns+Nr-1 groups; The control unit The radar device compensates for the phase difference corresponding to the difference in wiring length between the virtual antennas, the phase difference between different transmission circuits, the phase difference between different reception circuits, and the phase difference due to a delay in the clock signal, in accordance with the comparison results for multiple targets at different distances, for detection signals of the same target in reception signals between virtual antennas in at least Ns+Nr-1 belonging groups.

[0009] According to these aspects, based on the comparison results of the received signals of the virtual antennas in at least the Ns+Nr-1 groups, the phase difference between different transmitting circuits, the phase difference between different receiving circuits, the phase difference according to the difference in wiring length between the virtual antennas, and the phase difference due to the delay of the clock signal can be compensated for, which can improve the compensation accuracy.

[0010] A third aspect of the present disclosure provides a wireless communication system including a plurality of transmitting antennas (TX) and a plurality of receiving antennas (RX); Ns transmitting circuits (3) connected to the transmitting antenna and outputting a transmitting signal; Nr receiving circuits (4) connected to the receiving antennas and configured to acquire received signals; a control unit (6) for processing the received signals; a plurality of transmit antennas (TX) and a plurality of receive antennas (RX); Ns transmitting circuits (3) connected to the transmitting antenna and outputting a transmitting signal; Nr receiving circuits (4) connected to the receiving antennas and configured to acquire received signals; a clock generating unit (2a) that outputs a clock signal to each receiving circuit; a control unit (6) for processing the received signals; Equipped with Ns and Nr are each an integer of 2 or more, The plurality of transmitting antennas and the plurality of receiving antennas are At least one of them is arranged at uneven intervals, Among a set of virtual antenna pairs whose virtual positions overlap among groups of virtual antennas (V) assumed for each transmitting antenna for a plurality of receiving antennas in accordance with a phase difference of received signals between the receiving antennas and whose combinations of transmitting circuits and receiving circuits do not match, at least Ns+Nr-2 unique pairs of virtual antenna pairs whose combinations of transmitting circuits and receiving circuits do not overlap with other pairs are included; The control unit The radar device compensates for the phase difference corresponding to the difference in wiring length between the virtual antennas, the phase difference between different transmission circuits, the phase difference between different reception circuits, and the phase difference due to a delay in the clock signal, in accordance with the comparison results for multiple targets at different distances, for detection signals of the same target in reception signals between virtual antennas in at least Ns+Nr-2 unique sets.

[0011] A fourth aspect of the present disclosure is a radio communication system including a plurality of equally spaced transmitting antennas (TX) and a plurality of equally spaced receiving antennas (RX); Ns transmitting circuits (3) connected to the transmitting antenna and outputting a transmitting signal; Nr receiving circuits (4) connected to the receiving antennas and configured to acquire received signals; a clock generating unit (2a) that outputs a clock signal to each receiving circuit; a control unit (6) for processing the received signals; Equipped with Ns and Nr are each an integer of 2 or more, The plurality of transmitting antennas and the plurality of receiving antennas are Among a set of virtual antenna pairs whose virtual positions overlap among groups of virtual antennas (V) assumed for each transmitting antenna for a plurality of receiving antennas in accordance with a phase difference of received signals between the receiving antennas and whose combinations of transmitting circuits and receiving circuits do not match, at least Ns+Nr-2 unique pairs of virtual antenna pairs whose combinations of transmitting circuits and receiving circuits do not overlap with other pairs are included; The control unit The radar device compensates for the phase difference corresponding to the difference in wiring length between the virtual antennas, the phase difference between different transmission circuits, the phase difference between different reception circuits, and the phase difference due to a delay in the clock signal, in accordance with the comparison results for multiple targets at different distances, for detection signals of the same target in reception signals between virtual antennas in at least Ns+Nr-2 unique sets.

[0012] According to these aspects, based on the comparison results of the received signals of the virtual antennas in at least Ns+Nr-2 unique sets, the phase difference between different transmitting circuits, the phase difference between different receiving circuits, and the phase difference due to the delay of the clock signal can be compensated for, which can improve the compensation accuracy. [Brief explanation of the drawings]

[0013] [Figure 1] 1 is a schematic diagram illustrating a basic configuration of a radar device according to a first embodiment. [Figure 2] 3A and 3B are schematic diagrams showing examples of combinations of a transmitter circuit and a transmitter antenna, and a receiver circuit and a receiver antenna in the first embodiment. [Figure 3] FIG. 2 is a schematic diagram showing an example of the arrangement of transmitting antennas and receiving antennas in the first embodiment. [Figure 4] FIG. 2 is a schematic diagram showing a virtual antenna assumed in the first embodiment. [Figure 5] FIG. 2 is a block diagram showing the functional configuration of a control unit according to the first embodiment. [Figure 6] 4 is a flowchart showing a control flow according to the first embodiment. [Figure 7] 10 is a graph showing an example of the relationship between wiring length difference and phase error. [Figure 8] 10 is a graph showing an example of the relationship between temperature and parameter K. [Figure 9] 10 is a table showing an example of a set of virtual antennas used in compensation processing. [Figure 10] 10 is a graph showing the relationship between the phase error between the transmission circuits and the temperature. [Figure 11]10 is a graph showing the relationship between the phase error between receiving circuits and temperature. [Figure 12] 10 is a graph for explaining a delay of a clock signal. [Figure 13] 10 is a graph showing the difference in beat frequency depending on the distance to the target. [Figure 14] FIG. 10 is a schematic diagram showing an example of the arrangement of transmitting antennas and receiving antennas in the second embodiment. [Figure 15] FIG. 10 is a schematic diagram showing a virtual antenna assumed in the second embodiment. [Figure 16] FIG. 11 is a schematic diagram showing an example of the arrangement of transmitting antennas and receiving antennas in a third embodiment. [Figure 17] FIG. 10 is a schematic diagram showing a virtual antenna assumed in the third embodiment. [Figure 18] 10 is a table showing an example of a set of virtual antennas used in compensation processing. [Figure 19] 10A and 10B are schematic diagrams showing examples of combinations of a transmitter circuit and a transmitter antenna, and a receiver circuit and a receiver antenna in a fourth embodiment. [Figure 20] FIG. 10 is a schematic diagram showing an example of the arrangement of transmitting antennas and receiving antennas in the fourth embodiment. [Figure 21] FIG. 10 is a schematic diagram showing a virtual antenna assumed in the fourth embodiment. [Figure 22] 13 is a graph showing the relative relationship between the wiring lengths of virtual antennas assumed in the fourth embodiment. [Figure 23] 13 is a table showing an example of a set of virtual antennas used in compensation processing in the fifth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0014] Hereinafter, multiple embodiments of the present disclosure will be described with reference to the drawings. Note that corresponding components in each embodiment are designated by the same reference numerals, and redundant description may be omitted. Furthermore, when only a portion of the configuration is described in each embodiment, the configuration of another previously described embodiment may be applied to the remaining portions of the configuration. Furthermore, in addition to the combinations of configurations explicitly stated in the description of each embodiment, configurations of multiple embodiments may be partially combined together even if not explicitly stated, provided that there is no particular problem with the combination.

[0015] (First embodiment) A first embodiment of the present disclosure will be described with reference to Figures 1 to 13. A radar device 1 is mounted on a moving body such as a vehicle. The radar device 1 transmits a transmission signal, receives the transmission signal reflected by an object as a received signal, and detects, as target information, the distance to a target that is the object that reflected the transmission signal, the relative speed to the target, the direction of the target, and the like.

[0016] The target information output from the radar device 1 is input to an in-vehicle ECU (Electronic Control Unit) via an in-vehicle network such as a Control Area Network (CAN) (registered trademark) or Ethernet (registered trademark). The in-vehicle ECU executes various processes for automatic driving of the vehicle and advanced driving assistance based on the acquired target information of each target.

[0017] Processing based on target information includes, for example, collision avoidance processing, warning processing, etc. Collision avoidance processing is processing for controlling the vehicle to avoid collision with a target by controlling the brake system, steering system, etc. based on the target information of each target. Warning processing is processing for warning the driver of the possibility of collision with a target based on the target information of each target.

[0018] 1, the radar device 1 of this embodiment includes a clock oscillator 2a, a signal generating unit 2b, multiple transmission circuits 3, multiple transmission antennas TX, multiple reception antennas RX, multiple reception circuits 4, a temperature sensor 5, a control unit 6, and a storage unit 7. The radar device 1 is a so-called MIMO (Multiple-Input-Multiple-Output) radar that transmits transmission signals from multiple transmission antennas TX to artificially increase the number of reception antennas RX beyond the actual number.

[0019] The clock oscillator 2a generates a periodic clock signal. The clock oscillator 2a transmits the clock signal to the signal generating unit 2b and each receiving circuit 4. The clock oscillator 2a is an example of a "clock generating unit." The signal generating unit 2b generates a modulated signal modulated at a modulation period corresponding to the clock signal. The modulated signal is, for example, a so-called chirp signal whose frequency changes over time. The modulated signal is distributed and output to each channel of the transmitting circuit 3 and the receiving circuit 4. In the following, the modulated signal output from the signal generating unit 2b to the transmitting circuit 3 is referred to as a transmission signal. Furthermore, the modulated signal output from the signal generating unit 2b to the receiving circuit 4 is referred to as a local signal.

[0020] The transmitting circuit 3 and the receiving circuit 4 are each mainly composed of a semiconductor integrated circuit device such as an MMIC (Monolithic Microwave Integrated Circuit). The transmitting circuit 3 is connected to a transmitting antenna TX and outputs a transmitting signal to the transmitting antenna TX. If the number of transmitting circuits 3 mounted in one radar device 1 is Ns, Ns is an integer equal to or greater than 2. The transmitting circuit 3 is provided with amplifiers 30 in the same number as the connected transmitting antennas TX. The amplifiers 30 amplify the transmitting signals output from the signal generating unit 2b and output the signals to the corresponding transmitting antennas TX.

[0021] The transmitting antenna TX converts an electrical signal, which is a transmission signal supplied from the signal generating unit 2b, into a radio wave signal and transmits it to the outside world. The transmitting antenna TX is configured to include at least one antenna element. For example, the transmitting antenna TX is a patch antenna having multiple flat antenna elements. The antenna elements are arranged on the surface opposite to the ground plane of a dielectric substrate having a ground plane on one surface, so as to face the ground plane. The multiple antenna elements are connected, for example, in series, by a feeder line that supplies the electrical signal.

[0022] The receiving antenna RX receives, as a received signal, a radio wave signal including a transmission signal reflected by a target in the external world as a reflecting object. The receiving antenna RX is connected to a corresponding receiving circuit 4. The arrangement of the transmitting antenna TX and the receiving antenna RX will be described later.

[0023] The receiving antenna RX converts the received signal as a radio wave signal into an electrical signal and outputs it to the corresponding receiving circuit 4. The receiving antenna RX is, for example, a patch antenna in the same manner as the transmitting antenna TX, in which at least one antenna element is connected in series by a feeder line.

[0024] The receiving circuit 4 is connected to the receiving antenna RX and acquires the received signal received by the receiving antenna RX. If the number of receiving circuits 4 mounted in one radar device 1 is Nr, Nr is an integer equal to or greater than 2. The receiving circuit 4 includes amplifiers 40, signal mixers 41, and AD converters 42, the number of which is the same as the number of connected receiving antennas RX.

[0025] The amplifier 40 amplifies the received signal received by the receiving antenna and outputs the amplified signal to the signal mixer 41. The signal mixer 41 generates a beat signal by mixing the local signal from the signal generating unit 2b with the received signal. The generated beat signal is an interference signal that represents the frequency difference between the received signal and the local signal. The beat signal is output to the AD converter 42 after high-frequency components that deviate from the frequency difference between the received signal and the local signal have been filtered out by a low-pass filter (not shown).

[0026] The AD converter 42 converts the beat signal, which is a filtered analog signal, into a digital signal. The AD converter 42 acquires the clock signal output from the clock oscillator 2a, samples the beat signal at time intervals corresponding to the cycle of the clock signal, and digitizes it. The AD converter 42 sequentially outputs the digitized beat signal to the control unit 6.

[0027] The temperature sensor 5 detects the temperature inside the radar device 1. The temperature sensor 5 includes, for example, a thermistor, and outputs temperature information according to the resistance value of the thermistor. The temperature sensor 5 detects temperature information of each of the transmission circuits 3 and the reception circuits 4, and outputs the information to the control unit 6.

[0028] The accommodation unit 7 is a housing that accommodates the transmitting antenna TX, receiving antenna RX, clock oscillator 2a, signal generating unit 2b, transmitting circuit 3, receiving circuit 4, temperature sensor 5, and control unit 6. The accommodation unit 7 includes a radome 7a and a case body 7b. The radome 7a is mainly made of a transparent material that allows millimeter-wave band radio waves to pass through. The radome 7a is attached to the case body 7b so as to cover the antennas TX and RX. The radome 7a protects the antennas TX and RX while allowing radio waves to pass through, enabling signals to be transmitted and received by the antennas TX and RX. The case body 7b, together with the radome 7a, defines an accommodation space that accommodates the components of the radar device 1 described above.

[0029] The control unit 6 is a control unit including at least one dedicated computer. The dedicated computer constituting the control unit 6 may be, for example, an ECU (Electronic Control Unit) specialized for controlling the radar device 1.

[0030] The dedicated computer constituting the control unit 6 has at least one memory 6a and one processor 6b. The memory 6a is at least one type of non-transitory tangible storage medium, such as a semiconductor memory, a magnetic medium, or an optical medium, that non-temporarily stores computer-readable programs and data. Here, "storage" may refer to accumulation in which data is retained even when the sensor system is turned on or off, or temporary storage in which data is erased when the sensor system is turned off. The processor 6b may include at least one type of core selected from a central processing unit (CPU), a graphics processing unit (GPU), a reduced instruction set computer (RISC)-CPU, a data flow processor (DFP), and a graph streaming processor (GSP). Alternatively, the processor 6b may be at least one of a digital circuit and an analog circuit. Here, the digital circuit is at least one of, for example, an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), an SOC (System on a Chip), a PGA (Programmable Gate Array), and a CPLD (Complex Programmable Logic Device), etc. Furthermore, such a digital circuit may have a memory 6a that stores a program.

[0031] The control unit 6 processes the beat signals output from the receiver circuits 4 to perform angle measurement processing to calculate the angle of a reflecting object relative to the radar device 1. The radar device 1 ensures a relatively high angle resolution by using a MIMO system to pseudo-ensure that the number of receiver antennas RX is greater than the actual number. In addition, the control unit 6 performs compensation processing to compensate for signal phase differences and amplitude differences that occur between different transmitter circuits 3 and different receiver circuits 4, thereby ensuring a relatively high angle measurement accuracy.

[0032] For the above compensation processing, the transmitting antennas TX and receiving antennas RX are mounted in a specified arrangement. The arrangement of the transmitting antennas TX and receiving antennas RX will be explained below with reference to specific examples shown in Figs.

[0033] With multiple transmitting antennas TX and multiple receiving antennas RX, multiple virtual antennas V corresponding to the phase differences of the received signals between the receiving antennas RX are assumed for each transmitting antenna TX. The virtual position of each virtual antenna V is defined by the relative position of the corresponding transmitting antenna TX with respect to the other transmitting antennas TX and the relative position of the corresponding receiving antenna RX with respect to the other receiving antennas RX.

[0034] The transmitting antennas TX and receiving antennas RX are arranged so that the number of unique pairs of virtual antennas V, which are pairs of virtual antennas V whose combinations of transmitting circuits 3 and receiving circuits 4 do not overlap with other pairs, among the set of pairs of virtual antennas whose virtual positions overlap among the groups of virtual antennas V assumed for each transmitting antenna TX and whose combinations of transmitting circuits 3 and receiving circuits 4 do not match, is at least Ns+Nr-2 pairs.

[0035] As an example, assume that the radar device 1 is equipped with four transmitting antennas TX and six receiving antennas RX. Furthermore, in this example, the number of transmitting circuits 3 is Ns=2, and the number of receiving circuits 4 is Nr=2. In this case, as shown in FIG. 2, the number of channels in one transmitting circuit 3 is at least two, and the number of channels in one receiving circuit 4 is at least three. Hereinafter, one of the transmitting circuits 3 is referred to as a first transmitting circuit 3_1, and the other as a second transmitting circuit 3_2. Furthermore, one of the receiving circuits 4 is referred to as a first receiving circuit 4_1, and the other as a second receiving circuit 4_2. In this embodiment, each circuit is mounted on a plurality of circuit chips C. Specifically, the first transmitting circuit 3_1 and the first receiving circuit 4_1 are mounted on the same first circuit chip C1. Furthermore, the second transmitting circuit 3_2 and the second receiving circuit 4_2 are mounted on the same second circuit chip C2.

[0036] Furthermore, in the radar device 1 of this embodiment, at least one transmitting antenna TX has a wiring length different from that of the other transmitting antennas TX. In the example shown in Fig. 2, the wiring Wt2 of the transmitting antenna TX1_2 connected to the first transmitting circuit 3_1 is longer than the wiring Wt1 of the other transmitting antennas TX. Also, the wiring lengths of the respective wirings Wr of the receiving antennas RX are all substantially the same. Furthermore, the transmitting antennas TX and the receiving antennas RX are arranged so that the wiring length difference between the virtual antennas in the belonging group, which will be described later, falls within an allowable difference range.

[0037] In the following, the four transmitting antennas TX and six receiving antennas RX may be distinguished by assigning different reference symbols to them. Specifically, the two transmitting antennas TX connected to the first transmitting circuit 3_1 are referred to as transmitting antennas TX1_1 and TX1_2, and the two transmitting antennas TX connected to the second transmitting circuit 3_2 are referred to as transmitting antennas TX2_1 and TX2_2. The three receiving antennas RX connected to the first receiving circuit 4_1 are referred to as receiving antennas RX1_1, RX1_2, and RX1_3, and the three receiving antennas RX connected to the second receiving circuit 4_2 are referred to as receiving antennas RX2_1, RX2_2, and RX2_3.

[0038] 3, transmitting antennas TX1_1, TX1_2, TX2_1, and TX2_2 are arranged in this order from one side to the other in the X direction, which is the reference direction, at an interval of 2d. Furthermore, receiving antennas RX1_1, RX1_2, RX2_1, RX2_2, RX2_3, and RX1_3 are arranged in this order from one side to the other in the X direction, at an interval of d.

[0039] When antennas with different wiring lengths exist, the transmitting antennas TX and receiving antennas RX are arranged so that the number of unique pairs of virtual antennas V, which are pairs of virtual antennas V whose virtual positions overlap among the virtual antenna groups V assumed for each transmitting antenna TX and whose combinations of transmitting circuits 3 and receiving circuits 4 do not overlap with other pairs, is at least Ns+Nr-2 pairs, i.e., 2 pairs. In this embodiment, the transmitting antennas TX and receiving antennas RX are arranged one-dimensionally at equal intervals. Here, "arranged one-dimensionally" means that they are arranged side by side along a single reference direction.

[0040] The number of virtual antennas V is assumed to be the same as the number of receiving antennas RX, that is, six, for each of the transmitting antennas TX1_1, TX1_2, TX2_1, and TX2_2. Therefore, a total of 24 virtual antennas V are assumed.

[0041] Here, the multiple virtual antennas V assumed for the transmitting antenna TX1_1 are, from one side to the other, virtual antennas V1, V2, V3, V4, V5, and V6. The multiple virtual antennas V assumed for the transmitting antenna TX1_2 are, from one side to the other, virtual antennas V7, V8, V9, V10, V11, and V12. The group of virtual antennas V assumed for the transmitting antenna TX2_1 are, from one side to the other, virtual antennas V13, V14, V15, V16, V17, and V18. The group of virtual antennas V assumed for the transmitting antenna TX2_2 are, from one side to the other, virtual antennas V19, V20, V21, V22, V23, and V24.

[0042] Because adjacent transmitting antennas TX are arranged at an interval of 2d, the virtual antennas V assumed for a specific transmitting antenna TX are located at virtual positions that are shifted by 2d relative to the virtual antennas V assumed for the adjacent transmitting antenna TX. Because receiving antennas RX are arranged at an interval of d, there are 16 pairs of virtual antennas V whose virtual positions overlap, as shown in FIG. 4. Note that in FIG. 4, for ease of viewing, the virtual positions of the virtual antennas V for each transmitting antenna TX are shifted in the vertical direction on the page. In reality, the virtual positions of the virtual antennas V are assumed to be on a virtual line VL extending in the reference direction (X direction). That is, in FIG. 4, virtual antennas V located at the same horizontal position on the page are pairs of virtual antennas V whose virtual positions overlap. Hereinafter, a specific pair of virtual antennas V whose virtual positions overlap will be denoted as (Vn, Vm) using the symbols assigned to each individual virtual antenna V (n and m are natural numbers).

[0043] Specifically, (V3,V7), (V4,V8), (V5,V9), (V5,V13), (V6,V10), (V6,V14), (V9,V13), (V10,V14), (V11,V15), (V11,V19), (V12,V16), (V12,V20), (V15,V16), (V16,V20), (V17,V21), and (V18,V22) are pairs of virtual antennas V with overlapping virtual positions.

[0044] Of the above pairs, the group of virtual antennas V, which is a collection of pairs in which the combinations of the transmitter circuits 3 and the receiver circuits 4 do not match among the virtual antennas V, is composed of 14 pairs, excluding (V6, V10) and (V18, V22). Among these virtual antennas V, the number of pairs in which the combinations of the transmitter circuits 3 and the receiver circuits 4 do not overlap with other pairs is six, which satisfies the condition of at least Ns + Nr - 2 pairs. Examples of the six pairs include the pairs (V3, V7), (V9, V13), (V11, V15), (V11, V19), (V12, V16), and (V17, V21).

[0045] Furthermore, the transmitting antennas TX and receiving antennas RX are arranged so as to include at least one different wiring length set, which is a set of virtual antennas V whose virtual positions overlap and whose wiring lengths do not match. The transmitting antennas TX and receiving antennas RX are arranged so that the total number of belonging sets, which are sets of virtual antennas V belonging to at least one of the above-mentioned unique set and different wiring length set, is at least Ns+Nr-1 sets.

[0046] The above-mentioned example of six sets includes a different wiring length set. That is, of these six sets, five sets excluding (V17, V21) are different wiring length sets and satisfy the condition of at least one set. Therefore, the total number of belonging sets is six, which satisfies the condition of at least Ns+Nr-1 sets.

[0047] Note that the set of virtual antennas V assumed for compensation processing may be other than the above-mentioned sets, as long as the combination of the transmitter circuit 3 and the receiver circuit 4 does not overlap with other sets. For example, (VV4, V8) and (V5, V9) overlap with (V3, V7) in terms of the combination of the transmitter circuit 3 and the receiver circuit 4, but do not overlap with other sets. Therefore, assuming (V4, V8) or (V5, V9) as one of the six sets is equivalent to assuming (V3, V7).

[0048] Furthermore, if at least Ns+Nr-2 pairs of virtual antennas V whose combinations of transmitting circuits 3 and receiving circuits 4 do not overlap with other pairs are secured, the control unit 6 may additionally consider pairs whose combinations of transmitting circuits 3 and receiving circuits 4 overlap with those pairs as pairs to be used for compensation processing.

[0049] To control the radar device 1, including the compensation process described above, the processor 6b executes a plurality of instructions included in a control program stored in the memory 6a. This causes the control unit 6 to implement functional units for controlling the radar device 1. Specifically, as shown in Fig. 5, the control unit 6 implements a signal generating unit 60, a Fourier transform unit 62, an extracting unit 63, a compensating unit 64, and an angle acquiring unit 65 as functional units.

[0050] The radar control method in which the control unit 6 controls the radar device 1 using the functions of the processor 6b is executed according to the control flow shown in Figures 6 to 8. This control flow is executed repeatedly while the vehicle is running. Note that each "S" in this control flow represents a plurality of steps executed by a plurality of instructions included in the control program.

[0051] First, in S10 of FIG. 6, the signal generating unit 60 causes the signal generating unit 2b to output a transmission signal. In the following S20, the Fourier transform unit 62 acquires, from the receiving circuit 4, a beat signal corresponding to a received signal that is the result of the transmission signal transmitted from the transmitting antenna TX to the outside world being reflected by a target and received by the receiving antenna RX. In the following S40, the Fourier transform unit 62 performs FFT (Fast Fourier Transform) processing for each chirp of the A / D converted beat signal. As a result, the Fourier transform unit 62 acquires, for each chirp, a frequency spectrum (distance spectrum) that exhibits a peak at a frequency position corresponding to the distance to the target. The distance spectrum is data indicating the signal strength for each distance bin according to the distance resolution.

[0052] The Fourier transform unit 62 then performs FFT processing on the distance spectrum. That is, the Fourier transform unit 62 performs a second FFT processing on a waveform in which the phases at the distance bins obtained in the first FFT processing for the multiple chirps are arranged in time series. As a result, a frequency spectrum (velocity spectrum) showing a peak at a position corresponding to the relative velocity from the target is obtained for each velocity bin. By performing the above two-dimensional FFT, the Fourier transform unit 62 obtains two-dimensional information (RV map) showing peaks at positions corresponding to the distance to the target and the relative velocity of the target.

[0053] Next, in S50, the extraction unit 63 extracts peaks from the RV map as detection signals. Subsequently, in S60, the extraction unit 63 acquires the intensities of the extracted peaks. Then, in S70, the extraction unit 63 determines whether there are multiple extracted peaks and whether they are valid. For example, the extraction unit 63 determines that a peak is valid if its intensity is within an allowable intensity range. Here, the allowable intensity range is a range in which the intensity is equal to or greater than a predetermined threshold. If it is determined that there are multiple valid peaks, the flow proceeds to S80.

[0054] In S80, the compensating unit 64 acquires a phase error corresponding to the difference in wiring length between the transmitting circuits 3, between the receiving circuits 4, and the virtual antenna V, based on the phase of the effective peak in each virtual channel. Here, the wiring length of the virtual antenna V means the total wiring length from the transmitting antenna TX corresponding to the virtual antenna V to the transmitting circuit 3 and the wiring length from the corresponding receiving antenna RX to the receiving circuit 4. Here, only the wiring Wt2 is longer than the wiring Wt1, and all the wirings Wr of the receiving antenna RX are substantially the same length, so the wiring length of the virtual antenna V assumed for the transmitting antenna TX1_2 is longer than the wiring lengths of the virtual antennas V assumed for the transmitting antennas TX other than the transmitting antenna TX1_2.

[0055] Generally, as shown in FIG. 7, the phase error due to the wiring length difference for each virtual antenna V increases linearly according to the wiring length difference from the reference wiring length Lo (e.g., the shortest wiring length). That is, the phase error for the wiring length difference is a value obtained by multiplying the wiring length difference by the parameter K. Therefore, as shown in FIG. 7, when a graph of the phase error versus the wiring length difference is assumed, the parameter K corresponds to the slope of the graph. That is, when the wiring length of the virtual antenna V assumed for the transmitting antenna TX1_2 in this embodiment is LA, the parameter K can be calculated from the wiring length difference LA-Lo. In this case, the reference wiring length Lo is the wiring length at room temperature of the virtual antenna V assumed for the transmitting antennas TX other than the transmitting antenna TX1_2.

[0056] The parameter K corresponds to the product of the linear expansion coefficient of the wiring and the temperature of the wiring. Since the linear expansion coefficient of an object does not depend on temperature, the parameter K is a temperature parameter that changes depending on temperature. As shown in Figure 8, the parameter K increases linearly as the temperature increases.

[0057] In the phase compensation process, the compensator 64 defines a linear equation based on the phase difference of the peaks in the beat signal for each of the Ns+Nr-1 or more sets of virtual antennas V in the belonging set. In this linear equation, the relative phase error between the transmitting circuits 3 and the receiving circuits 4, and the relative phase error corresponding to the difference in wiring length, are defined as unknowns. The compensator 64 obtains the solution of this linear equation as the relative phase error. Because the beat signal is a signal related to the received signal, the phase difference of the peaks in the beat signal is an example of the result of comparing the received signals between the virtual antennas V.

[0058] The acquisition of the relative phase error will be described in detail below. In the following description, the phase at the peak of the beat signal corresponding to the virtual antenna Vn is defined as θ Vn (n is a natural number). The difference in wiring length in the virtual antenna V assumed for the pair of the transmitting antenna TXa_b and the receiving antenna RXc_d is expressed as L abcd (a, b, c, d are natural numbers.) In the following explanation, for simplicity, three sets of (V3, V7), (V9, V13), and (V11, V15) are used as the belonging sets, as shown in FIG.

[0059] Furthermore, in the example described below, the phases at the peaks of two targets at different distances are compared. For each peak at different distances, the frequencies (beat frequencies) of the corresponding beat signals are denoted as fa and fb. In this embodiment, the beat frequency for the target closer to the radar device 1 (short-distance target) of the two targets is denoted as fa, and the beat frequency for the farther target (long-distance target) is denoted as fb.

[0060] Here, the phase difference of the same peak for each virtual antenna V in each set corresponds to the phase difference caused by the target, the phase error between the transmitting circuits 3, the phase error between the receiving circuits 4, and the phase error caused by the difference in wiring length of the virtual antennas V. In addition, the phase difference of the same peak corresponds to the phase error (hereinafter referred to as clock phase error) caused by the delay (routing delay) corresponding to the time difference between the clock signal arriving from the clock oscillator 2 a to each receiving circuit 4.

[0061] Therefore, the phase difference θ of the peak of the short-range target with respect to (V3, V7) V3fa -θ V7fa is the phase difference θ of the peak of the short-range target in relation to equation (1), (V9, V13) V9fa -θ V13fa is the phase difference θ of the peak of the short-range target in equation (2), (V11, V15) V11fa -θ V15fa can be defined by the relationship shown in Equation (3). In addition, the phase difference θ of the peak of the long-distance target with respect to (V3, V7) V3fb -θ V7fb is the phase difference θ of the peak of the long-distance target in relation to equation (4), (V9, V13) V9fb -θ V13fb is the phase difference θ of the peak of the long-distance target in relation to equation (5), (V11, V15) V11fb -θ V15fb can be defined by the relationship shown in equation (6).

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[0062] In the above formula, Θ a ,Θ b ,Θ c are the target-induced phase errors, and e tx1 is the phase error of the signal generated in the first transmission circuit 3_1, e tx2 is the phase error of the signal generated in the second transmission circuit 3_2. rx1 is the phase error of the signal generated in the first receiving circuit 4_1, e rx2 is the phase error of the signal generated in the second receiving circuit 4_2. abcd is the wiring length difference L abcd This is the phase error caused by

[0063] Also, β is the clock phase error. The subscripts added to the bottom right of β are used to distinguish between the receiving circuit 4 in which each clock phase error occurs and the peak target. Specifically, the clock phase error occurring in the phase difference of the detected peak of target k in the nth receiving circuit is defined as β nk It is written as follows.

[0064] Here, the clock phase error is expressed by the following formula (7), where ΔTn is the delay time of the clock signal in the nth receiving circuit 4 relative to the reference time, and fk is the beat frequency of the target k.

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[0065] Based on the above, the formulas (1) to (6) can be transformed into the following formulas (8) to (13).

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[0066] Here, when Equations (8) to (13) are converted into a matrix format, the phase difference and relative phase error of each pair satisfy the relationship expressed by Equation (14) below.

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[0067] Here, the term on the left side of equation (14) is a phase difference vector Y1 between the overlapping virtual antennas V. The first term on the right side of equation (14) is a coefficient matrix A1, and the second term is a phase error vector X1. The phase difference vector Y1 in equation (14) can be calculated from the phase of the peak in each beat signal. The coefficient matrix A1 is a constant matrix defined by the combination of the transmitting circuit 3 and the receiving circuit 4 of each pair of virtual antennas V. Therefore, equation (14) can be expressed as e tx2 ,e rx2 , K, δT2 as unknowns. That is, the compensation unit 64 calculates e tx2 ,e rx2 , K as the relative phase error of the second transmitting circuit 3_2 with respect to the first transmitting circuit 3_1, the relative phase error of the second receiving circuit 4_2 with respect to the first receiving circuit 4_1, and the relative phase error according to the wiring length difference. Then, the compensating unit 64 obtains ΔT2 as the solution of Equation (14) as the clock phase error of the second receiving circuit 4_2 with respect to the first receiving circuit 4_1.

[0068] In the amplitude compensation process, similar to the phase compensation process, the compensator 64 defines a linear equation based on the amplitude difference of the peaks of the beat signal for each of the Ns+Nr-1 or more belonging sets of virtual antennas V, with the amplitude error between the transmitting circuits 3 and the receiving circuits 4 being unknowns. The compensator 64 obtains the solution of this linear equation as the relative amplitude error. The amplitude difference of the peaks of the beat signal is an example of the comparison result of the received signals between the virtual antennas V.

[0069] The amplitude error due to the difference in wiring length from the reference wiring length Lo increases linearly with the difference in wiring length from the reference wiring length, similar to the phase error. The increase in amplitude error due to the difference in wiring length changes with temperature. In other words, the amplitude error due to the difference in wiring length is the value obtained by multiplying the difference in wiring length by the parameter α.

[0070] In the following description, it is assumed that the same set of virtual antennas V as in the phase compensation process described above is also used in the amplitude compensation process. In the following description, the amplitude at the peak of the beat signal corresponding to the virtual antenna Vn is denoted as AVn (n is a natural number). Wiring length difference L abcd The amplitude error caused by G abcd Then, the amplitude difference A of the peak for (V3, V7) V3 -A V7 is the amplitude difference A of the peaks related to equation (15), (V9, V13) V9 -A V13 is the amplitude difference A of the peaks related to equation (16), (V11, V15) V11 -A V15 can be defined by the relationship shown in Equation (17).

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[0071] In the above formula, G a ,G b ,G c are the amplitude errors due to the target, and G tx1 is the amplitude error of the signal generated in the first transmission circuit 3_1, G tx2 is the amplitude error of the signal generated in the second transmission circuit 3_2. rx1 is the amplitude error of the signal generated in the first receiving circuit 4_1, G rx2 is the amplitude error of the signal generated in the second receiving circuit 4_2.

[0072] Here, similarly to the phase compensation, when the relative amplitude error of the second transmitting circuit 3_2 with respect to the first transmitting circuit 3_1 and the relative amplitude error of the second receiving circuit 4_2 with respect to the first receiving circuit 4_1 are taken into consideration, G tx1 ,G rx1 = 0. Therefore, the formulas (15) to (17) can be transformed into the following formulas (18) to (20).

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[0073] When Equations (18) to (20) are converted into a matrix format, the amplitude difference and relative amplitude error of each pair satisfy the relationship expressed by Equation (21) below.

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[0074] Here, the term on the left side of Equation (21) is the amplitude difference vector Y2 between the overlapping virtual antennas V. The first term on the right side of Equation (21) is the coefficient matrix A2, and the second term is the amplitude error vector X2. The amplitude difference vector Y2 can be calculated from the peak amplitude of each beat signal. The coefficient matrix A1 is a constant matrix defined by the combination of the transmitting circuit 3 and the receiving circuit 4 of each pair of virtual antennas V. That is, the compensating unit 64 calculates G as a solution of Equation (21). tx2 ,G rx2 , α are acquired as the relative amplitude error of the second transmitting circuit 3_2 with respect to the first transmitting circuit 3_1, the relative amplitude error of the second receiving circuit 4_2 with respect to the first receiving circuit 4_1, and the relative amplitude error due to the wiring length.

[0075] Then, in S100, the compensation unit 64 compensates for the phase error between the transmitting circuits 3 and between the receiving circuits 4. For example, the compensation unit 64 stores the acquired relative phase error in the memory 6a as compensation data to be used when acquiring a relative angle, which will be described later. Furthermore, in S110, the compensation unit 64 compensates for the relative amplitude error between the transmitting circuits 3 and between the receiving circuits 4 by storing it in the memory 6a as compensation data.

[0076] On the other hand, if it is determined in S70 that there are no multiple valid peaks, i.e., that there is only one valid peak, or that there is only one valid peak, the flow proceeds to S120. In S120, the compensation unit 64 acquires the temperatures of each transmitting circuit 3 and each receiving circuit 4 from the temperature sensor 5. Then, in S130, the compensation unit 64 reads compensation data regarding the phase error and amplitude error between the transmitting circuits 3 according to the temperature from the memory 6a. The compensation unit 64 reads data regarding the relationship between the temperature and the phase error between the circuits 3 and 4, as shown in the graphs of FIGS. 10 and 11, as compensation data. The compensation data may be a relational expression or may be in the form of a table.

[0077] Next, in S140, the compensation unit 64 compares the acquired temperature with the compensation data to obtain the relative phase error between the transmission circuits 3 and between the reception circuits 4. Then, in S150, the compensation unit 64 compares the acquired temperature with the compensation data to obtain the relative amplitude error between the transmission circuits 3 and between the reception circuits 4. Then, in S160, the compensation unit 64 compensates for the relative phase error between the transmission circuits 3 and between the reception circuits 4. Furthermore, in S170, the compensation unit 64 compensates for the relative amplitude error between the transmission circuits 3 and between the reception circuits 4.

[0078] In S180 after S110 or S170, the angle acquisition unit 65 acquires the relative angle of the target. Specifically, the angle acquisition unit 65 acquires the phase difference between the virtual antennas V by performing FFT processing on multiple peaks extracted from the beat signal based on the received signal of each virtual antenna V after compensation. Since the phase difference between the virtual antennas V is related to the relative angle of the target, the angle acquisition unit 65 acquires the relative angle by converting the acquired phase difference into a relative angle.

[0079] According to this first aspect, based on the comparison results of the received signals of the virtual antennas in at least the Ns+Nr-1 groups, the phase difference between different transmitting circuits, the phase difference between different receiving circuits, the phase difference according to the difference in wiring length between the virtual antennas, and the phase difference due to the delay of the clock signal can be compensated for, which may improve the compensation accuracy.

[0080] Second Embodiment 14 and 15, the second embodiment is a modification of the first embodiment. In the second embodiment, the transmitting antennas TX are arranged two-dimensionally. That is, the transmitting antennas TX are arranged at equal intervals in two reference directions.

[0081] In the second embodiment, the number of transmitting antennas TX and receiving antennas RX is the same as in the first embodiment, and the number of transmitting circuits 3 and receiving circuits 4 is also the same as in the first embodiment.

[0082] In the example shown in Fig. 14, the transmitting antennas TX1_1 and TX2_1 are arranged in this order from one side to the other in the X direction, with an interval of 2d between them. Furthermore, the transmitting antennas TX1_2 and TX1_2 are arranged in this order from one side to the other in the Y direction orthogonal to the X direction, with an interval of s between them. Furthermore, the transmitting antennas TX2_1 and TX2_2 are arranged in this order from one side to the other in the Y direction, with an interval of s between them. That is, the transmitting antennas TX1_2 and TX2_2 are arranged in parallel to the transmitting antennas TX1_1 and TX2_1, with an interval of 2d between them.

[0083] Furthermore, receiving antennas RX1_1, RX1_2, RX2_1, RX2_2, RX2_3, and RX1_3 are arranged in this order from one side to the other in the X direction at intervals d. Since the number of antennas TX and RX is the same as in the first embodiment, a total of 24 virtual antennas V are assumed in the second embodiment as well, as shown in FIG.

[0084] Since adjacent transmitting antennas TX in the X direction are arranged at an interval of 2d, the row of virtual antennas V assumed for a specific transmitting antenna TX is at a virtual position relatively shifted by 2d from the row of virtual antennas V assumed for adjacent transmitting antennas TX in the X direction. Furthermore, since adjacent transmitting antennas TX in the Y direction are arranged at an interval of s, the row of virtual antennas V assumed for a specific transmitting antenna TX is at a virtual position relatively shifted by s from the row of virtual antennas V assumed for adjacent transmitting antennas TX in the Y direction.

[0085] 15, as in FIG. 4, the virtual positions of the multiple virtual antennas V for each transmitting antenna TX are shifted in the vertical direction of the paper. In reality, the multiple virtual antennas V assumed for the transmitting antennas TX1_1 and TX2_1 are assumed to have their respective virtual positions on a virtual line VL1 extending in the X direction. Furthermore, the multiple virtual antennas V assumed for the transmitting antennas TX1_2 and TX2_2 are assumed to have their respective virtual positions on a virtual line VL2 extending in the X direction. The row of virtual antennas V on the virtual line VL1 and the row of virtual antennas V on the virtual line VL2 are spaced apart in the Y direction by a distance s.

[0086] 15, it is possible to imagine sets of virtual antennas V whose virtual positions overlap between the multiple virtual antennas V assumed for the transmitting antenna TX1_1 and the multiple virtual antennas V assumed for the transmitting antenna TX2_1. Specifically, (V3, V13), (V4, V14), (V5, V15), and (V6, V16) are sets of virtual antennas V whose virtual positions overlap.

[0087] Similarly, it is possible to imagine sets of virtual antennas V whose virtual positions overlap between the multiple virtual antennas V assumed for the transmitting antenna TX1_2 and the multiple virtual antennas V assumed for the transmitting antenna TX2_2. Specifically, (V9, V19), (V10, V20), (V11, V21), and (V12, V22) are sets of virtual antennas V whose virtual positions overlap.

[0088] The above pairs constitute a set of pairs in which the combinations of the transmitting circuits 3 and the receiving circuits 4 do not overlap with each other among the virtual antennas V. Among these pairs, the number of pairs in which the combinations of the transmitting circuits 3 and the receiving circuits 4 do not overlap with other pairs is three, which satisfies the condition of at least Ns+Nr-2 pairs.

[0089] Examples of triplet pairs include (V3, V13), (V5, V15), and (V6, V16). Further examples of triplet pairs include (V9, V19), (V11, V21), and (V12, V22).

[0090] Note that (V4, V14), (V9, V19), and (V10, V20) overlap with (V3, V13) in terms of combinations of transmitter circuit 3 and receiver circuit 4, but do not overlap with other combinations. Therefore, assuming (V4, V14), (V9, V19), or (V10, V20) as one of the three combinations is equivalent to assuming (V3, V13). Similarly, assuming (V11, V21) as one of the three combinations is equivalent to assuming (V5, V15), and assuming (V12, V22) is equivalent to assuming (V6, V16).

[0091] Furthermore, among the above unique pairs, three pairs (V9, V19), (V11, V21), and (V12, V22) are also different wiring length pairs, so the condition that there is one or more different wiring length pairs is also satisfied.

[0092] As a result, there are at least three belonging sets that belong to at least one of the unique set and the different wiring length set, and this satisfies the condition of at least Ns+Nr-1 sets. The three belonging sets can be, for example, (V9, V19), (V11, V21), and (V12, V22). Note that one or two of the belonging sets (V9, V19), (V11, V21), and (V12, V22) may be replaced with the equivalent sets described above.

[0093] (Third embodiment) 16 to 18, the third embodiment is a modified example of the first embodiment. In the radar device 1 of the third embodiment, the numbers of transmitting antennas TX and receiving antennas RX, and the numbers of transmitting circuits 3 and receiving circuits 4 are the same as those in the first embodiment. Furthermore, the combinations of transmitting antennas TX and transmitting circuits 3, and the combinations of receiving antennas RX and receiving circuits 4 are the same as those shown in FIG. 2.

[0094] In this embodiment, the transmitting antennas TX are arranged at unequally spaced intervals. In the example shown in Fig. 16, the transmitting antennas TX1_1, TX1_2, TX2_1, and TX2_2 are arranged in this order from one side to the other in the X direction, which is the reference direction. The transmitting antennas TX1_1 and TX1_2 are arranged at an interval of 6d. The transmitting antennas TX1_2 and TX2_1 are arranged at an interval of 3d. The transmitting antennas TX2_1 and TX2_2 are arranged at an interval of 6d.

[0095] Furthermore, the receiving antennas RX1_1, RX1_2, RX2_1, RX2_2, RX2_3, and RX1_3 are arranged in this order from one side to the other side in the reference direction at intervals d.

[0096] The number of virtual antennas V is assumed to be the same as the number of receiving antennas RX, that is, six, for each of the transmitting antennas TX1_1, TX1_2, TX2_1, and TX2_2. Therefore, a total of 24 virtual antennas V are assumed.

[0097] Here, the multiple virtual antennas V assumed for the transmitting antenna TX1_1 are, from one side to the other, virtual antennas V1, V2, V3, V4, V5, and V6. The multiple virtual antennas V assumed for the transmitting antenna TX1_2 are, from one side to the other, virtual antennas V7, V8, V9, V10, V11, and V12. The group of virtual antennas V assumed for the transmitting antenna TX2_1 are, from one side to the other, virtual antennas V13, V14, V15, V16, V17, and V18. The group of virtual antennas V assumed for the transmitting antenna TX2_2 are, from one side to the other, virtual antennas V19, V20, V21, V22, V23, and V24.

[0098] Because the transmitting antennas TX1_1 and TX1_2 are arranged at an interval of 6d, the virtual antenna group V assumed for the transmitting antenna TX1_1 is at a virtual position relatively shifted by 6d from the virtual antenna group V assumed for the transmitting antenna TX1_2. Furthermore, because the transmitting antennas TX1_2 and TX2_1 are arranged at an interval of 3d, the virtual antenna group V assumed for the transmitting antenna TX1_2 is at a virtual position relatively shifted by 3d from the virtual antenna group V assumed for the transmitting antenna TX2_1. Furthermore, because the transmitting antennas TX2_1 and TX2_2 are arranged at an interval of 6d, the virtual antenna group V assumed for the transmitting antenna TX2_1 is at a virtual position relatively shifted by 6d from the virtual antenna group V assumed for the transmitting antenna TX2_2.

[0099] Therefore, with such an arrangement of antennas TX and RX, there are three sets of virtual antennas V whose virtual positions overlap, as shown in Fig. 17. Note that in Fig. 17, for ease of viewing, the virtual positions of the multiple virtual antennas V for each transmitting antenna TX are shifted in the vertical direction on the page. In reality, the virtual positions of the multiple virtual antennas V are assumed to be on a virtual line VL extending in the reference direction (X direction). Specifically, (V10, V13), (V11, V14), and (V12, V15) are sets of virtual antennas V whose virtual positions overlap, respectively.

[0100] 17 and 18, the above three sets are a set of sets in which the combinations of the transmitter circuits 3 and the receiver circuits 4 do not match among the virtual antennas V. Furthermore, these three sets are sets in which the combinations of the transmitter circuits 3 and the receiver circuits 4 do not overlap with each other. Therefore, the number of unique sets in this antenna arrangement is three, which satisfies the condition of at least Ns+Nr-2 sets.

[0101] Furthermore, these three sets are different wiring length sets. That is, the wiring lengths of virtual antennas V10, V11, and V12 are longer than the wiring lengths of virtual antennas V13, V14, and V15. Therefore, the number of different wiring length sets in this antenna arrangement is three, which satisfies the condition of at least one set. Furthermore, as a result of the above, the number of belonging sets in this antenna arrangement is three, which satisfies the condition of at least Ns+Nr-1 sets.

[0102] (Fourth embodiment) 19 to 22, the second embodiment is a modification of the first embodiment. In the second embodiment, the transmitting antennas TX and the receiving antennas RX are arranged two-dimensionally, and the transmitting antennas TX are arranged at uneven intervals.

[0103] As an example, assume that the radar device 1 is equipped with 12 transmitting antennas TX and 16 receiving antennas RX. Furthermore, in this example, the number of transmitting circuits 3 is Ns=4, and the number of receiving circuits 4 is Nr=4. In this case, as shown in FIG. 19 , the number of channels in one transmitting circuit 3 is at least 3, and the number of channels in one receiving circuit 4 is at least 4. In the following, the four transmitting circuits 3 may be distinguished as a first transmitting circuit 3_1, a second transmitting circuit 3_2, a third transmitting circuit 3_3, and a fourth transmitting circuit 3_4. Furthermore, the four receiving circuits 4 may be distinguished as a first receiving circuit 4_1, a second receiving circuit 4_2, a third receiving circuit 4_3, and a fourth receiving circuit 4_4.

[0104] In this embodiment, each circuit is mounted on a plurality of circuit chips C. Specifically, the first transmitting circuit 3_1 and the first receiving circuit 4_1 are mounted on the same first circuit chip C1. The second transmitting circuit 3_2 and the second receiving circuit 4_2 are mounted on the same second circuit chip C2. The third transmitting circuit 3_3 and the third receiving circuit 4_3 are mounted on the same third circuit chip C3. The fourth transmitting circuit 3_4 and the fourth receiving circuit 4_4 are mounted on the same fourth circuit chip C4. The wiring length of each wiring Wt between the transmitting antenna TX and the corresponding transmitting circuit 3 and the wiring length of each wiring Wr between the receiving antenna RX and the corresponding receiving circuit 4 are specified so that the wiring length of each assumed virtual antenna V has the relative relationship shown in the graph of FIG. 22. That is, at least one of the wiring length from each transmitting circuit 3 to each transmitting antenna TX and the wiring length from each receiving antenna RX to each receiving circuit 4 is specified so that the wiring length of the corresponding virtual antenna V has the relative relationship shown in Figure 22.

[0105] In the following, the 12 transmitting antennas TX and the 16 receiving antennas RX may be distinguished by assigning different reference symbols to them. Specifically, the three transmitting antennas TX connected to the first transmitting circuit 3_1 are referred to as transmitting antennas TX4, TX5, and TX6, the three transmitting antennas TX connected to the second transmitting circuit 3_2 are referred to as transmitting antennas TX1, TX2, and TX3, the three transmitting antennas TX connected to the third transmitting circuit 3_3 are referred to as transmitting antennas TX7, TX8, and TX9, and the three transmitting antennas TX connected to the fourth transmitting circuit 3_4 are referred to as transmitting antennas TX10, TX11, and TX12.

[0106] The four receiving antennas RX connected to the first receiving circuit 4_1 are referred to as receiving antennas RX5, RX6, RX7, and RX8, the four receiving antennas RX connected to the second receiving circuit 4_2 are referred to as receiving antennas RX1, RX2, RX3, and RX4, the four receiving antennas RX connected to the third receiving circuit 4_3 are referred to as receiving antennas RX9, RX10, RX11, and RX12, and the four receiving antennas RX connected to the fourth receiving circuit 4_4 are referred to as receiving antennas RX13, RX14, RX15, and RX16.

[0107] The above-described transmitting antennas TX and receiving antennas RX are arranged two-dimensionally. As shown in FIG. 20, four rows of multiple transmitting antennas TX arranged in the X direction are spaced apart in the Y direction. Of these four rows arranged in the X direction, the first, second, and fourth rows from the origin side each have two transmitting antennas TX. Furthermore, of the four rows arranged in the X direction, the third row from the origin side has six transmitting antennas TX. Here, the interval between one scale division in the X direction is defined as d, and the interval between one scale division in the Y direction is defined as s. The transmitting antennas TX12, TX10, and TX9 are arranged at equal intervals of d. The transmitting antennas TX5, TX4, and TX3 are also arranged at equal intervals of d. On the other hand, the transmitting antenna TX9 and the transmitting antenna TX5 are spaced apart by an interval of 20d. That is, in this third row, the transmitting antennas TX are arranged at unequally spaced intervals in the X direction.

[0108] Furthermore, two rows of multiple receiving antennas RX aligned in the X direction are arranged spaced apart in the Y direction. Eight receiving antennas TX are arranged in each of these two rows aligned in the X direction. In each row, these receiving antennas RX are arranged at equal intervals in the X direction. Furthermore, of the two rows aligned in the X direction, the first row from the origin side is aligned so as to align with the first row of transmitting antennas TX from the origin side in the Y direction. Furthermore, of the two rows aligned in the X direction, the second row from the origin side is aligned so as to align with the fourth row of transmitting antennas TX from the origin side in the Y direction.

[0109] The number of virtual antennas V is assumed to be the same as the number of receiving antennas RX for each of the 12 transmitting antennas TX, that is, 16. Therefore, a total of 192 virtual antennas V are assumed. Specifically, the 192 virtual antennas V are assumed to be arranged as shown in FIG. 21.

[0110] In the following, among the 16 virtual antennas V assumed for a specific transmitting antenna TXa, the virtual antenna V corresponding to a specific receiving antenna RXb (a and b are natural numbers) is expressed as Vc (c=(a-1)×16+b). Note that in Fig. 21, "V" is omitted to avoid complication.

[0111] As shown in Figure 21, there are 24 pairs of virtual antennas V whose virtual positions overlap. Among these, there are 13 unique pairs whose combinations of transmitter circuits 3 and receiver circuits 4 do not overlap with other pairs. For example, the following pairs can be considered as unique pairs: (V2, V85), (V9, V88), (V10, V93), (V12, V97), (V16, V86), (V60, V129), (V64, V133), (V76, V145), (V80, V149), (V95, V97), (V98, V165), (V105, V168), and (V106, V173). The compensation unit 64, described below, performs compensation processing based on received signals acquired by at least six pairs of virtual antennas V from these pairs.

[0112] Note that the set of virtual antennas V assumed for compensation processing may be other than the above-mentioned sets, as long as the combination of the transmitter circuit 3 and the receiver circuit 4 does not overlap with other sets. For example, (VV3, V86) and (V4, V87) overlap with (V2, V85) in terms of the combination of the transmitter circuit 3 and the receiver circuit 4, but do not overlap with other sets. Therefore, assuming (V3, V86) or (V4, V87) as one of the 13 sets is equivalent to assuming (V2, V85).

[0113] Here, since Ns=4 and Nr=4, in the processes of S80 and S90, the control unit 6 further calculates the phase error and amplitude error between the transmitting circuits 3, the phase error and amplitude error between the receiving circuits 4, and the phase error and amplitude error corresponding to the wiring length difference, from the beat signals of at least seven of the belonging pairs.

[0114] In addition, when the number of antennas TX and RX is relatively large as described above, the arrangement of the antennas TX and RX can be determined using a genetic algorithm. For example, characteristics for evaluating the current generation generated by the genetic algorithm include overlap efficiency, rank, wiring efficiency, FOV, and separation angle. Overlap efficiency is a parameter obtained by dividing the full rank number by the number of channels reduced due to overlap of virtual positions, and a large value is desirable. Rank is a predetermined parameter. Wiring efficiency is a parameter corresponding to the dispersion of antenna coordinates input to the same circuit, and a small value is desirable. FOV is a parameter corresponding to the distance between antennas, and a small value is desirable. Separation angle is a parameter corresponding to the aperture length, and a large value is desirable. Fifth Embodiment

[0115] The fifth embodiment is a modification of the first embodiment. In the fifth embodiment, the wirings Wt and Wr of all the transmitting antennas TX and receiving antennas RX may have the same length.

[0116] The acquisition of the relative phase error in the case of equal-length wiring will be described in detail below. In the following description, the phase at the peak of the beat signal corresponding to the virtual antenna Vn is defined as θ Vn (n is a natural number). In the following explanation, for simplicity, only two pairs of (V9, V13) and (V11, V15) are used as pairs of which the combination of the transmitter circuit 3 and the receiver circuit 4 does not overlap with other pairs, as shown in Fig. 23. Furthermore, one pair of (V10, V14) is additionally used as a combination of the transmitter circuit 3 and the receiver circuit 4 where (V9, V13) overlaps with the combination of (V10, V14).

[0117] In this case, the phase difference θ of the peak of the short-range target with respect to (V9, V13) V9fa -θ V13fa is the phase difference θ of the peak of the short-range target in relation to equation (22), (V10, V14) V10fa -θ V14fa is the phase difference θ of the peak of the short-range target in relation to equation (23), (V11, V15) V11fa -θ V15fa can be defined by the relationship shown in Equation (24). The phase difference θ of the peak of the long-distance target with respect to (V9, V13) V9fb -θ V13fb is the phase difference θ of the peak of the long-distance target with respect to equation (25), (V10, V14) V10fb -θ V14fb is the phase difference θ of the peak of the long-distance target with respect to equation (26), (V11, V15) V11fb -θ V15fb can be defined by the relationship shown in Equation (27).

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[0118] In the above formula, Θ a ,Θ b ,Θ c are the target-induced phase errors, and e tx1 is the phase error of the signal generated in the first transmission circuit 3_1, e tx2 is the phase error of the signal generated in the second transmission circuit 3_2. rx1is the phase error of the signal generated in the first receiving circuit 4_1, e rx2 is the phase error of the signal generated in the second receiving circuit 4_2.

[0119] Here, as in the first embodiment, e tx1 ,e rx1 ,β 1k = 0. Therefore, the formulas (22) to (27) can be transformed into the following formulas (28) to (33).

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[0120] When Equations (28) to (33) are converted into a matrix format, the phase difference and relative phase error of each pair satisfy the relationship expressed by Equation (34) below.

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[0121] Here, the term on the left side of Equation (34) is a phase difference vector Y1 between the overlapping virtual antennas V. The first term on the right side of Equation (34) is a coefficient matrix A1, and the second term is a phase error vector X1. In Equation (34), the phase difference vector Y1 can be calculated from the phase of the peak in each beat signal. The coefficient matrix A1 is a constant matrix defined by the combination of the transmitting circuit 3 and the receiving circuit 4 of each pair of virtual antennas V. Therefore, Equation (34) can be expressed as e tx2 ,erx2 , ΔT2 as unknowns. That is, the compensation unit 64 calculates e tx2 ,e rx2 as the relative phase error of the second transmitting circuit 3_2 with respect to the first transmitting circuit 3_1 and the relative phase error of the second receiving circuit 4_2 with respect to the first receiving circuit 4_1. Then, the compensating unit 64 obtains ΔT2 as the solution of Equation (34) as the clock phase error of the second receiving circuit 4_2 with respect to the first receiving circuit 4_1.

[0122] In amplitude compensation processing, similar to phase compensation processing, the compensator 64 defines a linear equation for each unique pair based on the amplitude difference of the peaks of the beat signal, with the amplitude error between the transmitting circuits 3 and the receiving circuits 4 as unknowns. The compensator 64 obtains the solution of this linear equation as the relative amplitude error. The amplitude difference of the peaks in the beat signal is an example of a comparison result of the received signals between the virtual antennas V.

[0123] In the following description, it is assumed that the same set of virtual antennas V as in the phase compensation process described above is also used in the amplitude compensation process. In the following description, the amplitude at the peak of the beat signal corresponding to the virtual antenna Vn is denoted as A Vn (n is a natural number). In this case, the peak amplitude difference A V9 -A V13 is the amplitude difference A of the peaks related to equation (35), (V10, V14) V10 -A V14 is the amplitude difference A of the peaks related to equation (36), (V11, V15) V11 -A V15 can be defined by the relationship shown in Equation (37).

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[0124] In the above formula, G a ,G b ,G c are the amplitude errors due to the target, and G tx1 is the amplitude error of the signal generated in the first transmission circuit 3_1, G tx2 is the amplitude error of the signal generated in the second transmission circuit 3_2. rx1 is the amplitude error of the signal generated in the first receiving circuit 4_1, G rx2 is the amplitude error of the signal generated in the second receiving circuit 4_2.

[0125] Here, similarly to the phase compensation, when the relative amplitude error of the second transmitting circuit 3_2 with respect to the first transmitting circuit 3_1 and the relative amplitude error of the second receiving circuit 4_2 with respect to the first receiving circuit 4_1 are taken into consideration, G tx1 ,G rx1 = 0. Therefore, the formulas (35) to (37) can be transformed into the following formulas (38) to (40).

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[0126] When Equations (38) to (40) are converted into a matrix format, the amplitude difference and relative amplitude error of each pair satisfy the relationship expressed by Equation (41) below.

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[0127] Here, the term on the left side of Equation (41) is the amplitude difference vector Y2 between the overlapping virtual antennas V. The first term on the right side of Equation (41) is the coefficient matrix A2, and the second term is the amplitude error vector X2. The amplitude difference vector Y2 can be calculated from the peak amplitude of each beat signal. The coefficient matrix A1 is a constant matrix defined by the combination of the transmitting circuit 3 and the receiving circuit 4 of each pair of virtual antennas V. That is, the compensating unit 64 calculates G as a solution of Equation (41). tx2 ,G rx2 are obtained as the relative amplitude error of the second transmitting circuit 3_2 with respect to the first transmitting circuit 3_1 and the relative amplitude error of the second receiving circuit 4_2 with respect to the first receiving circuit 4_1.

[0128] According to the fifth embodiment described above, the phase difference between different transmission circuits, the phase difference between different reception circuits, and the phase difference due to a delay in the clock signal can be compensated for based on the comparison results of the reception signals of the virtual antennas in at least Ns+Nr-2 unique sets. Therefore, the compensation accuracy can be improved.

[0129] (Other embodiments) Although multiple embodiments have been described above, the present disclosure should not be construed as being limited to those embodiments, and can be applied to various embodiments and combinations within the scope that does not deviate from the gist of the present disclosure.

[0130] In a modification of the fourth embodiment, both the transmitting antennas TX and the receiving antennas RX may be arranged at unequally spaced intervals.

[0131] In a modified example, the dedicated computer constituting the control unit 6 may be a sensor management ECU that comprehensively controls multiple types of sensors mounted on the vehicle. The dedicated computer constituting the control unit 6 may be an integration ECU that integrates vehicle driving control. The dedicated computer constituting the control unit 6 may be a determination ECU that determines a driving task in vehicle driving control. The dedicated computer constituting the control unit 6 may be a monitoring ECU that monitors vehicle driving control. The dedicated computer constituting the control unit 6 may be an evaluation ECU that evaluates vehicle driving control. The dedicated computer constituting the control unit 6 may be a navigation ECU that navigates the vehicle's driving route. The dedicated computer constituting the control unit 6 may be a locator ECU that estimates the vehicle's own state quantity. The dedicated computer constituting the control unit 6 may be an actuator ECU that controls the vehicle's driving actuators. The dedicated computer constituting the control unit may be an HCU (Human Machine Interface (HMI) Control Unit) that controls information presentation in the vehicle. The dedicated computer constituting the control unit 6 may be a computer outside the vehicle, for example, an external center or mobile terminal that can communicate with the vehicle.

[0132] In a modified example, the mobile body to which the radar device 1 is applied may be, for example, an autonomous robot capable of transporting luggage or collecting information by autonomous or remote traveling. Examples of the autonomous robot include an autonomous vehicle. In addition to the forms described so far, the above-mentioned embodiment and modified example may be implemented in the form of a processing circuit (e.g., a processing ECU, etc.) or a semiconductor device (e.g., a semiconductor chip, etc.) as a control device that is configured to be mountable on a mobile body and has at least one processor 6b and one memory 6a.

[0133] (Disclosure of technical ideas) This specification discloses multiple technical ideas described in the following multiple clauses. Some clauses may be written in a multiple dependent form, with the subsequent clause referring to the preceding clause as an alternative. Furthermore, some clauses may be written in a multiple dependent form, referring to another multiple dependent clause. These multiple dependent clauses define multiple technical ideas.

[0134] (Technical thought 1) a plurality of transmit antennas (TX) and a plurality of receive antennas (RX); Ns transmitting circuits (3) connected to the transmitting antennas and outputting transmission signals; Nr receiving circuits (4) connected to the receiving antennas and configured to acquire received signals; a clock generating unit (2a) that outputs a clock signal to each of the receiving circuits; a control unit (6) for processing the received signal; Equipped with The Ns and the Nr are each an integer of 2 or more, The plurality of transmitting antennas and the plurality of receiving antennas are At least one of them is arranged at uneven intervals, Among a set of virtual antenna pairs in which virtual positions overlap among groups of virtual antennas (V) assumed for each of the transmitting antennas for the plurality of receiving antennas in accordance with the phase difference of the received signals between the receiving antennas and in which combinations of the transmitting circuit and the receiving circuit do not match, at least Ns+Nr-2 unique pairs are included, which are sets of virtual antennas in which combinations of the transmitting circuit and the receiving circuit do not overlap with other pairs; At least one different wiring length pair is included, which is a pair of the virtual antennas whose virtual positions overlap and whose wiring lengths do not match, and the total number of belonging sets, which are sets of the virtual antennas belonging to at least one of the specific set and the different wiring length set, is at least Ns+Nr-1 sets; The control unit A radar device that compensates for a phase difference corresponding to a difference in wiring length between the virtual antennas, a phase difference between the different transmitting circuits, a phase difference between the different receiving circuits, and a phase difference due to a delay in the clock signal, in accordance with a comparison result for each of a plurality of targets at different distances, for detection signals of the same target in the reception signals of the virtual antennas in at least Ns+Nr-1 belonging groups.

[0135] (Technical thought 2) A plurality of equally spaced transmitting antennas (TX) and a plurality of equally spaced receiving antennas (RX); Ns transmitting circuits (3) connected to the transmitting antennas and outputting transmission signals; Nr receiving circuits (4) connected to the receiving antennas and configured to acquire received signals; a clock generating unit (2a) that outputs a clock signal to each of the receiving circuits; a control unit (6) for processing the received signal; Equipped with The Ns and the Nr are each an integer of 2 or more, The plurality of transmitting antennas and the plurality of receiving antennas are Among a set of virtual antenna pairs in which virtual positions overlap among groups of virtual antennas (V) assumed for each of the transmitting antennas for the plurality of receiving antennas in accordance with the phase difference of the received signals between the receiving antennas and in which combinations of the transmitting circuit and the receiving circuit do not match, at least Ns+Nr-2 unique pairs are included, which are sets of virtual antennas in which combinations of the transmitting circuit and the receiving circuit do not overlap with other pairs; At least one different wiring length pair is included, which is a pair of the virtual antennas whose virtual positions overlap and whose wiring lengths do not match, and the total number of belonging sets, which are sets of the virtual antennas belonging to at least one of the specific set and the different wiring length set, is at least Ns+Nr-1 sets; The control unit A radar device that compensates for a phase difference corresponding to a difference in wiring length between the virtual antennas, a phase difference between the different transmitting circuits, a phase difference between the different receiving circuits, and a phase difference due to a delay in the clock signal, in accordance with a comparison result for each of a plurality of targets at different distances, for detection signals of the same target in the reception signals of the virtual antennas in at least Ns+Nr-1 belonging groups.

[0136] (Technical Thought 3) a plurality of transmit antennas (TX) and a plurality of receive antennas (RX); Ns transmitting circuits (3) connected to the transmitting antennas and outputting transmission signals; Nr receiving circuits (4) connected to the receiving antennas and configured to acquire received signals; a clock generating unit (2a) that outputs a clock signal to each of the receiving circuits; a control unit (6) for processing the received signal; Equipped with The Ns and the Nr are each an integer of 2 or more, The plurality of transmitting antennas and the plurality of receiving antennas are At least one of them is arranged at uneven intervals, Among a set of virtual antenna pairs in which virtual positions overlap among groups of virtual antennas (V) assumed for each of the transmitting antennas for the plurality of receiving antennas in accordance with the phase difference of the received signals between the receiving antennas and in which combinations of the transmitting circuit and the receiving circuit do not match, at least Ns+Nr-2 unique pairs are included, which are sets of virtual antennas in which combinations of the transmitting circuit and the receiving circuit do not overlap with other pairs; The control unit A radar device that compensates for a phase difference corresponding to a difference in wiring length between the virtual antennas, a phase difference between the different transmitting circuits, a phase difference between the different receiving circuits, and a phase difference due to a delay in the clock signal, in accordance with a comparison result for each of a plurality of targets at different distances, for detection signals of the same target in the reception signals of the virtual antennas in at least Ns+Nr-2 unique sets.

[0137] (Technical Thought 4) A plurality of equally spaced transmitting antennas (TX) and a plurality of equally spaced receiving antennas (RX); Ns transmitting circuits (3) connected to the transmitting antennas and outputting transmission signals; Nr receiving circuits (4) connected to the receiving antennas and configured to acquire received signals; a clock generating unit (2a) that outputs a clock signal to each of the receiving circuits; a control unit (6) for processing the received signal; Equipped with The Ns and the Nr are each an integer of 2 or more, The plurality of transmitting antennas and the plurality of receiving antennas are Among a set of virtual antenna pairs in which virtual positions overlap among groups of virtual antennas (V) assumed for each of the transmitting antennas for the plurality of receiving antennas in accordance with the phase difference of the received signals between the receiving antennas and in which combinations of the transmitting circuit and the receiving circuit do not match, at least Ns+Nr-2 unique pairs are included, which are sets of virtual antennas in which combinations of the transmitting circuit and the receiving circuit do not overlap with other pairs; The control unit A radar device that compensates for a phase difference corresponding to a difference in wiring length between the virtual antennas, a phase difference between the different transmitting circuits, a phase difference between the different receiving circuits, and a phase difference due to a delay in the clock signal, in accordance with a comparison result for each of a plurality of targets at different distances, for detection signals of the same target in the reception signals of the virtual antennas in at least Ns+Nr-2 unique sets.

[0138] (Technical Thought 5) The radar device according to any one of Technical Ideas 1 to 4, wherein the control unit further utilizes a result of the comparison of the received signals between the virtual antennas in the set of virtual antennas where a combination of the transmitting circuit and the receiving circuit overlaps with another set, to compensate for the phase difference caused by a delay of the clock signal.

[0139] (Technical Thought 6) A radar device described in any one of Technical Ideas 1 to 5, wherein the control unit discontinues compensation of the phase difference by delaying the clock signal when multiple targets at different distances are not detected. [Explanation of symbols]

[0140] 1: radar device, 2a: clock oscillator (clock generation unit), 3: transmission circuit, 4: reception circuit, 6: control unit, 6a: memory, 6b: processor, TX: transmission antenna, RX: reception antenna, V: virtual antenna

Claims

1. a plurality of transmit antennas (TX) and a plurality of receive antennas (RX); Ns transmitting circuits (3) connected to the transmitting antennas and outputting transmission signals; Nr receiving circuits (4) connected to the receiving antennas and configured to acquire received signals; a clock generating unit (2a) that outputs a clock signal to each of the receiving circuits; a control unit (6) for processing the received signals; Equipped with The Ns and the Nr are each an integer of 2 or more, The plurality of transmitting antennas and the plurality of receiving antennas are At least one of them is arranged at uneven intervals, Among a set of pairs of virtual antennas in which virtual positions overlap among groups of virtual antennas (V) assumed for each of the transmitting antennas for the plurality of receiving antennas in accordance with a phase difference of the received signals between the receiving antennas and in which combinations of the transmitting circuit and the receiving circuit do not match, at least Ns+Nr-2 pairs of unique pairs are included, which are sets of virtual antennas in which combinations of the transmitting circuit and the receiving circuit do not overlap with other pairs; at least one different wiring length pair is included, which is a pair of the virtual antennas whose virtual positions overlap and whose wiring lengths do not match, and the total number of belonging sets, which are sets of the virtual antennas belonging to at least one of the specific set and the different wiring length set, is at least Ns+Nr-1 sets; The control unit A radar device that compensates for a phase difference corresponding to a difference in wiring length between the virtual antennas, a phase difference between the different transmitting circuits, a phase difference between the different receiving circuits, and a phase difference due to a delay in the clock signal, in accordance with a comparison result for each of a plurality of targets at different distances, for detection signals of the same target in the reception signals of the virtual antennas in at least Ns+Nr-1 belonging groups.

2. a plurality of equally spaced transmit antennas (TX) and a plurality of equally spaced receive antennas (RX); Ns transmitting circuits (3) connected to the transmitting antennas and outputting transmission signals; Nr receiving circuits (4) connected to the receiving antennas and configured to acquire received signals; a clock generating unit (2a) that outputs a clock signal to each of the receiving circuits; a control unit (6) for processing the received signals; Equipped with The Ns and the Nr are each an integer of 2 or more, The plurality of transmitting antennas and the plurality of receiving antennas are Among a set of pairs of virtual antennas in which virtual positions overlap among groups of virtual antennas (V) assumed for each of the transmitting antennas for the plurality of receiving antennas in accordance with a phase difference of the received signals between the receiving antennas and in which combinations of the transmitting circuit and the receiving circuit do not match, at least Ns+Nr-2 pairs of unique pairs are included, which are sets of virtual antennas in which combinations of the transmitting circuit and the receiving circuit do not overlap with other pairs; at least one different wiring length pair is included, which is a pair of the virtual antennas whose virtual positions overlap and whose wiring lengths do not match, and the total number of belonging sets, which are sets of the virtual antennas belonging to at least one of the specific set and the different wiring length set, is at least Ns+Nr-1 sets; The control unit A radar device that compensates for a phase difference corresponding to a difference in wiring length between the virtual antennas, a phase difference between the different transmitting circuits, a phase difference between the different receiving circuits, and a phase difference due to a delay in the clock signal, in accordance with a comparison result for each of a plurality of targets at different distances, for detection signals of the same target in the reception signals of the virtual antennas in at least Ns+Nr-1 belonging groups.

3. a plurality of transmit antennas (TX) and a plurality of receive antennas (RX); Ns transmitting circuits (3) connected to the transmitting antennas and outputting transmission signals; Nr receiving circuits (4) connected to the receiving antennas and configured to acquire received signals; a clock generating unit (2a) that outputs a clock signal to each of the receiving circuits; a control unit (6) for processing the received signals; Equipped with The Ns and the Nr are each an integer of 2 or more, The plurality of transmitting antennas and the plurality of receiving antennas are At least one of them is arranged at uneven intervals, Among a set of pairs of virtual antennas in which virtual positions overlap among groups of virtual antennas (V) assumed for each of the transmitting antennas for the plurality of receiving antennas in accordance with a phase difference of the received signals between the receiving antennas and in which combinations of the transmitting circuit and the receiving circuit do not match, at least Ns+Nr-2 pairs of unique pairs are included, which are sets of virtual antennas in which combinations of the transmitting circuit and the receiving circuit do not overlap with other pairs; The control unit A radar device that compensates for a phase difference corresponding to a difference in wiring length between the virtual antennas, a phase difference between the different transmitting circuits, a phase difference between the different receiving circuits, and a phase difference due to a delay in the clock signal, in accordance with a comparison result for each of a plurality of targets at different distances, for detection signals of the same target in the reception signals of the virtual antennas in at least Ns+Nr-2 unique sets.

4. a plurality of equally spaced transmit antennas (TX) and a plurality of equally spaced receive antennas (RX); Ns transmitting circuits (3) connected to the transmitting antennas and outputting transmission signals; Nr receiving circuits (4) connected to the receiving antennas and configured to acquire received signals; a clock generating unit (2a) that outputs a clock signal to each of the receiving circuits; a control unit (6) for processing the received signals; Equipped with The Ns and the Nr are each an integer of 2 or more, The plurality of transmitting antennas and the plurality of receiving antennas are Among a set of pairs of virtual antennas in which virtual positions overlap among groups of virtual antennas (V) assumed for each of the transmitting antennas for the plurality of receiving antennas in accordance with a phase difference of the received signals between the receiving antennas and in which combinations of the transmitting circuit and the receiving circuit do not match, at least Ns+Nr-2 pairs of unique pairs are included, which are sets of virtual antennas in which combinations of the transmitting circuit and the receiving circuit do not overlap with other pairs; The control unit A radar device that compensates for a phase difference corresponding to a difference in wiring length between the virtual antennas, a phase difference between the different transmitting circuits, a phase difference between the different receiving circuits, and a phase difference due to a delay in the clock signal, in accordance with a comparison result for each of a plurality of targets at different distances, for detection signals of the same target in the reception signals of the virtual antennas in at least Ns+Nr-2 unique sets.

5. 5. The radar device according to claim 1, wherein the control unit further uses a result of the comparison of the received signals between the virtual antennas in the set of virtual antennas in which a combination of the transmission circuit and the reception circuit overlaps with another set of virtual antennas to compensate for the phase difference caused by a delay of the clock signal.

6. 5. The radar device according to claim 1, wherein the control unit suspends compensation for the phase difference by delaying the clock signal when a plurality of targets at different distances are not detected.

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