Semiconductor device and manufacturing method thereof

Abstract

The aim of the present invention is to provide a structure of a semiconductor device in which the reliability of the device is enhanced without causing electrical loss during the operation of semiconductor elements. A semiconductor device (51) according to the present invention includes a conductive heat dissipation member (4). The heat dissipation member (4) includes a plurality of column portions (4b) and a plate portion (4a) provided between the plurality of column portions (4b). The heat dissipation member (4) is provided spaced apart from a plurality of semiconductor elements (6) so that a sealing resin layer (8) between the heat dissipation member (4) and the plurality of semiconductor elements (6) does not cause insulation breakdown when the plurality of semiconductor elements (6) are supplied with current. Further, the heat dissipation member (4) is electrically insulated from the plurality of semiconductor elements (6).

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device having a structure in which heat generated by a semiconductor element is dissipated via a base plate. [Background technology]

[0002] 2. Description of the Related Art A semiconductor device disclosed in Patent Document 1 is an example of a semiconductor device having a structure for dissipating heat generated in a semiconductor element.

[0003] The conventional semiconductor device disclosed in Patent Document 1 is provided with a heat dissipation mechanism that relieves thermal stress acting on the joint between the semiconductor element and the connecting wiring due to the difference in thermal expansion coefficients between the components. Specifically, the conventional semiconductor device realizes the heat dissipation mechanism by inserting a thermal stress buffer member between the semiconductor element and the connecting wiring and bonding the thermal stress buffer member to both the semiconductor element and the connecting wiring. The thermal stress buffer member used in the heat dissipation mechanism is composed of a composite material in which a sintered body of a carbon or metal base material is infiltrated and dispersed with a metal having a lower melting point than the above-mentioned base material. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2008-42041 Summary of the Invention [Problem to be solved by the invention]

[0005] Conventional semiconductor devices with heat dissipation mechanisms generally employ a single-sided cooling method in which a semiconductor element is bonded to an insulating substrate via the insulating substrate, thereby cooling the semiconductor element from the insulating substrate side. In conventional semiconductor devices, the top surface of the semiconductor element is sealed with an encapsulating resin layer, and heat generated by the semiconductor element during power-on operation accumulates within the encapsulating resin layer. Because the encapsulating resin layer is located on the opposite side of the insulating substrate relative to the semiconductor element, conventional heat dissipation mechanisms employing the single-sided cooling method described above have difficulty dissipating the heat accumulated within the encapsulating resin layer.

[0006] Generally, the thermal expansion coefficient of components (hereinafter sometimes abbreviated as "components") used in semiconductor devices is, for example, {2×10 -6 / K~22×10 -6 / K}. Therefore, the maximum difference in the linear expansion coefficient between components in a conventional semiconductor device is 20×10 -6 May also have / K.

[0007] Generally, the difference in thermal expansion coefficient between parts is 9 x 10 -6 / K or less is desirable, the maximum difference in the thermal expansion coefficient in conventional semiconductor devices is not negligible. In particular, the connecting wiring and base plate tend to be components that increase the difference in the thermal expansion coefficient.

[0008] Under these circumstances, the sealing resin layer is in contact with all the components, and is particularly affected by the difference in thermal expansion coefficients. The components included in the semiconductor device include the semiconductor element, connecting wires, insulating substrate, base plate, etc.

[0009] Assuming that the junction temperature Tj of the semiconductor element during power-on operation rises to, for example, 125°C, conventional semiconductor devices have a cooling mechanism for a single-sided cooling system, so the temperature of each component remains close to the design temperature of the cooling mechanism. However, when the temperature of the encapsulating resin layer provided on the top surface of the semiconductor element rises to 125°C, the heat propagates throughout the encapsulating resin layer, causing peeling between the components due to differences in the thermal expansion coefficients of the components, resulting in a problem of reduced reliability of the semiconductor device.

[0010] The conventional semiconductor device disclosed in Patent Document 1 has a structure in which a thermal stress buffer member is inserted between a semiconductor element and connection wiring. Therefore, by cooling the heat generated when the semiconductor element is energized through the thermal stress buffer member, the thermal stress generated at the interface between the semiconductor element and the encapsulating resin layer is alleviated, preventing peeling between the semiconductor element and the encapsulating resin layer and improving the reliability of the device.

[0011] However, because the thermal stress buffer is electrically connected to the semiconductor element that constitutes the main current circuit and functions as part of the wiring of the semiconductor element, there is a problem in that electrical loss occurs when the semiconductor element is energized. One example of electrical loss is an increase in inductance.

[0012] The present disclosure aims to solve the above-mentioned problems and provide a semiconductor device structure that improves the reliability of the device without causing electrical loss during operation of the semiconductor element. [Means for solving the problem]

[0013] The semiconductor device according to the present disclosure comprises a base plate having a first main surface and a second main surface, an insulating circuit board having a circuit pattern and provided on the first main surface side of the base plate, at least one semiconductor element provided on the first main surface side of the insulating circuit board, a heat dissipation member that is conductive and includes a plurality of pillars and a plate portion provided between the plurality of pillars, the plate portion being located on the first main surface side of the insulating circuit board and the at least one semiconductor element, and the plurality of pillars being provided upright on the first main surface of the base plate, and a resin layer that covers the insulating circuit board, the at least one semiconductor element, and the heat dissipation member, and is provided on the first main surface of the base plate, the heat dissipation member being provided at a distance from the at least one semiconductor element so that dielectric breakdown does not occur in the resin layer between the heat dissipation member and the at least one semiconductor element when the at least one semiconductor element is in operation, and the heat dissipation member is electrically insulated from the at least one semiconductor element. [Effects of the Invention]

[0014] The heat dissipation member in the semiconductor device of the present disclosure is electrically insulated from at least one semiconductor element, and therefore the presence of the heat dissipation member does not cause electrical loss during operation of the at least one semiconductor element.

[0015] In addition, the heat dissipation member is positioned away from the at least one semiconductor element so that the resin layer does not experience dielectric breakdown when the at least one semiconductor element is in operation, and therefore dielectric breakdown does not occur in the resin layer when the at least one semiconductor element is in operation.

[0016] Furthermore, since the heat dissipation member is conductive and the column portion is arranged in an upright position on the first main surface of the base plate, it can perform a heat dissipation function of dissipating heat accumulated in the resin layer during operation of at least one semiconductor element through a heat dissipation path including the heat dissipation member and the base plate.

[0017] Therefore, the semiconductor device of the present disclosure can mitigate the effects of the difference in thermal expansion coefficient between the resin layer and other components, and can reliably avoid interfacial peeling between the resin layer and at least one semiconductor element, insulating circuit board, and base plate.

[0018] As a result, the semiconductor device of the present disclosure can improve the reliability of the device without generating electrical loss during operation of at least one semiconductor element.

[0019] The objects, features, aspects, and advantages of the present disclosure will become more apparent from the following detailed description and the accompanying drawings. [Brief explanation of the drawings]

[0020] [Figure 1] 1 is a plan view showing the top surface structure of a semiconductor device according to a first embodiment. [Figure 2] 2 is a cross-sectional view (part 1) showing the cross-sectional structure of the semiconductor device according to the first embodiment shown in FIG. [Figure 3] 2 is a cross-sectional view (part 2) showing the cross-sectional structure of the semiconductor device according to the first embodiment shown in FIG. [Figure 4] FIG. 10 is a plan view showing the top surface structure of a semiconductor device according to a second embodiment. [Figure 5] FIG. 10 is a cross-sectional view showing the cross-sectional structure of a semiconductor device according to a third embodiment. [Figure 6] FIG. 10 is a plan view showing the top surface structure of a semiconductor device according to a fourth embodiment. [Figure 7] 7 is a cross-sectional view (part 1) showing the cross-sectional structure of the semiconductor device according to the fourth embodiment shown in FIG. 6. [Figure 8] 7 is a cross-sectional view (part 2) showing the cross-sectional structure of the semiconductor device according to the fourth embodiment shown in FIG. 6. [Figure 9] FIG. 10 is a cross-sectional view showing the cross-sectional structure of a semiconductor device according to a fifth embodiment. [Figure 10] FIG. 13 is a cross-sectional view showing the cross-sectional structure of a semiconductor device according to a sixth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0021] <First Embodiment> FIG. 1 is a plan view showing the top surface structure of a semiconductor device 51 according to a first embodiment of the present disclosure. FIG. 2 is a cross-sectional view showing the AA cross-sectional structure of the semiconductor device 51 according to the first embodiment shown in FIG. 1. FIG. 3 is a cross-sectional view showing the BB cross-sectional structure of the semiconductor device 51 according to the first embodiment shown in FIG. 1 to 3 each depict an XYZ orthogonal coordinate system. Note that FIG. 1 omits the illustration of the sealing resin layer 8 in order to clearly show the internal structure of the semiconductor device 51.

[0022] 2 and 3, the upper end of the paper surface will be referred to as the "first main surface" and the lower end of the paper surface will be referred to as the "second main surface." That is, for each component of semiconductor device 51, the surface on the +Z direction side will be the "first main surface," and the surface on the -Z direction side will be the "second main surface."

[0023] For example, the upper surface of the metal base plate 1, which is the base plate, is the first main surface, and the lower surface is the second main surface. Furthermore, when describing the structure of the semiconductor device 51, the +Z direction may be referred to as the first main surface side and the -Z direction may be referred to as the second main surface side with respect to each component.

[0024] 1 to 3, a resin case 2 is provided on a first main surface of a metal base plate 1. The metal base plate 1 is made of a material with excellent thermal conductivity, such as an aluminum alloy or copper.

[0025] The resin case 2 has a rectangular frame structure with four side walls when viewed in plan in the XY plane, and is provided on the peripheral region of the first main surface of the metal base plate 1. A plurality of external electrodes 11 are provided on the upper surfaces of the side walls of the resin case 2. In FIG. 2, two external electrodes 11 are shown as the plurality of external electrodes 11. The resin case 2 is made of a highly heat-resistant resin such as PPS (Poly Phenylene Sulfide) or PBT (Poly Butylen Terefthalate).

[0026] The combination of the metal base plate 1 and the resin case 2 forms an open-top housing with an internal storage area, with the metal base plate 1 as the bottom and the resin case 2 as the side.

[0027] A plurality of intermediate connection members 21 are provided in the resin case 2 from the inner surface of the side wall to the inside in correspondence with the plurality of external electrodes 11. In FIG. 2, two intermediate connection members 21 are illustrated as the plurality of intermediate connection members 21. Corresponding external electrodes 11 and intermediate connection members 21 are electrically connected via embedded connecting wires 22. The embedded connecting wires 22 are embedded within the side wall of the resin case 2. In this way, there is a one-to-one correspondence between the plurality of external electrodes 11, the plurality of intermediate connection members 21, and the plurality of embedded connecting wires 22.

[0028] An insulating circuit board 3 is provided on a first main surface of the metal base plate 1. The insulating circuit board 3 is provided in a manner that it fits within the housing area formed by the combination of the metal base plate 1 and the resin case 2.

[0029] The insulating circuit board 3 is a substrate having a combined structure of an insulating layer 30 and circuit patterns 5 provided on both sides of the insulating layer 30. The insulating layer 30 is made of a ceramic having excellent thermal conductivity, such as aluminum nitride or silicon nitride, or a resin.

[0030] Circuit patterns 5 are provided on both sides of the insulating layer 30. The circuit patterns 5 are made of aluminum alloy, copper, or the like. Note that the circuit patterns 5 provided on the second main surface of the insulating layer 30 are not shown in Figures 2 and 3 and the cross-sectional views shown below.

[0031] Furthermore, a plurality of semiconductor elements 6 are provided on the first main surface of the circuit pattern 5 via a conductive bonding material 10. In Figs. 1 to 3, two semiconductor elements 6 are shown as the plurality of semiconductor elements. The conductive bonding material 10 is made of solder, soft solder, or the like. Therefore, the circuit pattern 5 of the insulating circuit board 3 and the plurality of semiconductor elements 6 are bonded via the conductive bonding material 10.

[0032] The plurality of semiconductor elements 6 are electrically connected to the intermediate connection member 21 via the electrical connection member 7. Therefore, signals that flow when the plurality of semiconductor elements 6 are energized can be obtained from the plurality of external electrodes 11.

[0033] Note that silicon (Si) IGBTs (Insulated Gate Bipolar Transistors), diodes, and reverse conducting IGBTs are often used as each of the multiple semiconductor elements 6. Furthermore, each of the multiple semiconductor elements 6 may also be a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) or a Schottky diode made of a material with a larger band gap than Si, such as a gallium nitride (GaN)-based material.

[0034] Furthermore, the number of semiconductor elements 6 mounted on the first main surface side of the insulating circuit board 3 is not limited, and the required number of semiconductor elements 6 may be mounted depending on the application. That is, the semiconductor device 51 of the first embodiment is required to have at least one semiconductor element 6.

[0035] Hereinafter, a structure including the insulating circuit board 3, the plurality of semiconductor elements 6, and the plurality of conductive bonding materials 10 may be referred to as an "intermediate structure."

[0036] In addition, in the semiconductor device 51 of the first embodiment, the electrical connection member 7 is shown schematically. That is, the electrical connection member 7 includes a linear connection member such as a wire bonded and fixed by ultrasonic wire bonding processing, and a plate-shaped connection member whose main portion is formed in a plate shape. In Figures 1 to 3, the electrical connection member 7 is shown as a linear connection member.

[0037] In this configuration, a main current circuit is formed including the plurality of semiconductor elements 6, the electrical connection members 7, and the circuit pattern 5 portion of the insulating circuit board 3. The main current circuit is a circuit through which a main current flows when the plurality of semiconductor elements 6 are energized.

[0038] The semiconductor device 51 of the first embodiment is characterized by further including a heat dissipation member 4. The heat dissipation member 4 is conductive, includes a plurality of pillar portions 4b and one plate portion 4a provided between the plurality of pillar portions 4b, and has a flat gate shape in the XZ cross section as shown in Fig. 3. In Fig. 3, two pillar portions 4b are illustrated as the plurality of pillar portions 4b. The plate portion 4a of the heat dissipation member 4 has a rectangular shape when viewed in plan on the XY plane as shown in Fig. 1.

[0039] 3, the second main surface of the plate portion 4a and the first main surface of each component constituting the intermediate structure are disposed so as to face each other. Specifically, the plate portion 4a of the heat dissipation member 4 is disposed at a position spaced a distance in the +Z direction from the first main surfaces of the insulating circuit board 3 and the plurality of semiconductor elements 6, as shown in FIGS. 2 and 3. In other words, the plate portion 4a of the heat dissipation member 4 is located on the first main surface side of the insulating circuit board 3 and the plurality of semiconductor elements 6.

[0040] 3, the plurality of pillars 4b are provided in a manner that they stand on the first main surface of the metal base plate 1 without contacting the intermediate structure. That is, the lower ends of some or all of the plurality of pillars 4b are in contact with the first main surface of the metal base plate 1. In this way, the heat dissipation member 4 is provided on the first main surface of the metal base plate 1 in a manner that straddles the intermediate structure.

[0041] Then, a sealing resin layer 8, which is a resin layer, is provided so as to close the housing area of ​​the resin case 2. That is, the housing area is sealed by filling with the sealing resin layer 8. In this manner, the sealing resin layer 8, which is a resin layer, is provided on the first main surface of the metal base plate 1, covering the insulating circuit board 3, the circuit pattern 5, the plurality of semiconductor elements 6, the plurality of electrical connection members 7, and the heat dissipation member 4.

[0042] The sealing resin layer 8 is often made of silicone gel or epoxy resin, but is not limited to these. Any material having the desired physical properties such as elastic modulus, heat resistance, adhesiveness, and linear expansion coefficient can be used as the material.

[0043] Therefore, the sealing resin layer 8 is present between the second main surface of the plate portion 4a of the heat dissipation member 4 and the intermediate structure. That is, the sealing resin layer 8 is present between the second main surface of the plate portion 4a and the first main surface of each of the plurality of semiconductor elements 6.

[0044] Furthermore, a cooling mechanism 9 is attached to the second main surface side of the metal base plate 1, which is a base plate. The cooling mechanism 9 employs a water-cooling method or an air-cooling method and performs a cooling operation to cool the metal base plate 1. Therefore, the heat dissipation member 4 is cooled by the cooling operation of the cooling mechanism 9 via the metal base plate 1.

[0045] The heat dissipation member 4 is provided away from the semiconductor elements 6 so that the sealing resin layer 8 between the heat dissipation member 4 and the semiconductor elements 6 does not break down when the semiconductor elements 6 are energized. In addition, the heat dissipation member 4 is electrically insulated from the semiconductor elements 6, and the potential of the heat dissipation member 4 is set to 0 V. The potential of the heat dissipation member 4 is set, for example, by setting the metal base plate 1 to a reference potential of 0 V.

[0046] The arrangement of the heat dissipation member 4 will be described in detail below. For example, if the encapsulating resin layer 8 is made of an encapsulating resin with a breakdown voltage of 20 kV / mm and the operating voltage of the semiconductor elements 6 is 600 V, the heat dissipation member 4 is provided at an insulating distance of more than 30 μm between the semiconductor elements 6 and the heat dissipation member 4 when the semiconductor elements 6 are in an electrically conducting state. "30 μm" is the value obtained by dividing the operating voltage of 600 V by the breakdown voltage of 20 kV / mm. In other words, the "insulation distance" can be calculated from two factors (the breakdown voltage of the encapsulating resin layer 8 and the voltage when the semiconductor elements 6 are in an electrically conducting state).

[0047] Specifically, the distance between the second main surface of the plate portion 4a of the heat dissipation member 4 facing each other in the Z direction and the first main surface of each of the plurality of semiconductor elements 6 is set to satisfy the insulation distance. In addition, the shortest distance between each of the plurality of column portions 4b and the side surface of each of the plurality of semiconductor elements 6 is set to satisfy the insulation distance.

[0048] Furthermore, it is desirable that the shortest distance between each of the multiple column portions 4b and the side surface of each of the multiple circuit patterns 5 is set so as to satisfy the above-mentioned insulation distance, and that the shortest distance between each of the multiple electrical connection members 7 and the heat dissipation member 4 is set so as to satisfy the above-mentioned insulation distance.

[0049] Furthermore, the plate portion 4a and the plurality of pillar portions 4b are positioned so as not to come into contact with any of the plurality of semiconductor elements 6, and by providing a sealing resin layer 8 between the heat dissipation member 4 and the plurality of semiconductor elements 6, the heat dissipation member 4 is electrically insulated from the plurality of semiconductor elements 6.

[0050] As such, the heat dissipation member 4 in the semiconductor device 51 of embodiment 1 is electrically insulated from the multiple semiconductor elements 6, and therefore the presence of the heat dissipation member 4 does not cause electrical loss when the multiple semiconductor elements 6 are operating.

[0051] In addition, the heat dissipation member 4 is positioned an insulating distance away from the multiple semiconductor elements 6 so that the sealing resin layer 8, which is a resin layer, does not experience dielectric breakdown when the multiple semiconductor elements 6 are energized. Therefore, dielectric breakdown does not occur in the sealing resin layer 8 when the multiple semiconductor elements 6 are energized.

[0052] On the other hand, the heat dissipation member 4 is cooled via the metal base plate 1 by the cooling action of the cooling mechanism 9. Therefore, the heat dissipation member 4 can exert a heat dissipation function of dissipating heat accumulated in the sealing resin layer 8 when the semiconductor elements 6 are energized, via a heat dissipation path including the heat dissipation member 4 and the metal base plate 1.

[0053] In other words, since the second main surface of the plate portion 4a of the heat dissipation member 4 is in contact with the sealing resin layer 8, the heat accumulated in the sealing resin layer 8 can be effectively dissipated by the above-mentioned heat dissipation function of the heat dissipation member 4.

[0054] In this way, in the semiconductor device 51 of embodiment 1, the heat dissipation function of the heat dissipation member 4 mitigates the effects of differences in thermal expansion coefficients between the sealing resin layer 8 and each of the components, thereby reliably preventing interfacial peeling between the sealing resin layer 8 and each of the multiple semiconductor elements 6, the insulating circuit board 3, and the metal base plate 1.

[0055] As a result, the semiconductor device 51 of the first embodiment does not generate electrical loss when the plurality of semiconductor elements 6 are energized, and the reliability of the device can be improved.

[0056] Furthermore, in the semiconductor device 51 of the first embodiment, since no restrictions are imposed on the arrangement of the plurality of electrical connection members 7, the degree of freedom in arranging the plurality of electrical connection members 7 is relatively high.

[0057] In addition, the semiconductor device 51 of embodiment 1 can perform a double-sided cooling operation on the sealing resin layer 8 by simultaneously performing a first cooling operation in which the first main surface side of the sealing resin layer 8 is cooled by the heat dissipation path of the heat dissipation member 4, the metal base plate 1, and the cooling mechanism 9, and a second cooling operation in which the second main surface side of the sealing resin layer 8 is cooled by the heat dissipation path of the insulating circuit board 3, the metal base plate 1, and the cooling mechanism 9.

[0058] In this way, by performing the double-sided cooling operation including the first and second cooling operations described above, the semiconductor device 51 of embodiment 1 can effectively dissipate the heat accumulated in the sealing resin layer 8 and mitigate the effects of the difference in thermal expansion coefficient between the sealing resin layer 8 and each component part.

[0059] Furthermore, the semiconductor device 51 of the first embodiment performs the cooling operation of the double-sided cooling method described above using one cooling mechanism 9, thereby simplifying the device configuration.

[0060] Although the semiconductor device 51 of the first embodiment has been shown to have a structure including a plurality of semiconductor elements 6, the same effect can be achieved with a structure including one semiconductor element 6. That is, the semiconductor device 51 of the first embodiment can be applied to a structure including at least one semiconductor element 6.

[0061] <Embodiment 2> Fig. 4 is a plan view showing the top surface structure of a semiconductor device 52 according to a second embodiment of the present disclosure. An XYZ Cartesian coordinate system is depicted in Fig. 4. Note that Fig. 4 does not show the sealing resin layer 8 in order to clearly show the internal structure of the semiconductor device 52. In other words, Fig. 4 shows the state before resin sealing with the sealing resin layer 8 is performed.

[0062] Hereinafter, components similar to those of the semiconductor device 51 shown in FIGS. 1 to 3 are denoted by the same reference numerals and explanations thereof are omitted where appropriate, and the description will be centered on the characteristic parts of the semiconductor device 52 of the second embodiment.

[0063] The semiconductor device 52 of the second embodiment has a structure in which the heat dissipation member 4 is replaced with a heat dissipation member .

[0064] The heat dissipation member 42 is electrically conductive and includes a plurality of pillar portions 42b (not shown) and a plate portion 42a provided between the plurality of pillar portions 42b. The plate portion 42a of the heat dissipation member 42 has a rectangular shape in plan view as shown in FIG. 4 and is disposed so as to overlap with most of the plurality of semiconductor elements 6 in plan view. Specifically, except for bonding regions with the plurality of electrical connection members 7 on the first main surfaces of the plurality of semiconductor elements 6, the plate portion 42a of the heat dissipation member 42 overlaps with the first main surfaces of the plurality of semiconductor elements 6 in plan view.

[0065] Similar to the heat dissipation member 4 of the first embodiment, the heat dissipation member 42 is disposed so that the second main surface of the plate portion 42a faces the first main surface of the intermediate structure. Therefore, the plate portion 42a of the heat dissipation member 42 is disposed at a position spaced a distance in the +Z direction from the first main surfaces of the insulating circuit board 3 and the plurality of semiconductor elements 6. In other words, the plate portion 42a of the heat dissipation member 42 is located on the first main surface side of the insulating circuit board 3 and the plurality of semiconductor elements 6.

[0066] Similarly to the plurality of column sections 4b in the first embodiment, the plurality of column sections 42b are provided in a manner that they stand on the first main surface of the metal base plate 1. That is, similar to the heat dissipation member 4 in the first embodiment, the heat dissipation member 42 is provided on the first main surface of the metal base plate 1 in a manner that it straddles the intermediate structure.

[0067] Similarly to the heat dissipation member 4 of the first embodiment, the heat dissipation member 42 is provided at a distance from the semiconductor elements 6 so that the sealing resin layer 8 between the heat dissipation member 42 and the semiconductor elements 6 does not cause dielectric breakdown when the semiconductor elements 6 are energized. Furthermore, similar to the heat dissipation member 4 of the first embodiment, the heat dissipation member 42 is electrically insulated from the semiconductor elements 6.

[0068] In this configuration, heat generated when the semiconductor elements 6 are energized is propagated to the entire semiconductor device 52 via the sealing resin layer 8 .

[0069] In the semiconductor device 52 of the second embodiment, most of the first main surface of each of the plurality of semiconductor elements 6 faces the second main surface of the plate portion 42a. Therefore, by the first cooling operation of cooling along a heat dissipation path including the heat dissipation member 42, the metal base plate 1, and the cooling mechanism 9, heat generated from the plurality of semiconductor elements 6 and propagated to the sealing resin layer 8 can be dissipated, and the temperature rise in the region of the sealing resin layer 8 close to the plurality of semiconductor elements 6 can be minimized.

[0070] Therefore, similar to the semiconductor device 51 of the first embodiment, the semiconductor device 52 of the second embodiment can improve the reliability of the device without causing electrical loss when the plurality of semiconductor elements 6 are in operation.

[0071] Additionally, similar to the first embodiment, the semiconductor device 52 of the second embodiment performs the cooling operation of the double-sided cooling method described above using a single cooling mechanism 9, thereby simplifying the device configuration.

[0072] Furthermore, the semiconductor elements 6 generate heat when energized, which makes it easier for warpage to occur in the warpage-occurring regions of the metal base plate 1 that overlap with the semiconductor elements 6 in plan view.

[0073] On the other hand, the second main surface of the plate portion 42a of the heat dissipation member 42 is provided over a relatively large area, overlapping most of the first main surfaces of each of the multiple semiconductor elements 6 in a planar view, and multiple column portions 42b are provided on the first main surface of the metal base plate 1, so that warpage fluctuations in the above-mentioned warpage occurrence region of the metal base plate 1 can be suppressed mainly by the action of the column portions 42b.

[0074] As a result, the semiconductor device 52 of embodiment 2 can further improve the reliability of the device by suppressing warping of the metal base plate 1, which is a cause of warping of the entire device, and preventing interfacial peeling between the sealing resin layer 8 and the metal base plate 1 due to fluctuations in warping of the metal base plate 1.

[0075] In order to effectively suppress warpage fluctuations in the warpage occurrence region of the metal base plate 1, it is desirable that the second main surface of the plate portion 42a of the heat dissipation member 42 overlaps, in plan view, an area that is at least half the total area of ​​the first main surfaces of the plurality of semiconductor elements 6. By providing the plate portion 42a with the above structure, the area and volume of the plate portion 42a are expanded, which is expected to enhance the effect of suppressing warpage fluctuations of the metal base plate 1.

[0076] As in the first embodiment, the semiconductor device 52 of the second embodiment can also be applied to a structure having at least one semiconductor element 6.

[0077] <Third Embodiment> Fig. 5 is a cross-sectional view showing a cross-sectional structure of a semiconductor device 53 according to a third embodiment of the present disclosure. An XYZ Cartesian coordinate system is depicted in Fig. 5. Fig. 5 corresponds to the AA cross section of the semiconductor device 51 shown in Fig. 1.

[0078] Hereinafter, components similar to those of the semiconductor device 51 shown in FIGS. 1 to 3 are designated by the same reference numerals, and descriptions thereof will be omitted where appropriate, and the description will focus on the characteristic features of the semiconductor device 53 of the third embodiment.

[0079] The semiconductor device 53 of the third embodiment has a structure in which the heat dissipation member 4 is replaced with a heat dissipation member 43 .

[0080] The heat dissipation member 43 is electrically conductive and includes a plurality of pillar portions 43b (not shown) and plate portions 43a provided between the plurality of pillar portions 43b. The shape of the heat dissipation member 43 is substantially the same as that of the heat dissipation member 4 of the first embodiment, with the plurality of pillar portions 43b corresponding to the plurality of pillar portions 4b and the plate portion 43a corresponding to the plate portion 4a.

[0081] Therefore, similar to the heat dissipation member 4 of the first embodiment, the heat dissipation member 43 is provided away from the semiconductor elements 6 so as to prevent dielectric breakdown of the sealing resin layer 8 between the heat dissipation member 43 and the semiconductor elements 6 when current is applied to the semiconductor elements 6. Furthermore, similar to the heat dissipation member 4 of the first embodiment, the heat dissipation member 43 is electrically insulated from the semiconductor elements 6.

[0082] As described above, the semiconductor device 53 uses a variety of components such as a plurality of semiconductor elements 6, a plurality of electrical connection members 7, an insulating circuit board 3, and a metal base plate 1, each of which has a different thermal expansion coefficient.

[0083] The plurality of electrical connection members 7 are made of a first material having electrical conductivity, and are electrically connected to the plurality of semiconductor elements 6.

[0084] In the third embodiment, the constituent material of the heat dissipation member 43 is matched to the material used in the semiconductor device 53, thereby reducing the mismatch in the thermal expansion coefficient within the semiconductor device 53.

[0085] For example, if the first material constituting the electrical connection member 7 is aluminum or copper, the first material of aluminum or copper is also used as the constituent material of the heat dissipation member 43. By using a material with good thermal conductivity such as aluminum or copper as the constituent material of the heat dissipation member 43, the sealing resin layer 8 can be cooled efficiently.

[0086] As described above, semiconductor device 53 of the third embodiment is characterized in that electrical connection member 7 is made of a first material having conductivity, and heat dissipation member 43 is made of the same first material as electrical connection member 7. Examples of the first material include aluminum, copper, etc., as described above.

[0087] Similar to the heat dissipation member 4 of the first embodiment, the heat dissipation member 43 is provided at a distance from the semiconductor elements 6 so as to prevent dielectric breakdown of the sealing resin layer 8 between the heat dissipation member 43 and the semiconductor elements 6 when current is applied to the semiconductor elements 6. Furthermore, similar to the heat dissipation member 4 of the first embodiment, the heat dissipation member 43 is electrically insulated from the semiconductor elements 6.

[0088] Therefore, similar to the first embodiment, the semiconductor device 53 of the third embodiment can improve the reliability of the device without causing electrical loss when the plurality of semiconductor elements 6 are in operation.

[0089] Additionally, similar to the first embodiment, the semiconductor device 53 of the third embodiment performs the cooling operation of the double-sided cooling method described above using a single cooling mechanism 9, thereby simplifying the device configuration.

[0090] Furthermore, in the semiconductor device 53 of embodiment 3, the constituent material of the electrical connection member 7, which is an electrical connection member, and the constituent material of the heat dissipation member 43 are both the same first material, so that each of the multiple electrical connection members 7 and the heat dissipation member 43 have the same thermal expansion coefficient.

[0091] As a result, the semiconductor device 53 of the third embodiment can make the difference in thermal expansion coefficient between the plurality of electrical connection members 7 and the heat dissipation member 43 in the sealing resin layer 8 "0." Therefore, the semiconductor device 53 of the third embodiment can improve the heat dissipation effect of the heat dissipation member 43 and efficiently cool the sealing resin layer 8 without causing an influence due to the difference in thermal expansion coefficient in the sealing resin layer 8 between the plurality of electrical connection members 7 and the heat dissipation member 43.

[0092] The semiconductor device 53 of the third embodiment can also be applied to a structure having at least one semiconductor element 6, similar to the first and second embodiments.

[0093] <Fourth Embodiment> Fig. 6 is a plan view showing the top surface structure of a semiconductor device 54 according to a fourth embodiment of the present disclosure. Fig. 7 is a cross-sectional view showing the CC cross-sectional structure of the semiconductor device 54 according to the fourth embodiment shown in Fig. 6. Fig. 8 is a cross-sectional view showing the DD cross-sectional structure of the semiconductor device 54 according to the fourth embodiment shown in Fig. 6. An XYZ orthogonal coordinate system is depicted in each of Figs. 6 to 8. Note that Fig. 6 omits the illustration of the heat dissipation member 4 and the sealing resin layer 8 in order to clearly show the internal structure of the semiconductor device 54.

[0094] Hereinafter, components similar to those in the semiconductor device 51 shown in FIGS. 1 to 3 are designated by the same reference numerals, and descriptions thereof will be omitted where appropriate, and the description will focus on the characteristic features of the semiconductor device 54 of the fourth embodiment.

[0095] The semiconductor device 54 of the fourth embodiment is newly provided with a metal lead wiring member 12 and a conductive bonding material 14, and has a structure in which the heat dissipation member 4 is replaced with a heat dissipation member 44.

[0096] The heat dissipation member 44 is electrically conductive and includes a plurality of pillar portions 44b (not shown) and plate portions 44a provided between the plurality of pillar portions 44b. The plate portions 44a of the heat dissipation member 44 have a rectangular shape in a plan view, and have a relatively wide heat dissipation member forming region R44, as shown in FIG.

[0097] 7 and 8, the semiconductor device 54 of the fourth embodiment further includes a metal lead wiring member 12 and a plurality of conductive bonding materials 14 between the intermediate structure and the heat dissipation member 44. The semiconductor device 54 of the fourth embodiment includes, as the electrical connection member 7, a plurality of wires 13 serving as linear connection members and a metal lead wiring member 12 serving as a plate-like connection member.

[0098] The plurality of conductive bonding materials 14 correspond to the plurality of semiconductor elements 6, and the second main surface of the metal lead wiring member 12 is electrically connected to the plurality of semiconductor elements 6 via the plurality of conductive bonding materials 14. That is, the metal lead wiring member 12 is bonded to the plurality of semiconductor elements 6 by the plurality of conductive bonding materials 14. In this way, there is a one-to-one correspondence between the plurality of semiconductor elements 6 and the plurality of conductive bonding materials 14. The conductive bonding materials 14 are made of solder, soft solder, or the like.

[0099] The metal lead wiring member 12, which is a plate-shaped connecting member, has a plate portion 12a that is rectangular in plan view, and a connecting portion 12b that extends in the -Y direction from a part of the -Y direction side of the plate portion 12a in plan view on the XY plane, as shown in Fig. 6. The plate portion 12a is the main portion of the metal lead wiring member 12. In this way, the metal lead wiring member 12 is a plate-shaped connecting member whose main portion is configured in a plate shape.

[0100] 8, connecting portion 12b extends in the −Z direction, and the lower end of connecting portion 12b is provided on the first main surface of circuit pattern 5 of insulating circuit board 3. Therefore, metal lead wiring member 12 is electrically connected to circuit pattern 5 via connecting portion 12b. Furthermore, the first main surface of plate portion 12a and intermediate connecting member 21 are electrically connected via wire 13, and the first main surface of semiconductor element 6 and intermediate connecting member 21 are connected via wire 13.

[0101] In this way, the metal lead wiring member 12 constitutes a main current circuit together with the plurality of wires 13, the plurality of semiconductor elements 6, and the circuit pattern 5 of the insulating circuit board 3. In particular, the region of the plate portion 12a through which current flows between the plurality of semiconductor elements 6 via the plurality of conductive bonding materials 14 becomes the main wiring region R12, and it is expected that a relatively large current will flow in the main wiring region R12.

[0102] 6 to 8, the wire bonding region is an area on the first main surface of the metal lead wiring member 12 that overlaps or is close to any of the plurality of conductive bonding materials 14 in plan view. Electrical connection is made to the intermediate connection member 21 via the wire 13 at at least one point in the wire bonding region.

[0103] 7, the intermediate connection member 21 is electrically connected to the external electrode 11 via the embedded connection wire 22. Therefore, the wire bonding region of the metal lead wiring member 12 is electrically connected to the external electrode 11 via the wire 13, the intermediate connection member 21, and the embedded connection wire 22.

[0104] In Figure 7, the external electrode 11, the intermediate connection member 21, and the embedded connection wire 22 are shown as independent parts, but a metal plate that serves as the external electrode 11, the intermediate connection member 21, and the embedded connection wire 22 may also be insert-molded into the resin case 2.

[0105] The electrical connection between the metal lead wiring member 12 and the external electrode 11 is not limited to the modes shown in Figures 6 to 8. For example, the following first to third connection modes are possible.

[0106] The first connection mode is a mode in which the wire bonding region of the metal lead wiring member 12 and the external electrode 11 are directly connected by a wire.

[0107] The second connection mode is a mode in which a conductive bonding material such as solder or soft solder is used instead of the wire 13, and the wire bonding area of ​​the metal lead wiring member 12 and the intermediate connection member 21 are electrically connected by the conductive bonding member.

[0108] The third connection mode is a mode in which the plate portion 12a is extended along the +X direction toward the side wall of the metal lead wiring member 12, and the embedded connection wire 22 provided in the side wall of the resin case 2 is brought into contact with the plate portion 12a, thereby integrating the external electrode 11 and the embedded connection wire 22 provided on the +X direction side with the plate portion 12a.

[0109] Hereinafter, in embodiment 4, a structure including an insulating circuit board 3, a plurality of semiconductor elements 6, a plurality of conductive bonding materials 10, a metal lead wiring member 12, and a plurality of conductive bonding materials 14 may be referred to as an "extended intermediate structure."

[0110] Similar to the heat dissipation member 4 of embodiment 1, the heat dissipation member 44 is disposed so that the second main surface of the plate portion 44a faces the first main surface of the expanded intermediate structure. Therefore, the plate portion 44a of the heat dissipation member 44 is disposed at a distance from the first main surfaces of the metal lead wiring member 12, the insulating circuit board 3, and the plurality of semiconductor elements 6.

[0111] Similarly to the heat dissipation member 4 of the first embodiment, the heat dissipation member 44 is provided in such a manner that a plurality of pillar portions 44b are erected on the first main surface of the metal base plate 1. That is, the heat dissipation member 44 is provided on the first main surface of the metal base plate 1 in such a manner that it straddles the extended intermediate structure.

[0112] The heat dissipation member 44 is provided away from the metal lead wiring member 12 and the semiconductor elements 6 so that dielectric breakdown does not occur in the sealing resin layer 8 between the heat dissipation member 44 and the semiconductor elements 6 when current is applied to the semiconductor elements 6. Furthermore, the heat dissipation member 44 is electrically insulated from the metal lead wiring member 12 and the semiconductor elements 6.

[0113] In addition, the heat dissipation member forming region R44 of the heat dissipation member 44 is disposed so as to include, in plan view, the main wiring region R12 of the metal lead wiring member 12. That is, the heat dissipation member forming region R44 is wider in shape than the main wiring region R12 and includes the entire main wiring region R12 in plan view.

[0114] In the structure of the semiconductor device 54 shown in Figures 6 to 8, the bonding area between the first main surface of the plurality of semiconductor elements 6 and the first main surface of the plate portion 12a by the plurality of conductive bonding materials 14 is larger than that of a wiring structure using linear connecting members such as wires, and therefore, a large amount of heat is propagated when the plurality of semiconductor elements 6 are energized.

[0115] Furthermore, the volume of the metal lead wiring member 12, which is a plate-shaped connecting member, is larger than the volume of a linear connecting member such as the wire 13, and therefore the amount of thermal expansion is large. Therefore, when the interface between the end of the metal lead wiring member 12 and the sealing resin layer 8 peels off, cracks are likely to occur in the sealing resin layer 8 starting from the peeled point.

[0116] If a crack that occurs in the sealing resin layer 8 progresses to one of the semiconductor elements 6, the semiconductor element 6 is damaged, resulting in a problem of reduced reliability of the device.

[0117] However, in the semiconductor device 54 of embodiment 4, by cooling the sealing resin layer 8 through a heat dissipation path including the heat dissipation member 44 and suppressing thermal expansion, the thermal expansion of the metal lead wiring member 12 is suppressed, peeling between the end of the metal lead wiring member 12 and the sealing resin layer 8 is suppressed, and the reliability of the device can be maintained at a high level.

[0118] In particular, as mentioned above, the heat dissipation member forming region R44 of the plate portion 44a includes the main wiring region R12 of the metal lead wiring member 12, and since the heat dissipation member forming region R44 is wider than the main wiring region R12, the thermal expansion of the metal lead wiring member 12 can be effectively suppressed.

[0119] In this configuration, heat from the semiconductor elements 6 and the metal lead wiring members 12 when the semiconductor elements 6 are energized is propagated through the sealing resin layer 8 to the entire semiconductor device 54 .

[0120] In the semiconductor device 54 of the fourth embodiment, a large portion of the first main surface of each of the plurality of semiconductor elements 6 faces the second main surface of the plate portion 44a, and the heat dissipation member forming region R44 is set in a positional relationship that includes, in a plan view, the main wiring region R12 of the metal lead wiring member 12. Therefore, by the first cooling operation that cools along a heat dissipation path including the heat dissipation member 44, the metal base plate 1, and the cooling mechanism 9, heat generated from the plurality of semiconductor elements 6 and the metal lead wiring member 12 and propagated to the encapsulating resin layer 8 can be dissipated, and the temperature rise in the region of the encapsulating resin layer 8 near the plurality of semiconductor elements 6 and the metal lead wiring member 12 can be minimized.

[0121] Therefore, similar to the semiconductor device 51 of the first embodiment, the semiconductor device 54 of the fourth embodiment can improve the reliability of the device without causing electrical loss when the plurality of semiconductor elements 6 are in operation.

[0122] Additionally, similar to the first embodiment, the semiconductor device 54 of the fourth embodiment performs the cooling operation of the double-sided cooling method described above using a single cooling mechanism 9, thereby simplifying the device configuration.

[0123] On the other hand, since metal lead wiring member 12, which is a plate-shaped connecting member, has plate portion 12a as its main portion, a relatively large current can flow in main wiring region R12 of plate portion 12a when current is applied to multiple semiconductor elements 6. That is, semiconductor device 54 of embodiment 4 can pass a relatively large current.

[0124] However, in the semiconductor device 54 of the fourth embodiment, a relatively large current flows through the main wiring region R12, which makes it more likely that a peeling phenomenon will occur starting from the interface between the plate portion 12a of the metal lead wiring member 12 and the sealing resin layer 8. When the peeling phenomenon occurs, some of the semiconductor elements 6 are likely to be damaged, and other problems with the semiconductor elements 6 are likely to occur.

[0125] In the semiconductor device 54 of embodiment 4, the plate portion 44a of the heat dissipation member 44 overlaps with the plate portion 12a of the metal lead wiring member 12 in a planar view, and therefore the metal lead wiring member 12 can be cooled by a first cooling operation that cools the metal lead wiring member 12 through a heat dissipation path including the heat dissipation member 44, thereby suppressing the above-mentioned peeling phenomenon.

[0126] In particular, the plate portion 44a of the heat dissipation member 44 of the fourth embodiment includes the main wiring region R12 of the metal lead wiring member 12 in plan view, and therefore the metal lead wiring member 12 can be cooled more effectively.

[0127] As a result, the semiconductor device 54 of the fourth embodiment can reliably avoid defects in the plurality of semiconductor elements 6 and improve the reliability of the device through which a relatively large current flows.

[0128] Furthermore, since the metal lead wiring member 12 has a relatively large bonding area with the multiple semiconductor elements 6 via the conductive bonding material 14, the semiconductor device 54 of embodiment 4 can achieve a large current and a long life.

[0129] Furthermore, since the metal lead wiring member 12, which is a plate-like connecting member, includes the main wiring region R12, a relatively large current flows through the main wiring region R12 when the semiconductor elements 6 are energized, resulting in a large amount of heat generation.

[0130] The plate portion 44a of the heat dissipation member 44 of embodiment 4 is positioned to include the main wiring region R12 in the metal lead wiring member 12 in a planar view, so that the main wiring region R12 can be effectively cooled by the first cooling operation that cools along a heat dissipation path that includes the plate portion 44a.

[0131] As a result, the semiconductor device 54 of the fourth embodiment can reliably avoid problems associated with heat generation in the main wiring region R12, and improve the reliability of the semiconductor device 54 through which a relatively large current flows.

[0132] The semiconductor device 54 of the fourth embodiment can also be applied to a structure having at least one semiconductor element 6, similar to the first to third embodiments.

[0133] <Fifth Embodiment> Fig. 9 is a cross-sectional view showing a cross-sectional structure of a semiconductor device 55 according to a fifth embodiment of the present disclosure. An XYZ Cartesian coordinate system is depicted in Fig. 9. Fig. 9 corresponds to the AA cross section of the semiconductor device 51 shown in Fig. 1.

[0134] Hereinafter, components similar to those of the semiconductor device 51 shown in FIGS. 1 to 3 are designated by the same reference numerals, and descriptions thereof will be omitted where appropriate, and the description will focus on the characteristic features of the semiconductor device 55 of the fifth embodiment.

[0135] A semiconductor device 55 according to the fifth embodiment is characterized in that a plurality of wires 13, which are a plurality of linear connecting members, are used as the electrical connecting members 7 for a plurality of semiconductor elements 6. The plurality of wires 13 are generally made of a metal material with low electrical resistance, such as aluminum or copper.

[0136] The plurality of wires 13, which are the plurality of linear connecting members, include a main wire 13m that electrically connects the plurality of semiconductor elements 6. This main wire 13m serves as a main current wiring member.

[0137] In this way, the multiple wires 13, together with the multiple semiconductor elements 6 and the circuit pattern 5 of the insulating circuit board 3, form a main current circuit. Of the multiple wires 13, it is expected that a relatively large current will flow through the main wire 13m, which functions as a main current wiring member that passes current between the multiple semiconductor elements 6.

[0138] Both ends of each of the plurality of wires 13, including the main wire 13m, are bonded to a bonding object by ultrasonic wire bonding, which is an ultrasonic bonding process. In the semiconductor device 55 shown in Fig. 9, the bonding object is the first main surface of either the intermediate connection member 21 or one of the plurality of semiconductor elements 6. In this way, both ends of the plurality of wires 13 are bonded to the bonding object as bonding end portions by ultrasonic bonding.

[0139] Therefore, the manufacturing method of the semiconductor device 55 of the fifth embodiment includes the following steps (a) and (b) as part thereof.

[0140] Step (a) is a step of placing an intermediate structure including an insulating circuit board 3 and a plurality of semiconductor elements 6 on a first main surface of a metal base plate 1.

[0141] Step (b) is a step of performing ultrasonic bonding to bond both ends of each of the plurality of wires 13 to an object to be bonded. Here, the object to be bonded includes a first main surface of any of the plurality of semiconductor elements 6 or first main surfaces of the plurality of intermediate connection members 21. Therefore, step (b) includes a step of performing ultrasonic bonding to bond one end of each of the plurality of wires 13 to any of the plurality of semiconductor elements 6.

[0142] For example, ultrasonic bonding is performed to bond one end of the main wire 13m onto a first main surface of one of the plurality of semiconductor elements 6, and the other end of the main wire 13m onto a first main surface of the other of the plurality of semiconductor elements 6. In this case, both ends of the main wire 13m become bonding end portions.

[0143] The above step (a) is performed by an existing manufacturing process, and the above step (b) is performed by performing an ultrasonic wire bonding process, and the ends of each of the multiple wires 13 subjected to the ultrasonic bonding process in the above step (b) become bonded ends.

[0144] Hereinafter, in the fifth embodiment, a structure including the insulating circuit board 3, the plurality of semiconductor elements 6, and the plurality of wires 13 may be referred to as an "extended intermediate structure."

[0145] Similar to the heat dissipation member 43 of the third embodiment, the heat dissipation member 45 is disposed so that the plate portion 45a overlaps most of the semiconductor elements 6 in plan view.

[0146] Similar to the heat dissipation member 4 of the first embodiment, the heat dissipation member 45 is disposed so that the second main surface of the plate portion 45a of the heat dissipation member 45 faces the first main surface of the extended intermediate structure. Therefore, the plate portion 45a of the heat dissipation member 45 is disposed at a distance from the insulating circuit board 3 and the first main surfaces of the plurality of semiconductor elements 6.

[0147] Similarly to the heat dissipation member 4 of the first embodiment, the heat dissipation member 45 is provided in such a manner that a plurality of pillar portions 45b are erected on the first main surface of the metal base plate 1. That is, the heat dissipation member 45 is provided on the first main surface of the metal base plate 1 in such a manner that it straddles the extended intermediate structure.

[0148] The heat dissipation member 45 in the semiconductor device 55 of the fifth embodiment is provided away from the main wires 13m and the semiconductor elements 6 so as to prevent dielectric breakdown of the sealing resin layer 8 between the heat dissipation member 45 and the semiconductor elements 6 when current is applied to the semiconductor elements 6. Furthermore, the heat dissipation member 45 is electrically insulated from the main wires 13m and the semiconductor elements 6.

[0149] In addition, the heat dissipation member forming region R45 at the center of the heat dissipation member 45 is disposed so as to include the main wire 13m in plan view. That is, the main wire 13m exists within the heat dissipation member forming region R45 in plan view.

[0150] In the semiconductor device 55 of the fifth embodiment shown in FIG. 9, a relatively large current flows through the main wires 13m that electrically connect the plurality of semiconductor elements 6 together when the plurality of semiconductor elements 6 are energized.

[0151] Therefore, when the interface between the main wire 13m and the sealing resin layer 8 peels off, cracks tend to occur in the sealing resin layer 8 starting from the peeled portion.

[0152] If a crack that occurs in the sealing resin layer 8 progresses to one of the semiconductor elements 6, the semiconductor element 6 is damaged, resulting in a problem of reduced reliability of the device.

[0153] In the semiconductor device 55 of the fifth embodiment, the heat dissipation member forming region R45 is set so as to include the main wires 13m in plan view.

[0154] In the semiconductor device 55 configured as described above, heat generated when the semiconductor elements 6 and main wires 13m are energized is propagated throughout the entire semiconductor device 55 via the encapsulating resin layer 8. At this time, the heat generated from the semiconductor elements 6 and main wires 13m and propagated to the encapsulating resin layer 8 is dissipated by a first cooling operation via a heat dissipation path including the heat dissipation member 45, the metal base plate 1, and the cooling mechanism 9, thereby minimizing the temperature rise in the area of ​​the encapsulating resin layer 8 close to the semiconductor elements 6 and main wires 13m.

[0155] Therefore, similar to the semiconductor device 51 of the first embodiment, the semiconductor device 55 of the fifth embodiment can improve the reliability of the device without causing electrical loss when the plurality of semiconductor elements 6 are in operation.

[0156] Additionally, similar to the first embodiment, the semiconductor device 55 of the fifth embodiment performs the cooling operation of the double-sided cooling method using one cooling mechanism 9, thereby simplifying the device configuration.

[0157] In the semiconductor device 55 of embodiment 5, the joint ends of the multiple wires 13, which are multiple linear connecting members, may become disconnected and electrically disconnected from the multiple semiconductor elements 6 due to thermal expansion of the sealing resin layer 8.

[0158] That is, when the sealing resin layer 8 thermally expands, the difference in the thermal expansion coefficient between the semiconductor element 6 and the sealing resin layer 8 may cause stress to be applied to the joints between the semiconductor element 6 and the multiple wires 13, which may cause the wires 13 to break.

[0159] The semiconductor device 55 of embodiment 5 can improve the reliability of the semiconductor device by cooling the heat accumulated in the sealing resin layer 8 through a first cooling operation using a heat dissipation path including the plate portion 45a of the heat dissipation member 45, thereby avoiding the phenomenon in which any of the multiple wires 13 becomes disconnected.

[0160] That is, in the semiconductor device 55 of embodiment 5, the presence of the heat dissipation member 45 provided inside the sealing resin layer 8 cools the heat accumulated in the sealing resin layer 8, thereby suppressing the expansion of the sealing resin layer 8 and preventing breakage of the wire 13.

[0161] Furthermore, the semiconductor device 55 of the fifth embodiment has a high degree of freedom in wiring because it uses a plurality of wires 13 as electrical connection members, and therefore, the semiconductor device 55 can be flexibly designed as a circuit.

[0162] The plurality of wires 13 includes main wires 13m that serve as main current wiring members, so that when the plurality of semiconductor elements 6 are energized, a relatively large current flows through the main wires 13m, generating a large amount of heat.

[0163] In the semiconductor device 55 of the fifth embodiment, the heat dissipation member forming region R45 in the plate portion 45a of the heat dissipation member 45 is disposed to include the main wire 13m in a plan view, so that the main wire 13m can be effectively cooled by the first cooling operation through the heat dissipation path including the column portion 45b.

[0164] As a result, the semiconductor device 55 of the fifth embodiment can reliably avoid problems associated with heat generation in the main wires 13m, and improve the reliability of the device in which a relatively large current flows through the main wires 13m.

[0165] Furthermore, the semiconductor device 55 of embodiment 5, which is manufactured by a manufacturing method including the above-mentioned steps (a) and (b), can ensure a highly stable electrical connection state with any of the multiple semiconductor elements 6 at the joint ends of each of the multiple wires 13, which serve as multiple linear connecting members, by the above-mentioned step (b).

[0166] 9, each of the plurality of wires 13 is bonded to one of the plurality of semiconductor elements 6 in units of a single wiring, but it is also possible to bond a plurality of wires to one of the plurality of semiconductor elements 6 in units of multiple wirings. When bonding a plurality of wires, it is also possible to bond the wires in a ribbon-like wiring in which the plurality of wires are arranged.

[0167] The semiconductor device 55 of the fifth embodiment can also be applied to a structure having at least one semiconductor element 6, similar to the first to fourth embodiments.

[0168] <Sixth Embodiment> Fig. 10 is a cross-sectional view showing a cross-sectional structure of a semiconductor device 56 according to a sixth embodiment of the present disclosure. An XYZ Cartesian coordinate system is depicted in Fig. 10. Fig. 10 corresponds to the AA cross section of the semiconductor device 51 shown in Fig. 1.

[0169] Hereinafter, components similar to those of the semiconductor device 51 shown in FIGS. 1 to 3 are designated by the same reference numerals, and descriptions thereof will be omitted where appropriate, and the description will focus on the characteristic features of the semiconductor device 56 of the sixth embodiment.

[0170] The semiconductor device 56 of the sixth embodiment has a structure in which the plurality of semiconductor elements 6 are replaced with a plurality of SiC semiconductor elements 60.

[0171] In this configuration, heat generated when the multiple SiC semiconductor elements 60 are energized is propagated throughout the entire semiconductor device 56 via the encapsulating resin layer 8. Each of the multiple SiC semiconductor elements 60 is made of silicon carbide (SiC), and generates a greater amount of heat when energized than a semiconductor element made of Si. Therefore, the operating temperature of the multiple SiC semiconductor elements 60 increases at a greater rate than the operating temperature of the multiple semiconductor elements 6.

[0172] As in the first embodiment, the heat dissipation member 4 is provided away from the plurality of SiC semiconductor elements 60 so as to prevent dielectric breakdown of the sealing resin layer 8 between the heat dissipation member 4 and the plurality of SiC semiconductor elements 60 when current is applied to the plurality of SiC semiconductor elements 60. Furthermore, the heat dissipation member 4 is electrically insulated from the plurality of SiC semiconductor elements 60.

[0173] Therefore, similar to the first embodiment, the semiconductor device 56 of the sixth embodiment can improve the reliability of the device without generating electrical loss when the plurality of SiC semiconductor elements 60 are energized.

[0174] The semiconductor device 56 of the sixth embodiment has a plurality of SiC semiconductor elements 60, and therefore basically has the SiC operating characteristics, such as being able to pass a relatively large current, operating at high frequencies, operating in high temperature environments, high insulation, and a low off-state voltage.

[0175] Additionally, similar to the first embodiment, the semiconductor device 56 of the sixth embodiment performs the cooling operation of the double-sided cooling method described above using a single cooling mechanism 9, thereby simplifying the device configuration.

[0176] In semiconductor device 56 of the sixth embodiment, the operating temperature of multiple SiC semiconductor elements 60 increases because the amount of heat generated during power-on operation is relatively large, which increases the influence of thermal stress caused by differences in thermal expansion coefficients between components of semiconductor device 56, resulting in reduced reliability of the device.

[0177] On the other hand, the semiconductor device 56 of embodiment 6 has a heat dissipation function that dissipates the heat accumulated in the sealing resin layer 8 when multiple SiC semiconductor elements 60 are energized through a heat dissipation path including the heat dissipation member 4 and the metal base plate 1, thereby suppressing thermal expansion of the sealing resin layer 8.

[0178] As a result, the semiconductor device 56 of the sixth embodiment can minimize the influence of thermal stress caused by the difference in thermal expansion coefficient between the components of the semiconductor device 56, thereby improving the reliability of the device having the above-mentioned SiC operating characteristics.

[0179] In addition, in the sixth embodiment shown in Figure 10, a structure in which a plurality of SiC semiconductor elements 60 are provided in the structure of the first embodiment shown in Figures 1 to 3 is shown, but it goes without saying that the structure can also be modified to a structure in which a plurality of SiC semiconductor elements 60 are provided in the structures of the second to fifth embodiments.

[0180] Furthermore, the semiconductor device 56 of the sixth embodiment can also be applied to a structure having at least one SiC semiconductor element 60, similar to the first to fifth embodiments.

[0181] Although the present disclosure has been described in detail, the above description is illustrative in all respects and does not limit the present disclosure to the above. It is understood that countless variations not illustrated can be envisioned without departing from the scope of the present disclosure. [Explanation of symbols]

[0182] 1 metal base plate, 2 resin case, 3 insulating circuit board, 4, 42 to 45 heat dissipation member, 4a, 42a to 45a plate portion, 4b, 42b to 45b column portion, 5 circuit pattern, 6 semiconductor element, 7 electrical connection member, 8 sealing resin layer, 9 cooling mechanism, 10, 14 conductive bonding material, 11 external electrode, 12 metal lead wiring member, 13 wire, 13m main wire, 21 intermediate connection member, 22 buried connection wire, 30 insulating layer, 51 to 56 semiconductor device, 60 SiC semiconductor element.

Claims

1. a base plate having a first major surface and a second major surface; an insulating circuit board provided on a first main surface side of the base plate and having a circuit pattern; at least one semiconductor element provided on a first main surface side of the insulating circuit board; a heat dissipation member that is electrically conductive and includes a plurality of pillar portions and plate portions provided between the plurality of pillar portions, the plate portions being located on a first main surface side of the insulating circuit board and the at least one semiconductor element, and the plurality of pillar portions being provided in an upright position on the first main surface of the base plate; a resin layer provided on the first main surface of the base plate to cover the insulating circuit board, the at least one semiconductor element, and the heat dissipation member, the heat dissipation member is provided at a distance from the at least one semiconductor element so that dielectric breakdown does not occur in the resin layer between the heat dissipation member and the at least one semiconductor element during operation of the at least one semiconductor element; the heat dissipation member is electrically insulated from the at least one semiconductor element; Semiconductor device.

2. 2. The semiconductor device according to claim 1, the plate portion of the heat dissipation member is provided so as to overlap with the at least one semiconductor element in a plan view; Semiconductor device.

3. 2. The semiconductor device according to claim 1, an electrical connection member made of a first material having electrical conductivity and electrically connected to the at least one semiconductor element; the resin layer is provided to further cover the electrical connection member, The heat dissipation member is made of the first material. Semiconductor device.

4. 2. The semiconductor device according to claim 1, Further, an electrical connection member is provided which is electrically conductive and electrically connected to the at least one semiconductor element, the electrical connection member includes a plate-shaped connection member having a main portion configured in a plate shape, the plate portion of the heat dissipation member overlaps with the plate-shaped connecting member in a plan view, the plate-shaped connecting member is joined to the at least one semiconductor element via a conductive bonding material, the heat dissipation member is provided at a distance from the plate-shaped connecting member so that dielectric breakdown does not occur in the resin layer between the heat dissipation member and the plate-shaped connecting member during operation of the at least one semiconductor element. Semiconductor device.

5. 5. The semiconductor device according to claim 4, the at least one semiconductor device includes a plurality of semiconductor devices; the plate-shaped connecting member includes a main wiring region through which current flows between the plurality of semiconductor elements, the plate portion of the heat dissipation member is disposed to include the main wiring region in plan view; Semiconductor device.

6. 2. The semiconductor device according to claim 1, Further, an electrical connection member is provided which is electrically conductive and electrically connected to the at least one semiconductor element, the electrical connection members are a plurality of linear connection members, each of the plurality of linear connecting members has a joining end portion to be joined to the at least one semiconductor element; Semiconductor device.

7. 7. The semiconductor device according to claim 6, the at least one semiconductor device includes a plurality of semiconductor devices; the plurality of linear connection members include a main current wiring member that passes current between the plurality of semiconductor elements, the plate portion of the heat dissipation member is disposed to include the main current wiring member in a plan view. Semiconductor device.

8. 8. The semiconductor device according to claim 1, The at least one semiconductor element includes at least one SiC semiconductor element each made of SiC. Semiconductor device.

9. 8. The semiconductor device according to claim 1, the base plate includes a metal base plate; The semiconductor device includes: a cooling mechanism provided on the second main surface side of the metal base plate to cool the metal base plate; Semiconductor device.

10. A method for manufacturing a semiconductor device, comprising: The semiconductor device includes the semiconductor device according to claim 6, (a) placing an intermediate structure including the insulating circuit board and the at least one semiconductor element on a first main surface of the base plate; (b) performing an ultrasonic bonding process to bond one end of each of the plurality of linear connecting members to any one of the at least one semiconductor element; After step (b) is performed, one end of each of the plurality of linear connecting members becomes the joint end portion. A method for manufacturing a semiconductor device.

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