Back-contact heterojunction battery cell and method of manufacture thereof

Abstract

The present disclosure discloses a back contact heterojunction solar cell and a method for fabricating the same. The back contact heterojunction solar cell includes a substrate, a first intrinsic amorphous silicon passivation layer, an anti-reflective layer, a second intrinsic amorphous silicon passivation layer, a doped layer, a transparent conductive layer, and a first intrinsic amorphous silicon passivation isolation layer. The first intrinsic amorphous silicon passivation layer and the anti-reflective layer are sequentially deposited on the light incident surface of the substrate. The second intrinsic amorphous silicon passivation layer and the doped layer are sequentially deposited on the back surface of the substrate. The doped layer includes a plurality of alternating P and N regions, and a transparent conductive layer is deposited on the P and N regions. Adjacent P and N regions are spaced apart to form a first isolation trench. The first intrinsic amorphous silicon passivation isolation layer corresponds to the first isolation trench in a one-to-one manner, and the isolation layer is filled into the corresponding first isolation trench.

Description

[Technical Field]

[0001] (CROSS-REFERENCE TO RELATED APPLICATIONS) This application claims priority from Chinese Patent Application No. 202210910831.7 filed in China on July 29, 2022, the entire contents of which are incorporated herein by reference.

[0002] FIELD OF THE INVENTION This application relates to the field of heterojunction battery cells, and more particularly to back-contact heterojunction battery cells and methods for fabricating the same. [Background technology]

[0003] Back-contact solar cells are highly efficient solar cells that have the P and N regions of the cell all located on the back surface of the cell, avoiding the cell surface being blocked by grid lines. Summary of the Invention [Problem to be solved by the invention]

[0004] Currently, back-contact heterojunction solar cells face the following problem: the separation distance between the P and N regions affects cell efficiency. Research has shown that the current density in the gap between the P and N regions is very high, the current is unevenly distributed between the P and N regions, and the current density decreases the closer to the center of the P and N regions. Based on this, the separation distance between the P and N regions is generally 10 to 50 μm. If the gap between the P and N regions is too small, the cell may be destroyed and short-circuited; if the gap between the P and N regions is too large, it will affect the area of ​​the P and N regions, negatively affecting cell efficiency. [Means for solving the problem]

[0005] The present invention aims to solve at least one of the technical problems in the related art to a certain extent. To achieve this, an embodiment of the present invention discloses a back contact heterojunction solar cell with a large effective area of the P region and the N region and high battery efficiency. Further, an embodiment of the present invention discloses a manufacturing method of the back contact heterojunction solar cell.

[0006] In a first embodiment, it includes a substrate, a first intrinsic amorphous silicon passivation layer 2, an antireflection layer, a second intrinsic amorphous silicon passivation layer, a doped layer, a transparent conductive layer, and a first intrinsic amorphous silicon passivation isolation layer. The first intrinsic amorphous silicon passivation layer 2 and the antireflection layer are sequentially deposited on the light incident surface of the substrate, and the second intrinsic amorphous silicon passivation layer and the doped layer are sequentially deposited on the back surface of the substrate. The doped layer includes a plurality of alternately arranged P regions and N regions. The transparent conductive layer is deposited on the P regions and the N regions. Any adjacent P region and N region are arranged at intervals to form a first isolation groove. The first intrinsic amorphous silicon passivation isolation layer corresponds one-to-one with the first isolation groove, and the first intrinsic amorphous silicon passivation isolation layer is filled in the corresponding first isolation groove. The first isolation groove penetrates the second amorphous silicon passivation layer along the thickness direction of the substrate and at least a part is located in the substrate. The first amorphous silicon passivation isolation layer fills the part of the first isolation groove located in the substrate. The first isolation groove includes an inner isolation groove located in the substrate and the second intrinsic amorphous silicon passivation layer and an outer isolation groove located in the doped layer. The width D of the inner isolation groove satisfies 0<D<10nm, and the width of the outer isolation groove is greater than 10nm. A back contact heterojunction solar cell is disclosed.

[0007] In some embodiments, the doped layer includes a P-type amorphous silicon layer constituting the P region and an N-type amorphous silicon layer constituting the N region, and at least a portion of the first intrinsic amorphous silicon passivation isolation layer fills the first isolation trench.

[0008] In some embodiments, the first intrinsic amorphous silicon passivation isolation layer is a silicon thin film made of one of amorphous silicon, nc-Si:H, and μc-Si:H.

[0009] In some embodiments, the first isolation trench has a depth in the substrate that is equal to the thickness of the substrate.

[0010] In some embodiments, the substrate is an N-type substrate, and the area of ​​the P region is greater than the area of ​​the N region.

[0011] In some embodiments, a second isolation groove corresponding to the first isolation groove is provided on the rear surface of the substrate; The second isolation trench has a depth equal to or less than the thickness of the substrate, and the second intrinsic amorphous silicon passivation isolation layer is filled in the second isolation trench.

[0012] In some embodiments, the method includes the steps of depositing a first intrinsic amorphous silicon passivation layer 2 and a second intrinsic amorphous silicon passivation layer on the light incident surface and the back surface of a substrate, respectively, and further depositing an anti-reflection layer on the first intrinsic amorphous silicon passivation layer 2; depositing N-type amorphous silicon and P-type amorphous silicon on the second intrinsic amorphous silicon passivation layer using a first mask and a second mask, respectively; and forming a first isolation trench at the interface between the N-type amorphous silicon and the P-type amorphous silicon by laser etching, the first isolation trench extending into the substrate and forming a first isolation trench between the substrate and the A method for manufacturing a back-contact heterojunction solar cell is disclosed, comprising: forming an inner isolation trench located in a second intrinsic amorphous silicon passivation layer and an outer isolation trench located between the N-type amorphous silicon and the P-type amorphous silicon, wherein the N-type amorphous silicon and the P-type amorphous silicon form an N region and a P region, respectively, after the trench formation, and the depth of the inner isolation trench is equal to or less than a thickness of the second intrinsic amorphous silicon passivation layer and a thickness of the substrate; and depositing intrinsic amorphous silicon in the inner isolation trench and the outer isolation trench to obtain a first intrinsic amorphous silicon passivation isolation layer.

[0013] In some embodiments, a third mask is provided on the first intrinsic amorphous silicon passivation isolation layer, a transparent conductive layer is deposited using physical vapor deposition, and the third mask is stripped to form a back-contact heterojunction solar cell with an intermediate barrier.

[0014] In some embodiments, the method includes sequentially depositing a first intrinsic amorphous silicon passivation layer 2 and an anti-reflection layer on a light-incident surface of a substrate; placing a fourth mask on a back surface of the substrate and etching the fourth mask and the substrate using laser etching to form a second isolation trench; depositing intrinsic amorphous silicon in the second isolation trench to obtain a second intrinsic amorphous silicon passivation isolation layer; removing the fourth mask and depositing a second intrinsic amorphous silicon passivation isolation layer 3 on the back surface of the substrate. a second intrinsic amorphous silicon passivation isolation layer; depositing N-type amorphous silicon and P-type amorphous silicon on the second intrinsic amorphous silicon passivation layer using a fifth mask and a sixth mask to form spaced-apart N and P regions; and depositing intrinsic amorphous silicon in gaps between the N and P regions to obtain a first intrinsic amorphous silicon passivation isolation layer.

[0015] In some embodiments, a seventh mask is provided on the first intrinsic amorphous silicon passivation isolation layer, a transparent conductive layer is deposited using physical vapor deposition, and the seventh mask is stripped to form a back-contact heterojunction solar cell with an intermediate barrier. [Effects of the Invention]

[0016] According to an embodiment of the present disclosure, a back-contact heterojunction solar cell according to an example of the present disclosure separates the P region and the N region with a first amorphous silicon passivation isolation layer, thereby preventing cell breakdown and short-circuiting and further reducing the width of the first isolation trench between the P region and the N region. Compared to conventional micron-level widths, this example achieves a nanometer-level width. As a result, the effective areas of the P region and the N region are increased, improving cell efficiency. Furthermore, the technical advantages of the method for manufacturing a back-contact heterojunction solar cell according to an example of the present disclosure are similar to those of the back-contact heterojunction solar cell described above, and therefore a detailed description thereof will be omitted here. [Brief explanation of the drawings]

[0017] [Figure 1] FIG. 2 illustrates step a of a method for fabricating a back contact heterojunction solar cell according to an embodiment of the present disclosure. [Figure 2] FIG. 2 illustrates step b of a method for fabricating a back contact heterojunction solar cell according to an embodiment of the present disclosure. [Figure 3] FIG. 10 illustrates step c of a method for fabricating a back contact heterojunction solar cell according to an embodiment of the present disclosure. [Figure 4] FIG. 10 illustrates step d of a method for fabricating a back contact heterojunction solar cell according to an embodiment of the present disclosure. [Figure 5] FIG. 10 illustrates step e of a method for fabricating a back contact heterojunction solar cell according to an embodiment of the present disclosure. [Figure 6] FIG. 10 illustrates step f of a method for fabricating a back contact heterojunction solar cell according to an embodiment of the present disclosure. [Figure 7] FIG. 10 illustrates step g of a method for fabricating a back contact heterojunction solar cell according to an embodiment of the present disclosure. [Figure 8] FIG. 10 illustrates step h of a method for fabricating a back contact heterojunction solar cell according to an embodiment of the present disclosure. [Figure 9]FIG. 1 is a schematic diagram of a back contact heterojunction solar cell according to an embodiment of the present disclosure. [Figure 10] FIG. 2 illustrates step a of another method for fabricating a back contact heterojunction solar cell according to an embodiment of the present disclosure. [Figure 11] FIG. 10 illustrates step b of another method for fabricating a back contact heterojunction solar cell according to an embodiment of the present disclosure. [Figure 12] FIG. 10 illustrates step c of another method for fabricating a back contact heterojunction solar cell according to an embodiment of the present disclosure. [Figure 13] FIG. 10 illustrates step d of another method for fabricating a back contact heterojunction solar cell according to an embodiment of the present disclosure. [Figure 14] FIG. 10 illustrates step e of another method for fabricating a back contact heterojunction solar cell according to an embodiment of the present disclosure. [Figure 15] FIG. 10 illustrates step f of another method for fabricating a back contact heterojunction solar cell according to an embodiment of the present disclosure. [Figure 16] FIG. 10 illustrates step g of another method for fabricating a back contact heterojunction solar cell according to an embodiment of the present disclosure. [Figure 17] FIG. 10 illustrates step h of another method for fabricating a back contact heterojunction solar cell according to an embodiment of the present disclosure. [Figure 18] FIG. 2 illustrates step i of another method for fabricating a back contact heterojunction solar cell according to an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0018] The following clearly describes the technical solutions in the embodiments of the present application in conjunction with the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some of the embodiments of the present application, and not all of the embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present application are all within the scope of protection of the present application.

[0019] Hereinafter, a back contact heterojunction solar cell and a method for manufacturing the same according to an embodiment of the present disclosure will be described with reference to FIGS.

[0020] 8, a back-contact heterojunction solar cell according to an embodiment of the present disclosure includes a substrate 1, a first intrinsic amorphous silicon passivation layer 2, an anti-reflection layer 4, a second intrinsic amorphous silicon passivation layer 3, a doped layer, a transparent conductive layer 7, and a first intrinsic amorphous silicon passivation isolation layer 8. The first intrinsic amorphous silicon passivation layer 2 and the anti-reflection layer 4 are sequentially deposited on the light-incident surface (surface facing the light) of the substrate 1, and the second intrinsic amorphous silicon passivation layer 3 and the doped layer are sequentially deposited on the back surface (surface facing the backlight) of the substrate 1. The doped layer includes a plurality of alternating P regions 61 and N regions 51, and the transparent conductive layer 7 is deposited on the P regions 61 and N regions 51, with any adjacent P regions 61 and N regions 51 spaced apart to form a first isolation groove. The first intrinsic amorphous silicon passivation isolation layer 8 corresponds one-to-one with the first isolation trenches, and is filled into the corresponding first isolation trenches. The first intrinsic amorphous silicon passivation isolation layer 8 is a silicon thin film made of any one of intrinsic amorphous silicon, nc-Si:H, and μc-Si:H.

[0021] In the back-contact heterojunction solar cell according to the embodiment of the present disclosure, the first intrinsic amorphous silicon passivation isolation layer 8 is provided to isolate the P region 61 and the N region 51 and prevent cell breakdown or short circuit. This allows the width of the first isolation trench between the P region 61 and the N region 51 to be set smaller, limited to the nanometer level compared to the micrometer level width in the related art. This increases the effective area of ​​the P region 61 and the N region 51 and improves cell efficiency.

[0022] In some embodiments, the doped layer includes a P-type amorphous silicon layer 6 constituting a P region 61 and an N-type amorphous silicon layer 5 constituting an N region 51, and at least a portion of the first intrinsic amorphous silicon passivation isolation layer 8 fills the first isolation trench.

[0023] That is, the width of the first isolation trench is equal to the width and volume of the first intrinsic amorphous silicon passivation isolation layer 8. This ensures effective isolation of the N region 51 and the P region 61 by the first intrinsic amorphous silicon passivation isolation layer 8, improving the safety of the battery.

[0024] 5 and 8, the first isolation trench penetrates the second intrinsic amorphous silicon passivation layer 3 along the thickness direction of the substrate 1 and is at least partially located on the substrate 1. The first intrinsic amorphous silicon passivation isolation layer 8 fills the portion of the first isolation trench located within the substrate 1, and the first isolation trench includes an inner isolation trench 81 located in the substrate 1 and the second intrinsic amorphous silicon passivation layer 3, and an outer isolation trench 100 located in the doped layer.

[0025] In some embodiments, the bottom surface of the first isolation groove may be adjacent to the light incident surface of the substrate 1. That is, the first isolation groove does not completely penetrate the substrate 1, which ensures the power generation performance of the back-contact heterojunction solar cell while preventing the substrate 1 from being completely separated, which would affect the manufacturing efficiency of the solar cell.

[0026] In some embodiments, the depth of the first isolation trench within the substrate 1 is equal to the thickness of the substrate 1, i.e. the inner isolation trench passes completely through the substrate 1.

[0027] In some embodiments, the width D of the inner isolation groove 81 is 0 <D<10nmである。

[0028] As a result, the width of the first intrinsic amorphous silicon passivation isolation layer 8 in the inner isolation groove 81 is less than 10 nm, which prevents the substrate 1 from being completely isolated by the first intrinsic amorphous silicon passivation isolation layer 8 and improves battery efficiency.

[0029] It should be noted that the widths of the inner isolation trench 81 and the outer isolation trench 100 vary depending on the material of the passivation isolation layer. When intrinsic amorphous silicon is selected as the isolation material, the quantum tunneling effect occurs when the thickness of the intrinsic amorphous silicon is 10 nm or less, while it becomes an insulator when the thickness is 10 nm or more. The first intrinsic amorphous silicon passivation isolation layer 8 in the inner isolation trench 81 is intended to reduce the electron concentration between the P and N regions, but is not intended to provide insulation. The first intrinsic amorphous silicon passivation isolation layer 8 in the outer isolation trench 100 must be an insulator. Therefore, the above design was adopted. Similarly, if the material of the passivation isolation layer is changed, the widths of the inner isolation trench 81 and the outer isolation trench 100 are determined according to the barrier material of the different materials. For example, if intrinsic amorphous silicon is filled in the outer isolation trench 100, the width of the first intrinsic amorphous silicon passivation isolation layer 8 in the outer isolation trench 100 needs to be greater than 10 nm, which ensures effective isolation between the P region 61 and the N region 51, and since its width is at the nanometer level, the effective area of ​​the P region 61 and the N region 51 is increased, thereby improving the cell efficiency.

[0030] In some embodiments, as shown in FIG. 18 , a second isolation trench 91 corresponding to the first isolation trench is provided on the back surface of the substrate 1, and the depth of the second isolation trench 91 is equal to or less than the thickness of the substrate 1. The back-contact heterojunction solar cell further includes a second intrinsic amorphous silicon passivation isolation layer 9, which fills the second isolation trench 91. The back-contact heterojunction solar cell thus fabricated has the same structure as the back-contact heterojunction solar cell of the above-described embodiments, allowing for flexible fabrication of back-contact heterojunction solar cells. In some embodiments, as shown in FIG. 8 , the substrate 1 is an N-type substrate, and the area of ​​the P region 61 is larger than the area of ​​the N region 51. The back-contact heterojunction solar cell thus fabricated has higher power generation efficiency.

[0031] The structure according to the present disclosure can be applied to various back-contact cells having a crystalline silicon substrate, such as PERC and TOPCON. The substrate 1 may be a P-type substrate. In this case, the arrangement of the P region 61 and the N region 51 in the P-type substrate is reversed from that in the N-type substrate.

[0032] As shown in FIGS. 1 to 9, a method for fabricating a back contact heterojunction solar cell according to an embodiment of the present disclosure includes the following steps.

[0033] In step 1, a first intrinsic amorphous silicon passivation layer 2 and a second intrinsic amorphous silicon passivation layer 3 are deposited on the light-incident surface and the back-light surface of the substrate 1, respectively, and then an anti-reflection layer 4 is deposited on the first intrinsic amorphous silicon passivation layer 2.

[0034] In step 2, a first mask 10 and a second mask 20 are used to deposit N-type amorphous silicon and P-type amorphous silicon, respectively, on the second intrinsic amorphous silicon passivation layer 3. Specifically, the first mask 10 is first set and the N-type amorphous silicon is formed, and then the first mask 10 is removed and the second mask 20 is set to form the P-type amorphous silicon.

[0035] In step 3, a first isolation trench is formed at the boundary between the N-type amorphous silicon and the P-type amorphous silicon using laser etching, and the N-type amorphous silicon and the P-type amorphous silicon after the trench formation respectively form an N region 51 and a P region 61. The thickness of the P region 61 / N region 51 + the thickness of the second intrinsic amorphous silicon passivation layer 3 < the depth of the first isolation trench ≦ the thickness of the P region 61 / N region 51 + the thickness of the second intrinsic amorphous silicon passivation layer 3 + the thickness of the substrate 1.

[0036] In step 4, intrinsic amorphous silicon is deposited in the first isolation trench to obtain a first intrinsic amorphous silicon passivation isolation layer 8.

[0037] In step 5, a third mask 30 is provided on the first intrinsic amorphous silicon passivation isolation layer 8, and a transparent conductive layer 7 is deposited using physical vapor deposition.

[0038] In step 6, the third mask 30 is removed (stripped) to form a back contact heterojunction solar cell with an intermediate barrier.

[0039] The technical advantages of the manufacturing method for a back-contact heterojunction solar cell according to the embodiments of the present disclosure are similar to those of the back-contact heterojunction solar cell according to the above-described embodiments, and therefore a detailed description thereof will be omitted here.

[0040] As shown in FIGS. 5 and 6, the outer isolation groove 100 can be first obtained by laser etching, and then the inner isolation groove 81 can be obtained by laser etching, thereby realizing the formation of the first isolation groove.

[0041] As shown in FIGS. 10 to 18, a method for fabricating a back contact heterojunction solar cell according to an embodiment of the present disclosure includes the following steps.

[0042] In step 01, a first intrinsic amorphous silicon passivation layer 2 and an anti-reflection layer 4 are sequentially deposited on the light incident surface of a substrate 1.

[0043] In step 02, a fourth mask 40 is placed on the back surface of the substrate 1, and the fourth mask 40 and the substrate 1 are etched using laser etching to form second isolation grooves 91.

[0044] In step 03, intrinsic amorphous silicon is deposited in the second isolation trench 91 to obtain a second intrinsic amorphous silicon passivation isolation layer 9.

[0045] In step 04, the fourth mask 40 is removed and a second intrinsic amorphous silicon passivation layer 3 is deposited on the back side of the substrate 1.

[0046] In step 05, N-type amorphous silicon and P-type amorphous silicon are deposited on the second intrinsic amorphous silicon passivation layer 3 using a fifth mask 50 and a sixth mask 60, respectively, to form spaced apart N regions 51 and P regions 61. Specifically, the fifth mask 50 is first placed to form the P-type amorphous silicon, and then the fifth mask 50 is removed and a sixth mask 60 is placed to form the N-type amorphous silicon.

[0047] In step 06, intrinsic amorphous silicon is deposited in the first isolation trench formed between the N region 51 and the P region 61 to obtain a first intrinsic amorphous silicon passivation isolation layer 8.

[0048] In step 07, a seventh mask 70 is set on the first intrinsic amorphous silicon passivation isolation layer 8, and a transparent conductive layer 7 is deposited using physical vapor deposition.

[0049] As step 08, the seventh mask 70 is removed to form a back contact heterojunction solar cell with an intermediate barrier.

[0050] The technical advantages of the manufacturing method for a back-contact heterojunction solar cell according to the embodiments of the present disclosure are similar to those of the back-contact heterojunction solar cell according to the above-described embodiments, and therefore a detailed description thereof will be omitted here.

[0051] In describing this disclosure, terms such as "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" are used based on orientations and positional relationships in the drawings, and are intended to facilitate understanding of this disclosure, but do not imply a structure or operation in a specific orientation or positional relationship. Therefore, they are not intended to limit the scope of this disclosure.

[0052] Additionally, the terms "first" and "second" are for descriptive purposes only and do not imply the relative importance or number of particular technical features. Thus, a "first" or "second" feature may explicitly or implicitly include at least one of that feature. In describing this disclosure, "plurality" means at least two (e.g., two, three, etc.).

[0053] In this disclosure, unless otherwise specified, the terms "attach," "couple," "connect," "secure," and the like should be interpreted broadly. For example, they include fixed connection, detachable connection, integration, mechanical connection, electrical connection, communicative connection, direct connection, indirect connection through an intermediate medium, communication between two elements, or an interactive relationship between two elements. The specific meaning of these terms will be understood by one of ordinary skill in the art depending on the specific situation.

[0054] In this disclosure, unless otherwise specified, when a first feature is "above" or "below" a second feature, it can mean that the first and second features are in direct contact or indirect contact via an intermediate medium. Also, when a first feature is "above," "above," or "on top of" a second feature, it can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is horizontally higher than the second feature. Similarly, when a first feature is "below," "below," or "on bottom" a second feature, it can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is horizontally lower than the second feature.

[0055] As used herein, the terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" mean that a particular feature, structure, material, or characteristic described in the relevant embodiment or example is included in at least one embodiment or example of the present disclosure. In this specification, the exemplary expressions of the terms may correspond to different embodiments or examples. Furthermore, specific features, structures, materials, or characteristics described may be combined in any appropriate manner in one or more embodiments or examples. Furthermore, unless mutually inconsistent, those skilled in the art may combine different embodiments or examples described herein, and features of different embodiments or examples.

[0056] Furthermore, the terms "first" and "second" are used for descriptive purposes only and do not imply relative importance or the quantity of the specified technical features. Thus, features qualified as "first" or "second" may explicitly or implicitly include at least one feature. In the description of this disclosure, "plurality" means at least two, such as two or three, but is not limited thereto unless expressly limited otherwise.

[0057] Although embodiments of the present disclosure have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present disclosure. The scope of the present disclosure is limited by the claims and their equivalents. [Explanation of symbols]

[0058] 1 board 2. First intrinsic amorphous silicon passivation layer 3. Second intrinsic amorphous silicon passivation layer 4 Anti-reflection layer 5 N-type amorphous silicon layer 51 N area 6 P-type amorphous silicon layer 61 P area 7 Transparent conductive layer 8. First intrinsic amorphous silicon passivation isolation layer 81 Inner isolation groove 9 Second intrinsic amorphous silicon passivation isolation layer 91 Second Isolation Ditch 10 The First Mask 20 The Second Mask 30 The Third Mask 40 The Fourth Mask 50 The Fifth Mask 60 The Sixth Mask 70 The Seventh Mask 100 Outer isolation groove

Claims

1. 1. A back contact heterojunction solar cell comprising: a substrate, a first intrinsic amorphous silicon passivation layer, an anti-reflective layer, a second intrinsic amorphous silicon passivation layer, a doped layer, a transparent conductive layer, and a first intrinsic amorphous silicon passivation isolation layer; the first intrinsic amorphous silicon passivation layer and the anti-reflection layer are sequentially deposited on the light incident surface of the substrate; the second intrinsic amorphous silicon passivation layer and the doped layer are sequentially deposited on the back surface of the substrate, the doped layer including a plurality of alternating P and N regions, the transparent conductive layer being deposited on the P and N regions, any adjacent P and N regions being spaced apart to form a first isolation trench; the first intrinsic amorphous silicon passivation isolation layer has a one-to-one correspondence with the first isolation trench, and the first intrinsic amorphous silicon passivation isolation layer is filled in the corresponding first isolation trench; a first isolation trench extending through the second intrinsic amorphous silicon passivation layer along a thickness direction of the substrate and at least a portion of the first isolation trench being located in the substrate, the first intrinsic amorphous silicon passivation isolation layer filling the portion of the first isolation trench located in the substrate, the first isolation trench including an inner isolation trench located in the substrate and the second intrinsic amorphous silicon passivation layer and an outer isolation trench located in the doped layer, wherein a width D of the inner isolation trench is 0<D<10 nm and a width D of the outer isolation trench is greater than 10 nm.

2. the doped layer includes a P-type amorphous silicon layer constituting the P region and an N-type amorphous silicon layer constituting the N region; 10. The back contact heterojunction solar cell of claim 1, wherein at least a portion of said first intrinsic amorphous silicon passivation isolation layer fills said first isolation trenches.

3. 3. The back contact heterojunction solar cell of claim 2, wherein the first intrinsic amorphous silicon passivation isolation layer is a silicon thin film composed of one of intrinsic amorphous silicon, nc-Si:H, and μc-Si:H.

4. 10. The back contact heterojunction solar cell of claim 1, wherein said first isolation trenches have a depth within said substrate equal to a thickness of said substrate.

5. 10. The back contact heterojunction solar cell of claim 1, wherein said substrate is an N-type substrate and said P region has an area greater than an area of ​​said N region.

6. depositing a first intrinsic amorphous silicon passivation layer and a second intrinsic amorphous silicon passivation layer on the light incident surface and the back surface of the substrate, respectively, and further depositing an anti-reflection layer on the first intrinsic amorphous silicon passivation layer; depositing N-type amorphous silicon and P-type amorphous silicon on the second intrinsic amorphous silicon passivation layer using a first mask and a second mask, respectively; a groove forming step of forming a first isolation trench at a boundary between the N-type amorphous silicon and the P-type amorphous silicon by laser etching, the first isolation trench extending into the substrate to form an inner isolation trench located in the substrate and the second intrinsic amorphous silicon passivation layer and an outer isolation trench located between the N-type amorphous silicon and the P-type amorphous silicon, the N-type amorphous silicon and the P-type amorphous silicon forming an N region and a P region, respectively, and the depth of the inner isolation trench being equal to or less than the thickness of the second intrinsic amorphous silicon passivation layer and the thickness of the substrate; depositing intrinsic amorphous silicon in the inner isolation trench and the outer isolation trench to obtain a first intrinsic amorphous silicon passivation isolation layer; 2. A method for fabricating a back contact heterojunction solar cell, comprising:

7. providing a third mask on the first intrinsic amorphous silicon passivation isolation layer and depositing a transparent conductive layer using physical vapor deposition; The method of claim 6 , further comprising stripping the third mask to form a back contact heterojunction solar cell with an intermediate barrier.

8. sequentially depositing a first intrinsic amorphous silicon passivation layer and an anti-reflective layer on the light incident surface of the substrate; placing a fourth mask on the back surface of the substrate and etching the fourth mask and the substrate using laser etching to form second isolation trenches; depositing intrinsic amorphous silicon in the second isolation trench to obtain a second intrinsic amorphous silicon passivation isolation layer; removing the fourth mask and depositing a second intrinsic amorphous silicon passivation layer on the backside of the substrate; depositing N-type amorphous silicon and P-type amorphous silicon on the second intrinsic amorphous silicon passivation layer using a fifth mask and a sixth mask, respectively, to form spaced apart N and P regions; depositing the intrinsic amorphous silicon in the gap between the N region and the P region to obtain a first intrinsic amorphous silicon passivation isolation layer; 2. A method for fabricating a back contact heterojunction solar cell, comprising:

9. providing a seventh mask on the first intrinsic amorphous silicon passivation isolation layer and depositing a transparent conductive layer using physical vapor deposition; The method of claim 8 , further comprising stripping the seventh mask to form a back contact heterojunction solar cell with an intermediate barrier.

Images