Chip resistor and its manufacturing method

Abstract

A chip resistor (1) comprises a resistive body (10), a first electrically conductive underlying layer (17), a second electrically conductive underlying layer (18), a first electrode (20), and a second electrode (25). The first electrode (20) includes a first electrode layer (21). The second electrode (25) includes a second electrode layer (26). A first electric resistivity of the first electrically conductive underlying layer (17) is greater than a second electric resistivity of the first electrode layer (21) and is greater than a third electric resistivity of the resistive body (10). A fourth electric resistivity of the second electrically conductive underlying layer (18) is greater than a fifth electric resistivity of the second electrode layer (26) and is greater than a third electric resistivity of the resistive body (10).

Description

[Technical Field]

[0001] The present disclosure relates to a chip resistor and a method for manufacturing the same. [Background technology]

[0002] Japanese Patent Application Laid-Open Publication No. 2018-4267 (Patent Document 1) discloses a shunt resistor including a resistor, a first electrode, and a second electrode. The first electrode covers one end of the resistor. The second electrode covers the other end of the resistor opposite to the one end of the resistor. The first electrode and the second electrode are spaced apart from each other. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2018-4267 Summary of the Invention [Problem to be solved by the invention]

[0004] The resistance value of the shunt resistor described in Patent Document 1 is determined by the electrical resistivity of the resistor, the cross-sectional area of ​​the resistor, and the distance between the first and second electrodes. If the areas of the first and second electrodes are increased to improve the heat dissipation of the shunt resistor described in Patent Document 1, the distance between the first and second electrodes will decrease, causing the resistance value of the shunt resistor to deviate from the designed resistance value. The present disclosure has been made in consideration of the above-mentioned problems, and its purpose is to provide a chip resistor with improved heat dissipation independent of the resistance value. [Means for solving the problem]

[0005] The chip resistor of the present disclosure includes a resistor, a first conductive underlayer, a second conductive underlayer, a first electrode, and a second electrode. The resistor includes a first main surface, a second main surface opposite the first main surface, a first side surface connected to the first and second main surfaces, and a second side surface opposite the first side surface. The second side surface is connected to the first and second main surfaces. The first conductive underlayer is provided on the first main surface of the resistor. The second conductive underlayer is provided on the first main surface of the resistor and is spaced apart from the first conductive underlayer. The first electrode is provided on the first side surface of the resistor and is spaced apart from the second conductive underlayer. The second electrode is provided on the second side surface of the resistor and is spaced apart from the first conductive underlayer and the first electrode. The first electrode includes a first electrode layer provided on the first main surface of the resistor and on the first conductive underlayer. The second electrode includes a second electrode layer provided on the first main surface of the resistor and on the second conductive underlayer. The first electrical resistivity of the first conductive underlayer is greater than the second electrical resistivity of the first electrode layer and greater than the third electrical resistivity of the resistor. The fourth electrical resistivity of the second conductive underlayer is greater than the fifth electrical resistivity of the second electrode layer and greater than the third electrical resistivity of the resistor.

[0006] A method for manufacturing a chip resistor according to the present disclosure includes forming a first conductive underlayer and a second conductive underlayer spaced apart from the first conductive underlayer on a first main surface of a resistor strip, forming a first conductive film on the first conductive underlayer, the second conductive underlayer, and on portions of the first main surface exposed from the first and second conductive underlayers, and dividing the resistor strip to form resistors each having a first side surface and a second side surface. By dividing the resistor strip, the first conductive film is divided into a first electrode layer proximate to the first side surface and a second electrode layer proximate to the second side surface and spaced apart from the first electrode layer. The first electrical resistivity of the first conductive underlayer is greater than the second electrical resistivity of the first electrode layer and greater than the third electrical resistivity of the resistor. The fourth electrical resistivity of the second conductive underlayer is greater than the fifth electrical resistivity of the second electrode layer and greater than the third electrical resistivity of the resistor. [Effects of the Invention]

[0007] According to the chip resistor of the present disclosure, the heat dissipation performance of the chip resistor can be improved independently of the resistance value of the chip resistor. According to the manufacturing method of the chip resistor of the present disclosure, a chip resistor having improved heat dissipation performance independent of the resistance value can be obtained. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a schematic bottom view of the chip resistor of the first embodiment. FIG. [Figure 2] 2 is a schematic cross-sectional view of the chip resistor of the first embodiment taken along the cross-sectional line II-II shown in FIG. 1. [Figure 3] 1 is a schematic cross-sectional view of a chip resistor according to a first embodiment mounted on a circuit board. [Figure 4] 1 is a schematic plan view showing one step of the method for manufacturing the chip resistors according to the first to fourth embodiments. [Figure 5] 5 is a schematic bottom view showing a step subsequent to the step shown in FIG. 4 in the method for manufacturing the chip resistor according to the first to third embodiments. [Figure 6] 28 is a schematic plan view showing the next step after the step shown in FIG. 4 in the method for manufacturing chip resistors according to embodiments 1 to 3, and is a schematic plan view showing the next step after the step shown in FIG. 28 in the method for manufacturing chip resistors according to embodiment 4. [Figure 7] 7 is a schematic bottom view showing a step subsequent to the step shown in FIGS. 5 and 6 in the method for manufacturing the chip resistor according to the first to third embodiments. FIG. [Figure 8] This is a schematic bottom view showing the next step after the step shown in Figure 7 in the manufacturing method of the chip resistor of embodiment 1, a schematic bottom view showing the next step after the step shown in Figure 17 in the manufacturing method of the chip resistor of embodiment 2, and a schematic bottom view showing the next step after the step shown in Figure 24 in the manufacturing method of the chip resistor of embodiment 3. [Figure 9]29 is a schematic plan view showing the next step after the step shown in FIG. 7 in the method for manufacturing a chip resistor according to embodiment 1, and a schematic bottom view showing the next step after the steps shown in FIG. 6 and FIG. 29 in the method for manufacturing a chip resistor according to embodiment 4. [Figure 10] This is a schematic bottom view showing the next step after the step shown in Figures 8 and 9 in the manufacturing method of a chip resistor of embodiment 1, a schematic bottom view showing the next step after the step shown in Figures 8 and 18 in the manufacturing method of a chip resistor of embodiment 2, and a schematic bottom view showing the next step after the step shown in Figures 8 and 25 in the manufacturing method of a chip resistor of embodiment 3. [Figure 11] 30 is a schematic plan view showing the next step after the step shown in FIGS. 8 and 9 in the method for manufacturing a chip resistor of embodiment 1, and a schematic bottom view showing the next step after the step shown in FIGS. 9 and 30 in the method for manufacturing a chip resistor of embodiment 4. [Figure 12] 10 and 11 in the method for manufacturing the chip resistor of embodiment 1; and FIG. 19 is a schematic bottom view showing the next step after the step shown in FIG. 10 and FIG. 19 in the method for manufacturing the chip resistor of embodiment 2 and embodiment 3. [Figure 13] 10 and 11 in the method for manufacturing a chip resistor according to embodiment 1; and FIG. 31 is a schematic plan view showing the next step after the step shown in FIGS. 11 and 31 in the method for manufacturing a chip resistor according to embodiment 4. [Figure 14] FIG. 10 is a schematic plan view of a chip resistor according to a second embodiment. [Figure 15] 15 is a schematic cross-sectional view of the chip resistor of the second embodiment taken along the cross-sectional line XV-XV shown in FIG. 14. [Figure 16] 7 is a schematic plan view showing a step subsequent to the step shown in FIGS. 5 and 6 in the method for manufacturing the chip resistor according to the second embodiment. FIG. [Figure 17] 17 is a schematic plan view showing a step subsequent to the step shown in FIGS. 7 and 16 in the method for manufacturing the chip resistor according to the second embodiment. FIG. [Figure 18]18 is a schematic plan view showing a step subsequent to the step shown in FIG. 17 in the method for manufacturing the chip resistor according to the second embodiment. [Figure 19] 25A and 25B are schematic plan views showing the next steps after the steps shown in FIGS. 8 and 18 in the method for manufacturing a chip resistor according to embodiment 2, and are schematic plan views showing the next steps after the steps shown in FIGS. 8 and 25 in the method for manufacturing a chip resistor according to embodiment 3. [Figure 20] 19 in the method for manufacturing the chip resistors according to the second and third embodiments. FIG. [Figure 21] FIG. 10 is a schematic plan view of a chip resistor according to a third embodiment. [Figure 22] 22 is a schematic cross-sectional view of the chip resistor of the third embodiment taken along the cross-sectional line XXII-XXII shown in FIG. 21. [Figure 23] 7 is a schematic plan view showing a step subsequent to the step shown in FIGS. 5 and 6 in the method for manufacturing the chip resistor according to the third embodiment. FIG. [Figure 24] 24 is a schematic plan view showing a step subsequent to the step shown in FIGS. 7 and 23 in the method for manufacturing the chip resistor according to the third embodiment. FIG. [Figure 25] 25 is a schematic plan view showing a step subsequent to the step shown in FIG. 24 in the method for manufacturing the chip resistor according to the third embodiment. FIG. [Figure 26] FIG. 10 is a schematic plan view of a chip resistor according to a fourth embodiment. [Figure 27] 27 is a schematic cross-sectional view of the chip resistor of the fourth embodiment taken along the cross-sectional line XXVII-XXVII shown in FIG. 26. [Figure 28] 10 is a schematic plan view showing a step subsequent to the step shown in FIG. 4 in the method for manufacturing the chip resistor according to the fourth embodiment. [Figure 29] 29 is a schematic bottom view showing a step subsequent to the step shown in FIG. 28 in the method for manufacturing the chip resistor according to the fourth embodiment. FIG. [Figure 30] 30 is a schematic bottom view showing a step subsequent to the steps shown in FIGS. 6 and 29 in the method for manufacturing the chip resistor according to the fourth embodiment. FIG. [Figure 31]31 is a schematic bottom view showing a step subsequent to the step shown in FIGS. 9 and 30 in the method for manufacturing the chip resistor according to the fourth embodiment. FIG. [Figure 32] 32 is a schematic bottom view showing a step subsequent to the step shown in FIGS. 11 and 31 in the method for manufacturing the chip resistor according to the fourth embodiment. FIG. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments will be described, in which the same reference numerals are used to denote the same components, and the description thereof will not be repeated.

[0010] (Embodiment 1) A chip resistor 1 according to a first embodiment will be described with reference to Figures 1 and 2. The chip resistor 1 is, for example, a chip resistor suitable for current detection. The chip resistor 1 is, for example, a shunt resistor. The chip resistor 1 includes a resistive element 10, a first conductive base layer 17, a second conductive base layer 18, a first electrode 20, and a second electrode 25. The chip resistor 1 may further include a first insulating layer 15, a second insulating layer 16, and an insulating coating film 30.

[0011] The resistor 10 is formed of an electrical resistance material such as a Cu-Mn alloy, a Cu-Ni alloy, or a Ni-Cr alloy. The resistor 10 includes a first main surface 11, a second main surface 12 opposite the first main surface 11, a first side surface 13a, a second side surface 13b opposite the first side surface 13a, a third side surface 14a, and a fourth side surface 14b opposite the third side surface 14a. The first main surface 11 and the second main surface 12 each extend along a first direction (x-direction) and a second direction (y-direction) perpendicular to the first direction (x-direction). The first direction (x-direction) is, for example, the longitudinal direction of the resistor 10. The second direction (y-direction) is, for example, the lateral direction of the resistor 10. The first main surface 11 and the second main surface 12 are spaced apart from each other in a third direction (z direction) perpendicular to the first direction (x direction) and the second direction (y direction). The third direction (z direction) is the thickness direction of the resistor 10. When the chip resistor 1 is mounted on a circuit board 50 (see FIG. 3), the first main surface 11 of the resistor 10 faces the circuit board 50.

[0012] The first side surface 13a is connected to the first main surface 11 and the second main surface 12. The second side surface 13b is connected to the first main surface 11 and the second main surface 12. The first side surface 13a and the second side surface 13b are spaced apart from each other in the first direction (x direction). The third side surface 14a is connected to the first main surface 11 and the second main surface 12, and is also connected to the first side surface 13a and the second side surface 13b. The fourth side surface 14b is connected to the first main surface 11 and the second main surface 12, and is also connected to the first side surface 13a and the second side surface 13b. The third side surface 14a and the fourth side surface 14b are spaced apart from each other in the second direction (y direction). The resistor 10 includes a central portion 10m that is exposed from the first electrode 20 and the second electrode 25 in a plan view of the first main surface 11. The central portion 10m is disposed between the first electrode 20 and the second electrode 25 in the first direction (x direction).

[0013] The first insulating layer 15 is provided on the first main surface 11 of the resistor 10. The first insulating layer 15 is disposed between the first electrode 20 and the second electrode 25, separating the first electrode 20 and the second electrode 25 from each other. The first insulating layer 15 is disposed between the first electrode layer 21 and the second electrode layer 26, separating the first electrode layer 21 and the second electrode layer 26 from each other. The first insulating layer 15 is disposed between the first conductive underlayer 17 and the second conductive underlayer 18, separating the first conductive underlayer 17 and the second conductive underlayer 18 from each other. The first insulating layer 15 is formed on the central portion 10m of the resistor 10. The first insulating layer 15 protects the resistor 10. The first insulating layer 15 includes a first end 15a proximate to the first side surface 13a of the resistor 10 and a second end 15b proximate to the second side surface 13b of the resistor 10. The first insulating layer 15 is formed of an insulating resin such as an epoxy resin.

[0014] The second insulating layer 16 is provided on the second major surface 12 of the resistor 10. The second insulating layer 16 is disposed between the first electrode 20 and the second electrode 25, separating the first electrode 20 and the second electrode 25 from each other. The second insulating layer 16 is disposed between the third electrode layer 22 and the fourth electrode layer 27, separating the third electrode layer 22 and the fourth electrode layer 27 from each other. The second insulating layer 16 is formed on the central portion 10m of the resistor 10. The second insulating layer 16 protects the resistor 10. The second insulating layer 16 includes a third end 16a proximate to the second side surface 13b of the resistor 10 and a fourth end 16b proximate to the first side surface 13a of the resistor 10. The third end 16a of the second insulating layer 16 may contact the fourth electrode layer 27. A fourth end 16b of the second insulating layer 16 may be in contact with the third electrode layer 22. The second insulating layer 16 is formed from an insulating resin such as an epoxy resin.

[0015] The insulating coating film 30 covers the third side surface 14a of the resistor 10, the fourth side surface 14b of the resistor 10, a first strip region of the first main surface 11 of the resistor 10 that is close to the third side surface 14a, a second strip region of the first main surface 11 of the resistor 10 that is close to the fourth side surface 14b, a third strip region of the second main surface 12 of the resistor 10 that is close to the third side surface 14a, and a fourth strip region of the second main surface 12 of the resistor 10 that is close to the fourth side surface 14b. The longitudinal directions of the first strip region, second strip region, third strip region, and fourth strip region are the first direction (x direction). The insulating coating film 30 protects the resistor 10. The insulating coating film 30 is formed of an insulating resin such as epoxy resin.

[0016] The first conductive underlayer 17 is provided on the first main surface 11 of the resistor 10. The first conductive underlayer 17 is formed on a region of the first main surface 11 of the resistor 10 that is closer to the first side surface 13a of the resistor 10 than the central portion 10m of the resistor 10. The first conductive underlayer 17 includes an end 17a that is closer to the first side surface 13a of the resistor 10 and an end 17b that is closer to the central portion 10m of the resistor 10. The first conductive underlayer 17 is also provided on the first insulating layer 15. The first end 15a of the first insulating layer 15 is covered by the first conductive underlayer 17. The end 17b of the first conductive underlayer 17 is exposed from the first insulating layer 15. The ends 17a, 17b of the first conductive underlayer 17 are covered by the first electrode layer 21. The first conductive foundation layer 17 is formed, for example, from a conductive resin containing a binder resin (for example, an epoxy resin, a phenolic resin, or a polyimide resin) and conductive particles (for example, silver particles) dispersed in the binder resin.

[0017] The first electrical resistivity of the first conductive underlayer 17 is greater than the second electrical resistivity of the first electrode layer 21 and greater than the third electrical resistivity of the resistor 10. Therefore, when a current flows through the chip resistor 1, almost no current flows through the first conductive underlayer 17. The first conductive underlayer 17 does not substantially change the resistance value of the chip resistor 1.

[0018] The first electrical resistivity of the first conductive underlayer 17 is, for example, 10 times or more the second electrical resistivity of the first electrode layer 21. The first electrical resistivity of the first conductive underlayer 17 may be 20 times or more, 50 times or more, or 100 times or more the second electrical resistivity of the first electrode layer 21. The first electrical resistivity of the first conductive underlayer 17 is, for example, 5 times or more the third electrical resistivity of the resistor 10. The first electrical resistivity of the first conductive underlayer 17 may be 10 times or more, 25 times or more, or 50 times or more the third electrical resistivity of the resistor 10.

[0019] The second conductive underlayer 18 is provided on the first main surface 11 of the resistor 10. The second conductive underlayer 18 is formed on a region of the first main surface 11 of the resistor 10 that is closer to the second side surface 13b of the resistor 10 than the central portion 10m of the resistor 10. The second conductive underlayer 18 includes an end 18a that is closer to the second side surface 13b of the resistor 10 and an end 18b that is closer to the central portion 10m of the resistor 10. The second conductive underlayer 18 is also provided on the first insulating layer 15. The second end 15b of the first insulating layer 15 is covered by the second conductive underlayer 18. The end 18b of the second conductive underlayer 18 is exposed from the first insulating layer 15. The ends 18a, 18b of the second conductive underlayer 18 are covered by the second electrode layer 26. The second conductive base layer 18 is spaced apart in the first direction (x direction) from the first conductive base layer 17. The second conductive base layer 18 is formed of, for example, a conductive resin containing a binder resin (e.g., epoxy resin, phenolic resin, or polyimide resin) and conductive particles (e.g., silver particles) dispersed in the binder resin.

[0020] The fourth electrical resistivity of the second conductive base layer 18 is greater than the fifth electrical resistivity of the second electrode layer 26 and greater than the third electrical resistivity of the resistor 10. Therefore, when a current flows through the chip resistor 1, almost no current flows through the second conductive base layer 18. The second conductive base layer 18 does not substantially change the resistance value of the chip resistor 1.

[0021] The fourth electrical resistivity of the second conductive underlayer 18 is, for example, 10 times or more the fifth electrical resistivity of the second electrode layer 26. The fourth electrical resistivity of the second conductive underlayer 18 may be 20 times or more, 50 times or more, or 100 times or more the fifth electrical resistivity of the second electrode layer 26. The fourth electrical resistivity of the second conductive underlayer 18 is, for example, 5 times or more the third electrical resistivity of the resistor 10. The fourth electrical resistivity of the second conductive underlayer 18 may be 10 times or more, 25 times or more, or 50 times or more the third electrical resistivity of the resistor 10.

[0022] The first electrode 20 is provided on the first side surface 13a side of the resistor 10. The first electrode 20 is closer to the first side surface 13a of the resistor 10 than the central portion 10m of the resistor 10 in the first direction (x direction). The first electrode 20 extends along the first side surface 13a of the resistor 10. The first electrode 20 is spaced apart from the second conductive base layer 18 and the second electrode 25 in the first direction (x direction). The first electrode 20 includes a first electrode layer 21, a third electrode layer 22, and a first metal thin film layer 23.

[0023] The first electrode layer 21 is provided on the first main surface 11 of the resistor 10 and on the first conductive base layer 17. The first electrode layer 21 is proximate to the first side surface 13a of the resistor 10 and extends along the first side surface 13a of the resistor 10. In a plan view of the first main surface 11 or the second main surface 12, a first portion 21m of the first electrode layer 21 that is in contact with the resistor 10 and closest to the central portion 10m of the resistor 10 is closer to the central portion 10m of the resistor 10 than a third portion 22m of the third electrode layer 22 that is in contact with the resistor 10 and closest to the central portion 10m of the resistor 10, or is flush with the third portion 22m of the third electrode layer 22.

[0024] The thickness of the first electrode layer 21 on the first conductive base layer 17 is the same as the thickness of the first electrode layer 21 on the first main surface 11 of the resistor 10. Goodbye The thickness of the first electrode layer 21 on the first conductive base layer 17 is, for example, 0.1 times or less the thickness of the first electrode layer 21 on the first main surface 11 of the resistor 10. The second electrical resistivity of the first electrode layer 21 is smaller than the third electrical resistivity of the resistor 10. The first electrode layer 21 is formed of a metal such as copper. The first electrode layer 21 is, for example, a plated layer.

[0025] The third electrode layer 22 is provided on the second main surface 12 of the resistor 10. The ninth electrical resistivity of the third electrode layer 22 is smaller than the third electrical resistivity of the resistor 10. The third electrode layer 22 is formed of a metal such as copper. The third electrode layer 22 is, for example, a plating layer.

[0026] The first metal thin film layer 23 electrically connects the first electrode layer 21 and the third electrode layer 22 to each other. The first metal thin film layer 23 covers the first electrode layer 21, the third electrode layer 22, and the first side surface 13a of the resistor 10. The first metal thin film layer 23 is formed of a conductive material containing tin, such as a solder layer. The first metal thin film layer 23 is, for example, a plating layer.

[0027] The second electrode 25 is provided on the second side surface 13b side of the resistor 10. The second electrode 25 is closer to the second side surface 13b of the resistor 10 than the central portion 10m of the resistor 10 in the first direction (x direction). The second electrode 25 extends along the second side surface 13b of the resistor 10. The second electrode 25 is spaced apart from the first conductive base layer 17 and the first electrode 20 in the first direction (x direction). The second electrode 25 includes a second electrode layer 26, a fourth electrode layer 27, and a second metal thin film layer 28.

[0028] The second electrode layer 26 is provided on the first main surface 11 of the resistor 10 and on the second conductive base layer 18. The second electrode layer 26 is proximate to the second side surface 13b of the resistor 10 and extends along the second side surface 13b of the resistor 10. In a plan view of the first main surface 11 or the second main surface 12, a second portion 26m of the second electrode layer 26 that is in contact with the resistor 10 and closest to the central portion 10m of the resistor 10 is closer to the central portion 10m of the resistor 10 than a fourth portion 27m of the fourth electrode layer 27 that is in contact with the resistor 10 and closest to the central portion 10m of the resistor 10, or is flush with the fourth portion 27m of the fourth electrode layer 27.

[0029] The thickness of the second electrode layer 26 on the second conductive underlayer 18 is 1 / 2 times the thickness of the second electrode layer 26 on the first main surface 11 of the resistor 10. Goodbye The thickness of the second electrode layer 26 on the second conductive base layer 18 is, for example, 0.1 times or less the thickness of the second electrode layer 26 on the first main surface 11 of the resistor 10. The fifth electrical resistivity of the second electrode layer 26 is smaller than the third electrical resistivity of the resistor 10. The second electrode layer 26 is formed of a metal such as copper. The second electrode layer 26 is, for example, a plated layer.

[0030] The fourth electrode layer 27 is provided on the second main surface 12 of the resistor 10. The fourth electrode layer 27 is spaced apart from the third electrode layer 22 in the first direction (x direction). The seventh electrical resistivity of the fourth electrode layer 27 is smaller than the third electrical resistivity of the resistor 10. The fourth electrode layer 27 is made of a metal such as copper. The fourth electrode layer 27 is, for example, a plating layer.

[0031] The second metal thin film layer 28 electrically connects the second electrode layer 26 and the fourth electrode layer 27 to each other. The second metal thin film layer 28 covers the second electrode layer 26, the fourth electrode layer 27, and the second side surface 13b of the resistor 10. The second metal thin film layer 28 is formed of a conductive material containing tin, such as a solder layer. The second metal thin film layer 28 is, for example, a plating layer.

[0032] A first portion 21m of the first electrode layer 21, which is in contact with the resistor 10 and closest to the central portion 10m of the resistor 10, is closer to the central portion 10m of the resistor 10 than a third portion 22m of the third electrode layer 22, which is in contact with the resistor 10 and closest to the central portion 10m of the resistor 10, or is flush with the third portion 22m of the third electrode layer 22. A second portion 26m of the second electrode layer 26, which is in contact with the resistor 10 and closest to the central portion 10m of the resistor 10, is closer to the central portion 10m of the resistor 10 than a fourth portion 27m of the fourth electrode layer 27, which is in contact with the resistor 10 and closest to the central portion 10m of the resistor 10, or is flush with the fourth portion 27m of the fourth electrode layer 27. Therefore, the resistance value of the chip resistor 1 depends on the distance L between the first portion 21m of the first electrode layer 21 and the second portion 26m of the second electrode layer 26 (see FIG. 2).

[0033] In contrast, as already described, the first conductive base layer 17 and the second conductive base layer 18 do not substantially change the resistance value of the chip resistor 1. In other words, even if the size of the first conductive base layer 17 and the size of the second conductive base layer 18 change, the resistance value of the chip resistor 1 does not substantially change as long as the distance L does not change.

[0034] Therefore, the resistance value of the chip resistor 1 depends on the distance L, but does not depend on the size of the first electrode 20 (first electrode layer 21) or the second electrode 25 (second electrode layer 26). The heat dissipation performance of the chip resistor 1 can be improved independently of the resistance value of the chip resistor 1.

[0035] 3, the chip resistor 1 is mounted on, for example, a circuit board 50. Specifically, the circuit board 50 includes an insulating substrate 51 and conductive wirings 52 and 53. The first electrode 20 of the chip resistor 1 is joined to the conductive wiring 52 of the circuit board 50 using a joining member 54 such as solder. The second electrode 25 of the chip resistor 1 is joined to the conductive wiring 53 of the circuit board 50 using a joining member 55 such as solder.

[0036] An example of a method for manufacturing the chip resistor 1 of this embodiment will be described with reference to FIGS.

[0037] Referring to FIG. 4, the method for manufacturing the chip resistor 1 of this embodiment includes preparing a resistor frame 5. The resistor frame 5 is made of an electrical resistance material such as a Cu-Mn alloy, a Cu-Ni alloy, or a Ni-Cr alloy. The resistor frame 5 includes a plurality of resistor strips 10a. The longitudinal direction of the resistor strips 10a is a first direction (x direction). Each of the resistor strips 10a includes a first main surface 11, a second main surface 12 opposite the first main surface 11, a third side surface 14a, and a fourth side surface 14b opposite the third side surface 14a.

[0038] 5 and 6, the method for manufacturing the chip resistor 1 of this embodiment includes forming a first insulating layer 15 on the first main surface 11 of the resistor strip 10a and forming a second insulating layer 16 on the second main surface 12 of the resistor strip 10a. The first insulating layer 15 includes a first end 15a, which is an end of the first insulating layer 15 in the first direction (x-direction), and a second end 15b, which is an end of the first insulating layer 15 in the first direction (x-direction) and is opposite the first end 15a. The second insulating layer 16 includes a third end 16a, which is an end of the second insulating layer 16 in the first direction (x-direction), and a fourth end 16b, which is an end of the second insulating layer 16 in the first direction (x-direction) and is opposite the third end 16a.

[0039] The first insulating layer 15 and the second insulating layer 16 are formed of an insulating resin such as an epoxy resin, and are provided by printing such as screen printing.

[0040] Referring to FIG. 7 , the manufacturing method of the chip resistor 1 of this embodiment includes forming a first conductive underlayer 17 and a second conductive underlayer 18 on the first main surface 11 of the resistor strip 10a. The first conductive underlayer 17 and the second conductive underlayer 18 may be further formed on the first insulating layer 15. The first conductive underlayer 17 may cover a first end 15a of the first insulating layer 15. The second conductive underlayer 18 may cover a second end 15b of the first insulating layer 15. The first conductive underlayer 17 and the second conductive underlayer 18 are spaced apart from each other in the first direction (x-direction). The first conductive underlayer 17 and the second conductive underlayer 18 are formed of, for example, a conductive resin containing a binder resin (e.g., epoxy resin, phenolic resin, or polyimide resin) and conductive particles (e.g., silver particles) dispersed in the binder resin. The first conductive underlayer 17 and the second conductive underlayer 18 are provided by printing, such as screen printing.

[0041] 8 and 9, the manufacturing method of the chip resistor 1 of this embodiment includes forming an insulating coating film 30. The insulating coating film 30 covers the third side surface 14a and the fourth side surface 14b of the resistor strip 10a, a first strip-shaped region of the first main surface 11 of the resistor strip 10a that is close to the third side surface 14a, a second strip-shaped region of the first main surface 11 of the resistor strip 10a that is close to the fourth side surface 14b, a third strip-shaped region of the second main surface 12 of the resistor strip 10a that is close to the third side surface 14a, and a fourth strip-shaped region of the second main surface 12 of the resistor strip 10a that is close to the fourth side surface 14b. The insulating coating film 30 is formed of an insulating resin such as epoxy resin. The insulating coating film 30 is applied by, for example, dip coating or printing.

[0042] 10 and 11 , the manufacturing method of the chip resistor 1 of this embodiment includes forming a first conductive film 40 and a second conductive film 41. The first conductive film 40 is formed on the first conductive underlayer 17, the second conductive underlayer 18, and on portions of the first main surface 11 of the resistor 10 that are exposed from the first insulating layer 15, the insulating coating film 30, the first conductive underlayer 17, and the second conductive underlayer 18. The second conductive film 41 is formed on portions of the second main surface 12 of the resistor 10 that are exposed from the second insulating layer 16 and the insulating coating film 30. The first conductive film 40 and the second conductive film 41 are formed of a metal such as copper.

[0043] The first conductive film 40 and the second conductive film 41 are formed by, for example, plating. The first conductive film 40 and the second conductive film 41 are, for example, metal plating films. The resistor 10, the first conductive underlayer 17, and the second conductive underlayer 18 are electrically conductive, whereas the first insulating layer 15, the second insulating layer 16, and the insulating coating film 30 are electrically insulating. Therefore, the first conductive film 40 is selectively formed on the first conductive underlayer 17, the second conductive underlayer 18, and on portions of the first main surface 11 of the resistor 10 that are exposed from the first insulating layer 15, the insulating coating film 30, the first conductive underlayer 17, and the second conductive underlayer 18. The second conductive film 41 is selectively formed on portions of the second main surface 12 of the resistor 10 that are exposed from the second insulating layer 16 and the insulating coating film 30.

[0044] No. When the first conductive film 40 is formed by, for example, plating, the thickness of the first conductive film 40 on the first conductive underlayer 17 is much smaller than the thickness of the first conductive film 40 on the first main surface 11 of the resistor 10, and the thickness of the first conductive film 40 on the second conductive underlayer 18 is much smaller than the thickness of the first conductive film 40 on the first main surface 11 of the resistor 10. Goodbye becomes very small.

[0045] 12 and 13 , a method for manufacturing a chip resistor 1 according to this embodiment includes dividing a resistor strip 10a to form resistor elements 10 each including a first side surface 13a and a second side surface 13b. By dividing the resistor strip 10a, the first conductive film 40 is divided into a first electrode layer 21 adjacent to the first side surface 13a and a second electrode layer 26 adjacent to the second side surface 13b. The second electrode layer 26 is spaced apart from the first electrode layer 21 in the first direction (x-direction). By dividing the resistor strip 10a, the second conductive film 41 is divided into a third electrode layer 22 adjacent to the first side surface 13a and a fourth electrode layer 27 adjacent to the second side surface 13b. The fourth electrode layer 27 is spaced apart from the third electrode layer 22 in the first direction (x-direction).

[0046] The manufacturing method of the chip resistor 1 of this embodiment then includes forming a first metal thin film layer 23 and a second metal thin film layer 28. The first metal thin film layer 23 electrically connects the first electrode layer 21 and the third electrode layer 22 to each other. The first metal thin film layer 23 covers the first electrode layer 21, the third electrode layer 22, and the first side surface 13a of the resistor 10. The second metal thin film layer 28 electrically connects the second electrode layer 26 and the fourth electrode layer 27 to each other. The second metal thin film layer 28 covers the second electrode layer 26, the fourth electrode layer 27, and the second side surface 13b of the resistor 10. The first metal thin film layer 23 and the second metal thin film layer 28 are formed of a conductive material containing tin, such as a solder layer.

[0047] The first metal thin film layer 23 and the second metal thin film layer 28 are formed by, for example, plating. The first metal thin film layer 23 and the second metal thin film layer 28 are, for example, metal plating films. The first electrode layer 21, the second electrode layer 26, the resistor 10, the third electrode layer 22, and the fourth electrode layer 27 are conductive, while the first insulating layer 15, the second insulating layer 16, and the insulating coating film 30 are electrically insulating. Therefore, the first metal thin film layer 23 is selectively formed on the first electrode layer 21, the second electrode layer 26, and the first side surface 13a of the resistor 10. The second metal thin film layer 28 is selectively formed on the third electrode layer 22, the fourth electrode layer 27, and the second side surface 13b of the resistor 10. In this manner, the chip resistor 1 shown in FIGS. 1 and 2 is obtained.

[0048] The effects of the chip resistor 1 of this embodiment and the manufacturing method thereof will be described. The chip resistor 1 of this embodiment includes a resistor 10, a first conductive underlayer 17, a second conductive underlayer 18, a first electrode 20, and a second electrode 25. The resistor 10 includes a first main surface 11, a second main surface 12 opposite the first main surface 11, a first side surface 13a connected to the first main surface 11 and the second main surface 12, and a second side surface 13b opposite the first side surface 13a. The second side surface 13b is connected to the first main surface 11 and the second main surface 12. The first conductive underlayer 17 is provided on the first main surface 11 of the resistor 10. The second conductive underlayer 18 is provided on the first main surface 11 of the resistor 10 and is spaced apart from the first conductive underlayer 17. The first electrode 20 is provided on the first side surface 13a side of the resistor 10 and is spaced apart from the second conductive underlayer 18. The second electrode 25 is provided on the second side surface 13b of the resistor 10 and is spaced apart from the first conductive underlayer 17 and the first electrode 20. The first electrode 20 includes a first electrode layer 21 provided on the first main surface 11 of the resistor 10 and on the first conductive underlayer 17. The second electrode 25 includes a second electrode layer 26 provided on the first main surface 11 of the resistor 10 and on the second conductive underlayer 18. The first electrical resistivity of the first conductive underlayer 17 is greater than the second electrical resistivity of the first electrode layer 21 and is greater than the third electrical resistivity of the resistor 10. The fourth electrical resistivity of the second conductive underlayer 18 is greater than the fifth electrical resistivity of the second electrode layer 26 and is greater than the third electrical resistivity of the resistor 10.

[0049] Therefore, the resistance value of the chip resistor 1 depends on the distance L (see FIG. 2 ), but does not depend on the size of the first electrode 20 (first electrode layer 21) or the size of the second electrode 25 (second electrode layer 26). The first electrode layer 21 is provided not only on the first main surface 11 of the resistor 10 but also on the first conductive base layer 17. The second electrode layer 26 is provided not only on the first main surface 11 of the resistor 10 but also on the second conductive base layer 18. When the chip resistor 1 is bonded to a circuit board 50 (see FIG. 3 ), the chip resistor 1 can be bonded to the circuit board 50 over a wider bonding area. Heat generated in the chip resistor 1 can be efficiently dissipated to the circuit board 50. According to the chip resistor 1 of this embodiment, the heat dissipation performance of the chip resistor 1 can be improved independently of the resistance value of the chip resistor 1.

[0050] As described above, the resistance value of the chip resistor 1 depends on the distance L (see FIG. 2), but does not depend on the size of the first electrode 20 (first electrode layer 21) or the size of the second electrode 25 (second electrode layer 26). Therefore, the size of the first electrode 20 (first electrode layer 21) and the size of the second electrode 25 (second electrode layer 26) can be standardized among multiple chip resistors 1 having various distances L and various resistance values. The size of the conductive wiring 52 and the size of the conductive wiring 53 of the circuit board 50 (see FIG. 3) on which the chip resistor 1 is mounted can be standardized. This simplifies the design of the circuit board 50 on which the chip resistor 1 is mounted.

[0051] In the chip resistor 1 of this embodiment, the first conductive base layer 17 and the second conductive base layer 18 are formed of a conductive resin containing a binder resin and conductive particles (e.g., silver particles) dispersed in the binder resin. The first electrode layer 21 and the second electrode layer 26 are formed of a metal. Therefore, the heat dissipation performance of the chip resistor 1 can be improved independently of the resistance value of the chip resistor 1. The manufacturing cost of the chip resistor 1 can be reduced.

[0052] The chip resistor 1 of this embodiment further includes a first insulating layer 15 provided on the first main surface 11 of the resistor element 10. The first insulating layer 15 is disposed between the first electrode 20 and the second electrode 25, and is also disposed between the first conductive base layer 17 and the second conductive base layer 18.

[0053] The first insulating layer 15 protects the resistor 10, thereby extending the life of the chip resistor 1. The first insulating layer 15 prevents the first conductive base layer 17 and the second conductive base layer 18 from contacting each other, and prevents the first electrode layer 21 and the second electrode layer 26 from contacting each other.

[0054] In the chip resistor 1 of this embodiment, a first end 15a of the first insulating layer 15 proximate to the first side surface 13a of the resistor 10 is covered with a first conductive underlayer 17. A second end 15b of the first insulating layer 15 proximate to the second side surface 13b of the resistor 10 is covered with a second conductive underlayer 18. According to the chip resistor 1 of this embodiment, the heat dissipation performance of the chip resistor 1 can be improved independently of the resistance value of the chip resistor 1.

[0055] In the chip resistor 1 of this embodiment, the first electrode 20 further includes a third electrode layer 22 and a first metal thin film layer 23. The third electrode layer 22 is provided on the second main surface 12 of the resistor 10. The first metal thin film layer 23 electrically connects the first electrode layer 21 and the third electrode layer 22 to each other. The second electrode 25 further includes a fourth electrode layer 27 and a second metal thin film layer 28. The fourth electrode layer 27 is provided on the second main surface 12 of the resistor 10 and is spaced apart from the third electrode layer 22. The second metal thin film layer 28 electrically connects the second electrode layer 26 and the fourth electrode layer 27 to each other.

[0056] When the chip resistor 1 is mounted on a circuit board 50 (see FIG. 3), heat generated in the chip resistor 1 can be dissipated to the circuit board 50 not only from the first main surface 11 of the resistor element 10 but also from the second main surface 12 of the resistor element 10 through the third electrode layer 22, the first metal thin-film layer 23, the fourth electrode layer 27, and the second metal thin-film layer 28. This improves the heat dissipation performance of the chip resistor 1.

[0057] In the chip resistor 1 of this embodiment, the resistor 10 includes a central portion 10m exposed from the first electrode 20 and the second electrode 25 in a plan view of the first main surface 11. A first portion 21m of the first electrode layer 21, which is in contact with the resistor 10 and closest to the central portion 10m of the resistor 10, is closer to the central portion 10m of the resistor 10 than a third portion 22m of the third electrode layer 22, which is in contact with the resistor 10 and closest to the central portion 10m of the resistor 10, or is flush with the third portion 22m of the third electrode layer 22. The second portion 26m of the second electrode layer 26, which is in contact with the resistor 10 and closest to the central portion 10m of the resistor 10, is closer to the central portion 10m of the resistor 10 than the fourth portion 27m of the fourth electrode layer 27, which is in contact with the resistor 10 and closest to the central portion 10m of the resistor 10, or is flush with the fourth portion 27m of the fourth electrode layer 27.

[0058] The resistance value of the chip resistor 1 depends on the distance L between the first portion 21m of the first electrode layer 21 and the second portion 26m of the second electrode layer 26, but does not depend on the size of the first electrode 20 or the size of the second electrode 25. According to the chip resistor 1 of this embodiment, the heat dissipation performance of the chip resistor 1 can be improved independently of the resistance value of the chip resistor 1.

[0059] In the chip resistor 1 of this embodiment, the first metal thin film layer 23 and the second metal thin film layer 28 are formed of a conductive material containing tin, which makes it easy to mount the chip resistor 1 on a circuit board 50 (see FIG. 3) using solder.

[0060] The chip resistor 1 of this embodiment further includes a second insulating layer 16 provided on the second main surface 12 of the resistor element 10. The second insulating layer 16 is disposed between the third electrode layer 22 and the fourth electrode layer 27.

[0061] The second insulating layer 16 protects the resistor 10, thereby extending the life of the chip resistor 1. The second insulating layer 16 prevents the third electrode layer 22 and the fourth electrode layer 27 from contacting each other.

[0062] The chip resistor 1 of this embodiment is a shunt resistor. Therefore, the heat dissipation of the chip resistor 1 can be improved independently of the resistance value of the chip resistor 1. A chip resistor 1 suitable for current detection can be provided.

[0063] The method for manufacturing the chip resistor 1 of this embodiment includes forming a first conductive underlayer 17 and a second conductive underlayer 18 spaced apart from the first conductive underlayer 17 on the first main surface 11 of the resistor strip 10a, and forming a first conductive film 40 on the first conductive underlayer 17, the second conductive underlayer 18, and on portions of the first main surface 11 of the resistor strip 10a that are exposed from the first conductive underlayer 17 and the second conductive underlayer 18. The method for manufacturing the chip resistor 1 of this embodiment further includes dividing the resistor strip 10a to form resistor elements 10 each including a first side surface 13a and a second side surface 13b. By dividing the resistor strip 10a, the first conductive film 40 is divided into a first electrode layer 21 proximate to the first side surface 13a and a second electrode layer 26 proximate to the second side surface 13b and spaced apart from the first electrode layer 21. The first electrical resistivity of the first conductive base layer 17 is greater than the second electrical resistivity of the first electrode layer 21 and is greater than the third electrical resistivity of the resistor 10. The fourth electrical resistivity of the second conductive base layer 18 is greater than the fifth electrical resistivity of the second electrode layer 26 and is greater than the third electrical resistivity of the resistor 10.

[0064] Therefore, the resistance value of the chip resistor 1 depends on the distance L (see FIG. 2), but does not depend on the size of the first electrode layer 21 or the size of the second electrode layer 26. The first electrode layer 21 is provided not only on the first main surface 11 of the resistor 10 but also on the first conductive base layer 17. The second electrode layer 26 is provided not only on the first main surface 11 of the resistor 10 but also on the second conductive base layer 18. When the chip resistor 1 is bonded to a circuit board 50 (see FIG. 3), the chip resistor 1 can be bonded to the circuit board 50 over a wider bonding area. Heat generated in the chip resistor 1 can be efficiently dissipated to the circuit board 50. According to the manufacturing method of the chip resistor 1 of this embodiment, a chip resistor 1 with improved heat dissipation properties can be obtained, independent of the resistance value.

[0065] Furthermore, as described above, the resistance value of the chip resistor 1 depends on the distance L (see FIG. 2), but does not depend on the size of the first electrode layer 21 or the size of the second electrode layer 26. Therefore, the size of the first electrode layer 21 and the size of the second electrode layer 26 can be standardized among a plurality of chip resistors 1 having various distances L and various resistance values. The size of the conductive wiring 52 and the size of the conductive wiring 53 of the circuit board 50 (see FIG. 3) on which the chip resistor 1 is mounted can be standardized. This simplifies the design of the circuit board 50 (see FIG. 3) on which the chip resistor 1 is mounted.

[0066] In the method for manufacturing the chip resistor 1 of this embodiment, the first conductive base layer 17 and the second conductive base layer 18 are provided by printing. The first conductive film 40 is provided by plating. This improves the productivity of the chip resistor 1 and reduces the manufacturing cost of the chip resistor 1.

[0067] (Embodiment 2) A chip resistor 1b according to the second embodiment will be described with reference to Figures 14 and 15. The chip resistor 1b according to the present embodiment has a similar configuration to the chip resistor 1 according to the first embodiment, but differs in the following respects.

[0068] The chip resistor 1b further includes a third conductive base layer 33. The chip resistor 1b may further include a third insulating layer .

[0069] The third conductive underlayer 33 is provided on the second main surface 12 of the resistor 10 and on the second insulating layer 16. The third conductive underlayer 33 is in contact with the fourth electrode layer 27 and is spaced apart from the third electrode layer 22 in the first direction (x direction). A portion of the third conductive underlayer 33 is exposed from the third insulating layer 35. The third conductive underlayer 33 includes an end 33a proximate to the first side surface 13a. The end 33a of the third conductive underlayer 33 is covered by the third insulating layer 35. The end 33a of the third conductive underlayer 33 is spaced apart from the third electrode layer 22 in the first direction (x direction).

[0070] A third end 16a of the second insulating layer 16 proximate the second side surface 13b of the resistor 10 is covered with a third conductive underlayer 33. In a plan view of the second main surface 12 of the resistor 10, the third conductive underlayer 33 overlaps the second conductive underlayer 18. In a plan view of the second main surface 12 of the resistor 10, the third conductive underlayer 33 overlaps a central portion 10m of the resistor 10 in a first direction (x direction) in which the first electrode 20 and the second electrode 25 are spaced apart from each other. In a plan view of the second main surface 12 of the resistor 10, the third conductive underlayer 33 may overlap the first conductive underlayer 17. A fourth end 16b of the second insulating layer 16 proximate the first side surface 13a of the resistor 10 is exposed from the third conductive underlayer 33.

[0071] The sixth electrical resistivity of the third conductive base layer 33 is greater than the seventh electrical resistivity of the fourth electrode layer 27 and greater than the third electrical resistivity of the resistor 10. Therefore, when a current flows through the chip resistor 1, almost no current flows through the third conductive base layer 33. The third conductive base layer 33 does not substantially change the resistance value of the chip resistor 1.

[0072] The sixth electrical resistivity of the third conductive underlayer 33 is, for example, 10 times or more the seventh electrical resistivity of the fourth electrode layer 27. The sixth electrical resistivity of the third conductive underlayer 33 may be 20 times or more, 50 times or more, or 100 times or more the seventh electrical resistivity of the fourth electrode layer 27. The sixth electrical resistivity of the third conductive underlayer 33 is, for example, 5 times or more the third electrical resistivity of the resistor 10. The sixth electrical resistivity of the third conductive underlayer 33 may be 10 times or more, 25 times or more, or 50 times or more the third electrical resistivity of the resistor 10. The third conductive underlayer 33 is formed of a conductive resin containing a binder resin (e.g., epoxy resin, phenolic resin, or polyimide resin) and conductive particles (e.g., silver particles) dispersed in the binder resin.

[0073] The fourth electrode layer 27 is further provided on the third conductive underlayer 33. The thickness of the fourth electrode layer 27 on the third conductive underlayer 33 is equal to the thickness of the fourth electrode layer 27 on the first main surface 11 of the resistor 10. GoodbyeThe thickness of the fourth electrode layer 27 on the third conductive base layer 33 is, for example, 0.1 times or less the thickness of the fourth electrode layer 27 on the first main surface 11 of the resistor 10 .

[0074] The third insulating layer 35 is provided on the third conductive base layer 33 and on the second insulating layer 16. The third insulating layer 35 protects the third conductive base layer 33. The third insulating layer 35 is formed of an insulating resin such as an epoxy resin.

[0075] A method for manufacturing the chip resistor 1b of this embodiment will be described with reference to Figures 4 to 7 and Figures 14 to 20. The method for manufacturing the chip resistor 1b of this embodiment includes the same steps as the method for manufacturing the chip resistor 1 of embodiment 1, but differs mainly in the following points.

[0076] Chip resistor 1 of this embodiment b The manufacturing method of the chip resistor 1b of this embodiment includes the steps shown in Fig. 4 to Fig. 6. Referring to Fig. 7 and Fig. 16, the manufacturing method of the chip resistor 1b of this embodiment includes forming a first conductive underlayer 17 and a second conductive underlayer 18 on the first main surface 11 of the resistor strip 10a, and forming a third conductive underlayer 33 on the second main surface 12 of the resistor strip 10a and on the second insulating layer 16.

[0077] A third end 16a of the second insulating layer 16 is covered with a third conductive underlayer 33. In a plan view of the second main surface 12 of the resistor strip 10a, the third conductive underlayer 33 overlaps the second conductive underlayer 18. In a plan view of the second main surface 12 of the resistor strip 10a, the third conductive underlayer 33 may overlap the first conductive underlayer 17. A fourth end 16b of the second insulating layer 16 is exposed from the third conductive underlayer 33.

[0078] The third conductive base layer 33 is formed of, for example, a conductive resin containing a binder resin (for example, an epoxy resin, a phenolic resin, or a polyimide resin) and conductive particles (for example, silver particles) dispersed in the binder resin. The third conductive base layer 33 is provided by printing, for example, screen printing.

[0079] 17, the method for manufacturing the chip resistor 1b of this embodiment includes forming a third insulating layer 35 on the third conductive base layer 33 and the second insulating layer 16. A portion of the third conductive base layer 33 is exposed from the third insulating layer 35. The third insulating layer 35 is formed of an insulating resin such as an epoxy resin. The third insulating layer 35 is provided by printing, such as screen printing.

[0080] 8 and 18, the method for manufacturing the chip resistor 1b of the present embodiment includes forming an insulating coating film 30. The process for forming the insulating coating film 30 of the present embodiment is similar to the process for forming the insulating coating film 30 of embodiment 1. The insulating coating film 30 further covers a fifth strip-shaped region of the third insulating layer 35 that is proximate to the third side surface 14a and a sixth strip-shaped region of the third insulating layer 35 that is proximate to the fourth side surface 14b.

[0081] 10 and 19, the method for manufacturing the chip resistor 1b of the present embodiment, like the method for manufacturing the chip resistor 1 of the first embodiment, includes forming a first conductive film 40 and a second conductive film 41. The second conductive film 41 is formed on the third conductive base layer 33 and on a portion of the second main surface 12 of the resistor 10 that is exposed from the insulating coating film 30, the third insulating layer 35, and the third conductive base layer 33.

[0082] No. When the second conductive film 41 is formed by, for example, plating, the thickness of the second conductive film 41 on the third conductive underlayer 33 is 1 / 2 times the thickness of the second conductive film 41 on the first main surface 11 of the resistor 10. Goodbye becomes very small.

[0083] 12 and 20 , the method for manufacturing the chip resistor 1b of this embodiment, similar to the method for manufacturing the chip resistor 1 of the first embodiment, includes dividing the resistor strip 10a to form resistor elements 10 each including a first side surface 13a and a second side surface 13b. By dividing the resistor strip 10a, the first conductive film 40 is divided into a first electrode layer 21 and a second electrode layer 26. The second conductive film 41 is divided into a third electrode layer 22 and a fourth electrode layer 27. The third conductive base layer 33 is in contact with the fourth electrode layer 27 and is spaced apart from the third electrode layer 22. The fourth electrode layer 27 is provided on the third conductive base layer 33 as well as on the second main surface 12 of the resistor element 10.

[0084] Then, the method for manufacturing the chip resistor 1b of this embodiment includes forming the first metal thin film layer 23 and the second metal thin film layer 28, similar to the method for manufacturing the chip resistor 1 of embodiment 1. In this way, the chip resistor 1b shown in Figures 14 and 15 is obtained.

[0085] The chip resistor 1b of this embodiment and its manufacturing method have the following advantages in addition to the advantages of the chip resistor 1 of the first embodiment and its manufacturing method.

[0086] The chip resistor 1b of this embodiment further includes a third conductive underlayer 33 provided on the second main surface 12 of the resistor 10 and on the second insulating layer 16. The third conductive underlayer 33 is in contact with the fourth electrode layer 27 and is spaced apart from the third electrode layer 22. A third end 16a of the second insulating layer 16 proximate to the second side surface 13b of the resistor 10 is covered with the third conductive underlayer 33. The sixth electrical resistivity of the third conductive underlayer 33 is greater than the seventh electrical resistivity of the fourth electrode layer 27 and greater than the third electrical resistivity of the resistor 10.

[0087] When the chip resistor 1b is mounted on a circuit board 50 (see FIG. 3), heat generated in the chip resistor 1b can be dissipated to the circuit board 50 not only from the first main surface 11 of the resistor element 10 but also from the second main surface 12 of the resistor element 10 through the third conductive underlayer 33, the fourth electrode layer 27, and the second metal thin-film layer 28. Furthermore, the third conductive underlayer 33 does not substantially change the resistance value of the chip resistor 1b. The heat dissipation performance of the chip resistor 1b can be improved independently of the resistance value of the chip resistor 1b.

[0088] In the chip resistor 1b of this embodiment, when viewed in a plan view of the second main surface 12 of the resistor 10, the third conductive base layer 33 overlaps the central portion 10m of the resistor 10 in the direction in which the first electrode 20 and the second electrode 25 are spaced apart from each other (the first direction (x direction)).

[0089] When the chip resistor 1b is mounted on a circuit board 50 (see FIG. 3), heat generated in the chip resistor 1b can be dissipated from the center portion 10m of the resistive element 10, which is the highest temperature portion in the chip resistor 1b, to the circuit board 50 (see FIG. 3) through the third conductive base layer 33, the fourth electrode layer 27, and the second metal thin-film layer 28. This improves the heat dissipation performance of the chip resistor 1b.

[0090] In the chip resistor 1b of this embodiment, the third conductive base layer 33 is formed of a conductive resin containing a binder resin and conductive particles dispersed in the binder resin. The fourth electrode layer 27 is formed of a metal. This improves the heat dissipation of the chip resistor 1b independently of the resistance value of the chip resistor 1b. This reduces the manufacturing cost of the chip resistor 1b.

[0091] The method for manufacturing the chip resistor 1b of this embodiment further includes forming a second insulating layer 16 on the second main surface 12 of the resistor strip 10a opposite the first main surface 11 of the resistor strip 10a, forming a third conductive underlayer 33 on the second main surface 12 of the resistor strip 10a and on the second insulating layer 16, forming a second conductive film 41 on the third conductive underlayer 33 and on a portion of the second main surface 12 of the resistor strip 10a that is exposed from the third conductive underlayer 33, and forming a first metal thin-film layer 23 and a second metal thin-film layer 28. By dividing the resistor strip 10a, the second conductive film 41 is divided into a third electrode layer 22 proximate to the first side surface 13a and a fourth electrode layer 27 proximate to the second side surface 13b and spaced apart from the third electrode layer 22. The third conductive underlayer 33 is in contact with the fourth electrode layer 27 and is spaced apart from the third electrode layer 22. The first metal thin film layer 23 electrically connects the first electrode layer 21 and the third electrode layer 22 to each other. The second metal thin film layer 28 electrically connects the second electrode layer 26 and the fourth electrode layer 27 to each other. The sixth electrical resistivity of the third conductive underlayer 33 is greater than the seventh electrical resistivity of the fourth electrode layer 27 and is greater than the third electrical resistivity of the resistor 10.

[0092] When the chip resistor 1b is mounted on a circuit board 50 (see FIG. 3), heat generated in the chip resistor 1b can be dissipated to the circuit board 50 not only from the first main surface 11 of the resistor element 10 but also from the second main surface 12 of the resistor element 10 via the third conductive underlayer 33, the fourth electrode layer 27, and the second metal thin film layer 28. Furthermore, the third conductive underlayer 33 does not substantially change the resistance value of the chip resistor 1b. This makes it possible to obtain a chip resistor 1b with improved heat dissipation properties, independent of the resistance value.

[0093] In the method for manufacturing the chip resistor 1b of the present embodiment, the third conductive base layer 33 is provided by printing. The second conductive film 41 is provided by plating. This improves the productivity of the chip resistor 1b and reduces the manufacturing cost of the chip resistor 1b.

[0094] (Embodiment 3) A chip resistor 1c according to the third embodiment will be described with reference to Figures 21 and 22. The chip resistor 1c according to the present embodiment has a similar configuration to the chip resistor 1b according to the second embodiment, but differs in the following respects.

[0095] The chip resistor 1c further includes a fourth conductive underlayer 34. The fourth conductive underlayer 34 is provided on the second main surface 12 and the second insulating layer 16 of the resistor element 10. The fourth conductive underlayer 34 is in contact with the third electrode layer 22 and is spaced apart from the third conductive underlayer 33 and the fourth electrode layer 27 in the first direction (x direction). A portion of the fourth conductive underlayer 34 is exposed from the third insulating layer 35. The fourth conductive underlayer 34 includes an end 34a proximate to the second side surface 13b. The end 34a of the fourth conductive underlayer 34 is covered by the third insulating layer 35. The end 34a of the fourth conductive underlayer 34 is spaced apart from the end 33a of the third conductive underlayer 33 and the fourth electrode layer 27 in the first direction (x direction).

[0096] A fourth end 16b of the second insulating layer 16 proximate to the first side surface 13a of the resistor 10 is covered with a fourth conductive underlayer 34. In a plan view of the second main surface 12 of the resistor 10, the fourth conductive underlayer 34 overlaps the first conductive underlayer 17. In a plan view of the second main surface 12 of the resistor 10, the fourth conductive underlayer 34 is spaced apart from a central portion 10m of the resistor 10 in the first direction (x direction) in which the first electrode 20 and the second electrode 25 are spaced apart from each other.

[0097] The eighth electrical resistivity of the fourth conductive base layer 34 is greater than the ninth electrical resistivity of the third electrode layer 22 and greater than the third electrical resistivity of the resistor 10. c When a current flows through the fourth conductive underlayer 34, almost no current flows through the fourth conductive underlayer 34. c The resistance value of the resistor is not substantially changed.

[0098] The eighth electrical resistivity of the fourth conductive underlayer 34 is, for example, 10 times or more the ninth electrical resistivity of the third electrode layer 22. The eighth electrical resistivity of the fourth conductive underlayer 34 may be 20 times or more, 50 times or more, or 100 times or more the ninth electrical resistivity of the third electrode layer 22. The eighth electrical resistivity of the fourth conductive underlayer 34 is, for example, 5 times or more the third electrical resistivity of the resistor 10. The eighth electrical resistivity of the fourth conductive underlayer 34 may be 10 times or more, 25 times or more, or 50 times or more the third electrical resistivity of the resistor 10. The fourth conductive underlayer 34 is formed of a conductive resin containing a binder resin (e.g., epoxy resin, phenolic resin, or polyimide resin) and conductive particles (e.g., silver particles) dispersed in the binder resin.

[0099] The third electrode layer 22 is further provided on the fourth conductive underlayer 34. The thickness of the third electrode layer 22 on the fourth conductive underlayer 34 is 2 Main surface 1 2 The thickness of the upper third electrode layer 22 Goodbye The thickness of the third electrode layer 22 on the fourth conductive underlayer 34 is, for example, 2 Main surface 1 2 The thickness is 0.1 times or less the thickness of the upper third electrode layer 22 .

[0100] The third insulating layer 35 is provided on the third conductive base layer 33, the fourth conductive base layer 34, and the second insulating layer 16. The third insulating layer 35 protects the third conductive base layer 33 and the fourth conductive base layer 34.

[0101] A method for manufacturing the chip resistor 1c of this embodiment will be described with reference to Figures 4 to 7, 10, 12, and 21 to 25. The method for manufacturing the chip resistor 1c of this embodiment includes the same steps as the method for manufacturing the chip resistor 1b of embodiment 2, but differs mainly in the following points.

[0102] The method for manufacturing the chip resistor 1c of this embodiment includes the steps shown in Fig. 4 to Fig. 6. Referring to Fig. 7 and Fig. 23, the method for manufacturing the chip resistor 1c of this embodiment includes forming a first conductive underlayer 17 and a second conductive underlayer 18 on the first main surface 11 of the resistor strip 10a, and forming a third conductive underlayer 33 and a fourth conductive underlayer 34 on the second main surface 12 and the second insulating layer 16 of the resistor strip 10a.

[0103] The fourth end 16b of the second insulating layer 16 is covered with a fourth conductive underlayer 34. In a plan view of the second main surface 12 of the resistor strip 10a, the fourth conductive underlayer 34 overlaps the first conductive underlayer 17. The fourth conductive underlayer 34 is spaced apart from the third conductive underlayer 33 in the first direction (x-direction).

[0104] The fourth conductive base layer 34 is formed of, for example, a conductive resin containing a binder resin (for example, an epoxy resin, a phenolic resin, or a polyimide resin) and conductive particles (for example, silver particles) dispersed in the binder resin. The fourth conductive base layer 34 is provided by printing, for example, screen printing.

[0105] 24, the method for manufacturing the chip resistor 1c of the present embodiment includes forming a third insulating layer 35 on the third conductive base layer 33, the fourth conductive base layer 34, and the second insulating layer 16. A portion of the third conductive base layer 33 and a portion of the fourth conductive base layer 34 are exposed from the third insulating layer 35.

[0106] 8 and 25, the method for manufacturing the chip resistor 1c of the present embodiment includes forming an insulating coating film 30. The step of forming the insulating coating film 30 in the present embodiment is similar to the step of forming the insulating coating film 30 in the second embodiment.

[0107] 10 and 19, the method for manufacturing the chip resistor 1c of the present embodiment, like the method for manufacturing the chip resistor 1b of the second embodiment, includes forming a first conductive film 40 and a second conductive film 41. The second conductive film 41 is formed on the third conductive base layer 33, the fourth conductive base layer 34, and on portions of the second main surface 12 of the resistor 10 that are exposed from the insulating coating film 30, the third insulating layer 35, the third conductive base layer 33, and the fourth conductive base layer 34.

[0108] No. If the second conductive film 41 is formed by, for example, plating, the thickness of the second conductive film 41 on the fourth conductive underlayer 34 is 2 Main surface 1 2 The thickness of the second conductive film 41 on Goodbye becomes very small.

[0109] 12 and 20 , the method for manufacturing the chip resistor 1c of this embodiment, similar to the method for manufacturing the chip resistor 1b of the second embodiment, includes dividing the resistor strip 10a to form resistor elements 10 each including a first side surface 13a and a second side surface 13b. By dividing the resistor strip 10a, the first conductive film 40 is divided into a first electrode layer 21 and a second electrode layer 26. The second conductive film 41 is divided into a third electrode layer 22 and a fourth electrode layer 27. The fourth conductive base layer 34 is in contact with the third electrode layer 22 and spaced apart from the fourth electrode layer 27. The third electrode layer 22 is formed on the fourth conductive base layer 34 as well as on the second main surface 12 of the resistor 10.

[0110] Then, the method for manufacturing the chip resistor 1c of this embodiment includes forming a first metal thin film layer 23 and a second metal thin film layer 28, similar to the method for manufacturing the chip resistor 1b of embodiment 2. In this way, the chip resistor 1c shown in Figures 21 and 22 is obtained.

[0111] The chip resistor 1c of this embodiment and its manufacturing method have the following advantages in addition to the advantages of the chip resistor 1b of the second embodiment and its manufacturing method.

[0112] The chip resistor 1c of this embodiment further includes a fourth conductive underlayer 34 provided on the second main surface 12 of the resistor 10 and on the second insulating layer 16. The fourth conductive underlayer 34 is in contact with the third electrode layer 22 and is spaced apart from the third conductive underlayer 33 and the fourth electrode layer 27. A fourth end 16b of the second insulating layer 16 proximate to the first side surface 13a of the resistor 10 is covered with the fourth conductive underlayer 34. The eighth electrical resistivity of the fourth conductive underlayer 34 is greater than the ninth electrical resistivity of the third electrode layer 22 and greater than the third electrical resistivity of the resistor 10.

[0113] When the chip resistor 1c is mounted on a circuit board 50 (see FIG. 3), heat generated in the chip resistor 1c can be dissipated to the circuit board 50 not only from the first main surface 11 of the resistor element 10 but also from the second main surface 12 of the resistor element 10 through the third conductive underlayer 33, the fourth conductive underlayer 34, the third electrode layer 22, and the fourth electrode layer 27. Furthermore, the fourth conductive underlayer 34 does not substantially change the resistance value of the chip resistor 1c. The heat dissipation performance of the chip resistor 1c can be improved independently of the resistance value of the chip resistor 1c.

[0114] In the chip resistor 1c of this embodiment, the fourth conductive base layer 34 is formed of a conductive resin containing a binder resin and conductive particles dispersed in the binder resin. The third electrode layer 22 is formed of a metal. This improves the heat dissipation of the chip resistor 1c, independently of the resistance value of the chip resistor 1c. This reduces the manufacturing cost of the chip resistor 1c.

[0115] The manufacturing method of the chip resistor 1c of this embodiment further includes forming a fourth conductive underlayer 34 spaced apart from the third conductive underlayer 33 on the second main surface 12 and the second insulating layer 16 of the resistor strip 10a. The second conductive film 41 is also formed on the fourth conductive underlayer 34. The fourth conductive underlayer 34 is in contact with the third electrode layer 22 and spaced apart from the fourth electrode layer 27. The eighth electrical resistivity of the fourth conductive underlayer 34 is greater than the ninth electrical resistivity of the third electrode layer 22 and greater than the third electrical resistivity of the resistor 10.

[0116] When the chip resistor 1c is mounted on a circuit board 50 (see FIG. 3), heat generated in the chip resistor 1c is transferred not only from the first main surface 11 of the resistor element 10 but also from the third conductive base layer 33, the fourth conductive base layer 34, the third electrode layer 22, and the fourth electrode layer 27 The heat can also be dissipated from the second main surface 12 of the resistor element 10 to the circuit board 50 through the fourth conductive base layer 34. In addition, the fourth conductive base layer 34 does not substantially change the resistance value of the chip resistor 1c. This makes it possible to obtain a chip resistor 1c with improved heat dissipation properties, independent of the resistance value.

[0117] In the method for manufacturing the chip resistor 1c of the present embodiment, the fourth conductive base layer 34 is provided by printing, which improves the productivity of the chip resistor 1c and reduces the manufacturing cost of the chip resistor 1c.

[0118] (Fourth embodiment) A chip resistor 1d according to the fourth embodiment will be described with reference to Figures 26 and 27. The chip resistor 1d according to the present embodiment has a similar configuration to the chip resistor 1 according to the first embodiment, but differs in the following respects.

[0119] The first insulating layer 15 is also provided on the first conductive underlayer 17. A first end 15a of the first insulating layer 15 is exposed from the first conductive underlayer 17. An end 17b of the first conductive underlayer 17 is covered with the first insulating layer 15. The end 17b of the first conductive underlayer 17 is separated from the first electrode layer 21. The first insulating layer 15 is also provided on the second conductive underlayer 18. A second end 15b of the first insulating layer 15 is covered with the first insulating layer 15. 2 Conductive Underlayer 1 8 The end 18b of the second conductive underlayer 18 is exposed from the first insulating layer 15. The end 18b of the second conductive underlayer 18 is separated from the second electrode layer 26.

[0120] A method for manufacturing the chip resistor 1d of this embodiment will be described with reference to Figures 4, 6, 9, 11, 13, and 28 to 32. The method for manufacturing the chip resistor 1d of this embodiment includes the same steps as the method for manufacturing the chip resistor 1 of embodiment 1, but differs mainly in the following points.

[0121] A method for manufacturing the chip resistor 1d of this embodiment includes the steps shown in Fig. 4. Referring to Fig. 28, the method for manufacturing the chip resistor 1d of this embodiment includes forming a first conductive underlayer 17 and a second conductive underlayer 18 on the first main surface 11 of the strip resistor 10a. The first conductive underlayer 17 and the second conductive underlayer 18 are spaced apart from each other in the first direction (x-direction).

[0122] The first conductive underlayer 17 includes an end 17a which is an end of the first conductive underlayer 17 in the first direction (x direction) and an end 17b which is an end of the first conductive underlayer 17 in the first direction (x direction) and is opposite to end 17a. The second conductive underlayer 18 includes an end 18a which is an end of the second conductive underlayer 18 in the first direction (x direction) and an end 18b which is an end of the second conductive underlayer 18 in the first direction (x direction) and is opposite to end 18a. End 17b of the first conductive underlayer 17 faces end 18b of the second conductive underlayer 18. The first conductive underlayer 17 and the second conductive underlayer 18 are provided by printing, for example, screen printing.

[0123] 6 and 29, a manufacturing method of a chip resistor 1d according to this embodiment includes forming a first insulating layer 15 on the first main surface 11, the first conductive underlayer 17, and the second conductive underlayer 18 of the resistor strip 10a, and forming a second insulating layer 16 on the second main surface 12 of the resistor strip 10a. The first insulating layer 15 is formed between the first conductive underlayer 17 and the second conductive underlayer 18. An end 17b of the first conductive underlayer 17 is covered with the first insulating layer 15. An end 18b of the second conductive underlayer 18 is covered with the first insulating layer 15.

[0124] The first insulating layer 15 includes a first end 15a which is an end of the first insulating layer 15 in the first direction (x direction) and a second end 15b which is an end of the first insulating layer 15 in the first direction (x direction) and is opposite the first end 15a. The first end 15a of the first insulating layer 15 is on the first conductive underlayer 17 and covers the end 17b of the first conductive underlayer 17. The second end 15b of the first insulating layer 15 is on the second conductive underlayer 18 and covers the end 18b of the second conductive underlayer 18. The second insulating layer 16 includes a third end 16a which is an end of the second insulating layer 16 in the first direction (x direction) and a fourth end 16b which is an end of the second insulating layer 16 in the first direction (x direction) and is opposite the third end 16a.

[0125] 9 and 30, the method for manufacturing the chip resistor 1d of this embodiment includes forming an insulating coating film 30, similar to the method for manufacturing the chip resistor 1 of the first embodiment. Referring to FIGS. 11 and 31, the method for manufacturing the chip resistor 1d of this embodiment includes forming a first conductive film 40 and a second conductive film 41, similar to the method for manufacturing the chip resistor 1 of the first embodiment. Referring to FIGS. 13 and 32, the method for manufacturing the chip resistor 1d of this embodiment includes dividing the strip resistor 10a to form resistor elements 10 including a first side surface 13a and a second side surface 13b, similar to the method for manufacturing the chip resistor 1 of the first embodiment. Then, the method for manufacturing the chip resistor 1d of this embodiment includes forming a first metal thin film layer 23 and a second metal thin film layer 28, similar to the method for manufacturing the chip resistor 1 of the first embodiment. In this manner, the chip resistor 1d shown in FIGS. 26 and 27 is obtained.

[0126] The chip resistor 1d of this embodiment has the following advantages similar to those of the chip resistor 1 of the first embodiment.

[0127] In the chip resistor 1d of this embodiment, the resistor 10 includes a central portion 10m that is exposed from the first electrode 20 and the second electrode 25 in a plan view of the first main surface 11. An end 17b of the first conductive base layer 17 that is close to the central portion 10m of the resistor 10 is covered with the first insulating layer 15. An end 18b of the second conductive base layer 18 that is close to the central portion 10m of the resistor 10 is covered with the first insulating layer 15. According to the chip resistor 1d of this embodiment, the heat dissipation performance of the chip resistor 1d can be improved independently of the resistance value of the chip resistor 1d.

[0128] The first to fourth embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. Unless there is a contradiction, at least two of the first to fourth embodiments disclosed herein may be combined. For example, the chip resistor 1d of the fourth embodiment may be provided with the third conductive underlayer 33 and the third insulating layer 35 of the second embodiment. The chip resistor 1d of the fourth embodiment may be provided with the third conductive underlayer 33, the fourth conductive underlayer 34, and the third insulating layer 35 of the third embodiment. The scope of the present disclosure is defined by the claims, not the above description, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]

[0129] 1, 1b, 1c, 1d chip resistor, 5 resistor frame, 10 resistor, 10a strip resistor, 10m center, 11 first main surface, 12 second main surface, 13a first side surface, 13b second side surface, 14a third side surface, 14b fourth side surface, 15 first insulating layer, 15a first end, 15b second end, 16 second insulating layer, 16a third end, 16b fourth end, 17 first conductive base layer, 17a, 17b end, 18 second conductive base layer, 18a, 18b end, 20 first electrode, 21 first electrode layer, 21m first portion, 22 third electrode layer, 22m third portion, 23 first metal thin film layer, 25 second electrode, 26 second electrode layer, 26m second portion, 27 fourth electrode layer, 27m fourth portion, 28 Second metal thin film layer, 30 insulating coating film, 33 third conductive base layer, 33a end, 34 fourth conductive base layer, 34a end, 35 third insulating layer, 40 first conductive film, 41 second conductive film, 50 circuit board, 51 insulating substrate, 52, 53 conductive wiring, 54, 55 joining member.

Claims

1. a resistor including a first main surface, a second main surface opposite to the first main surface, a first side surface connected to the first main surface and the second main surface, and a second side surface opposite to the first side surface, the second side surface being connected to the first main surface and the second main surface; a first conductive base layer provided on the first main surface; a second conductive underlayer provided on the first main surface and spaced apart from the first conductive underlayer; a first electrode provided on the first side surface of the resistor and spaced apart from the second conductive base layer; a second electrode provided on the second side surface of the resistor and spaced apart from the first conductive base layer and the first electrode; a first insulating layer provided on the first main surface, the first electrode includes a first electrode layer provided on the first main surface and on the first conductive base layer; the second electrode includes a second electrode layer provided on the first principal surface and on the second conductive base layer; a first electrical resistivity of the first conductive underlayer is greater than a second electrical resistivity of the first electrode layer and greater than a third electrical resistivity of the resistor; a fourth electrical resistivity of the second conductive underlayer is greater than a fifth electrical resistivity of the second electrode layer and is greater than the third electrical resistivity of the resistor; the first insulating layer is disposed between the first electrode and the second electrode, and between the first conductive underlayer and the second conductive underlayer; the resistor includes a central portion exposed from the first electrode and the second electrode in a plan view of the first principal surface, an end of the first conductive underlayer proximate to the central portion is covered with the first insulating layer; A chip resistor, wherein an end of the second conductive underlayer proximate to the central portion is covered with the first insulating layer.

2. the first conductive base layer and the second conductive base layer are formed of a conductive resin containing a binder resin and conductive particles dispersed in the binder resin, The chip resistor according to claim 1 , wherein the first electrode layer and the second electrode layer are formed of a metal.

3. A resistor comprising a first main surface, a second main surface opposite the first main surface, a first side surface connected to the first main surface and the second main surface, and a second side surface opposite the first side surface, wherein the second side surface is connected to the first main surface and the second main surface; and a first conductive base layer provided on the first main surface; a second conductive underlayer provided on the first main surface and spaced apart from the first conductive underlayer; a first electrode provided on the first side surface of the resistor and spaced apart from the second conductive base layer; a second electrode provided on the second side surface of the resistor and spaced apart from the first conductive base layer and the first electrode; a second insulating layer provided on the second main surface; a third conductive base layer provided on the second main surface and the second insulating layer; the first electrode includes a first electrode layer provided on the first principal surface and the first conductive base layer, a third electrode layer, and a first metal thin film layer, the third electrode layer being provided on the second principal surface, and the first metal thin film layer electrically connecting the first electrode layer and the third electrode layer to each other; the second electrode includes a second electrode layer provided on the first principal surface and the second conductive base layer, a fourth electrode layer, and a second metal thin film layer, the fourth electrode layer being provided on the second principal surface and spaced apart from the third electrode layer, and the second metal thin film layer electrically connecting the second electrode layer and the fourth electrode layer to each other; a first electrical resistivity of the first conductive underlayer is greater than a second electrical resistivity of the first electrode layer and greater than a third electrical resistivity of the resistor; a fourth electrical resistivity of the second conductive underlayer is greater than a fifth electrical resistivity of the second electrode layer and is greater than the third electrical resistivity of the resistor; the second insulating layer is disposed between the third electrode layer and the fourth electrode layer; the third conductive underlayer is in contact with the fourth electrode layer and is spaced apart from the third electrode layer; a third end of the second insulating layer proximate to the second side surface is covered with the third conductive underlayer; A chip resistor, wherein the sixth electrical resistivity of the third conductive base layer is greater than the seventh electrical resistivity of the fourth electrode layer and greater than the third electrical resistivity of the resistor.

4. The resistor includes a central portion exposed from the first electrode and the second electrode in a plan view of the first principal surface, a first portion of the first electrode layer that is in contact with the resistor and closest to the center of the resistor is closer to the center of the resistor than a third portion of the third electrode layer that is in contact with the resistor and closest to the center of the resistor, or is flush with the third portion of the third electrode layer; The chip resistor of claim 3, wherein a second portion of the second electrode layer that contacts the resistor and is closest to the center of the resistor is closer to the center of the resistor than a fourth portion of the fourth electrode layer that contacts the resistor and is closest to the center of the resistor, or is flush with the fourth portion of the fourth electrode layer.

5. The chip resistor of claim 4, wherein, in a planar view of the second main surface, the third conductive base layer overlaps the central portion of the resistor in the direction in which the first electrode and the second electrode are spaced apart from each other.

6. the third conductive base layer is formed of a conductive resin containing a binder resin and conductive particles dispersed in the binder resin, The chip resistor according to claim 3 , wherein the fourth electrode layer is formed of a metal.

7. a fourth conductive base layer provided on the second main surface and the second insulating layer; the fourth conductive underlayer is in contact with the third electrode layer and is spaced apart from the third conductive underlayer and the fourth electrode layer; a fourth end of the second insulating layer proximate to the first side surface is covered with the fourth conductive underlayer; A chip resistor described in any one of claims 3 to 6, wherein the eighth electrical resistivity of the fourth conductive base layer is greater than the ninth electrical resistivity of the third electrode layer and greater than the third electrical resistivity of the resistor.

8. the fourth conductive base layer is formed of a conductive resin containing a binder resin and conductive particles dispersed in the binder resin, The chip resistor according to claim 7 , wherein the third electrode layer is formed of a metal.

9. The chip resistor according to claim 1 , wherein the chip resistor is a shunt resistor.

10. Forming a second insulating layer on a second main surface of the strip resistor; forming a first conductive underlayer and a second conductive underlayer spaced apart from the first conductive underlayer on a first main surface of the resistor strip opposite the first main surface; forming a third conductive underlayer on the second main surface and on the second insulating layer; forming a first conductive film on the first conductive underlayer, on the second conductive underlayer, and on portions of the first main surface that are exposed from the first conductive underlayer and the second conductive underlayer; forming a second conductive film on the third conductive underlayer and on a portion of the second main surface that is exposed from the third conductive underlayer; dividing the resistor strip to form a resistor element including a first side and a second side; forming a first metal thin film layer and a second metal thin film layer; By dividing the resistor strip, the first conductive film is divided into a first electrode layer proximate to the first side surface and a second electrode layer proximate to the second side surface and spaced apart from the first electrode layer, and the second conductive film is divided into a third electrode layer proximate to the first side surface and a fourth electrode layer proximate to the second side surface and spaced apart from the third electrode layer, the third conductive underlayer is in contact with the fourth electrode layer and is spaced apart from the third electrode layer; the first metal thin film layer electrically connects the first electrode layer and the third electrode layer to each other; the second metal thin film layer electrically connects the second electrode layer and the fourth electrode layer to each other; a first electrical resistivity of the first conductive underlayer is greater than a second electrical resistivity of the first electrode layer and greater than a third electrical resistivity of the resistor; a fourth electrical resistivity of the second conductive underlayer is greater than a fifth electrical resistivity of the second electrode layer and is greater than the third electrical resistivity of the resistor; A method for manufacturing a chip resistor, wherein the sixth electrical resistivity of the third conductive base layer is greater than the seventh electrical resistivity of the fourth electrode layer and greater than the third electrical resistivity of the resistor.

11. the first conductive base layer and the second conductive base layer are provided by printing; The method for manufacturing a chip resistor according to claim 10 , wherein the first conductive film is provided by plating.

12. the third conductive base layer is provided by printing, The method for manufacturing a chip resistor according to claim 10 or 11, wherein the second conductive film is provided by plating.

13. forming a fourth conductive underlayer on the second main surface and the second insulating layer, the fourth conductive underlayer being spaced apart from the third conductive underlayer; the second conductive film is also formed on the fourth conductive base layer; the fourth conductive underlayer is in contact with the third electrode layer and is spaced apart from the fourth electrode layer; 13. A method for manufacturing a chip resistor according to claim 10, wherein the eighth electrical resistivity of the fourth conductive base layer is greater than the ninth electrical resistivity of the third electrode layer and greater than the third electrical resistivity of the resistor.

14. The method for manufacturing a chip resistor according to claim 13 , wherein the fourth conductive underlayer is provided by printing.

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