Chip resistor manufacturing method

The described manufacturing method for chip resistors addresses TCR and sulfurization issues by using protective films and auxiliary films with conductive particles to minimize electrode resistance and gas penetration, ensuring low TCR and anti-sulfuration properties.

JP7790924B2Active Publication Date: 2025-12-23KOA CORP
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Patent Information

Application Number
JP2021179604
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-11-02
Publication Date
2025-12-23
Estimated Expiration
2041-11-02

AI Technical Summary

Technical Problem

Chip resistors with low resistance face issues of increased TCR due to the resistance contribution from the front electrode, and are susceptible to sulfurization from penetrating gases, especially in moisture-resistant environments.

Method used

A manufacturing method involving the formation of a glass-based first protective film, a resin-based second protective film, and an auxiliary film containing conductive particles, along with a concave step to prevent resin flow and precise auxiliary film placement, followed by electrolytic plating to form a metal-based external plating layer.

Benefits of technology

The method ensures low TCR and resistance to sulfurization by minimizing the front electrode's resistance contribution and blocking sulfurizing gases, maintaining performance in low-resistance chip resistors.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a chip resistor which can secure a low TCR even at low resistance while maintaining sulfidation resistance characteristics.SOLUTION: A chip resistor 1 includes an insulation substrate 2, a pair of surface electrodes 3 provided at both ends of a front face of the insulation substrate 2, a resistor 5 for connecting between both of surface electrodes 3, an undercoat layer 6 provided on the resistor 5, an overcoat layer 7 provided on the undercoat layer 6, a conductive auxiliary film 8 provided across a connection part of the surface electrodes 3 and the resistor 5 at a position separated from the end faces of the insulation substrate 2, a pair of end face electrodes 9 which extends to both of the end faces of the insulation substrate 2 and is connected to the surface electrodes 3, and a pair of external plating layers 10 covering the end face electrodes 9, the surface electrodes 3 and the auxiliary film 8, wherein the auxiliary film 8 is formed of a resin material containing metal particles such as Ag, and a part of the auxiliary film 8 is sandwiched between the undercoat layer 6 and the overcoat layer 7.SELECTED DRAWING: Figure 2
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Description

[Technical Field]

[0001] The present invention relates to a chip resistor. of It relates to a manufacturing method. [Background technology]

[0002] Generally, a chip resistor is mainly composed of a rectangular parallelepiped insulating substrate, a pair of front electrodes arranged opposite each other at a predetermined distance on the surface of the insulating substrate, a pair of back electrodes arranged opposite each other at a predetermined distance on the back surface of the insulating substrate, a pair of end electrodes that connect the front electrodes to the back electrodes, a pair of external plating layers that cover each of these electrodes, a resistive element that bridges the pair of front electrodes, and an insulating protective film that covers the resistive element.

[0003] In this type of chip resistor, the front electrode is typically made of a low-resistivity Ag (silver)-based metal material, and an external plating layer is formed to cover this front electrode. However, highly corrosive sulfide gases and the like can easily penetrate through the gap at the boundary between the external plating layer and the protective film, and the front electrode portion at the boundary between the front electrode and the protective film may be corroded by the sulfide gases and the like, resulting in problems such as changes in resistance value and breakage.

[0004] Therefore, a chip resistor has been proposed in the past in which an auxiliary film 100 made of a resin containing metal particles and carbon particles is formed on the upper surface of a front electrode 101, as shown in Figure 9(a), and this auxiliary film 100 is positioned at the boundary between an outer plating layer 102 and a protective film 103, thereby blocking sulfur gas that has entered through the boundary between the outer plating layer 102 and the protective film 103 with the auxiliary film 100, thereby preventing the front electrode 101 from being exposed to sulfur gas (see, for example, Patent Document 1).

[0005] In this type of chip resistor, electrolytic plating is widely used to form the external plating layer because it has advantages such as lower cost and shorter plating time compared to electroless plating. In this electrolytic plating, the plating is formed on the surface of a conductive object to be plated, so as shown in Figure 9(a), the external plating layer 102 is formed to cover the surfaces of the end electrode 104 and auxiliary film 100. In Figure 9, reference numeral 105 denotes an insulating substrate, reference numeral 106 denotes a resistor element, and reference numeral 107 denotes a back electrode. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Patent No. 5957693 Summary of the Invention [Problem to be solved by the invention]

[0007] In chip resistors with low resistance (e.g., 100 mΩ or less), the resistance of the front electrode affects the overall resistance of the chip resistor, resulting in a higher TCR. In the chip resistor shown in FIG. 9(a) , a portion of the protective film 103 is inserted between the auxiliary film 100 and the resistor element 106. When the outer plating layer 102 is soldered to a land on a circuit board, the current supplied from the outer plating layer 102 flows from the auxiliary film 100 through the front electrode 101 directly below the protective film 103 to the resistor element 106, as shown by the arrow in FIG. 9(b). As a result, the length of the front electrode 101 between the auxiliary film 100 and the resistor element 106 in the current path from the electrode region (the entire region including the front electrode 101, the outer plating layer 102, and the auxiliary film 100) to the resistor element 106 increases. This increases the resistance component of the front electrode 101 in that region, resulting in a corresponding decrease in TCR.

[0008] Furthermore, in the chip resistor shown in Figure 9(a) described above, sulfurizing gas that penetrates through the boundary between the outer plating layer 102 and the protective film 103 is blocked by the auxiliary film 100. However, if the protective film 103 is formed from a resin material such as epoxy, the sulfurizing gas that penetrates through the protective film 103 cannot be ignored, particularly in a moisture-resistant atmosphere, and the front electrode 101 located directly below the protective film 103 becomes susceptible to sulfurization.

[0009] The present invention has been made in consideration of the above-mentioned state of the art. the The goal was to create a chip resistor that can maintain sulfur resistance while also ensuring low TCR even at low resistance. of The object is to provide a manufacturing method. [Means for solving the problem]

[0016] the above of In order to achieve the object, the manufacturing method of the chip resistor of the present invention is characterized by including the steps of forming a resistor and electrodes connected to both ends of the resistor on an insulating substrate; forming a first protective film made of a glass material so as to cover at least a portion of the resistor; forming a second electrode on the electrode except for the connection portion with the resistor; forming an auxiliary film made of a resin material containing conductive particles at a position spanning the connection portion between the electrode and the resistor; forming a second protective film made of a resin material so as to cover a portion of the auxiliary film and the first protective film; sputtering metal particles on the end surface of the insulating substrate to form an end surface electrode connected to the electrode; and performing electrolytic plating to form an external plating layer covering the end surface electrode, the electrode, and the auxiliary film.

[0017] It was configured like this Chip resistor manufacturing method According A step of forming a second electrode on the electrode except for the connection portion with the resistor as a pre-step of forming the auxiliary film. It is equipped with By forming the second electrode, a concave step is created at the boundary between the electrode and the resistor. When forming an auxiliary film made of a resin material at this step, the step prevents the resin from flowing onto the second electrode. handTherefore, the auxiliary film can be formed with high precision. [Effects of the Invention]

[0018] According to the present invention, it is possible to provide a chip resistor that maintains anti-sulfuration properties and ensures low TCR even at low resistance. [Brief explanation of the drawings]

[0019] [Figure 1] FIG. 1 is a plan view of a chip resistor according to a first embodiment. [Figure 2] FIG. 2 is a cross-sectional view taken along line II-II in FIG. [Figure 3] FIG. 3 is an enlarged cross-sectional view showing the left half of FIG. 2. [Figure 4] 3A to 3C are plan views showing the manufacturing process of the chip resistor. [Figure 5] 3A to 3C are cross-sectional views showing a manufacturing process of the chip resistor. [Figure 6] FIG. 6 is a cross-sectional view showing a main part of a chip resistor according to a second embodiment. [Figure 7] FIG. 10 is a cross-sectional view showing a main part of a chip resistor according to a third embodiment. [Figure 8] FIG. 10 is a cross-sectional view showing a main part of a chip resistor according to a fourth embodiment. [Figure 9] FIG. 10 is a cross-sectional view of a chip resistor according to a conventional example. DETAILED DESCRIPTION OF THE INVENTION

[0020] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0021] FIG. 1 is a plan view of a chip resistor according to a first embodiment of the present invention, FIG. 2 is a cross-sectional view taken along line II-II in FIG. 1, FIG. 3 is an enlarged cross-sectional view of the left half of FIG. 2, FIG. 4 is a plan view showing a manufacturing process for the chip resistor, and FIG. 5 is a cross-sectional view showing a manufacturing process for the chip resistor.

[0022] As shown in Figures 1 to 3, the chip resistor 1 of the first embodiment is composed of a rectangular insulating substrate 2, a pair of front electrodes 3 provided at both longitudinal ends of the upper surface of the insulating substrate 2, a pair of back electrodes 4 provided at both longitudinal ends of the lower surface of the insulating substrate 2, a rectangular resistor 5 provided to connect the pair of front electrodes 3, an undercoat layer (first protective film) 6 provided to cover the entire resistor 5 including the connection portion with the front electrodes 3, an overcoat layer (second protective film) 7 provided to cover the undercoat layer 6, a pair of auxiliary films 8 provided at both ends of the undercoat layer 6 and the overcoat layer 7, a pair of end surface electrodes 9 extending on both end surfaces of the insulating substrate 2 and providing electrical conduction between the front electrode 3 and the back electrode 4, and a pair of external plating layers 10 provided to cover the entire end surface electrodes 9 and the portions of the back electrode 4 exposed from the end surface electrodes 9.

[0023] The insulating substrate 2 is made of ceramics or the like, and is obtained by dividing a large-sized substrate, which will be described later, along primary dividing grooves and secondary dividing grooves that extend lengthwise and widthwise, thereby obtaining a large number of insulating substrates 2 .

[0024] The front electrode 3 is made by screen printing an Ag (silver) paste containing 1 to 5 wt% Pd (palladium), followed by drying and firing, and the back electrode 4 is made by screen printing an Ag paste, followed by drying and firing.

[0025] The resistor 5 is made by screen printing a resistive paste such as ruthenium oxide, drying and baking it, and both longitudinal ends of the resistor 5 overlap the front electrodes 3. The resistor 5 has a trimming groove 5a formed therein for adjusting the resistance value, and this trimming groove 5a is formed by irradiating a laser beam from above the undercoat layer 6.

[0026] The undercoat layer 6 is formed by screen printing a glass paste, followed by drying and baking, and this undercoat layer 6 is formed so as to cover the entire resistor 5 before the trimming groove 5a is formed.

[0027] The overcoat layer 7 is formed by screen-printing a resin paste such as epoxy or phenol and then heat-curing (baking), and is formed so as to cover the undercoat layer 6 after the trimming grooves 5a have been formed. The undercoat layer 6 and the overcoat layer 7 form an insulating protective film with a two-layer structure.

[0028] The auxiliary film 8 is made of a material that is less susceptible to sulfurization than the front electrode 3. Specifically, it is made by screen-printing and heat-curing a resin paste containing carbon particles, or by screen-printing and heat-curing a resin paste containing metal particles such as Ag, Cu, or Ni. The auxiliary film 8 is formed on the front electrode 3 away from the edge of the insulating substrate 2, and is positioned across the connection between the front electrode 3 and the resistor 5. A portion of the auxiliary film 8 is sandwiched between the undercoat layer 6 and the overcoat layer 7, and the edge of the overcoat layer 7 overlaps part of the auxiliary film 8 (the inner edge).

[0029] The edge electrode 9 is formed by sputtering nickel (Ni) / chromium (Cr) or the like, and provides electrical continuity between the front electrode 3 and the back electrode 4, which are spaced apart via the edge of the insulating substrate 2. The edge electrode 9 not only covers the edge of the insulating substrate 2, but is also formed to cover the lower surface of the back electrode 4 located near the edge of the insulating substrate 2, the upper surface of the front electrode 3, and the surface of the auxiliary film 8.

[0030] The external plating layer 10 has a two-layer structure consisting of an inner barrier layer 11 and an outer external connection layer 12 that covers the barrier layer 11. The barrier layer 11 is a Ni plating layer formed by electrolytic plating, and this barrier layer 11 is formed so as to cover the entire end surface electrode 9 and the portion of the back electrode 4 that is exposed from the end surface electrode 9. The external connection layer 12 is a Sn plating layer formed by electrolytic plating, and this external connection layer 12 is formed so as to cover the entire surface of the barrier layer 11.

[0031] Next, a method for manufacturing the chip resistor 1 configured as above will be described with reference to FIGS.

[0032] First, a large-sized substrate 2A is prepared, on which primary and secondary dividing grooves extending in a grid pattern are formed. These primary and secondary dividing grooves divide the front and back surfaces of the large-sized substrate 2A into numerous chip formation regions, each of which constitutes one insulating substrate 2. Figures 4 and 5 show one chip formation region as a representative example, but in reality, many such chip formation regions are arranged in a grid pattern.

[0033] Then, Ag paste is screen-printed on the back surface of the large-sized substrate 2A, dried, and then fired at 850°C to form a pair of back electrodes 4 facing each other with a predetermined distance between them at both longitudinal ends of each chip formation area.

[0034] Next, an Ag-Pd paste is screen-printed on the surface of the large-sized substrate 2A, dried, and then fired at 850°C to form a pair of front electrodes 3 facing each other at a predetermined distance at both ends of the longitudinal direction of each chip formation area, as shown in Figures 4(a) and 5(a). Note that the order in which the front electrodes 3 and back electrodes 4 are formed may be reversed, or the front electrodes 3 and back electrodes 4 may be formed simultaneously.

[0035] Next, a resistive paste containing ruthenium oxide or the like is screen-printed on the surface of the large-sized substrate 2A, and then dried and fired at 850°C to form a rectangular resistor 5 with both ends overlapping the front electrodes 3, as shown in Figures 4(b) and 5(b).

[0036] Next, a glass paste is screen-printed on the area covering the resistor 5, dried, and then fired at 600°C to form an undercoat layer 6 that covers the entire resistor 5, including the connection end with the front electrode 3, as shown in Figures 4(c) and 5(c).

[0037] Next, a resin paste containing metal particles such as Ag (or Cu, Ni) is screen-printed onto the connection area between the front electrode 3 and the resistor 5, and then dried and heat-cured (baked) at 200°C to form a pair of auxiliary films 8 that extend in a strip shape across the connection area between the front electrode 3 and the resistor 5, as shown in Figures 4(d) and 5(d). These auxiliary films 8 are formed so as to cross over the connection area where the front electrode 3 and the resistor 5 overlap, and therefore have an upwardly convex cross-sectional shape (bowl-shaped).

[0038] Next, by irradiating laser light from above the undercoat layer 6, a trimming groove 5a is formed that penetrates the undercoat layer 6 and the resistor 5, as shown in Figures 4(e) and 5(e), thereby adjusting the resistance value of the resistor 5.

[0039] Next, an epoxy or phenolic resin paste is screen-printed onto the undercoat layer 6, dried, and then heat-cured at 200°C to form an overcoat layer 7 that covers the entire surface of the undercoat layer 6 and the edge of the auxiliary film 8 that overlaps the undercoat layer 6, as shown in Figures 4(f) and 5(f). Since the cross-sectional shape of the auxiliary film 8 is bowl-shaped as described above, the edge of the overcoat layer 7 is formed on the inner sloping surface of the auxiliary film 8, which prevents the overcoat layer 7 from sagging on the auxiliary film 8. The undercoat layer 6 and overcoat layer 7 form a two-layer insulating protective film.

[0040] The steps up to this point have been batch processing of the large substrate 2A, but in the next step, the large substrate 2A is primarily divided into strips along the primary dividing grooves to obtain strip-shaped substrates 2B whose width dimension is the longitudinal direction of the chip formation area.

[0041] Next, Ni / Cr is sputtered toward the divided surfaces (edge ​​surfaces) of the strip-shaped substrate 2B to form a pair of edge electrodes 9 that connect the front electrode 3 and the back electrode 4, as shown in Figures 4(g) and 5(g). These edge electrodes 9 cover the entire edge surfaces of the strip-shaped substrate 2B, the lower surface of the back electrode 4 located near the edge surfaces of the strip-shaped substrate 2B, the upper surface of the front electrode 3, and the surface of the auxiliary film 8.

[0042] Next, the rectangular substrate 2B is divided into multiple chip substrates 2C along the secondary dividing grooves, and then these chip substrates 2C are electrolytically plated with Ni to form a barrier layer 11 that covers the entire end electrode 9 and the portion of the back electrode 4 exposed from the end electrode 9. Thereafter, the chip substrate 2C is electrolytically plated with Sn to form an external connection layer 12 that covers the entire surface of the barrier layer 11, as shown in Figures 4(h) and 5(h). The barrier layer 11 and external connection layer 12 form an external plating layer 10 with a two-layer structure, and at this point the chip resistor 1 shown in Figures 1 to 3 is obtained.

[0043] As described above, in the chip resistor 1 of the first embodiment, an auxiliary film 8 is present inside the boundary where the external plating layer 10 and the overcoat layer 7 meet, and this auxiliary film 8 is formed of a resin material containing conductive particles, and a portion of the auxiliary film 8 penetrates between the undercoat layer 6 and the overcoat layer 7. Therefore, even if sulfurizing gas penetrates through the boundary between the external plating layer 10 and the overcoat layer 7, the sulfurizing gas is blocked by the auxiliary film 8 and does not reach the front electrode 3, thereby preventing sulfurization of the front electrode 3.

[0044] Furthermore, in chip resistors with low resistance (e.g., 100 mΩ or less), the resistance of the front electrode 3 affects the resistance of the entire chip resistor, resulting in a higher TCR for chip resistors with lower resistance. In the chip resistor 1 according to the first embodiment, the auxiliary film 8 is formed in a position spanning the connection between the front electrode 3 and the resistor 5. As shown by the arrow in Figure 3(b), this shortens the length of the front electrode 3 located between the auxiliary film 8 and the resistor 5 in the current path from the electrode region (the entire region including the front electrode 3, outer plating layer 10, and auxiliary film 8) to the resistor 5. This also facilitates current flow by the thickness of the auxiliary film 8, thereby lowering the resistance of the electrode portion, ensuring a low TCR even at low resistance.

[0045] Furthermore, in the chip resistor 1 according to the first embodiment, the auxiliary film 8 is formed of a resin material containing conductive particles, so that the auxiliary film 8 can be easily formed using a thick-film technique of printing and heat-curing a resin paste. In particular, in this embodiment, the auxiliary film 8 is formed of a resin material containing metal particles such as Ag and Cu, and these metal particles react with the sulfide gas to fix the sulfide gas inside the auxiliary film 8, thereby reliably preventing the sulfide gas from entering the interior.

[0046] FIG. 6 is a cross-sectional view showing the main part of a chip resistor 20 according to the second embodiment, and parts corresponding to those in FIGS. 1 to 3 are given the same reference numerals.

[0047] The chip resistor 20 shown in Figure 6 differs from the chip resistor 1 of the first embodiment in that the connection portion of the resistor 5 with the front electrode 3 is an exposed portion 5b that is not covered by the undercoat layer 6, and the auxiliary film 8 is formed so as to cover the entire exposed portion 5b; otherwise, the configuration is basically the same.

[0048] In the chip resistor 20 of the second embodiment configured in this manner, the area of ​​the surface electrode 3 connected to the external plating layer 10 at a position not covered by the auxiliary film 8 can be increased.In other words, the length of the surface electrode 3 located between the auxiliary film 8 and the resistor 5 in the current path from the electrode area (the entire area including the surface electrode 3, external plating layer 10, and auxiliary film 8) to the resistor 5 is shortened, thereby reducing the resistance value of the electrode portion and more effectively suppressing deterioration of TCR.

[0049] FIG. 7 is a cross-sectional view showing the main part of a chip resistor 30 according to the third embodiment, and parts corresponding to those in FIGS. 1 to 3 are given the same reference numerals.

[0050] 7 differs from the chip resistor 1 according to the first embodiment in that a second front electrode 3a is formed on the top surface of the front electrode 3, excluding the connection portion with the resistor 5, and an auxiliary film 8 is formed inside this second front electrode 3a; otherwise, the configuration is basically the same. Here, the front electrode 3 and the second front electrode 3a are made of the same material, and the second front electrode 3a is formed on the front electrode 3 before the auxiliary film 8 is formed.

[0051] In the chip resistor 30 of the third embodiment configured in this manner, by forming the second front electrode 3a on the front electrode 3 excluding the connection portion with the resistor 5, a concave step is created at the connection portion with the resistor 5 on the front electrode 3. Therefore, when forming the auxiliary film 8 made of a resin material in the next process, the step at the connection portion prevents the resin from flowing onto the second front electrode 3a, and the auxiliary film 8 can be formed accurately in the specified position.

[0052] Furthermore, in the chip resistor 30 according to the third embodiment, both the undercoat layer 6 and the overcoat layer 7 are set to be short relative to the length of the resistor element 5 in the inter-electrode direction, the auxiliary film 8 is located above the connection between the front electrode 3 and the resistor element 5, and an outer plating layer 10 is further formed on top of this auxiliary film 8, so that the entire surface of the front electrode 3 is covered with the outer plating layer 10. As a result, the resistivity of the electrode portion can be further reduced, and the TCR can be improved.

[0053] FIG. 8 is a cross-sectional view showing the main part of a chip resistor 40 according to the fourth embodiment, and parts corresponding to those in FIGS. 1 to 3 are given the same reference numerals.

[0054] The chip resistor 40 shown in Figure 8 differs from the chip resistor 1 of the first embodiment in that a Cu layer 13 is provided inside the barrier layer 11 that constitutes the outer plating layer 10, but the other configurations are basically the same.

[0055] In the chip resistor 40 according to the fourth embodiment configured as described above, the resistance value of the electrode portion is reduced by providing the Cu layer 13 inside the barrier layer 11, thereby reducing the TCR. The thickness of the Cu layer 13 is preferably 15 μm to 35 μm, and if another Ni layer is provided further inside the Cu layer 13, the Cu layer 13 can be formed stably.

[0056] The present invention is not limited to the above-described embodiment, and various modifications are possible within the scope of the technical gist. For example, in the above embodiment, a chip resistor in which a back electrode that is electrically connected to a front electrode is provided on the back surface of an insulating substrate is described, but the present invention is also applicable to a chip resistor of a type that does not have such a back electrode. [Explanation of symbols]

[0057] 1,20,30,40 Chip resistors 2. Insulating substrate 2A large board 2B strip-shaped board 2C Chip Substrate 3 Surface electrode (electrode) 3a Second surface electrode (second electrode) 4 Back electrode 5 Resistors 5a Trimming groove 5b Exposed part 6 Undercoat layer (first protective film) 7 Overcoat layer (second protective film) 8 Auxiliary membrane 9 End electrode 10. Outer plating layer 11 Barrier layer 12 External Connection Layer 13 Cu layer

Claims

[Claim 1] A process for forming a resistor and electrodes connected to both ends of the resistor on an insulating substrate; forming a first protective film made of a glass material so as to cover at least a portion of the resistor; forming a second electrode on the electrode except for the portion connected to the resistor; forming an auxiliary film made of a resin material containing conductive particles at a position spanning a connection portion between the electrode and the resistor; forming a second protective film made of a resin material so as to cover a portion of the auxiliary film and the first protective film; forming an end surface electrode connected to the electrode by sputtering metal particles on the end surface of the insulating substrate; a step of forming an outer plating layer covering the end surface electrodes, the electrodes, and the auxiliary film by electrolytic plating; A method for manufacturing a chip resistor, comprising:

Citation Information

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