Semiconductor Devices

By integrating tungsten portions within through holes in the interlayer insulating film, the adhesion issue between the barrier metal and interlayer film is resolved, enhancing the structural integrity and reducing defects in semiconductor devices.

JP7782593B2Active Publication Date: 2025-12-09FUJI ELECTRIC CO LTD
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Patent Information

Application Number
JP2024002288
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-09-11
Filing Date
2024-01-11
Publication Date
2025-12-09
Estimated Expiration
2041-04-08

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Abstract

To provide a semiconductor device in which separation between an interlayer insulating film and a barrier metal layer is suppressed.SOLUTION: A semiconductor device includes a gate pad part 50 that is provided over an upper surface of a semiconductor substrate 10 and separated from an emitter electrode, a wire wiring part 202 that is connected to a wire connection region 204 on an upper surface of the gate pad part, a wiring layer 51 that is provided between the semiconductor substrate and the gate pad part and includes a region overlapping with the connection region, an interlayer insulating film 38 that is provided between the wiring layer and the gate pad part and includes a penetration hole 210 below the connection region, a tungsten part 230 that is provided inside the penetration hole, electrically connects the wiring layer and the pad part, and contains tungsten, and a barrier metal layer 220 that is provided covering an upper surface of the interlayer insulating film below the connection region and contains titanium.SELECTED DRAWING: Figure 2A
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Description

[Technical Field]

[0001] The present invention relates to a semiconductor device. [Background technology]

[0002] BACKGROUND ART Conventionally, in semiconductor devices including transistors and the like, structures in which a barrier metal containing titanium is provided have been known (see, for example, Patent Documents 1 to 3). Patent Document 1: Japanese Patent Application Laid-Open No. 2007-227556 Patent Document 2: JP 2020-31154 A Patent Document 3: JP 2020-35847 A Problem to be Solved

[0003] Peeling may occur between the barrier metal and the interlayer insulating film.

[0004] In order to solve the above problem, one aspect of the present invention provides a semiconductor device including a semiconductor substrate. The semiconductor device may include an emitter electrode provided above an upper surface of the semiconductor substrate. The semiconductor device may include a pad portion provided above the upper surface of the semiconductor substrate and separated from the emitter electrode. The semiconductor device may include a wire interconnect portion connected to a connection region on an upper surface of the pad portion. The semiconductor device may include a wiring layer provided between the semiconductor substrate and the pad portion and including a region overlapping with the connection region. The semiconductor device may include an interlayer insulating film provided between the wiring layer and the pad portion and having a through hole below the connection region. The semiconductor device may include a tungsten portion provided inside the through hole and containing tungsten, electrically connecting the wiring layer and the pad portion. The semiconductor device may include a barrier metal layer provided covering an upper surface of the interlayer insulating film and containing titanium.

[0005] In the lower connection region overlapping the connection region in top view, the area of ​​the region where the tungsten portion is provided may be 20% or more of the area of ​​the lower connection region.

[0006] The area of ​​the region where the tungsten portion is provided may be 50% or more of the area of ​​the lower connection region.

[0007] The entire lower connection region may be provided with a tungsten portion.

[0008] The tungsten portion may cover a part of the upper surface of the interlayer insulating film.

[0009] The tungsten portion may cover the upper surface of the interlayer insulating film in a region other than the region below the connection.

[0010] The tungsten portion may be provided over the entire area overlapping with the pad portion in top view.

[0011] To solve the above problem, another aspect of the present invention provides a semiconductor device in which a main current flows in the depth direction. The semiconductor device may include a trench on the upper surface side of a semiconductor substrate, the trench having a longitudinal axis in a first direction. Any of the semiconductor devices may include a first metal electrode portion provided above the upper surface of the semiconductor substrate. Any of the semiconductor devices may include a second metal electrode portion provided above the upper surface of the semiconductor substrate and separated from the first metal electrode portion. Any of the semiconductor devices may include an insulating film provided between the first metal electrode portion and the upper surface and between the second metal electrode portion and the upper surface. Any of the semiconductor devices may include a stripe-shaped first through-hole provided in the insulating film and extending in the first direction, and filled with the second metal electrode portion. In any of the semiconductor devices, the second metal electrode portion may have a pad portion to which a wiring is connected.

[0012] In any of the semiconductor devices described above, the wiring may include a wire wiring portion connected to the connection region of the pad portion. In any of the semiconductor devices described above, the first through holes may be provided in a plurality of lower connection regions overlapping with the connection region.

[0013] In any of the above semiconductor devices, the first through holes may be provided continuously in the first direction in the lower connection region.

[0014] To solve the above problem, another aspect of the present invention provides a semiconductor device in which a main current flows in the depth direction. The semiconductor device may include a first metal electrode portion provided above an upper surface of a semiconductor substrate. Any of the semiconductor devices may include a second metal electrode portion provided above the upper surface of the semiconductor substrate and separated from the first metal electrode portion. Any of the semiconductor devices may include an insulating film provided between the first metal electrode portion and the upper surface and between the second metal electrode portion and the upper surface. Any of the semiconductor devices may include stripe-shaped first through holes provided in the insulating film and extending in a first direction, and filled with the second metal electrode portion. Any of the semiconductor devices may include a wire wiring portion connected to a connection region of a pad portion of the second metal electrode portion. In any of the semiconductor devices, a plurality of the first through holes may be provided in a connection lower region overlapping the connection region, and each of the first through holes may be provided continuously in the first direction.

[0015] Any of the above semiconductor devices may include a wiring layer provided between the insulating film and the second metal electrode portion and overlapping the connection region.

[0016] Any of the above semiconductor devices may include a protective member covering a partial area of ​​an upper surface of the pad portion. In any of the above semiconductor devices, the first through holes may be continuously provided in the first direction below an opening area of ​​the upper surface of the pad portion that is not covered by the protective member and is exposed.

[0017] In any of the above semiconductor devices, the first through hole may extend in the first direction beyond an end of the pad portion.

[0018] Any of the above semiconductor devices may further include stripe-shaped second through holes provided in the insulating film and extending in the first direction, the second through holes being filled with the first metal electrode portions.

[0019] In any of the above semiconductor devices, the first metal electrode portion may be at least partially connected to the semiconductor substrate via the second through hole, and the first through hole may be provided above and spaced apart from an upper surface of the semiconductor substrate.

[0020] In any of the above semiconductor devices, a plurality of the second through holes may be provided. In any of the above semiconductor devices, the intervals between the second through holes may be different from the intervals between the first through holes.

[0021] In any of the above semiconductor devices, the first metal electrode portion may have a first electrode containing aluminum, a barrier metal layer containing titanium, and a tungsten portion containing tungsten.

[0022] In any of the above semiconductor devices, the pad portion may be configured to contain aluminum. In any of the above semiconductor devices, the second metal electrode portion may have a barrier metal layer containing titanium and a tungsten portion containing tungsten.

[0023] In any of the above semiconductor devices, the insulating film may include an interlayer insulating film that is a BPSG film or a BSG film, and an oxide film obtained by oxidizing the semiconductor substrate or a nitride film obtained by nitriding the semiconductor substrate. [Brief explanation of the drawings]

[0024] [Figure 1] 1 is a top view showing an example of a semiconductor device 100. FIG. [Figure 2A] FIG. 2 is a diagram showing an example of a cross section AA in FIG. [Figure 2B] FIG. 2 is a diagram showing an example of a cross section BB in FIG. [Figure 3] FIG. 10 is a diagram showing an example of the arrangement of the tungsten portion 230 when viewed from above. [Figure 4] 10 is a diagram showing an example of the results of a tensile test on a plurality of semiconductor devices 100. FIG. [Figure 5] FIG. 10 is a diagram showing another example of the AA cross section. [Figure 6] 6 is a diagram showing an example of the arrangement of the tungsten portion 230 in the semiconductor device 100 shown in FIG. 5 as viewed from above. [Figure 7] FIG. 10 is a diagram showing another example of the AA cross section. [Figure 8] 8 is a diagram showing an example of the arrangement of the tungsten portion 230 in the semiconductor device 100 shown in FIG. 7 as viewed from above. [Figure 9] FIG. 10 is a diagram showing another example of the AA cross section. [Figure 10] 10 is a diagram showing an example of the arrangement of the tungsten portion 230 in the semiconductor device 100 shown in FIG. 9 as viewed from above. [Figure 11] FIG. 10 is a diagram showing another example of the AA cross section. [Figure 12] 12 is a diagram showing an example of the arrangement of the tungsten portion 230 in the semiconductor device 100 shown in FIG. 11 as viewed from above. [Figure 13] FIG. 2 is an enlarged cross-sectional view of the vicinity of a through-hole 210. [Figure 14] 10 is a diagram showing an example of the arrangement of connection regions 206 on the upper surface of the gate pad 50. FIG. [Figure 15] 10 is a diagram showing another example of the arrangement of the connection region 206 on the upper surface of the gate pad 50. FIG. [Figure 16]1 is a diagram showing an example of an XZ cross section of an active portion 120. FIG. [Figure 17] 10 is a diagram showing another example of the arrangement of the tungsten portion 230 and the through-holes 210 as viewed from above. FIG. [Figure 18] 10 is a diagram showing another example of the arrangement of the tungsten portion 230 and the through-holes 210 as viewed from above. FIG. [Figure 19] FIG. 19 is a diagram showing an example of a CC cross section in FIG. 18. [Figure 20] FIG. 19 is a diagram showing an example of the DD cross section in FIG. 18. [Figure 21] 10 is a diagram showing another example of the arrangement of the tungsten portion 230 and the through-holes 210 as viewed from above. FIG. [Figure 22] 22 is an enlarged view of the tungsten portion 230-1 and the tungsten portion 230-2 shown in FIG. 21. [Figure 23] 10A and 10B are diagrams showing other examples of the shapes of the through-hole 210 and the tungsten portion 230. FIG. [Figure 24] FIG. 24 is a diagram showing an example of an E-E cross section in FIG. 23. [Figure 25] FIG. 24 is a diagram showing an example of an FF cross section in FIG. 23. [Figure 26] 10 is a diagram showing another example of the arrangement of the tungsten portion 230 and the through-holes 210 as viewed from above. FIG. [Figure 27] 27 is an enlarged view of the tungsten portion 230-1 and the tungsten portion 230-2 shown in FIG. 26. [Figure 28] 10 is a diagram showing another example of the arrangement of the tungsten portion 230 and the through-holes 210 as viewed from above. FIG. [Figure 29] 29 is an enlarged view of the tungsten portion 230-1 and the tungsten portion 230-2 shown in FIG. 28. [Figure 30] 29 is an enlarged view showing another example of the tungsten portion 230-1 and the tungsten portion 230-2 shown in FIG. 28. FIG. DETAILED DESCRIPTION OF THE INVENTION

[0025] The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the scope of the invention. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention. In this specification and drawings, elements having substantially the same function and configuration are designated by the same reference numerals to avoid redundant description, and elements not directly related to the present invention are not shown. Furthermore, in a single drawing, elements having the same function and configuration may be designated by the same reference numeral, and the reference numerals may be omitted for other elements.

[0026] In this specification, one side in a direction parallel to the depth direction of a semiconductor substrate is referred to as "upper" and the other side as "lower." Of the two main surfaces of a substrate, layer, or other member, one surface is referred to as the upper surface and the other surface is referred to as the lower surface. The directions of "upper" and "lower" are not limited to the direction of gravity or the directions when the semiconductor module is mounted.

[0027] In this specification, technical matters may be described using orthogonal coordinate axes, i.e., the X-axis, Y-axis, and Z-axis. The orthogonal coordinate axes merely identify the relative positions of components and do not limit a specific direction. For example, the Z-axis does not limit the height direction relative to the ground. The +Z-axis direction and the -Z-axis direction are opposite directions. When the Z-axis direction is referred to without specifying positive or negative, it means a direction parallel to the +Z-axis and the -Z-axis. In this specification, the orthogonal axes parallel to the top and bottom surfaces of the semiconductor substrate are referred to as the X-axis and Y-axis. Furthermore, the axis perpendicular to the top and bottom surfaces of the semiconductor substrate is referred to as the Z-axis. In this specification, the direction of the Z-axis may be referred to as the depth direction. In this specification, the direction parallel to the top and bottom surfaces of the semiconductor substrate, including the X-axis and Y-axis, may be referred to as the horizontal direction.

[0028] In this specification, when we say "same" or "equal," it may include cases where there is an error due to manufacturing variations, etc. The error is, for example, within 10%.

[0029] FIG. 1 is a top view showing an example of a semiconductor device 100. The semiconductor device 100 includes a semiconductor substrate 10, an emitter electrode 52, and a gate pad 50. The semiconductor substrate 10 is a substrate formed of a semiconductor material such as silicon or a compound semiconductor. The semiconductor substrate 10 has edges 102 in a top view. In this specification, the term "top view" refers to the projection of the position of a given component, such as the semiconductor substrate 10 or the semiconductor device 100, onto the top surface of the component. The semiconductor substrate 10 of this example has two pairs of edges 102 facing each other in a top view. FIG. 1 shows a pair of edges 102-1 and 102-2 facing each other. In FIG. 1, the direction parallel to the edges 102-1 and 102-2 is the Y-axis direction, and the direction perpendicular to the edges 102-1 and 102-2 is the X-axis direction.

[0030] The emitter electrode 52 and the gate pad 50 are electrodes containing a metal such as aluminum. The emitter electrode 52 and the gate pad 50 are separated from each other in a top view. A protective member such as polyimide may be provided between the emitter electrode 52 and the gate pad 50. An insulating film is provided between the emitter electrode 52 and the gate pad 50 and the semiconductor substrate 10. The emitter electrode 52 and the gate pad 50 are connected to the semiconductor substrate 10 or a member provided on the upper surface of the semiconductor substrate 10 via contact holes provided in the insulating film.

[0031] Fig. 2A is a diagram showing an example of an AA cross section in Fig. 1. The AA cross section is an XZ plane passing through the gate pad 50 and the connection portion 204. Fig. 2B is a diagram showing an example of a BB cross section in Fig. 1. The BB cross section is an XZ plane passing through the emitter electrode 52.

[0032] 2B, the emitter electrode 52 is electrically connected to the semiconductor substrate 10 via a barrier metal layer 220 and a tungsten portion 230 in a contact hole (through hole) 210 provided in the interlayer insulating film 38. For example, the emitter electrode 52 may be connected to a first conductivity type source region 22 and a contact region 23 of an IGBT (insulated gate bipolar transistor). As an example, the first conductivity type is N type. A trench 25 may be provided in the surface of the semiconductor substrate 10, and the inside of the trench 25 may be filled with a gate electrode 24 via an insulating film 44. In this example, the trench 25 is provided in the upper surface 21 of the semiconductor substrate 10 and extends in the Y-axis direction. That is, the trench 25 has a longitudinal direction in the Y-axis direction in the upper surface 21 of the semiconductor substrate 10.

[0033] In FIG. 2A, the gate pad 50 is electrically connected to the wiring layer 51 via a barrier metal layer 220 and a tungsten portion 230 in a contact hole (through hole) 210 provided in the interlayer insulating film 38. The wiring layer 51 may be provided on the upper surface of the semiconductor substrate 10 via an insulating film 44. The wiring layer 51 is made of polysilicon, for example. For example, the gate pad 50 is connected to a gate electrode 24 of a gate trench or the like in an IGBT. The AA cross section will be described in detail later. The emitter electrode 52 may be connected to a first conductivity type source region 22 in a MOS transistor. The insulating film and contact hole are omitted from FIG. 1.

[0034] 1, the emitter electrode 52 may be the electrode with the largest area in a top view among the electrodes provided on the top surface of the semiconductor substrate 10. The gate pad 50 may be disposed between the emitter electrode 52 and the edge 102-1 in a top view. The gate pad 50 may be sandwiched between the emitter electrodes 52 in the Y-axis direction.

[0035] A lead frame or wiring such as a wire (not shown) is connected to the upper surface of the emitter electrode 52. A wire wiring portion 202 is connected to the upper surface of the gate pad 50. The wire wiring portion 202 may have a connection portion 204 that contacts the upper surface of the gate pad 50. The connection portion 204 may be a fixing material such as solder, or may be a part of the wire wiring. The wire wiring may be ultrasonically bonded or crimped to the upper surface of the emitter electrode 52 at the connection portion 204.

[0036] An active portion 120 is provided in the semiconductor substrate 10. The active portion 120 is a region in which a main current flows in the depth direction between the upper and lower surfaces of the semiconductor substrate 10 when the semiconductor device 100 is controlled to an on-state. The active portion 120 is a region in the semiconductor substrate 10 where a transistor such as an IGBT or a diode such as a free wheel diode (FWD) is provided. The active portion 120 may be a region covered by the emitter electrodes 52. In this case, the region sandwiched between the emitter electrodes 52 in a top view may also be the active portion 120. Furthermore, when a guard ring or a field plate is provided annularly along the outer periphery of the semiconductor substrate 10, the region surrounded by the guard ring or the field plate may also be the active portion 120. The guard ring is a P-type region provided from the upper surface of the semiconductor substrate 10 to a predetermined depth. The field plate is a conductive member provided above the upper surface of the semiconductor substrate 10. An insulating film is provided between the field plate and the semiconductor substrate 10. The guard ring and field plate may be provided so as to pass between the gate pad 50 (described later) and the edge 102-1.

[0037] As described above, the emitter electrode 52 is electrically connected to the active section 120 via the contact hole (through hole 210). As described above, the gate pad 50 may be connected to a gate runner (wiring layer 51) made of polysilicon, aluminum, or the like via the contact hole. A gate voltage applied to the gate pad 50 is supplied to the gate electrodes 24 of the respective transistor sections in the active section 120 by the gate runner or the like.

[0038] The semiconductor device 100 may include a diode element 178. In this example, the diode element 178 is a PN junction diode disposed above the semiconductor substrate 10. The diode element 178 may function as a temperature detection unit. The diode element 178 may be disposed approximately in the center of the semiconductor substrate 10 in a top view. For example, the diode element 178 may cover the central position of the semiconductor substrate 10. The diode element 178 may be sandwiched between the emitter electrodes 52 in a top view. In this example, the emitter electrode 52 is divided into at least two regions, and the diode element 178 is sandwiched between the two regions of the emitter electrode 52.

[0039] The semiconductor device 100 may have an anode pad 174 and a cathode pad 176. The anode pad 174 is electrically connected to the anode of a diode element 178, and the cathode pad 176 is electrically connected to the cathode of the diode element 178. The anode pad 174 and the cathode pad 176 may be connected to the diode element 178 by wiring made of polysilicon, aluminum, or the like.

[0040] As an example, the gate pad 50 is disposed on the edge 102-1 side, and the anode pad 174 and the cathode pad 176 are disposed on the edge 102-2 side. The edge 102-1 side refers to the edge 102-1 side of the semiconductor substrate 10 from the center in the X-axis direction, and the edge 102-2 side refers to the edge 102-2 side of the semiconductor substrate 10 from the center. As described above, the gate pad 50 may be disposed between the emitter electrode 52 and the edge 102-1. The anode pad 174 and the cathode pad 176 may be disposed between the emitter electrode 52 and the edge 102-2. Similar to the gate pad 50, the wire interconnection portion 202 may be connected to the upper surfaces of the anode pad 174 and the cathode pad 176.

[0041] The semiconductor device 100 may further include a current sense pad 172. A current sense region 110 may be provided in the semiconductor substrate 10 below the current sense pad 172. The current sense region 110 may be provided electrically in parallel with the transistor portion in the active portion 120 and may include a transistor portion having a similar structure. In a top view, the current sense region 110 is smaller than the active portion 120. The current flowing in the active portion 120 can be estimated from the current flowing in the current sense region 110. The current sense pad 172 may be disposed between the emitter electrode 52 and the edge 102-2. Similar to the gate pad 50, a wire wiring portion 202 may be connected to the upper surface of the current sense pad 172.

[0042] The gate pad 50, anode pad 174, cathode pad 176, and current sense pad 172 shown in FIG. 1 are examples of pad portions. However, the pad portions are not limited to the pads described above. The pad portions are disposed above the upper surface of the semiconductor substrate 10, are formed of a metal such as aluminum, and are separated from the emitter electrode 52. While FIG. 2A and subsequent figures mainly describe the structure near the gate pad 50, the vicinity of each pad portion may also have a structure similar to that near the gate pad 50.

[0043] 2A is a diagram showing an example of the AA cross section in FIG. 1. The AA cross section is an XZ plane passing through the gate pad 50 and the connection portion 204. In this cross section, the semiconductor device 100 of this example includes a semiconductor substrate 10, an insulating film 44, a wiring layer 51, an interlayer insulating film 38, a barrier metal layer 220, a tungsten portion 230, a gate pad 50, a connection portion 204, and a wire wiring portion 202. A portion of the upper surface of the gate pad 50 may be covered with a protective member 240 such as polyimide. An exposed region of the upper surface of the gate pad 50 that is not covered with the protective member 240 is referred to as an opening region 201.

[0044] The connection portion 204 is connected to the upper surface of the gate pad 50 in the opening region 201. The portion of the upper surface of the gate pad 50 that contacts the connection portion 204 is referred to as a connection region 206. The upper surface of the semiconductor device 100 is sealed with a sealing resin such as silicone gel. This electrically insulates the upper surface of the semiconductor device 100 from the outside and also protects the semiconductor device 100 from foreign substances such as moisture.

[0045] The semiconductor substrate 10 may have a drift region 20 of a first conductivity type and a well region 11 of a second conductivity type. In this specification, the first conductivity type is N-type and the second conductivity type is P-type, but the conductivity types may be reversed. The drift region 20 may also be provided in the entire active section 120 shown in FIG. 1. The well region 11 is provided below the gate pad 50 and between the drift region 20 and the upper surface 21 of the semiconductor substrate 10.

[0046] The wiring layer 51 is provided between the semiconductor substrate 10 and the gate pad 50. The wiring layer 51 is made of a conductive material such as polysilicon doped with impurities. In this example, the wiring layer 51 also functions as the gate runner described above. The wiring layer 51 includes a region that overlaps with at least a portion of the connection region 206 in a top view. The wiring layer 51 may include a region that overlaps with the entire connection region 206, may include a region that overlaps with the entire opening region 201, or may include a region that overlaps with the entire gate pad 50.

[0047] An insulating film 44 is provided between the wiring layer 51 and the upper surface 21 of the semiconductor substrate 10. The insulating film 44 is, for example, a film obtained by oxidizing or nitriding the upper surface 21 of the semiconductor substrate 10, but is not limited to this. The insulating film 44 may be formed of the same material as the gate insulating film that insulates the gate electrode and the semiconductor substrate 10 in the active portion 120.

[0048] The interlayer insulating film 38 is an insulating layer provided between the wiring layer 51 and the gate pad 50. The interlayer insulating film 38 is, for example, boron-doped silicate glass (BPSG: boron phosphorus silicate glass or BSG: boron silicate glass). The interlayer insulating film 38 may be a laminate in which boron-doped silicate glass is laminated on an NSG film. The NSG film is a film made of NSG (non-doped silicate glass) that is not doped with boron or phosphorus. The thickness of the interlayer insulating film 38 is, for example, about 1 μm, but is not limited to this. The interlayer insulating film 38 has a through-hole 210. The through-hole 210 penetrates the interlayer insulating film 38 from the upper surface 221 to the lower surface. The gate pad 50 and the wiring layer 51 are electrically connected by filling the through-hole 210 with a conductive material. The interlayer insulating film 38 has the through-hole 210 at least below the connection region 206. The area below the connection region 206 refers to an area that is disposed below the connection region 206 and overlaps with the connection region 206 in a top view. The interlayer insulating film 38 of this example may also have through holes 210 in an area that does not overlap with the connection region 206.

[0049] The tungsten portion 230 is formed of a material containing tungsten and is provided inside the through hole 210. The tungsten portion 230 may be formed of tungsten or an alloy containing tungsten. The upper end of the tungsten portion 230 is in contact with the gate pad 50. The lower end of the tungsten portion 230 may be in contact with the wiring layer 51, or may be connected to the wiring layer 51 via another conductive member. Inside the through hole 210, the tungsten portion 230 may be in contact with the interlayer insulating film 38, or may be in contact with another conductive member.

[0050] The barrier metal layer 220 covers at least the upper surface 221 of the interlayer insulating film 38 below the connection region 206. The barrier metal layer 220 is formed of a material containing titanium. The barrier metal layer 220 may also be formed by stacking different materials. As an example, the barrier metal layer 220 is a stacked structure in which a titanium nitride layer is stacked on a titanium layer. By forming the barrier metal layer 220 as a stacked structure in which a titanium nitride layer is stacked on a titanium layer, the titanium layer reacts with the polysilicon wiring layer 51 to form titanium silicide, thereby reducing the contact resistance between the wiring layer 51 and the barrier metal layer 220. Furthermore, the formation of titanium silicide thins the titanium layer, for example, to a thickness of several nanometers or less, allowing hydrogen to permeate the barrier metal layer 220 and reach the underlying layers. This enables damage to be repaired inside the semiconductor device 100 during the manufacturing process by annealing in a hydrogen atmosphere. Here, damage refers to, for example, dangling bonds present at the interface between the insulating film 44 and the semiconductor substrate 10. If the titanium layer is thick, for example, about 20 nm or more, hydrogen is adsorbed by the titanium layer even when annealing is performed in a hydrogen atmosphere, preventing the hydrogen from reaching the layers below the titanium layer. Therefore, damage formed inside the semiconductor device 100 cannot be repaired by annealing in a hydrogen atmosphere. The thickness of the barrier metal layer 220, including the titanium layer and titanium nitride layer on the upper surface 221 of the interlayer insulating film 38, may be about 50 nm to 200 nm.

[0051] The barrier metal layer 220 may also be provided in a region that does not overlap with the connection region 206 in top view. The barrier metal layer 220 may also be provided below the protective member 240. The barrier metal layer 220 may also be provided inside the through hole 210. The barrier metal layer 220 may cover the sidewall and bottom surface of the through hole 210. In this case, the barrier metal layer 220 is disposed between the tungsten portion 230 and the wiring layer 51 and interlayer insulating film 38.

[0052] If a part of an electrode such as the emitter electrode 52 or the gate pad 50 is missing, the electric field inside the semiconductor device 100 causes resin ions contained in the sealing resin to reach the wiring layer 51 or the insulating film 44 from the upper surface side of the semiconductor device 100. In particular, in the active portion 120, the resin ions are trapped in the insulating film 44, causing a larger than normal tunnel current to flow, adversely affecting the characteristics of the semiconductor device 100, such as lowering the threshold voltage.

[0053] In contrast, by providing the barrier metal layer 220, it is possible to prevent the resin ions from reaching layers below the barrier metal layer 220. The barrier metal layer 220 is preferably provided not only below the active portion 120 but also below the pad portion. It is more preferable to provide the barrier metal layer 220 on the entire surface below the pad portion. The entire surface below the pad portion refers to the entire area below the pad portion that overlaps with the pad portion in a top view. This prevents the resin ions from reaching the wiring layer 51 or the insulating film 44 when part of the electrode of the pad portion is damaged, and also prevents the resin ions from penetrating into the active portion 120 adjacent to the pad portion, preventing a decrease in threshold voltage, etc.

[0054] However, the barrier metal layer 220 containing titanium has relatively low adhesion to the interlayer insulating film 38. For example, the titanium of the barrier metal layer 220 reacts with a material such as boron in the interlayer insulating film 38, resulting in a decrease in adhesion.

[0055] If the adhesion between the barrier metal layer 220 and the interlayer insulating film 38 decreases, the barrier metal layer 220 and the interlayer insulating film 38 are likely to peel off when the wire interconnection portion 202 is pulled. The reason why the barrier metal layer 220 and the interlayer insulating film 38 are likely to peel off is that when the wire interconnection portion 202 is pulled, stress is applied in the vertical direction between the barrier metal layer 220 and the interlayer insulating film 38, particularly below the connection region 206. If the adhesion at the interface between the barrier metal layer 220 and the interlayer insulating film 38 that is parallel to the XY plane (referred to as the XY interface) decreases and no structure is formed at the XY interface, the barrier metal layer 220 and the interlayer insulating film 38 are likely to peel off in the vertical direction. An example of a case where no structure is formed at the interface is when a through hole, which will be described later, is not formed. When the wire interconnection portion 202 is pulled, if the barrier metal layer 220 and the interlayer insulating film 38 are peeled off, the gate pad 50 on the barrier metal layer 220 will also be removed together with the wire interconnection portion 202 .

[0056] In this example, the through-hole 210 and the tungsten portion 230 are provided below the connection region 206. This reduces the area of ​​the XY interface between the interlayer insulating film 38 and the barrier metal layer 220 below the connection region 206. This prevents peeling between the barrier metal layer 220 and the interlayer insulating film 38. The adhesion between the tungsten portion 230 and the barrier metal layer 220 is better than the adhesion between the interlayer insulating film 38 and the barrier metal layer 220.

[0057] FIG. 3 is a diagram showing an example of the arrangement of the tungsten portion 230 in a top view. In FIG. 3, the region overlapping with the connection region 206 shown in FIG. 2A is defined as a connection lower region 208. The size and shape of the connection lower region 208 in a top view are the same as those of the connection region 206. Also, in FIG. 3, the opening region 201 is shown by a dashed line. The opening region 201 is located inside the dashed rectangle. A protective member 240 is provided outside the dashed rectangle, but is omitted in FIG. 3.

[0058] In FIG. 3 , each tungsten portion 230 extends in the Y-axis direction. The length of each tungsten portion 230 in the Y-axis direction is greater than the length in the X-axis direction. The tungsten portions 230 may have a striped shape when viewed from above. By making the tungsten portions 230 have a striped shape when viewed from above, the area of ​​the tungsten portions 230 can be increased more easily than when they are circular when viewed from above. In this example, the tungsten portions 230 may be provided from one end to the other end of the gate pad 50 in the Y-axis direction. In another example, the tungsten portions 230 may be provided in a region more inward than the end of the gate pad 50. Furthermore, the tungsten portions 230 may extend in the Y-axis direction beyond the end of the gate pad 50. The tungsten portions 230 may extend in the X-axis direction. The tungsten portions 230 extending in the X-axis direction and the tungsten portions 230 extending in the Y-axis direction may intersect in a lattice pattern.

[0059] In FIG. 2A , the width X1 of each through hole 210 in the X-axis direction may be 0.5 μm or more and 0.8 μm or less. Each width X1 may be approximately the same. The width X1 may be measured at the upper end of the through hole 210. By setting the width X1 to 0.5 μm or more, a barrier metal layer 220 of a predetermined thickness can be formed at the bottom of the through hole 210 when the barrier metal layer 220 is formed on the interlayer insulating film 38. Furthermore, by setting the width X1 to 0.8 μm or less, sufficient tungsten can be left inside the through hole 210 after etch-back. An overview of the etch-back process will be described later. The width of the upper end of the through hole 210 may be larger than the width of the lower end of the through hole 210. By setting the width of the upper end of the through hole 210 to be larger than the width of the lower end of the through hole 210 and tapering the sidewalls of the through hole 210, the thickness of the barrier metal layer 220 on the sidewalls of the through hole 210 can be increased. The state in which the sidewall of through-hole 210 is tapered means that the width of through-hole 210 continuously narrows from the upper end to the lower end. For example, the width X1 of the upper end of through-hole 210 may be 0.5 μm, and the width of the lower end of through-hole 210 may be 0.3 μm.

[0060] In this example, the multiple through holes 210 forming the multiple tungsten portions 230 are arranged at a predetermined interval along the X-axis direction. The distance X2 between two adjacent through holes 210 may be, for example, 0.5 μm or more and 3.2 μm or less. The distance X2 may be measured at the upper end of the through holes 210. The respective distances X2 may be approximately the same. The distance X2 may be equal to or greater than the width X1. By ensuring that the width X1 and distance X2 of the through holes 210 are as described above, variations in the manufacturing process can be reduced, and the tungsten portions 230 can be easily formed. Furthermore, by setting the distance X2, which is the width at which the interlayer insulating film 38 and the barrier metal layer 220 meet at the XY interface, to 3.2 μm or less, peeling between the interlayer insulating film 38 and the barrier metal layer 220 can be suppressed.

[0061] The tungsten portion 230 may be formed as follows. First, a through-hole 210 is formed in the interlayer insulating film 38 by photolithography and dry etching. Next, a barrier metal layer 220 is formed inside the through-hole 210 and on the interlayer insulating film 38. Next, a tungsten film is formed inside the through-hole 210 and on the interlayer insulating film 38, filling the inside of the through-hole 210 with tungsten. Next, the tungsten portion 230 is formed by etching back. Here, the etch-back process refers to a process of removing the tungsten film on the interlayer insulating film 38 by etching, leaving the tungsten inside the through-hole 210. This is an example of a method for forming the tungsten portion 230. The tungsten portion 230 in the gate pad 50 may be formed simultaneously with the formation of the tungsten portion 230 in the active region shown in FIG. 16, which will be described later.

[0062] In FIG. 3, the width of the connection lower region 208 in the X-axis direction is designated X3. The width X6 of each tungsten portion 230 in the X-axis direction is smaller than the width X3. The width X6 may be equal to or smaller than half, or even one-third, of the width X3. The distance X7 between adjacent tungsten portions 230 in the X-axis direction is smaller than the width X3. The distance X7 may be equal to or smaller than half, or even one-third, of the width X3. As shown in FIGS. 2A and 3, the connection lower region 208 may include multiple tungsten portions 230 arranged in the X-axis direction.

[0063] In the connection lower region 208, the area of ​​the region where the through hole 210 is formed is defined as S1 in a top view, and the entire area of ​​the connection lower region 208 is defined as S. The area S1 of the through hole 210 is preferably 20% or more of the area S of the connection lower region 208. That is, in the connection lower region 208, the area of ​​the XY interface between the barrier metal layer 220 and the gate pad 50 is affected by the thickness of the barrier metal layer 220 on the sidewall of the through hole 210, but may be approximately 0% or more and 80% or less of the area S of the connection lower region 208. By providing the through hole 210, the area of ​​the XY interface between the interlayer insulating film 38 and the barrier metal layer 220, which have weak adhesion, is reduced, preventing peeling between the interlayer insulating film 38 and the barrier metal layer 220 and preventing defects such as removal of the gate pad 50 due to peeling.

[0064] FIG. 4 shows example results of tensile tests on multiple semiconductor devices 100. In the tensile test, the wire wiring portion 202 is pulled upward to determine whether the gate pad 50 peels off from the interlayer insulating film 38. In the tensile test, a device in which the wire wiring portion 202 or the connection portion 204 breaks before the gate pad 50 peels off is determined to be a non-defective product. The peeling rate is the percentage of gate pads 50 that are removed before the wire wiring portion 202 or the connection portion 204 breaks. In FIG. 4, the vertical axis represents the peeling rate, and the horizontal axis represents the area ratio S1 / S of the area of ​​the lower connection region 208 where the through hole 210 is formed to the area of ​​the lower connection region 208, expressed as a percentage. The wires used in the tensile test were 400 μm or 500 μm in diameter. Tensile tests using wires of other diameters were also performed, but no significant dependency on the wire diameter was observed. The wire may be made of aluminum or an aluminum-based compound, and may be doped with, for example, silicon.

[0065] As shown in Figure 4, when the area ratio S1 / S was 20% or more, the peeling occurrence rate was 0%. Therefore, it is preferable that the area ratio S1 / S is 20% or more. By setting the area ratio S1 / S to 20% or more, defects such as the gate pad 50 coming off were eliminated. The area ratio may be 50% or more, or may be 100%.

[0066] In addition, the area of ​​the opening region 201 as viewed from above is S 201 In the region below the opening region 201, the area of ​​the tungsten portion 230 as viewed from above is defined as S1'. The area ratio S1' / S 201 However, the area ratio S1' / S may be 20% or more, 50% or more, or even 100%. When the wire wiring portion 202 is bonded to the opening region 201, the position of the connection lower region 208 may vary. 201 Setting the area ratio S1 / S to 20% or more is effective in suppressing defects such as removal of the gate pad 50. In other words, even if the position of the region 208 below the wire bond connection varies, keeping the area ratio S1 / S at 20% or more is effective in suppressing defects such as removal of the gate pad 50.

[0067] In addition, the area of ​​the gate pad 50 in top view is S 50 In addition, in the region below the gate pad 50, the area of ​​the tungsten portion 230 in a top view is defined as S1''. The area ratio S1'' / S 50 However, the area ratio S1 / S may be 0.3% or more, 20% or more, 50% or more, or even 100%. That is, to prevent the occurrence of defects in which the gate pad 50 is removed, it is important that the area ratio S1 / S is 20% or more, and the area of ​​the tungsten portion may be small outside the lower connection region 208, for example, outside the opening region 201. Since an area ratio S1 / S of 20% or more is effective in preventing defects in which the gate pad 50 is removed, in FIG. 2A , the width X1 and the distance X2 of the through hole 210 may satisfy the relational expression X1 / (X1+X2)≧0.2 so that the area ratio S1 / S is 20% or more.

[0068] FIG. 5 is a diagram showing another example of the AA cross section. This example shows a cross-sectional structure in which the width X1 of the through hole 210 in the X-axis direction is greater than 0.8 μm. The through hole 210 may be stripe-shaped extending in the Y-axis direction, as in the previous example. In the connection lower region 208, when the area of ​​the region where the through hole 210 is formed in a top view is S1 and the total area of ​​the connection lower region 208 is S, the area ratio S1 / S may be greater than 50%. The semiconductor device 100 of this example differs from the example of FIG. 2A in the structures of the tungsten portion 230, the through hole 210, the barrier metal layer 220, and the interlayer insulating film 38. The other structures are the same as the example of FIG. 2A.

[0069] FIG. 6 is a diagram showing an example of the arrangement of the tungsten portion 230 in the semiconductor device 100 shown in FIG. 5 in a top view. In the examples of FIGS. 5 and 6, the tungsten portion 230 is provided over the entire connection lower region 208 in a top view. The width of the tungsten portion 230 in the X-axis direction is greater than the width X3 of the connection lower region 208. In this example, the end of the tungsten portion 230 is located below the gate pad 50 and on the barrier metal layer 220 in a region other than the connection lower region 208. Below the gate pad 50 refers to a region that is located below the gate pad 50 and overlaps with the gate pad 50 in a top view. The barrier metal layer 220 is provided between the tungsten portion 230 and an upper surface 221 of the interlayer insulating film 38. The tungsten portion 230 may cover the entire region below the opening region 201 in a top view, or may cover the entire region below the gate pad 50. In this example, by providing the through-hole 210 in the interlayer insulating film 38 in the connection lower region 208, the XY interface between the upper surface 221 of the interlayer insulating film 38 and the barrier metal layer 220 is reduced compared to when the through-hole 210 is not provided. This makes it possible to suppress peeling between the interlayer insulating film 38 and the barrier metal layer 220 and prevent defects such as removal of the gate pad 50.

[0070] In this example, the width X1 of the through hole 210 is greater than 0.8 μm. Therefore, in the method for forming the tungsten portion 230 described above, sufficient tungsten cannot be left in the through hole 210 when etched back. This is because the tungsten inside the through hole 210 is also etched back during the tungsten etch-back process. Furthermore, tungsten that is not removed during the etch-back process may remain inside the through hole 210, potentially causing problems in subsequent processes. Problems in subsequent processes may include, for example, tungsten remaining in the through hole 210 after etch-back peeling off from the barrier metal layer 220 and becoming foreign matter. Therefore, if the width X1 is greater than 0.8 μm, it is preferable not to etch back the tungsten. In the region below the gate pad 50, the structure shown in FIGS. 5 and 6 can be formed by not etching back the tungsten after deposition. In addition, in the region where the gate runner surrounding the active portion 120 is formed, the tungsten on the interlayer insulating film 38 may be etched together with the gate pad 50 and the barrier metal layer 220. This prevents the gate pad 50 and the emitter electrode 52 from being electrically connected. 5 and 6, in this example, the width X1 may be greater than the distance X2 between two adjacent through holes 210. The width X1 may be at least twice or even three times the distance X2. The width X1 may be greater than the width of the interlayer insulating film 38 in the X-axis direction. The width X1 may be greater than or equal to the width X3 of the connection lower region 208. In this example, a plurality of through holes 210 arranged in the X-axis direction are provided below the connection portion 204. In another example, only one through hole 210 out of the plurality of through holes 210 arranged in the X-axis direction may be included below the connection portion 204.

[0071] 7 is a diagram showing another example of the AA cross section. In this example, the area ratio S1 / S is 100%, where S1 is the area of ​​the region in the lower connection region 208 where the through hole 210 is formed in a top view and S is the total area of ​​the lower connection region 208. The semiconductor device 100 of this example differs from the example of FIG. 2A in the structures of the tungsten portion 230, the through hole 210, the barrier metal layer 220, and the interlayer insulating film 38. The other structures are the same as the example of FIG. 2A.

[0072] 8 is a diagram showing an example of the arrangement of the tungsten portion 230 in the semiconductor device 100 shown in FIG. 7 in a top view. In the examples of FIGS. 7 and 8, the tungsten portion 230 and the through hole 210 are provided over the entire connection lower region 208 in a top view. The width of the tungsten portion 230 in the X-axis direction is greater than the width X3 of the connection lower region 208. In this example, the connection lower region 208 is not provided with the interlayer insulating film 38. Therefore, the XY interface between the upper surface 221 of the interlayer insulating film 38 and the barrier metal layer 220 does not exist in the connection lower region 208, and removal of the gate pad 50 due to peeling at the XY interface between the upper surface 221 of the interlayer insulating film 38 and the barrier metal layer 220 can be suppressed.

[0073] In each example described herein, the tungsten portion 230 may cover a portion of the upper surface 221 of the interlayer insulating film 38. In this case, a barrier metal layer 220 may be provided between the tungsten portion 230 and the upper surface 221 of the interlayer insulating film 38. The tungsten portion 230 in this example is disposed below the gate pad 50 and above the interlayer insulating film 38 in a region other than the lower connection region 208. The tungsten portion 230 may cover the entire region below the opening region 201 in a top view, or may cover the entire region below the gate pad 50.

[0074] The through hole 210 is provided in a part of the region below the gate pad 50, including the connection lower region 208. The through hole 210 may be provided in a region smaller than the opening region 201 in top view, may be provided in the same region as the opening region 201, or may be provided in a region larger than the opening region 201. One through hole 210 including the connection lower region 208 may be provided below the gate pad 50, or through holes 210 may be provided in regions other than the connection lower region 208.

[0075] The tungsten portion 230 provided inside the through hole 210 and the tungsten portion 230 provided above the interlayer insulating film 38 may be continuous. After the through hole 210 is formed in the interlayer insulating film 38 and the barrier metal layer 220 is laminated thereon, tungsten is deposited inside the through hole 210 and above the interlayer insulating film 38. In the region below the gate pad 50, the tungsten is not etched back after deposition, thereby forming the structure shown in FIGS. 7 and 8. Furthermore, in the region where the gate runner surrounding the active portion 120 is formed, the tungsten on the interlayer insulating film 38 may be etched together with the gate pad 50 and the barrier metal layer 220. This prevents the gate pad 50 and the emitter electrode 52 from being electrically connected to each other.

[0076] FIG. 9 is a diagram showing another example of the AA cross section. The semiconductor device 100 of this example differs from the examples shown in FIGS. 1 to 8 in that, in this cross section, the tungsten portion 230 and the through-hole 210 are provided only below the connection region 206 or the opening region 201, and not in other regions below the gate pad 50. The area of ​​the gate pad 50 as viewed from above is defined as S50. The area of ​​the tungsten portion 230 in the region below the gate pad 50 as viewed from above is defined as S1″. The area ratio S1″ / S50 may be 0.3% or greater. The other structures are similar to those of any of the examples shown in FIGS. 1 to 8. This example also reduces the XY interface between the barrier metal layer 220 and the interlayer insulating film 38 in the connection lower region 208, where peeling is likely to occur, and prevents the gate pad 50 from being removed due to peeling at the XY interface between the upper surface 221 of the interlayer insulating film 38 and the barrier metal layer 220.

[0077] 10 is a diagram showing an example of the arrangement of tungsten portions 230 in the semiconductor device 100 shown in FIG. 9 in a top view. As described above, each tungsten portion 230 is arranged so as to overlap with the connection lower region 208 or the opening region 201. However, as shown in FIG. 10, each tungsten portion 230 may extend to the outside of the connection lower region 208 or the opening region 201 in the Y-axis direction. The tungsten portion 230 may extend to a position overlapping with an end of the gate pad 50 in the Y-axis direction. In another example, each tungsten portion 230 may be provided only in a region overlapping with the connection lower region 208 or the opening region 201 in the Y-axis direction.

[0078] 11 is a diagram showing another example of the AA cross section. In this example, the density of tungsten portions 230 and through holes 210 provided differs between the region below connection region 206 or opening region 201 and other regions. The other structures are similar to any of the examples shown in FIGS. 1 to 10.

[0079] In this example, the density of tungsten portions 230 and through holes 210 is higher in the region below connection region 206 or opening region 201 than in other regions. That is, a higher area ratio of tungsten portions 230 and through holes 210 is provided in the region below connection region 206 or opening region 201.

[0080] In this example, the widths of the through holes 210 and the tungsten portions 230 in the X-axis direction are equal. In the region below the connection region 206 or the opening region 201, the period in which the tungsten portions 230 and the through holes 210 are arranged in the X-axis direction is shorter than the period in other regions. In this example, too, the XY interface between the barrier metal layer 220 and the interlayer insulating film 38 in the connection lower region 208, where peeling is likely to occur, can be reduced, and peeling at the XY interface between the upper surface 221 of the interlayer insulating film 38 and the barrier metal layer 220 can be prevented, preventing the gate pad 50 from being removed.

[0081] Fig. 12 is a diagram showing an example of the arrangement of tungsten portions 230 in a top view in the semiconductor device 100 shown in Fig. 11. As described above, the period in the X-axis direction of tungsten portions 230 that overlap with connection regions 206 or opening regions 201 is shorter than the period in other regions.

[0082] FIG. 13 is an enlarged cross-sectional view of the vicinity of the through hole 210. The width of the bottom end of the through hole 210 may be narrower than the width of the top end. The tungsten portion filled in the through hole 210 may have a recess formed by etch-back at the top end. If the thickness of the barrier metal layer 220 on the top surface 221 of the interlayer insulating film 38 is Z1, the thickness of the barrier metal layer 220 on the side surface of the through hole 210 is Z2, and the thickness of the barrier metal layer 220 on the bottom end of the through hole 210 is Z3, then the relationship Z1 > Z2 > Z3 holds. Thicknesses Z1 and Z3 are lengths in the Z-axis direction. Z2 is the length perpendicular to the sidewall of the through hole 210. Even if the barrier metal layer 220 on the side surface and bottom surface of the through hole 210 is thin, it can prevent resin ions from reaching below the barrier metal layer 220 if a defect occurs in the gate pad 50. This is because tungsten portion 230 is present inside through hole 210. A portion of the titanium deposited on the bottom surface of through hole 210 may bond with silicon contained in wiring layer 51, thereby forming an alloy of titanium and silicon below barrier metal layer 220 on the bottom surface of through hole 210.

[0083] FIG. 14 is a diagram showing an example of the arrangement of the connection region 206 on the upper surface of the gate pad 50. As described above, the connection region 206 is a region where the connection portion 204 is provided. In this example, a plurality of strip-shaped tungsten portions 230 and through holes 210 extending in a first direction (in this example, the Y-axis direction) are provided. The long axis of the connection region 206 is indicated by a chain line 209. The long axis of the connection region 206 is the axis along which the length of the connection region 206 is greatest in the XY plane. The direction in which the chain line 209 extends is defined as a second direction.

[0084] In a top view, the angle θ between the first direction and the second direction may be 10 degrees or less. The angle θ may be 5 degrees or less, or may be 0 degrees. In other words, the major axis of the connection region 206 and the extension direction of the tungsten portion 230 may be approximately parallel.

[0085] 14 , when a strip-shaped tungsten portion 230 is provided, unevenness may occur on the upper surface of the gate pad 50 in accordance with the pattern of the tungsten portion 230. If the angle θ is large, the connection portion 204 will straddle many tungsten portions 230. In this case, when attempting to bond the connection portion 204 to the upper surface of the gate pad 50 by ultrasonic bonding, the force generated when ultrasonic waves are applied may not be easily transmitted to the connection portion 204. In contrast, by setting the angle θ to 10 degrees or less, the connection portion 204 can be easily bonded to the gate pad 50 by ultrasonic bonding.

[0086] FIG. 15 is a diagram showing another example of the arrangement of the connection regions 206 on the upper surface of the gate pad 50. In this example, the angle θ between the first direction and the second direction is 30 degrees or more. The angle θ may be 45 degrees or more, or may be 60 degrees or more. In this example, the number of tungsten portions 230 that the connection portions 204 straddle can be increased. In this case, the unevenness on the upper surface of the gate pad 50 that contacts the connection portions 204 increases, thereby increasing the contact area between the connection portions 204 and the gate pad 50. Furthermore, when the connection portions 204 are made of a fixing member such as solder, the bond between the connection portions 204 and the gate pad 50 can be strengthened.

[0087] 16 is a diagram showing an example of an XZ cross section of the active portion 120. N-type regions such as an emitter region, P-type regions such as a collector region, a gate electrode, a gate insulating film, and the like are formed in the semiconductor substrate 10, but are omitted from FIG. 16. In the active portion 120, an interlayer insulating film 38, a through-hole 210, a barrier metal layer 220, and a tungsten portion 230 may be provided between the emitter electrode 52 and the upper surface 21 of the semiconductor substrate 10. For example, the barrier metal layer 220 and the tungsten portion 230 may electrically connect the emitter electrode 52 and the upper surface 21 of the semiconductor substrate 10.

[0088] The width X4 in the X-axis direction of the tungsten portion 230 or the through hole 210 in the active portion 120 is defined as X4. The width X4 of the tungsten portion 230 or the through hole 210 in the active portion 120 may be different from the width X1 of the tungsten portion 230 or the through hole 210 in the connection lower region 208 described with reference to FIGS. 1 to 15 . Furthermore, the distance X5 in the X-axis direction of the through hole 210 in the active portion 120 may be different from the distance X2 of the through hole 210 in the connection lower region 208. For example, the width X1 of the through hole 210 in the connection lower region 208 may be smaller than the width X4 of the through hole 210 below the emitter electrode 52. The reason that the width X1 may be smaller than the width X4 is that the gate pad 50 does not have element structures such as a gate electrode and a gate insulating film formed therein and therefore has better flatness and is easier to micro-fabricate than the active portion 120.

[0089] Tungsten portion 230 and through hole 210 in active portion 120 have width X4 and distance X5 suitable for extracting carriers, and tungsten portion 230 and through hole 210 in connection lower region 208 have width X1 and distance X2 suitable for connecting gate pad 50 and wiring layer 51 and for preventing peeling of gate pad 50. Note that interlayer insulating film 38, through hole 210, barrier metal layer 220, and tungsten portion 230 may be formed in the same manufacturing process in the region below active portion 120 and gate pad 50.

[0090] The ratio S1 / S of the area S1 of the tungsten portion 230 provided in the active portion 120 to the entire area S of the active portion 120 is set to 20% or more, similar to the gate pad 50. Furthermore, S1 / S of the active portion 120 may be approximately 25%.

[0091] FIG. 17 is a diagram showing another example of the arrangement of the tungsten portion 230 and the through hole 210 in a top view. In this example, the tungsten portion 230 and the through hole 210 are arranged in a spiral shape in a region overlapping the gate pad 50. The center (or end point) of the spiral may be located in the connection lower region 208. Although the through hole 210 is not shown in FIG. 17, the through hole 210 is formed in substantially the same region as the tungsten portion 230. In the connection lower region 208, the area of ​​the region where the through hole 210 is formed in a top view is defined as S1, and the total area of ​​the connection lower region 208 is defined as S, so that the area ratio S1 / S is 20% or more. This prevents peeling at the XY interface between the interlayer insulating film 38 and the barrier metal layer 220. Note that the through hole 210 is omitted in FIG. 17. As a modification, the tungsten portion 230 and the through-hole 210 may not be disposed outside the opening region 201 .

[0092] FIG. 18 is a diagram showing another example of the arrangement of the tungsten portions 230 and the through holes 210 in a top view. In the examples of FIGS. 1 to 16, the tungsten portions 230 and the through holes 210 are arranged discretely in the X-axis direction and continuously in the Y-axis direction. In this example, the tungsten portions 230 and the through holes 210 are arranged discretely in the Y-axis direction. The other structures are the same as those of any of the examples of FIGS. 1 to 16. The tungsten portions 230 and the through holes 210 may be arranged discretely in two directions, for example, in the X-axis direction and the Y-axis direction. Although the illustration of the through holes 210 is omitted in FIG. 18, the through holes 210 are formed in approximately the same region as the tungsten portions 230. In the connection lower region 208, the area S1 of the region where the through holes 210 are formed in a top view is defined as S1, and the area ratio S1 / S is set to 20% or more, where S is the total area of ​​the connection lower region 208. This prevents the XY interface between the interlayer insulating film 38 and the barrier metal layer 220 from peeling off.

[0093] FIG. 19 is a diagram showing an example of the CC cross section of FIG. 18. The CC cross section is an XZ plane that passes through the gate pad 50 and the connection portion 204. FIG. 19 has the same structure as FIG. 2A. The length of the through hole 210 in the X-axis direction is defined as width X1. In this example, multiple tungsten portions 230 are arranged at predetermined intervals along the X-axis direction. The distance in the X-axis direction between two adjacent through holes 210 is defined as X2.

[0094] FIG. 20 is a diagram showing an example of the DD cross section of FIG. 18. The DD cross section is a YZ plane passing through the gate pad 50 and the connection portion 204. The length of the through hole 210 in the Y-axis direction is defined as width Y1. In this example, multiple tungsten portions 230 are arranged at predetermined intervals along the Y-axis direction. The distance in the Y-axis direction between two adjacent through holes 210 is defined as Y2. In this case, the area of ​​the connection lower region 208 in which the through hole 210 is formed in a top view is defined as S1, and the area ratio S1 / S, where S is the total area of ​​the connection lower region 208, may satisfy the relationship (X1×Y1) / ((X1+X2)×(Y1+Y2))≧0.2 so that it is 20% or more. For example, X1 may be 0.5 μm, X2 may be 1.5 μm, Y1 may be 5.0 μm, and Y2 may be 1.0 μm. Note that the through holes 210 are omitted from FIG. 18. As a modification, the tungsten portion 230 and the through-hole 210 may not be disposed outside the opening region 201 .

[0095] In any of the examples described with reference to FIGS. 1 to 20 , the interlayer insulating film 38 may be a BPSG film or a BSG film. The boron concentration in the interlayer insulating film 38 may be 2.6 wt% or more and 5 wt% or less. More preferably, it may be 2.7 wt% or more and 4.0 wt% or less. Note that wt% indicates a weight percent concentration. If the boron concentration is too low, the interlayer insulating film 38 is difficult to manufacture. This is because, for example, when the interlayer insulating film 38 is heat-treated, deformation due to fluidization is difficult to occur, leaving a recess in the interlayer insulating film 38 above the trench gate, and tungsten is likely to remain in the recess when the tungsten film is etched back. Furthermore, if the boron concentration is too high, a reaction between titanium and boron in the barrier metal layer 220 is likely to occur, reducing adhesion at the interface between the barrier metal layer 220 and the interlayer insulating film 38 and making the interface more susceptible to peeling.

[0096] Fig. 21 is a diagram showing another example of the arrangement of tungsten portion 230 and through hole 210 as viewed from above. Although opening region 201 and connection lower region 208 are omitted in Fig. 21, opening region 201 and connection lower region 208 are provided in the same positions as in the examples of Figs. 1 to 20.

[0097] 1 to 20, at least a portion of the through hole 210 and the tungsten portion 230 are provided along a first extension direction (e.g., the Y-axis direction) parallel to the upper surface 21 of the semiconductor substrate 10. In this example, a portion of the through hole 210 and the tungsten portion 230 are provided along a second extension direction (e.g., the X-axis direction) parallel to the upper surface 21 of the semiconductor substrate 10, which is different from the first extension direction. The other structures are the same as those of any of the examples of FIGS. 1 to 20. In FIG. 21, the tungsten portion 230 is shown, but the through hole 210 is also arranged at a position corresponding to the tungsten portion 230.

[0098] The semiconductor device 100 of this example has tungsten portion 230-1 and tungsten portion 230-2 that extend in different directions in the XY plane. The tungsten portion 230-1 of this example is provided to extend in the Y-axis direction. For example, the tungsten portion 230-1 is a strip-shaped portion having its longitudinal axis in the Y-axis direction. The tungsten portion 230-2 of this example is provided to extend in the X-axis direction. For example, the tungsten portion 230-2 is a strip-shaped portion having its longitudinal axis in the X-axis direction.

[0099] Tungsten portion 230-1 and tungsten portion 230-2 may be connected. In this case, through hole 210 has through hole connecting portion 231 at the position where tungsten portion 230-1 and tungsten portion 230-2 are connected. In this example, through hole connecting portion 231 is the portion where through hole 210 provided along the Y-axis direction and through hole 210 provided along the X-axis direction join together.

[0100] Tungsten portion 230-1 and tungsten portion 230-2 may intersect in the XY plane. That is, tungsten portion 230-1 and tungsten portion 230-2 may be provided so as to penetrate each other in the XY plane. Tungsten portion 230-1 may be arranged at a predetermined period in the X-axis direction. Tungsten portion 230-2 may be arranged at a predetermined period in the Y-axis direction. Tungsten portion 230-1 and tungsten portion 230-2 may be arranged in a lattice pattern in the XY plane. In this case, through-hole connecting portions 231 are arranged at a predetermined period in each of the X-axis direction and the Y-axis direction.

[0101] FIG. 22 is an enlarged view of tungsten portion 230-1 and tungsten portion 230-2 shown in FIG. 21. In this example, the spacing between through-hole connecting portions 231 arranged along the X-axis direction is a, the spacing between through-hole connecting portions 231 arranged along the Y-axis direction is b, the width of through holes 210 arranged along the X-axis direction is c, and the width of through holes 210 arranged along the Y-axis direction is d. The width of the tungsten portion 230 may be used as the width of the through holes 210. Furthermore, the pitch at which the tungsten portions 230 are arranged may be used as the spacing between through-hole connecting portions 231. The spacing between two through-hole connecting portions 231 is the distance between corresponding positions on each through-hole connecting portion 231. The distance between the centers of the through-hole connecting portions 231 may be used as the spacing between the ends on the same side of the through-hole connecting portions 231, as shown in FIG. 22. These widths and intervals may be measured at the height of the top ends of the through-holes 210 .

[0102] The intervals a and b and the widths c and d may satisfy the following formula. ((a×c)+(bc)×d) / (a×b)≧0.2 That is, in a unit area a×b, the area (a×c)+(bc)×d) occupied by the through-hole 210 or the tungsten portion 230 may be 20% or more. This area ratio may be 25% or more, or may be 30% or more. The same applies to the examples described with reference to FIGS. 1 to 20.

[0103] FIG. 23 is a diagram showing another example of the shape of the through hole 210 and the tungsten portion 230. The through hole 210 and the tungsten portion 230 in this example may have a curved portion 232 in the XY plane parallel to the upper end of the through hole 210. When the interlayer insulating film 38 is etched to form the through hole 210, etching is more likely to proceed at the portion where the through holes 210 join. As a result, the width of the through hole connection portion 231 may be larger than the width of the through hole 210 in other portions. For example, as shown in FIG. 23 , etching may progress in the XY plane near the through hole connection portion 231, resulting in the appearance of a curved portion 232 in the top surface shape of the through hole 210 and the tungsten portion 230. As a result, the width of the through hole 210 and the tungsten portion 230 at the through hole connection portion 231 may be larger than the width of the through hole 210 and the tungsten portion 230 in other portions.

[0104] FIG. 24 is a diagram showing an example of the E-E cross section in FIG. 23. The E-E cross section is a YZ plane that intersects with the tungsten portion 230-2 at a position different from that of the tungsten portion 230-1. In FIG. 24, the connection portion 204 and other components provided on the gate pad 50 are omitted. However, similar to the example in FIG. 20, the connection portion 204, the wire wiring portion 202, and the protective member 240 are provided on the gate pad 50. In other figures, the connection portion 204, the wire wiring portion 202, and the protective member 240 may also be omitted. This example also reduces the area of ​​the XY interface between the interlayer insulating film 38 and the barrier metal layer 220. Therefore, peeling between the barrier metal layer 220 and the interlayer insulating film 38 can be suppressed.

[0105] FIG. 25 is a diagram showing an example of the FF cross section in FIG. 23. The FF cross section is a YZ plane that passes through the through-hole connection portion 231 along the tungsten portion 230-1. The upper end of the tungsten portion 230 provided in the through-hole connection portion 231 is located lower than the upper ends of the tungsten portions 230 provided in the through-hole 210 other than the through-hole connection portion 231. That is, the upper surface of the tungsten portion 230 is recessed toward the upper surface 21 of the semiconductor substrate 10 at the through-hole connection portion 231. As described in FIG. 23, the width of the through-hole 210 is increased near the through-hole connection portion 231. For this reason, when the through-hole 210 is filled with tungsten, a recess is likely to occur at the through-hole connection portion 231. The provision of a step on the upper surface of the tungsten portion 230 increases the contact area between the gate pad 50 and the tungsten portion 230, thereby improving adhesion between the gate pad 50 and the tungsten portion 230.

[0106] The thickness of the tungsten portion 230 in the region other than the through-hole connection portion 231 is defined as z2. The maximum thickness of the tungsten portion 230 may be used as the thickness z2. The depth of the depression in the tungsten portion 230 in the through-hole connection portion 231 is defined as z1. The depth z1 may be the difference in height between the peak of a mountain and the bottom of a valley adjacent to each other on the upper surface of the tungsten portion 230. The depth z1 may be 5% or more of the thickness z2, 10% or more, or even 20% or more. The depth z1 may be 50% or less of the thickness z2, or even 30% or less. This improves the adhesion between the tungsten portion 230 and the gate pad 50 while maintaining a constant thickness of the tungsten portion 230. The width c' of the depression on the upper surface of the tungsten portion 230 is defined as c'. In this example, the width c' is the width in the Y-axis direction. The width c' may be greater than the width c of the tungsten portion 230-2.

[0107] FIG. 26 is a diagram showing another example of the arrangement of tungsten portion 230 and through hole 210 when viewed from above. In this example, tungsten portion 230-1 is connected to tungsten portion 230-2 but does not penetrate tungsten portion 230-2. In other words, tungsten portion 230-1 is connected to tungsten portion 230-2 in a T-shape. The other structures are similar to the example in FIG. 21. In this example, a through-hole connecting portion 231 is provided at the connection portion between tungsten portion 230-1 and tungsten portion 230-2.

[0108] Figure 27 is an enlarged view of tungsten portion 230-1 and tungsten portion 230-2 shown in Figure 26. In this example, tungsten portion 230-1 is connected to tungsten portion 230-2 in a T-shape. Other structures are similar to those in Figure 22 or Figure 23.

[0109] In this example, the spacing between the through hole connection parts 231 arranged along the X-axis direction is a, the spacing between the through hole connection parts 231 arranged along the Y-axis direction is b, the width of the through holes 210 arranged along the X-axis direction is c, and the width of the through holes 210 arranged along the Y-axis direction is d.

[0110] As in the example of FIG. 22, the intervals a and b and the widths c and d may satisfy the following formula. ((a×c)+(bc)×d) / (a×b)≧0.2 That is, in a unit area a×b, the area (a×c)+(bc)×d) occupied by the through-hole 210 or the tungsten portion 230 may be 20% or more. This area ratio may be 25% or more, or may be 30% or more.

[0111] 28 is a diagram showing another example of the arrangement of tungsten portions 230 and through holes 210 in a top view. In this example, at least one of tungsten portions 230-1 and tungsten portions 230-2 is arranged discretely in the extension direction. In the example of FIG. 28, tungsten portions 230-2 are arranged discretely along the X-axis direction. Tungsten portions 230-2 are also arranged discretely in the Y-axis direction.

[0112] As described in FIG. 2B , trench 25 is provided to extend in the Y-axis direction. In the example of FIG. 28 , tungsten portion 230-1 and through-hole 210 extending in the Y-axis direction are provided continuously in the Y-axis direction in gate pad 50. On the other hand, tungsten portion 230-2 is arranged discretely in the X-axis direction. With this configuration, it is possible to reduce unevenness on the top surface of tungsten portion 230 in the direction parallel to trench 25, and to reduce variations in connectivity between trench 25 and gate pad 50. In another example, tungsten portion 230-2 may be provided continuously in the X-axis direction, and tungsten portion 230-1 may be provided discretely in the Y-axis direction.

[0113] The tungsten portions 230-2 may be arranged at a predetermined period in the X-axis direction. The tungsten portions 230-2 may be connected to or separated from the tungsten portion 230-1. When the tungsten portion 230-2 is connected to the tungsten portion 230-1, a through-hole connecting portion 231 may be provided at the connection portion. As shown in FIG. 28 , one tungsten portion 230-2 may be arranged between two tungsten portions 230-1 in the X-axis direction. In another example, two or more tungsten portions 230-2 may be arranged between two tungsten portions 230-1 in the X-axis direction.

[0114] Figure 29 is an enlarged view of tungsten portion 230-1 and tungsten portion 230-2 shown in Figure 28. In this example, tungsten portion 230-1 and tungsten portion 230-2 are separated from each other. Other structures are similar to those in Figures 22 and 23.

[0115] In this example, the spacing between through hole connecting portions 231 arranged along the X-axis direction is defined as a, the spacing between through hole connecting portions 231 arranged along the Y-axis direction is defined as b, the width in the Y-axis direction of through hole 210 filled with tungsten portion 230-2 is defined as c, and the width in the Y-axis direction of through hole 210 arranged along the Y-axis direction is defined as d. Furthermore, the width in the X-axis direction of through hole 210 filled with tungsten portion 230-2 is defined as e, and the distance in the X-axis direction between through hole 210 filled with tungsten portion 230-1 and through hole 210 filled with tungsten portion 230-2 is defined as f. Distance f is the shortest distance between tungsten portion 230-1 and tungsten portion 230-2.

[0116] The intervals a and b, the widths c, d, and e, and the distance f may satisfy the following formula: ((b×d)+(e×c)) / (a×b)≧0.2 That is, in a unit area a×b, the area (b×d)+(e×c) occupied by the through-hole 210 or the tungsten portion 230 may be 20% or more. The area ratio may be 25% or more, or may be 30% or more.

[0117] Figure 30 is an enlarged view showing another example of tungsten portion 230-1 and tungsten portion 230-2 shown in Figure 28. In this example, each tungsten portion 230-2 has a longitudinal direction in the X-axis direction. That is, width e is greater than width c. In other examples, width e may be the same as width c, or width e may be smaller than width c.

[0118] In this example, too, the tungsten portion 230-1 provided along the Y-axis direction and the tungsten portion 230-2 provided along the X-axis direction may be spaced apart. The width e may be greater than the distance f.

[0119] Although the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications and improvements can be made to the above embodiments. It is clear from the claims that such modifications and improvements can also be included within the technical scope of the present invention. [Explanation of symbols]

[0120] 10 semiconductor substrate, 11 well region, 20 drift region, 21 upper surface, 22 source region, 23 contact region, 24 gate electrode, 25 trench, 38 interlayer insulating film, 44 insulating film, 50 gate pad, 51 wiring layer, 52 emitter electrode, 100 semiconductor device, 102 edge, 110 current sense region, 120 active portion, 172 current sensor 174 anode pad, 176 cathode pad, 178 diode element, 201 opening region, 202 wire wiring portion, 204 connection portion, 206 connection region, 208 connection lower region, 209 chain line, 210 through hole, 220 barrier metal layer, 221 upper surface, 230 tungsten portion, 231 through hole connection portion, 232 curved portion, 240 protective member

Claims

1. A semiconductor device in which a main current flows in a depth direction, a trench having a longitudinal direction in a first direction on the upper surface side of the semiconductor substrate; a first metal electrode portion provided above the upper surface of the semiconductor substrate; a second metal electrode portion provided above the upper surface of the semiconductor substrate and separated from the first metal electrode portion; an insulating film provided between the first metal electrode portion and the upper surface and between the second metal electrode portion and the upper surface; stripe-shaped first through holes provided in the insulating film and extending in the first direction, the first through holes being filled with the second metal electrode portions; Equipped with the second metal electrode portion has a pad portion to which a wiring is connected, the wiring includes a wire wiring portion connected to the connection region of the pad portion, a plurality of the first through holes are provided in a lower connection region overlapping the connection region, a wiring layer provided between the insulating film and the second metal electrode portion and overlapping the connection region; Semiconductor device.

2. A semiconductor device in which a main current flows in a depth direction, a first metal electrode portion provided above an upper surface of a semiconductor substrate; a second metal electrode portion provided above the upper surface of the semiconductor substrate and separated from the first metal electrode portion; an insulating film provided between the first metal electrode portion and the upper surface and between the second metal electrode portion and the upper surface; a first through hole formed in the insulating film and having a stripe shape extending in a first direction, the first through hole being filled with the second metal electrode portion; a wire wiring portion connected to a connection region of the pad portion of the second metal electrode portion; Equipped with a plurality of the first through holes are provided in a lower connection region overlapping the connection region, and the first through holes are provided successively in the first direction; a wiring layer provided between the insulating film and the second metal electrode portion and overlapping the connection region; Semiconductor device.

3. A semiconductor device in which a main current flows in a depth direction, a trench having a longitudinal direction in a first direction on the upper surface side of the semiconductor substrate; a first metal electrode portion provided above the upper surface of the semiconductor substrate; a second metal electrode portion provided above the upper surface of the semiconductor substrate and separated from the first metal electrode portion; an insulating film provided between the first metal electrode portion and the upper surface and between the second metal electrode portion and the upper surface; stripe-shaped first through holes provided in the insulating film and extending in the first direction, the first through holes being filled with the second metal electrode portions; stripe-shaped second through holes provided in the insulating film and extending in the first direction, the second through holes being filled with the first metal electrode portions; Equipped with The second metal electrode portion has a pad portion to which a wiring is connected. Semiconductor device.

4. A semiconductor device in which a main current flows in a depth direction, a first metal electrode portion provided above an upper surface of a semiconductor substrate; a second metal electrode portion provided above the upper surface of the semiconductor substrate and separated from the first metal electrode portion; an insulating film provided between the first metal electrode portion and the upper surface and between the second metal electrode portion and the upper surface; a first through hole formed in the insulating film and having a stripe shape extending in a first direction, the first through hole being filled with the second metal electrode portion; stripe-shaped second through holes provided in the insulating film and extending in the first direction, the second through holes being filled with the first metal electrode portions; a wire wiring portion connected to a connection region of the pad portion of the second metal electrode portion; Equipped with The first through holes are provided in a plurality of lower connection regions overlapping the connection region, and are arranged continuously in the first direction. Semiconductor device.

5. A semiconductor device in which a main current flows in a depth direction, a trench having a longitudinal direction in a first direction on the upper surface side of the semiconductor substrate; a first metal electrode portion provided above the upper surface of the semiconductor substrate; a second metal electrode portion provided above the upper surface of the semiconductor substrate and separated from the first metal electrode portion; an insulating film provided between the first metal electrode portion and the upper surface and between the second metal electrode portion and the upper surface; stripe-shaped first through holes provided in the insulating film and extending in the first direction, the first through holes being filled with the second metal electrode portions; Equipped with the second metal electrode portion has a pad portion to which a wiring is connected, The insulating film includes an interlayer insulating film which is a BPSG film or a BSG film, and an oxide film obtained by oxidizing the semiconductor substrate or a nitride film obtained by nitriding the semiconductor substrate. Semiconductor device.

6. A semiconductor device in which a main current flows in a depth direction, a first metal electrode portion provided above an upper surface of a semiconductor substrate; a second metal electrode portion provided above the upper surface of the semiconductor substrate and separated from the first metal electrode portion; an insulating film provided between the first metal electrode portion and the upper surface and between the second metal electrode portion and the upper surface; a first through hole formed in the insulating film and having a stripe shape extending in a first direction, the first through hole being filled with the second metal electrode portion; a wire wiring portion connected to a connection region of the pad portion of the second metal electrode portion; Equipped with a plurality of the first through holes are provided in a lower connection region overlapping the connection region, and the first through holes are provided successively in the first direction; The insulating film includes an interlayer insulating film which is a BPSG film or a BSG film, and an oxide film obtained by oxidizing the semiconductor substrate or a nitride film obtained by nitriding the semiconductor substrate. Semiconductor device.

7. A semiconductor device in which a main current flows in a depth direction, a trench having a longitudinal direction in a first direction on the upper surface side of the semiconductor substrate; a first metal electrode portion provided above the upper surface of the semiconductor substrate; a second metal electrode portion provided above the upper surface of the semiconductor substrate and separated from the first metal electrode portion; an insulating film provided between the first metal electrode portion and the upper surface and between the second metal electrode portion and the upper surface; stripe-shaped first through holes provided in the insulating film and extending in the first direction, the first through holes being filled with the second metal electrode portions; Equipped with the second metal electrode portion has a pad portion to which a wiring is connected, the first through-hole extends beyond an end of the pad portion in the first direction, a protective member covering a part of the upper surface of the pad portion; The first through holes are provided continuously in the first direction below an opening region of the upper surface of the pad portion that is not covered by the protective member and is exposed. Semiconductor device.

8. A semiconductor device in which a main current flows in a depth direction, a first metal electrode portion provided above an upper surface of a semiconductor substrate; a second metal electrode portion provided above the upper surface of the semiconductor substrate and separated from the first metal electrode portion; an insulating film provided between the first metal electrode portion and the upper surface and between the second metal electrode portion and the upper surface; a first through hole formed in the insulating film and having a stripe shape extending in a first direction, the first through hole being filled with the second metal electrode portion; a wire wiring portion connected to a connection region of the pad portion of the second metal electrode portion; a protective member that covers a partial area of ​​the upper surface of the pad portion; Equipped with a plurality of the first through holes are provided in a lower connection region overlapping the connection region, and the first through holes are provided successively in the first direction; the first through-hole extends beyond an end of the pad portion in the first direction, The first through holes are provided continuously in the first direction below an opening region of the upper surface of the pad portion that is not covered by the protective member and is exposed. Semiconductor device.

9. A semiconductor device in which a main current flows in a depth direction, a trench having a longitudinal direction in a first direction on the upper surface side of the semiconductor substrate; a first metal electrode portion provided above the upper surface of the semiconductor substrate; a second metal electrode portion provided above the upper surface of the semiconductor substrate and separated from the first metal electrode portion; an insulating film provided between the first metal electrode portion and the upper surface and between the second metal electrode portion and the upper surface; stripe-shaped first through holes provided in the insulating film and extending in the first direction, the first through holes being filled with the second metal electrode portions; Equipped with the second metal electrode portion has a pad portion to which a wiring is connected, The first metal electrode portion is the electrode portion having the largest area in a top view. Semiconductor device.

10. A semiconductor device in which a main current flows in a depth direction, a first metal electrode portion provided above an upper surface of a semiconductor substrate; a second metal electrode portion provided above the upper surface of the semiconductor substrate and separated from the first metal electrode portion; an insulating film provided between the first metal electrode portion and the upper surface and between the second metal electrode portion and the upper surface; a first through hole formed in the insulating film and having a stripe shape extending in a first direction, the first through hole being filled with the second metal electrode portion; a wire wiring portion connected to a connection region of the pad portion of the second metal electrode portion; Equipped with a plurality of the first through holes are provided in a lower connection region overlapping the connection region, and the first through holes are provided successively in the first direction; The first metal electrode portion is the electrode portion having the largest area in a top view. Semiconductor device.

11. A semiconductor device in which a main current flows in a depth direction, a trench having a longitudinal direction in a first direction on the upper surface side of the semiconductor substrate; a first metal electrode portion provided above the upper surface of the semiconductor substrate; a second metal electrode portion provided above the upper surface of the semiconductor substrate and separated from the first metal electrode portion; an insulating film provided between the first metal electrode portion and the upper surface and between the second metal electrode portion and the upper surface; stripe-shaped first through holes provided in the insulating film and extending in the first direction, the first through holes being filled with the second metal electrode portions; Equipped with the second metal electrode portion has a pad portion to which a wiring is connected, The first metal electrode portion has an emitter electrode. Semiconductor device.

12. A semiconductor device in which a main current flows in a depth direction, a first metal electrode portion provided above an upper surface of a semiconductor substrate; a second metal electrode portion provided above the upper surface of the semiconductor substrate and separated from the first metal electrode portion; an insulating film provided between the first metal electrode portion and the upper surface and between the second metal electrode portion and the upper surface; a first through hole formed in the insulating film and having a stripe shape extending in a first direction, the first through hole being filled with the second metal electrode portion; a wire wiring portion connected to a connection region of the pad portion of the second metal electrode portion; Equipped with a plurality of the first through holes are provided in a lower connection region overlapping the connection region, and the first through holes are provided successively in the first direction; The first metal electrode portion has an emitter electrode. Semiconductor device.

13. A semiconductor device in which a main current flows in a depth direction, a trench having a longitudinal direction in a first direction on the upper surface side of the semiconductor substrate; a first metal electrode portion provided above the upper surface of the semiconductor substrate; a second metal electrode portion provided above the upper surface of the semiconductor substrate and separated from the first metal electrode portion; an insulating film provided between the first metal electrode portion and the upper surface and between the second metal electrode portion and the upper surface; stripe-shaped first through holes provided in the insulating film and extending in the first direction, the first through holes being filled with the second metal electrode portions; Equipped with the second metal electrode portion has a pad portion to which a wiring is connected, The pad portion is a gate pad, an anode pad, a cathode pad, or a current sense pad. Semiconductor device.

14. A semiconductor device in which a main current flows in a depth direction, a first metal electrode portion provided above an upper surface of a semiconductor substrate; a second metal electrode portion provided above the upper surface of the semiconductor substrate and separated from the first metal electrode portion; an insulating film provided between the first metal electrode portion and the upper surface and between the second metal electrode portion and the upper surface; a first through hole formed in the insulating film and having a stripe shape extending in a first direction, the first through hole being filled with the second metal electrode portion; a wire wiring portion connected to a connection region of the pad portion of the second metal electrode portion; Equipped with a plurality of the first through holes are provided in a lower connection region overlapping the connection region, and the first through holes are provided successively in the first direction; The pad portion is a gate pad, an anode pad, a cathode pad, or a current sense pad. Semiconductor device.

15. The first through holes are provided continuously in the first direction in the lower connection region. The semiconductor device according to claim 1 .

16. the first metal electrode portion is at least partially connected to the semiconductor substrate via the second through hole; The first through hole is provided above and spaced apart from the upper surface of the semiconductor substrate.

5. The semiconductor device according to claim 3.

17. The second through holes are provided in plurality, The interval between the second through holes is different from the interval between the first through holes.

17. The semiconductor device according to claim 3, 4 or 16.

18. The first metal electrode portion has a first electrode containing aluminum, a barrier metal layer containing titanium, and a tungsten portion containing tungsten.

18. The semiconductor device according to claim 1, wherein the first and second electrodes are electrically connected to each other.

19. the pad portion is configured to contain aluminum, The second metal electrode portion has a barrier metal layer containing titanium and a tungsten portion containing tungsten. The semiconductor device according to claim 1 .

20. The insulating film includes an interlayer insulating film which is a BPSG film or a BSG film, and an oxide film obtained by oxidizing the semiconductor substrate or a nitride film obtained by nitriding the semiconductor substrate.

3. The semiconductor device according to claim 1.

Citation Information

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