Packaged device manufacturing method
By bonding a first substrate with mounted device chips to a second substrate having recesses, grinding to expose the recesses, and resin molding, the method addresses inconsistent chip positioning and resin usage, improving the quality and consistency of packaged devices.
Patent Information
- Application Number
- JP2022035907
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-03-09
- Publication Date
- 2025-12-09
- Estimated Expiration
- 2042-03-09
AI Technical Summary
The variation in the depth of recesses formed on a substrate for accommodating device chips leads to inconsistent positioning of the chips, which can result in poor connections during subsequent processing, affecting the quality of packaged devices.
A method involving a first substrate with mounted device chips bonded to a second substrate with recesses, followed by grinding to expose the recesses, resin molding to cover the chips, and dividing along planned lines to form packaged devices, ensuring uniform chip positioning and reduced resin usage.
This method reduces variations in chip position and resin usage, leading to improved connections and reduced warping, enhancing the quality and consistency of packaged devices.
Smart Images

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Abstract
Description
[Technical Field]
[0001] The present invention relates to a method for manufacturing a packaged device by dividing a substrate on which a device chip is mounted to manufacture a packaged device. [Background technology]
[0002] The device chip manufacturing process uses a wafer in which devices are formed in multiple regions defined by multiple intersecting dividing lines (streets). By dividing the wafer along the dividing lines, multiple device chips, each equipped with a device, are obtained. The device chips are incorporated into various electronic devices, such as mobile phones and personal computers.
[0003] In recent years, with the miniaturization of electronic devices, there has been a demand for smaller and more highly integrated device chips mounted on electronic devices. Accordingly, technology for packaging multiple device chips to form a packaged device has been put to practical use. For example, multiple device chips mounted on the surface side of a predetermined substrate are encapsulated with a sealing resin (mold resin), and a redistribution layer (RDL) or the like is formed on the substrate. Then, the substrate is divided into individual pieces to manufacture a packaged device including multiple packaged device chips.
[0004] To encapsulate multiple device chips mounted on a substrate, a resin layer must be formed over the entire surface (device chip side) of the substrate to a thickness sufficient to cover the device chips. Therefore, a large amount of resin is required to encapsulate the device chips. Furthermore, when the resin is cured after coating the surface of the substrate with resin, the substrate is prone to warping due to factors such as shrinkage of the resin layer and differences in the thermal expansion coefficients between the substrate and the resin layer. A warped substrate can interfere with subsequent substrate processing (such as forming thin films on the substrate and processing the substrate), potentially adversely affecting the quality of the packaged device.
[0005] To address this issue, a method has been proposed in which multiple recesses capable of accommodating device chips are provided on the surface side of a substrate, and the device chips are mounted in these recesses (see Patent Document 1). Using this method, it becomes possible to seal the device chips by filling the recesses accommodating the device chips with resin, eliminating the need for a process of forming a thick resin layer over the entire surface side of the substrate. This reduces the amount of resin required to seal the device chips and also makes the substrate less likely to warp. [Prior art documents] [Patent documents]
[0006] [Patent Document 1] Special Publication No. 2019-512168 Summary of the Invention [Problem to be solved by the invention]
[0007] When mounting the device chip in a recess in the substrate as described above, a plurality of recesses capable of accommodating the device chip are first formed in the substrate, but there is a problem in that the depths of the recesses formed in the substrate tend to vary.
[0008] For example, recesses are formed on the surface of a substrate by dry etching using a plasma etching gas supplied to the substrate. In this case, uneven flow of the etching gas or variations in plasma density can cause variations in the etching rate within the substrate, resulting in differences in the depth of the recesses between the center and the periphery of the substrate. Furthermore, depending on the etching conditions, the total thickness variation (TTV) at the bottom of the recesses can increase, resulting in variations in the depth of each recess.
[0009] If a device chip is mounted on a substrate so that it is supported by the bottom of a recess with varying depth, the position of the device chip will also vary in the thickness direction of the substrate (depth direction of the recess).As a result, when forming through-silicon vias (TSVs) and rewiring layers connected to the device chip in later processes, poor connections between the electrodes and wiring and the device chip are likely to occur, which could reduce the quality of the packaged device.
[0010] The present invention has been made in view of the above problems, and has as its object to provide a method for manufacturing a packaged device that can reduce variations in the position of device chips mounted on a substrate. [Means for solving the problem]
[0011] According to one aspect of the present invention, there is provided a method for manufacturing a package device, the method comprising: a first substrate preparation step of preparing a first substrate having a plurality of mounting areas on one side thereof partitioned by a plurality of planned division lines that intersect with each other, with a device chip mounted in each of the plurality of mounting areas; a second substrate preparation step of preparing a second substrate having a plurality of recesses on one side thereof that are provided in areas corresponding to the mounting areas and that can accommodate the device chips; a bonding step of bonding the first substrate and the second substrate together so that the device chips are housed in the recesses; a grinding step, after the bonding step, of grinding the other side of the second substrate until the recesses are exposed; a resin molding step, after the grinding step, of supplying resin into the plurality of recesses to cover the device chips with the resin; and a dividing step, after the resin molding step, of dividing the first substrate and the second substrate along the planned division lines to manufacture a plurality of package devices each including the device chip.
[0012] Preferably, the first substrate preparation step includes a planarization step of planarizing the first substrate, and a mounting step of mounting the device chip on the mounting area after the planarization step. Also, preferably, the method for manufacturing a packaged device further includes a resin grinding step of grinding the resin after the resin molding step. [Effects of the Invention]
[0013] In a method for manufacturing a packaged device according to one aspect of the present invention, a first substrate on which a device chip is mounted is bonded to a second substrate having a recess, the device chip is accommodated in the recess, the second substrate is ground to expose the recess, and resin is supplied into the recess to cover the device chip while the device chip is supported by the flat first substrate.
[0014] The above method reduces the variation in the position of the device chip in the depth direction of the recess, compared to when the device chip is supported on the bottom surface of a recess formed by processing such as dry etching, which has a large variation in depth and TTV, thereby obtaining a laminated substrate with device chips of uniform height. [Brief explanation of the drawings]
[0015] [Figure 1] FIG. 1(A) is a perspective view showing a first substrate, and FIG. 1(B) is a cross-sectional view showing a part of the first substrate. [Figure 2] FIG. 2(A) is a perspective view showing the second substrate, and FIG. 2(B) is a cross-sectional view showing a part of the second substrate. [Figure 3] FIG. 10 is a perspective view showing a modified example of the second substrate. [Figure 4] FIG. 4(A) is a flowchart showing a method for manufacturing a packaged device, and FIG. 4(B) is a flowchart showing a first substrate preparation step. [Figure 5] FIG. 10 is a perspective view showing the first substrate in a planarization step. [Figure 6]FIG. 10 is a cross-sectional view showing a part of the first substrate in a mounting step. [Figure 7] FIG. 7(A) is a cross-sectional view showing a part of the first substrate and the second substrate in the bonding step, and FIG. 7(B) is a cross-sectional view showing a part of the first substrate and the second substrate after the bonding step. [Figure 8] FIG. 10 is a cross-sectional view showing a part of the laminated substrate in a grinding step. [Figure 9] FIG. 10 is a cross-sectional view showing a part of the laminated substrate in a resin molding step. [Figure 10] FIG. 10 is a cross-sectional view showing a part of the laminated substrate in a resin grinding step. [Figure 11] FIG. 4 is a cross-sectional view showing a part of the laminated substrate in which the first substrate has been thinned. [Figure 12] FIG. 12(A) is a cross-sectional view showing a part of a laminated substrate on which an insulating layer is formed, and FIG. 12(B) is a cross-sectional view showing a part of a laminated substrate on which a mask layer is formed. [Figure 13] Figure 13(A) is a cross-sectional view showing a portion of a laminated substrate in which a through hole is formed in an insulating layer, and Figure 13(B) is a cross-sectional view showing a portion of a laminated substrate in which a through hole is formed in a first substrate, a wiring layer, and an adhesive layer. [Figure 14] FIG. 14(A) is a cross-sectional view showing a part of a laminated substrate on which electrodes are formed, and FIG. 14(B) is a cross-sectional view showing a part of a laminated substrate on which a wiring layer is formed. [Figure 15] FIG. 2 is a cross-sectional view showing a part of a laminated substrate on which a device chip is mounted. [Figure 16] FIG. 16(A) is a cross-sectional view showing a part of the laminated substrate in the dividing step, and FIG. 16(B) is a cross-sectional view showing a part of the laminated substrate after the dividing step. DETAILED DESCRIPTION OF THE INVENTION
[0016] Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings. In this embodiment, a laminated substrate is formed by bonding a first substrate (chip substrate) on which a plurality of device chips are mounted and a second substrate (laminate substrate) having a plurality of recesses capable of accommodating the device chips. The laminated substrate is then divided into individual pieces to manufacture a plurality of packaged devices, each of which includes a packaged device chip. First, an example of the configuration of the first substrate and the second substrate that can be used in the method for manufacturing a packaged device according to this embodiment will be described.
[0017] 1(A) is a perspective view showing the first substrate 11, and FIG. 1(B) is a cross-sectional view showing a portion of the first substrate 11. For example, the first substrate 11 is a disk-shaped single crystal silicon wafer, and has a front surface (one surface, first surface) 11a and a back surface (the other surface, second surface) 11b that are generally parallel to each other. However, there are no limitations on the material, shape, structure, size, etc. of the first substrate 11. For example, the first substrate 11 may be a wafer made of a semiconductor other than silicon (GaAs, InP, GaN, SiC, etc.), glass (quartz glass, borosilicate glass, etc.), ceramics, resin, metal, etc.
[0018] A wiring layer 13 is provided on the surface 11a side of the first substrate 11. The wiring layer 13 includes various thin films such as conductive films that function as wiring, electrodes, terminals, etc., and insulating films that function as interlayer insulating films, and is formed over the entire surface 11a side of the first substrate 11. As shown in Fig. 1(B), for example, the wiring layer 13 includes a conductive layer 15 made of a metal such as copper, and an insulating layer 17 made of silicon oxide, silicon nitride, etc. and formed so as to surround the conductive layer 15.
[0019] There is no limitation on the method for forming the wiring layer 13. For example, first, a metal film is formed on the surface 11a side of the first substrate 11, and the metal film is patterned into a predetermined shape by a photolithography process. Thereafter, the metal film is covered with an insulating film, and openings are formed in predetermined positions of the insulating film to expose the metal film, thereby forming the wiring layer 13. Alternatively, the wiring layer 13 can be formed by forming an insulating film on the surface 11a side of the first substrate 11, patterning the insulating film into a predetermined shape, and then filling a metal material into the area from which the insulating film has been removed.
[0020] The first substrate 11 is divided into a plurality of mounting areas 21 by a plurality of planned division lines (streets) 19 arranged in a grid pattern so as to intersect with one another. The mounting areas 21 correspond to rectangular areas located on the surface 11a side (wiring layer 13 side) of the first substrate 11 and surrounded by the planned division lines 19.
[0021] A device chip 25 is mounted on each of the multiple mounting areas 21. For example, the device chip 25 is a chip including passive components such as a capacitor, a resistor, etc. Alternatively, the device chip 25 may be a chip including semiconductor devices such as an IC (Integrated Circuit), an LSI (Large Scale Integration), an LED (Light Emitting Diode), or a MEMS (Micro Electro Mechanical Systems).
[0022] The bottom surface of the device chip 25 is provided with connection terminals 25a for connecting the device chip 25 to other wiring, electrodes, device chips, etc. For example, the connection terminals 25a are formed of bumps, etc. However, there are no limitations on the type, shape, structure, size, etc. of the device chip 25.
[0023] As shown in FIG. 1(B), for example, a device chip 25 is fixed to the mounting region 21 of the first substrate 11 via an adhesive layer 23 (not shown in FIG. 1(A)). The adhesive layer 23 is formed by applying an adhesive made of resin or the like to the entire surface 11a side (wiring layer 13 side) of the first substrate 11. The device chip 25 is then fixed to the adhesive layer 23 so as to overlap the mounting region 21 of the first substrate 11. In this way, the device chip 25 is mounted in each of the multiple mounting regions 21. FIGS. 1(A) and 1(B) show an example in which the device chip 25 is mounted on the corner portion of the mounting region 21.
[0024] Fig. 2(A) is a perspective view showing second substrate 31, and Fig. 2(B) is a cross-sectional view showing a part of second substrate 31. Second substrate 31 corresponds to a bonded substrate that is bonded to first substrate 11 in a later process.
[0025] For example, the second substrate 31 is a disk-shaped single crystal silicon wafer, and has a front surface (one surface, first surface) 31a and a back surface (the other surface, second surface) 31b that are generally parallel to each other. Examples of the material, shape, structure, size, etc. of the second substrate 31 are the same as those of the first substrate 11. Note that, because the second substrate 31 is processed simultaneously with the first substrate 11 in a later step (see FIG. 16(A)), it is preferable that the material of the first substrate 11 and the material of the second substrate 31 are the same.
[0026] The second substrate 31 is divided into a plurality of storage areas 35 by a plurality of planned division lines (streets) 33 arranged in a grid pattern so as to intersect with one another. The storage areas 35 correspond to rectangular areas located on the front surface 31a side of the second substrate 31 and surrounded by the planned division lines 33.
[0027] Each of the plurality of accommodation regions 35 is provided with a recess (accommodation portion) 31c capable of accommodating a device chip 25 (see FIGS. 1(A) and 1(B)). FIGS. 2(A) and 2(B) show an example in which the recess 31c is formed at a corner of the accommodation region 35. The recess 31c is formed from the front surface 31a toward the back surface 31b of the second substrate 31 in an area corresponding to the mounting region 21 of the first substrate 11 (see FIGS. 1(A) and 1(B)).
[0028] Specifically, each of the multiple recesses 31c is arranged at a position that overlaps with the device chip 25 when the first substrate 11 and the second substrate 31 are stacked so that the front surface 11a of the first substrate 11 faces the front surface 31a of the second substrate 31. The shape and dimensions of the recesses 31c are set so that the device chip 25 can be housed inside the recesses 31c. For example, the recesses 31c are formed in a rectangular parallelepiped shape, and the length and width of the recesses 31c are set to values greater than the length and width of the device chip 25. The depth of the recesses 31c is set to values greater than the thickness of the device chip 25.
[0029] The recesses 31c can be formed by partially dry etching each of the multiple accommodation regions 35. Specifically, a mask layer is first formed on the surface 31a side of the second substrate 31. The mask layer is patterned to expose only the regions of the surface 31a side of the second substrate 31 where the recesses 31c are to be formed. Then, an etching gas in a plasma state is supplied to the second substrate 31 through the mask layer. This partially applies plasma etching to the accommodation regions 35, forming the recesses 31c. The shape and dimensions of the recesses 31c can be adjusted by patterning the mask layer. The depth of the recesses 31c can be adjusted by controlling the etching rate and etching time.
[0030] However, there is no limitation on the method for forming the recesses 31c. For example, the recesses 31c may be formed by laser processing the second substrate 31. A laser processing device is used for the laser processing. The laser processing device includes a chuck table that holds the workpiece and a laser irradiation unit that irradiates the workpiece with a laser beam.
[0031] The laser irradiation unit is equipped with a laser oscillator such as a YAG laser, YVO4 laser, or YLF laser, and a laser processing head located above the chuck table. The laser processing head has a built-in optical system that guides the pulsed laser beam emitted from the laser oscillator to the workpiece, and the optical system includes optical elements such as a condenser lens that focuses the laser beam. The workpiece held on the chuck table is processed by the laser beam emitted from the laser processing head.
[0032] For example, the recesses 31c are formed by ablation processing on the second substrate 31. In this case, the conditions for irradiating the laser beam are set so that the region of the second substrate 31 irradiated with the laser beam is removed by ablation processing.
[0033] Specifically, the wavelength of the laser beam is set so that at least a portion of the laser beam is absorbed by the second substrate 31. That is, the laser irradiation unit irradiates a laser beam having a wavelength that is absorbed by the second substrate 31. Other irradiation conditions of the laser beam are also set so that ablation processing is appropriately performed on the second substrate 31. Then, by irradiating the laser beam onto the accommodation region 35 of the second substrate 31 and scanning it within the accommodation region 35, the surface 31a side of the second substrate 31 is partially removed, and recesses 31c are formed.
[0034] Alternatively, the recesses 31c may be formed by modifying the second substrate 31 by irradiating it with a laser beam. In this case, the conditions for irradiating the laser beam are set so that the region of the second substrate 31 irradiated with the laser beam is modified and altered by multiphoton absorption.
[0035] Specifically, the wavelength of the laser beam is set so that at least a part of the laser beam is transmitted through the second substrate 31. That is, the laser irradiation unit irradiates the second substrate 31 with a laser beam having a wavelength that is transparent to the second substrate 31. In addition, the irradiation conditions of the other laser beams are also set so that the second substrate 31 is appropriately modified.
[0036] When the second substrate 31 is irradiated with a laser beam under the above irradiation conditions, the inside of the second substrate 31 is modified and altered by multiphoton absorption, and a modified layer (altered layer) is formed inside the second substrate 31. The region of the second substrate 31 where the modified layer is formed becomes more fragile than other regions. Therefore, for example, a rectangular modified layer can be formed in the accommodation region 35, and then an external force can be applied to the region inside the modified layer to hollow out the region, thereby forming the recess 31c.
[0037] Furthermore, the recesses 31c can also be formed by subjecting the second substrate 31 to a crushing process. For example, the recesses 31c can be formed by a crushing process such as sandblasting, water jet processing, or drilling.
[0038] Sandblasting is performed using a sandblasting unit that sprays an abrasive. For example, the sandblasting unit includes a compressor that compresses and discharges gas such as air, and a blast gun that sprays an abrasive together with the compressed gas. The abrasive sprayed from the sandblasting unit collides with second substrate 31, thereby processing second substrate 31 and forming recesses 31c.
[0039] Water jet machining uses a water jet unit that sprays liquid such as water. The water jet unit has a nozzle that sprays liquid pressurized by a pump. The liquid may contain abrasive grains. When the liquid sprayed from the water jet unit collides with the second substrate 31, the second substrate 31 is processed and recesses 31c are formed.
[0040] A drill unit to which a rod-shaped drill bit is attached is used for the drilling. The drill unit has a rotation drive source such as a motor that rotates the drill bit attached to the drill unit. By rotating the drill bit and bringing the tip of the drill bit into contact with the second substrate 31, the second substrate 31 is machined and a recess 31c is formed.
[0041] It is also possible to use a second substrate having a recess capable of accommodating a plurality of device chips 25 instead of the second substrate 31. FIG.
[0042] The second substrate 41 has a front surface (one surface, first surface) 41a and a back surface (the other surface, second surface) 41b that are generally parallel to each other. The material, shape, structure, size, etc. of the second substrate 41 are the same as those of the second substrate 31 (see FIG. 2(A)). However, the front surface 41a of the second substrate 41 is provided with a plurality of recesses (receiving portions) 41c formed in a strip shape.
[0043] The recesses 41c are formed generally parallel to one another and are arranged at intervals corresponding to the pitch of the device chips 25 (see FIGS. 1(A) and 1(B)). Both ends of the recesses 41c are exposed at the side surfaces of the second substrate 41. The width of the recesses 41c is set to a value greater than the width of the device chips 25, and the depth of the recesses 41c is set to a value greater than the thickness of the device chips 25. Therefore, each recess 41c can accommodate a plurality of device chips 25.
[0044] For example, the recess 41c can be formed by the aforementioned dry etching, laser processing, crushing processing, etc. Alternatively, the recess 41c can be formed by cutting a workpiece with an annular cutting blade.
[0045] A cutting device is used for the cutting process. The cutting device includes a chuck table that holds the workpiece and a cutting unit that performs cutting on the workpiece. The cutting unit has a built-in spindle, and a cutting blade is attached to the tip of the spindle. The second substrate 41 is held by the chuck table, and the cutting blade is rotated while cutting into the second substrate 41, thereby cutting the second substrate 41.
[0046] When forming recesses 41c in second substrate 41, the cutting depth of the cutting blade is set to a target value for the depth of recesses 41c, and the rotating cutting blade is caused to cut horizontally into front surface 41a of second substrate 41. The width of recesses 41c can be adjusted by the width of the cutting blade and the number of cuts.
[0047] Next, a method for manufacturing a package device using the above-described first substrate 11 and second substrate 31 or second substrate 41 will be described. As an example, a specific example of a method for manufacturing a package device using first substrate 11 and second substrate 31 will be described in detail below. However, when using first substrate 11 and second substrate 41, a package device can be manufactured using a similar procedure.
[0048] Fig. 4(A) is a flowchart showing a method for manufacturing a packaged device. When manufacturing a packaged device, first, a first substrate preparation step S1 for preparing a first substrate 11 and a second substrate preparation step S2 for preparing a second substrate 31 are performed. In the first substrate preparation step S1, the first substrate 11 shown in Figs. 1(A) and 1(B) is formed. In the second substrate preparation step S2, the second substrate 31 shown in Figs. 2(A) and 2(B) is formed.
[0049] 4B is a flowchart showing the first substrate preparation step S1. For example, the first substrate preparation step S1 includes a planarization step S11 for planarizing the first substrate 11 and a mounting step S12 for mounting the device chip 25 on the mounting region 21 of the first substrate 11.
[0050] 5 is a perspective view showing the first substrate 11 in the planarizing step S11. For example, in the planarizing step S11, the first substrate 11 is ground by a grinding device 2. The grinding device 2 includes a chuck table (holding table) 4 that holds the first substrate 11, and a grinding unit 6 that grinds the first substrate 11.
[0051] The upper surface of the chuck table 4 is a flat surface that is roughly parallel to the horizontal plane and constitutes a holding surface 4a that holds the first substrate 11. The holding surface 4a is connected to a suction source (not shown) such as an ejector via a flow path (not shown) formed inside the chuck table 4.
[0052] A moving unit (not shown) that moves the chuck table 4 in the horizontal direction is connected to the chuck table 4. The moving unit may be a ball screw type moving mechanism, a turntable, or the like. In addition, a rotation drive source (not shown) such as a motor that rotates the chuck table 4 around a rotation axis that is roughly parallel to the vertical direction (up-down direction, height direction) is connected to the chuck table 4.
[0053] A grinding unit 6 is disposed above the chuck table 4. The grinding unit 6 includes a cylindrical spindle 8 disposed along the vertical direction. A disk-shaped mount 10 made of metal or the like is fixed to the tip end (lower end) of the spindle 8. A rotation drive source (not shown), such as a motor, that rotates the spindle 8 is connected to the base end (upper end) of the spindle 8.
[0054] A grinding wheel 12 for grinding the first substrate 11 is attached to the underside of the mount 10. The grinding wheel 12 is made of a metal such as stainless steel or aluminum and has an annular wheel base 14 formed to have roughly the same diameter as the mount 10. A plurality of grinding stones 16 are fixed to the underside of the wheel base 14. For example, the grinding stones 16 are formed in a rectangular parallelepiped shape and are arranged in a ring shape at roughly equal intervals along the outer periphery of the wheel base 14.
[0055] The grinding wheel 12 rotates around a rotation axis that is roughly parallel to the vertical direction by power transmitted from a rotation drive source via the spindle 8 and the mount 10. A ball screw type moving mechanism (not shown) that raises and lowers the grinding unit 6 in the vertical direction is connected to the grinding unit 6. Furthermore, a grinding fluid supply path (not shown), such as a nozzle, is provided inside or near the grinding unit 6 to supply a liquid (grinding fluid) such as pure water to the first substrate 11 held by the chuck table 4 and the grinding wheel 16.
[0056] When grinding the first substrate 11 with the grinding device 2, the first substrate 11 is first held by the chuck table 4. Specifically, the first substrate 11 is placed on the chuck table 4 so that the front surface 11a (the wiring layer 13 side) faces the holding surface 4a and the back surface 11b is exposed upward. In this state, when the suction force (negative pressure) of the suction source is applied to the holding surface 4a, the front surface 11a side of the first substrate 11 is sucked and held by the chuck table 4.
[0057] When grinding the first substrate 11 with the grinding device 2, a protective member may be attached to the surface 11a side (wiring layer 13 side) of the first substrate 11. For example, a circular protective tape formed to have roughly the same diameter as the first substrate 11 is attached so as to cover the entire surface 11a side of the first substrate 11. This protects the wiring layer 13.
[0058] The protective tape includes a film-like substrate and an adhesive layer (glue layer) provided on the substrate. For example, the substrate is made of a resin such as polyolefin, polyvinyl chloride, or polyethylene terephthalate. The adhesive layer is made of an epoxy-based, acrylic-based, or rubber-based adhesive. Note that an ultraviolet-curable resin that hardens when irradiated with ultraviolet light can also be used as the adhesive layer.
[0059] Next, the chuck table 4 is moved below the grinding unit 6. Then, while rotating the chuck table 4 and the grinding wheel 12, the grinding wheel 12 is lowered toward the chuck table 4. As a result, the grinding stone 16 comes into contact with the back surface 11b of the first substrate 11, and the back surface 11b of the first substrate 11 is ground away. In this manner, the back surface 11b of the first substrate 11 is ground away, and the first substrate 11 is thinned. Then, when the first substrate 11 has been thinned to a predetermined thickness, the grinding is stopped.
[0060] When the back surface 11b side of the first substrate 11 is ground by the grinding device 2, the entire first substrate 11 is thinned so that the thickness of the first substrate 11 becomes roughly uniform. As a result, the first substrate 11 is flattened, and the in-plane thickness variation of the first substrate 11 is reduced.
[0061] Furthermore, in the planarization step S11, instead of or in addition to grinding the back surface 11b side of the first substrate 11, a planarization process may be performed on the front surface 11a side of the first substrate 11. For example, the surface of the wiring layer 13 is planarized by cutting with a cutting tool. Furthermore, before forming the wiring layer 13 on the front surface 11a side of the first substrate 11, the front surface 11a side of the first substrate 11 can also be ground and planarized with a grinding wheel 16. By performing the planarization process on both the front surface 11a side and the back surface 11b side of the first substrate 11, the in-plane thickness variation of the first substrate 11 is further reduced.
[0062] Next, the device chip 25 is mounted on the mounting area 21 of the first substrate 11 (mounting step S12). Figure 6 is a cross-sectional view showing a part of the first substrate 11 in the mounting step S12.
[0063] In the mounting step S12, first, an adhesive layer 23 is formed on the front surface 11a side of the first substrate 11. Then, the connection terminals 25a of the device chip 25 are fixed to the portions of the adhesive layer 23 that overlap with the mounting region 21. In this way, the device chip 25 is mounted on the mounting region 21 of the first substrate 11. However, there is no limitation on the method for fixing the device chip 25 to the first substrate 11.
[0064] As described above, by planarizing the first substrate 11 before mounting the device chips 25, it is possible to align the height positions (positions in the thickness direction of the first substrate 11) of the multiple device chips mounted on the first substrate 11. However, if the in-plane thickness variation and surface roughness of the first substrate 11 are small, the planarization step S11 may be omitted.
[0065] In the second substrate preparation step S2, a second substrate 31 (see FIGS. 2(A) and 2(B)) having recesses 31c formed therein by the above-described method is prepared. There is no restriction on the order of the first substrate preparation step S1 and the second substrate preparation step S2. For example, the first substrate 11 and the second substrate 31 may be formed independently at different times, or may be formed simultaneously.
[0066] Next, the first substrate 11 and the second substrate 31 are bonded together so that the device chip 25 mounted on the first substrate 11 is housed in the recess 31c of the second substrate 31 (bonding step S3). Fig. 7(A) is a cross-sectional view showing a part of the first substrate 11 and the second substrate 31 in the bonding step S3.
[0067] In the bonding step S3, first, the first substrate 11 and the second substrate 31 are arranged concentrically in a plan view so that the surface 11a side (device chip 25 side) of the first substrate 11 faces the surface 31a side (recess 31c side) of the second substrate 31. At this time, the recesses 31c of the second substrate 31 are arranged so as to overlap the device chips 25. In this state, the surface 11a side of the first substrate 11 and the surface 31a side of the second substrate 31 are bonded together via the adhesive layer 23. As a result, the first substrate 11 and the second substrate 31 are stacked.
[0068] 7(B) is a cross-sectional view showing a portion of the first substrate 11 and the second substrate 31 after the bonding step S3. When the first substrate 11 and the second substrate 31 are bonded together, the device chips 25 are housed in the recesses 31c and covered by the second substrate 31. At this time, gaps are formed between the device chips 25 and the sidewalls and bottom surface of the recesses 31c. In this way, a laminated substrate 51 is formed, which includes the first substrate 11 and the second substrate 31 stacked on top of each other.
[0069] If the first substrate 11 is a crystalline wafer, a cutout portion (notch, orientation flat, etc.) indicating the crystal orientation of the first substrate 11 may be formed in the outer periphery of the first substrate 11 (see FIG. 1(A)). Similarly, if the second substrate 31 is a crystalline wafer, a cutout portion (notch, orientation flat, etc.) indicating the crystal orientation of the second substrate 31 may be formed in the outer periphery of the second substrate 31 (see FIG. 2(A)). In this case, by bonding the first substrate 11 and the second substrate 31 together so that the cutout portion of the first substrate 11 and the cutout portion of the second substrate 31 overlap, the crystal orientation of the first substrate 11 and the crystal orientation of the second substrate 31 can be aligned.
[0070] Next, the rear surface 31b side of the second substrate 31 is ground until the recessed portion 31c is exposed (grinding step S4). Figure 8 is a cross-sectional view showing a part of the laminated substrate 51 in the grinding step S4.
[0071] For example, in the grinding step S4, the laminated substrate 51 is ground by a grinding device 2 (see FIG. 5). Specifically, the laminated substrate 51 is placed on the chuck table 4 so that the back surface 11b of the first substrate 11 faces the holding surface 4a and the back surface 31b of the second substrate 31 is exposed upward. Then, while rotating the chuck table 4 and the grinding wheel 12, the grinding stone 16 is brought into contact with the back surface 31b of the second substrate 31. As a result, the back surface 31b of the second substrate 31 is ground and thinned.
[0072] Grinding of the second substrate 31 continues until the recess 31c is exposed on the back surface 31b of the second substrate 31. Therefore, when grinding of the second substrate 31 is completed, the recess 31c becomes a columnar through-hole that penetrates the second substrate 31 in the thickness direction. Then, the top surface side of the device chip 25 arranged inside the recess 31c is exposed upward.
[0073] Next, resin is supplied into the recesses 31c to cover the device chips 25 with resin (resin molding step S5). Fig. 9 is a cross-sectional view showing a part of the laminated substrate 51 in the resin molding step S5.
[0074] In the resin molding step S5, resin (mold resin, sealing material) 53 is applied to the back surface 31b of the second substrate 31, and the resin 53 is supplied into a plurality of recesses 31c exposed on the back surface 31b of the second substrate 31. For example, the resin 53 is applied to the back surface 31b of the second substrate 31 in a heated and softened state, and flows into the recesses 31c to fill gaps between the device chips 25 and the sidewalls and bottom surfaces of the recesses 31c. As a result, the recesses 31c are filled with the resin 53, and a thin film (e.g., approximately 100 μm thick) made of the resin 53 is formed on the back surface 31b of the second substrate 31. Thereafter, the resin 53 cools and hardens over time. As a result, the device chips 25 are sealed with the resin 53.
[0075] There are no restrictions on the material of the resin 53 as long as it can seal the device chip 25. For example, insulating synthetic resins such as epoxy resin, silicone resin, urethane resin, unsaturated polyester resin, acrylic urethane resin, and polyimide resin can be used as the resin 53.
[0076] In the resin molding step S5, the device chip 25 is sealed once the resin 53 is filled into the recess 31c, so there is no need to form a thick resin layer on the back surface 31b of the second substrate 31. This reduces the amount of resin 53 used and also makes it less likely that the laminated substrate 51 will warp due to shrinkage of the resin 53.
[0077] Next, the resin 53 is ground (resin grinding step S6). Figure 10 is a cross-sectional view showing a part of the laminated substrate 51 in the resin grinding step S6.
[0078] For example, in resin grinding step S6, the resin 53 is ground by a grinding device 2 (see FIG. 5). Specifically, the laminated substrate 51 is placed on the chuck table 4 so that the back surface 11b of the first substrate 11 faces the holding surface 4a and the back surface 31b (resin 53 side) of the second substrate 31 is exposed upward. Then, the grinding stone 16 is brought into contact with the resin 53 while rotating the chuck table 4 and the grinding wheel 12. As a result, the resin 53 formed on the back surface 31b of the second substrate 31 is ground.
[0079] Grinding of resin 53 continues until resin 53 formed on rear surface 31b of second substrate 31 is removed. Then, when grinding of resin 53 is completed, rear surface 31b of second substrate 31 is exposed, and rear surface 31b of second substrate 31 and the upper surface of resin 53 filled in recess 31c are arranged on approximately the same plane.
[0080] In the resin grinding step S6, after the resin 53 on the back surface 31b of the second substrate 31 is removed, the back surface 31b side of the second substrate 31 may be slightly ground with the grinding wheel 16. This allows fine adjustment of the thickness of the second substrate 31 and the thickness of the resin 53 filled in the recesses 31c. In addition, the upper surface side of the device chip 25 may be slightly ground with the grinding wheel 16 within a range that does not impair the function of the device chip 25.
[0081] However, if the resin 53 is ground with the grinding wheel 16 until the back surface 31b of the second substrate 31 is exposed, an impact is applied to the second substrate 31 when the grinding wheel 16 reaches the second substrate 31, and an area containing fine irregularities (a fractured layer) may be formed on the back surface 31b side of the second substrate 31. This fractured layer reduces the strength of the second substrate 31. For this reason, grinding may be stopped just before the back surface 31b of the second substrate 31 is exposed, and then the back surface 31b side of the second substrate 31 may be polished.
[0082] A polishing apparatus is used for the polishing process. The polishing apparatus includes a chuck table that holds the workpiece and a polishing unit that polishes the workpiece. The polishing unit has a built-in spindle, and a disc-shaped polishing pad is attached to the tip of the spindle. The laminated substrate 51 is held by the chuck table, and the polishing pad is pressed against the laminated substrate 51 while the chuck table and polishing pad are rotated, thereby polishing the laminated substrate 51.
[0083] The polishing pad comprises a disk-shaped base made of metal, resin, etc., and a disk-shaped polishing layer fixed to the underside of the base. For example, the polishing layer is formed by incorporating abrasive grains made of silicon dioxide (SiO2), green carborundum (GC), white alundum (WA), etc. into a base member made of nonwoven fabric, urethane foam, etc. For example, abrasive grains with an average grain size of 0.1 μm to 10 μm are used. However, the material of the polishing layer, the material of the abrasive grains, the grain size of the abrasive grains, etc. can be selected appropriately depending on the material of the object to be polished, etc.
[0084] When polishing the laminated substrate 51, first, the laminated substrate 51 is held by the chuck table so that the back surface 31b side (resin 53 side) of the second substrate 31 is exposed upward. Next, the positional relationship between the chuck table and the polishing pad is adjusted so that the polishing layer of the polishing pad overlaps the entire second substrate 31. Then, while rotating the chuck table and the polishing pad, the polishing layer of the polishing pad is pressed against the back surface 31b side of the second substrate 31. As a result, the resin 53 remaining on the back surface 31b of the second substrate 31 is removed, and the back surface 31b side of the second substrate 31 is polished.
[0085] When polishing the laminated substrate 51, a polishing liquid that does not contain abrasive grains is supplied to the laminated substrate 51 and the polishing pad. Examples of the polishing liquid that can be used include chemical liquids such as acidic polishing liquid and alkaline polishing liquid, and pure water. Examples of the acidic polishing liquid include an acidic solution in which permanganate or the like is dissolved, and examples of the alkaline polishing liquid include an alkaline solution in which sodium hydroxide or potassium hydroxide is dissolved.
[0086] If the polishing layer does not contain abrasive grains, a slurry containing abrasive grains may be supplied to the laminated substrate 51 and the polishing pad. For example, the slurry contains abrasive grains made of silicon oxide (SiO2), alumina (Al2O3), or the like as loose abrasive grains.
[0087] Alternatively, the laminated substrate 51 may be processed by dry polishing. In this case, no liquid (polishing liquid) such as slurry or pure water is supplied to the laminated substrate 51 and the polishing pad while the laminated substrate 51 is being polished.
[0088] The polishing layer of the polishing pad is made of a material that is more flexible than the grinding wheel 16 (see FIG. 5). Therefore, even if the polishing layer comes into contact with the second substrate 31, a fracture layer is not formed on the back surface 31b side of the second substrate 31. This prevents a decrease in the strength of the second substrate 31.
[0089] Furthermore, by continuing polishing even after the resin 53 formed on the rear surface 31b of the second substrate 31 has been removed, it is possible to finely adjust the thickness of the second substrate 31 and the thickness of the resin 53 filled in the recesses 31c. At this time, even if the polishing layer of the polishing pad comes into contact with the device chip 25, no fractured layer is formed on the device chip 25 because the polishing layer is flexible.
[0090] In addition, if there is no problem if resin 53 remains on the back surface 31b of the second substrate 31, or if resin 53 is supplied only to the recess 31c and not applied to the back surface 31b of the second substrate 31, resin grinding step S6 can be omitted.
[0091] As described above, in this embodiment, the first substrate 11 on which the device chip 25 is mounted is bonded to the second substrate 31 having the recess 31c, thereby accommodating the device chip 25 in the recess 31c, and then the recess 31c is exposed by grinding the second substrate 31. Then, with the device chip 25 supported by the flat first substrate 11, resin 53 is supplied into the recess 31c to cover the device chip 25 with the resin 53.
[0092] By using the above method, the variation in the position of the device chip 25 in the depth direction of the recess is reduced compared to when the device chip 25 is supported on the bottom surface of a recess formed by processing such as dry etching, which has a large variation in depth and TTV. This makes it possible to obtain a laminated substrate 51 in which the heights of the device chips 25 are uniform.
[0093] After the bonding step S3 is performed, a grinding step of grinding and thinning the first substrate 11 may be performed at a predetermined timing. Fig. 11 is a cross-sectional view showing a part of the laminated substrate 51 after the first substrate 11 has been thinned.
[0094] For example, after grinding the resin 53 in the resin grinding step S6, the back surface 11b of the first substrate 11 may be subsequently ground using the grinding device 2 (see FIG. 5). In this case, the laminated substrate 51 is placed on the chuck table 4 so that the back surface 31b of the second substrate 31 faces the holding surface 4a and the back surface 11b of the first substrate 11 is exposed upward. Then, the chuck table 4 and the grinding wheel 12 are rotated while the grinding stone 16 is brought into contact with the back surface 11b of the first substrate 11, thereby grinding the back surface 11b of the first substrate 11. This thins the first substrate 11, facilitating the electrode formation and division of the laminated substrate 51, which will be described later.
[0095] Next, predetermined processing is performed on the laminated substrate 51 as necessary (processing step). As an example, the following describes a case where electrodes, wiring, etc. are formed on the laminated substrate 51 and another device chip 25 is mounted on the laminated substrate 51.
[0096] First, an insulating layer is formed on the rear surface 11b side of the first substrate 11. Fig. 12(A) is a cross-sectional view showing a part of the laminated substrate 51 on which the insulating layer 55 is formed.
[0097] The insulating layer 55 is formed to cover the entire back surface 11b of the first substrate 11, and functions as an interlayer insulating film. For example, an insulating film made of silicon oxide, silicon nitride, or resin is formed as the insulating layer 55. There are no limitations on the method for forming the insulating layer 55, and for example, a CVD (Chemical Vapor Deposition) method, a sputtering method, a spin coating method, or the like may be used.
[0098] Next, a mask layer is formed to form through holes that reach the device chips 25. Fig. 12(B) is a cross-sectional view showing a part of the laminated substrate 51 on which the mask layer 57 has been formed.
[0099] When forming the mask layer 57, first, a resist made of a photosensitive resin is applied onto the insulating layer 55. Then, the resist is patterned so as to expose regions of the insulating layer 55 that overlap with the connection terminals 25a of the device chip 25. As a result, the mask layer 57 having openings 57a that expose parts of the insulating layer 55 is formed on the insulating layer 55.
[0100] However, there are no limitations on the material and method of forming the mask layer 57. For example, a film made of a water-soluble resin such as PVA (polyvinyl alcohol), PEG (polyethylene glycol), PEO (polyethylene oxide), or PVP (polyvinylpyrrolidone) may be formed on the insulating layer 55. In this case, the film is patterned by irradiation with a laser beam or the like to form the mask layer 57 made of the water-soluble resin.
[0101] Next, a through hole is formed that reaches the device chip 25. Fig. 13(A) is a cross-sectional view showing a part of the laminated substrate 51 in which a through hole 55a is formed in the insulating layer 55. Fig. 13(B) is a cross-sectional view showing a part of the laminated substrate 51 in which a through hole 59 is formed in the first substrate 11, the wiring layer 13, and the adhesive layer 23.
[0102] First, as shown in FIG. 13A, through-holes 55a are formed in the insulating layer 55 by a method such as reactive ion etching (RIE). Specifically, an etching gas in a plasma state is supplied to the insulating layer 55 through the openings 57a in the mask layer 57. This causes the etching gas to act on the regions of the insulating layer 55 exposed inside the openings 57a, thereby partially removing the insulating layer 55. As a result, through-holes 55a that penetrate the insulating layer 55 in the thickness direction are formed at positions that overlap the connection terminals 25a of the device chip 25. However, there are no limitations on the method for forming the through-holes 55a.
[0103] 13(B), a through hole 59 is formed from the through hole 55a in the insulating layer 55 to the recess 31c in the second substrate 31. For example, the first substrate 11, the wiring layer 13, and the adhesive layer 23 are etched in order by reactive ion etching using a mask layer 57. As a result, the through hole 59 that penetrates the first substrate 11, the wiring layer 13, and the adhesive layer 23 in the thickness direction is formed at a position overlapping the connection terminal 25a of the device chip 25. Then, the connection terminal 25a of the device chip 25 is exposed at the lower end of the through hole 59.
[0104] Note that through hole 59 may be formed by a so-called Bosch process, which involves repeating isotropic etching, formation of a protective film, and anisotropic etching. Furthermore, after through hole 55a is formed, mask layer 57 may be removed and a new mask layer may be formed for forming through hole 59. That is, different mask layers may be used for forming through hole 55a and through hole 59.
[0105] Next, electrodes are formed in the through holes 55a and 59. Fig. 14(A) is a cross-sectional view showing a part of the laminated substrate 51 on which electrodes (through electrodes, via electrodes) 61 are formed.
[0106] First, after the through holes 55a and 59 are formed, the mask layer 57 is removed. Then, the inner walls of the through holes 55a and 59 are covered with an insulating film. This insulating film insulates the first substrate 11 and the wiring layer 13 from the electrodes 61 described below. Next, the through holes 55a and 59 are filled with a conductive material such as copper, tungsten, or aluminum. This forms the electrodes 61 in the through holes 55a and 59. For example, the electrodes 61 made of copper are formed by electrolytic plating.
[0107] When the electrode 61 is formed, the upper end of the electrode 61 is exposed on the surface of the insulating layer 55, and the lower end of the electrode 61 is connected to the connection terminal 25a of the device chip 25. This makes it possible to connect the device chip 25 to other electrodes, wiring, etc. formed on the insulating layer 55.
[0108] Next, a wiring layer is formed on the insulating layer 55. Fig. 14(B) is a cross-sectional view showing a part of the laminated substrate 51 on which the wiring layer 63 is formed.
[0109] The wiring layer 63 includes various thin films such as conductive films that function as wiring, electrodes, terminals, etc., and insulating films that function as interlayer insulating films, and is formed over the entire surface of the insulating layer 55. For example, the wiring layer 63 includes connection electrodes 65, 67 made of a metal such as copper, and an insulating layer 69 made of silicon oxide, silicon nitride, etc. and formed so as to surround the connection electrodes 65, 67. The connection electrode 65 is connected to the electrode 61, and the connection electrode 67 is connected to other electrodes, wiring, etc. included in the wiring layer 63. The method for forming the wiring layer 63 is the same as the method for forming the wiring layer 13 (see FIG. 1(B), etc.).
[0110] Next, the device chip 25 is mounted on the multilayer substrate 51. Fig. 15 is a cross-sectional view showing a part of the multilayer substrate 51 on which the device chip 25 is mounted.
[0111] For example, one device chip 25 is mounted on the wiring layer 63 so that the connection terminals 25a are connected to the connection electrodes 65. As a result, the device chip 25 provided in the recess 31c and the device chip 25 mounted on the wiring layer 63 are connected to each other via the electrodes 61 and the connection electrodes 65. Furthermore, another device chip 25 is mounted on the wiring layer 63 so that the connection terminals 25a are connected to the connection electrodes 67. As a result, the device chip 25 is connected to the wiring layer 63. Thereafter, the device chip 25 mounted on the wiring layer 63 is sealed with resin as necessary.
[0112] As described above, by mounting the device chip 25 on the wiring layer 63 side of the laminated substrate 51, the laminated substrate 51 is provided with a plurality of device chips 25 stacked on top of each other. However, the processing performed on the laminated substrate 51 is not limited to the above and can be changed as appropriate in accordance with the specifications of the packaged device to be manufactured.
[0113] Next, the first substrate 11 and the second substrate 31 are divided along the planned division lines 19, 33 to manufacture a plurality of package devices each including a device chip 25 (dividing step S7). Fig. 16(A) is a cross-sectional view showing a part of the laminated substrate 51 in the dividing step S7.
[0114] In the dividing step S7, the laminated substrate 51 is cut by, for example, a cutting device. The cutting device includes a chuck table that holds the laminated substrate 51 and a cutting unit that cuts the laminated substrate 51. In addition, an annular cutting blade 20 is attached to the tip of a spindle built into the cutting unit.
[0115] For example, a hub-type cutting blade (hub blade) is used as the cutting blade 20. A hub blade is composed of an annular base made of metal or the like and an annular cutting edge formed along the outer periphery of the base. The cutting edge of the hub blade is composed of an electroformed grinding stone in which abrasive grains made of diamond or the like are fixed with a bonding material such as nickel plating.
[0116] However, a washer-type cutting blade (washer blade) can also be used as the cutting blade 20. A washer blade is composed of an annular cutting edge in which abrasive grains are fixed by a binder made of metal, ceramics, resin, or the like.
[0117] When dividing the laminated substrate 51, first, the laminated substrate 51 is held by a chuck table of a cutting device. For example, the laminated substrate 51 is placed on the chuck table so that the back surface 31b of the second substrate 31 faces the holding surface of the chuck table and the back surface 11b (the wiring layer 63 side) of the first substrate 11 is exposed upward.
[0118] Next, the chuck table is rotated to align the length direction of the predetermined dividing lines 19, 33 with the processing feed direction (front-back direction in FIG. 16(A)). Also, the position of the cutting blade 20 in the indexing feed direction (left-right direction in FIG. 16(A)) is adjusted so that the cutting blade 20 is positioned on an extension of the predetermined dividing lines 19, 33. Furthermore, the height of the cutting blade 20 is adjusted so that the lower end of the cutting blade 20 is positioned below the lower surface of the laminated substrate 51 (the back surface 31b of the second substrate 31).
[0119] Then, while rotating the cutting blade 20, the chuck table is moved along the processing feed direction. As a result, the laminated substrate 51 and the cutting blade 20 move relatively along the processing feed direction, and the cutting blade 20 cuts into the laminated substrate 51 along the planned division lines 19, 33. As a result, the laminated substrate 51 (first substrate 11, wiring layer 13, adhesive layer 23, second substrate 31, insulating layer 55, and wiring layer 63) is cut and divided along the planned division lines 19, 33. Thereafter, by repeating the same procedure, the laminated substrate 51 is cut along all of the planned division lines 19, 33.
[0120] 16(B) is a cross-sectional view showing a portion of the laminated substrate 51 after the dividing step S7. When the laminated substrate 51 is cut along all of the planned dividing lines 19 and 33, the laminated substrate 51 is divided into a plurality of packaged devices 71. The packaged devices 71 have a structure in which the device chips 25 accommodated in the recesses 31c of the second substrate 31 and the device chips 25 mounted on the wiring layer 63 are stacked on top of each other. In this manner, the packaged devices 71 in which a plurality of device chips 25 are packaged are manufactured.
[0121] As described above, in the method for manufacturing a package device according to this embodiment, the first substrate 11 on which the device chip 25 is mounted is bonded to the second substrate 31 having the recess 31c, thereby accommodating the device chip 25 in the recess 31c (see FIG. 7B), and then the second substrate 31 is ground to expose the recess 31c (see FIG. 8A). Then, with the device chip 25 supported by the flat first substrate 11, resin 53 is supplied into the recess 31c to cover the device chip 25 with the resin 53 (see FIG. 10).
[0122] By using the above method, the variation in the position of the device chip 25 in the depth direction of the recess is reduced compared to when the device chip 25 is supported on the bottom surface of a recess formed by processing such as dry etching, which has a large variation in depth and TTV. This makes it possible to obtain a laminated substrate 51 in which the heights of the device chips 25 are uniform. As a result, for example, when a through-hole 59 is formed in the laminated substrate 51 (see FIG. 13(B)), the through-hole 59 reaches the device chip 25 appropriately, and poor connection between the device chip 25 and the electrode 61 (see FIG. 14(A)) is avoided.
[0123] The structures, methods, etc. according to the above-described embodiments can be modified as appropriate without departing from the scope of the object of the present invention. [Explanation of symbols]
[0124] 11 First substrate (chip substrate) 11a Surface (one side, first side) 11b Back side (other side, second side) 13 Wiring layer 15 Conductive layer 17 Insulating layer 19 Planned division line (street) 21 Loading area 23 Adhesive layer 25 Device Chips 25a connection terminal 31 Second substrate (bonded substrate) 31a Surface (one side, first side) 31b Back side (other side, second side) 31c Recess (accommodating portion) 33 Planned division line (street) 35 Containment Area 41 Second substrate (bonded substrate) 41a Surface (one side, first side) 41b Back side (other side, second side) 41c Recess (accommodation part) 51 Laminated substrate 53 Resin (mold resin, sealing material) 55 Insulating layer 55a through hole 57 Mask Layer 57a aperture 59 Through Hole 61 Electrode (through electrode, via electrode) 63 Wiring layer 65 connecting electrode 67 Connecting electrode 69 Insulating Layer 71 Packaged Devices 2 Grinding equipment 4 Chuck table (holding table) 4a Holding surface 6 Grinding Unit 8 spindles 10 Mount 12 Grinding wheels 14 Wheel base 16 Grinding Wheel 20 cutting blades
Claims
1. A method of manufacturing a packaged device, comprising: a first substrate preparation step of preparing a first substrate having a plurality of mounting areas on one surface thereof, the mounting areas being partitioned by a plurality of planned division lines that intersect with each other, and device chips being mounted in each of the plurality of mounting areas; a second substrate preparation step of preparing a second substrate having a plurality of recesses on one surface side, the recesses being provided in an area corresponding to the mounting area and capable of accommodating the device chip; a bonding step of bonding the first substrate and the second substrate together so that the device chip is housed in the recess; a grinding step of grinding the other surface side of the second substrate until the recessed portion is exposed after the bonding step; a resin molding step of supplying a resin into the recesses to cover the device chips with the resin after the grinding step; a dividing step of manufacturing a plurality of package devices each including the device chip by dividing the first substrate and the second substrate along the planned dividing line after the resin molding step.
2. The first substrate preparation step includes: a planarizing step of planarizing the first substrate; 2. The method for manufacturing a packaged device according to claim 1, further comprising a mounting step of mounting the device chip on the mounting area after the planarizing step.
3. 3. The method for manufacturing a package device according to claim 1, further comprising a resin grinding step of grinding the resin after the resin molding step.
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