Power Conversion Device

Abstract

To provide a power conversion device capable of easily performing an adjustment operation of a switching timing of a plurality of switching elements connected in series.SOLUTION: A power conversion device has a main circuit part having a plurality of switch parts, a plurality of driving circuits for driving the plurality of switching parts respectively, and performing a power conversion by switching of the plurality of switch parts, and a control device controlling the power conversion by the main circuit part. The plurality of switch parts have a plurality of switching elements connected in series respectively, the plurality of driving circuits have a plurality of adjustment circuits provided corresponding to each of the plurality of switching elements, the plurality of adjustment circuits respectively have a plurality of settings, and by changing a length of a delay time according to a selected setting, each switching timing of the plurality of switching elements can be adjusted.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] FIELD An embodiment of the present invention relates to a power conversion device. [Background technology]

[0002] There is a power conversion device that has multiple switch units and converts power by switching the multiple switch units. In such a power conversion device, multiple switching elements are provided that are connected in series to each of the multiple switch units. This makes it possible to output a high voltage while suppressing an increase in the withstand voltage of each switching element.

[0003] On the other hand, in a power conversion device in which multiple switching elements are connected in series, variations in the switching timing of each switching element may occur due to variations in the characteristics of each switching element, etc. If variations in the switching timing of multiple switching elements connected in series occur, for example, an excessive voltage may be applied to only some of the multiple switching elements connected in series, which may cause failure of those switching elements.

[0004] For this reason, it has been proposed to provide a power conversion device in which multiple switching elements are connected in series with an adjustment circuit that adjusts the switching timing of each switching element. Each switching element has a control terminal and switches between an ON state and an OFF state in response to a drive signal input to the control terminal. The adjustment circuit, for example, has a multi-turn volume resistor and adjusts the resistance value of the multi-turn volume resistor to adjust the timing of the drive signal input to the switching element, thereby adjusting the switching timing of the switching element.

[0005] However, in an adjustment circuit with a multi-turn volume resistor, for example, it is difficult to determine how much the volume resistor knob should be turned to adjust the switching timing, which can make the adjustment work time-consuming. For this reason, in a power conversion device in which multiple switching elements are connected in series, it is desirable to make it possible to adjust the switching timing more easily. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2011-66984 Summary of the Invention [Problem to be solved by the invention]

[0007] The embodiments provide a power conversion device that can more easily adjust the switching timings of a plurality of switching elements connected in series. [Means for solving the problem]

[0008] According to this embodiment, a power supply includes a main circuit section having a plurality of switch sections and a plurality of drive circuits for driving the plurality of switch sections, respectively, and converting power by switching the plurality of switch sections; and a control device that transmits a plurality of control signals corresponding to the plurality of switch sections to the plurality of drive circuits, respectively, and controls the switching of the plurality of switch sections, thereby controlling the power conversion by the main circuit section, wherein each of the plurality of switch sections has a plurality of switching elements connected in series, and the plurality of switching elements have a pair of main terminals and a control terminal, and have an on state in which a current flows between the pair of main terminals and an off state in which a current flow between the pair of main terminals is blocked, and the on state and the off state are switched according to a voltage between the pair of main terminals and a voltage of the control terminal, and each of the plurality of adjustment circuits has a plurality of adjustment circuits provided corresponding to each of the plurality of switching elements, and each of the plurality of adjustment circuits generates a plurality of drive signals corresponding to each of the plurality of switching elements based on the control signal input from the control device, and switches each of the plurality of switching elements by inputting the plurality of drive signals to the control terminals of the plurality of switching elements, and is capable of setting a delay time that delays the switching timing of the plurality of switching elements from the timing corresponding to the control signal, and has a plurality of settings with different lengths of the delay time, and allows any one of the plurality of settings to be selected arbitrarily, and by changing the length of the delay time according to the selected setting, the switching timing of each of the plurality of switching elements can be adjusted. Each of the plurality of adjustment circuits has a first adjustment unit that can adjust the timing of switching of the corresponding switching element from the off state to the on state, and a second adjustment unit that can adjust the timing of switching of the corresponding switching element from the on state to the off state. A power converter is provided. [Effects of the Invention]

[0009] In this embodiment, a power conversion device is provided that can more easily adjust the switching timings of a plurality of switching elements connected in series. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a block diagram schematically illustrating a power conversion device according to an embodiment. [Figure 2] FIG. 2 is a block diagram schematically illustrating a switch unit and a drive circuit according to the embodiment. [Figure 3] FIG. 2 is a block diagram schematically illustrating an adjustment circuit according to an embodiment. [Figure 4] 10 is a table schematically illustrating an example of the operation of the adjustment circuit according to the embodiment. [Figure 5] 10 is a timing chart schematically illustrating an example of the operation of the adjustment circuit according to the embodiment. [Figure 6] FIG. 10 is a block diagram schematically illustrating a modification of the adjustment circuit according to the embodiment. [Figure 7] FIG. 10 is a block diagram schematically illustrating a modification of the adjustment circuit according to the embodiment. [Figure 8] 10 is a timing chart schematically illustrating an example of the operation of the adjustment circuit of the modified example. DETAILED DESCRIPTION OF THE INVENTION

[0011] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc. are not necessarily the same as those in reality. Furthermore, even when the same part is shown, the dimensions and ratios may be different depending on the drawing. In the present specification and the drawings, elements similar to those described above with reference to the previous drawings are given the same reference numerals, and detailed descriptions thereof will be omitted as appropriate.

[0012] FIG. 1 is a block diagram schematically illustrating a power conversion device according to an embodiment. As shown in FIG. 1, the power conversion device 10 includes a main circuit unit 12 and a control device 14.

[0013] The main circuit section 12 has a plurality of switch sections 21 to 26, a plurality of rectifying elements 31 to 36 connected in anti-parallel to each of the plurality of switch sections 21 to 26, a charge storage element 40 connected in parallel to each of the plurality of switch sections 21 to 26, and a plurality of drive circuits 41 to 46 for driving each of the plurality of switch sections 21 to 26.

[0014] The main circuit unit 12 converts power by switching a plurality of switch units 21 to 26. The main circuit unit 12 has, for example, six switch units 21 to 26 connected in a three-phase bridge configuration. The main circuit unit 12 is, for example, a three-phase two-level inverter.

[0015] In the main circuit section 12, both ends of each of the switch sections 21 to 26 form a pair of DC terminals d1 and d2, and the connection point between the switch section 21 and the switch section 22, the connection point between the switch section 23 and the switch section 24, and the connection point between the switch section 25 and the switch section 26 form three AC terminals a1 to a3, respectively.

[0016] The main circuit unit 12 is connected to an AC circuit via the AC terminals a1 to a3. The AC circuit is, for example, an AC power system or an AC load. The AC terminals a1 to a3 are connected to the AC circuit via, for example, a circuit breaker or a transformer (not shown). The main circuit unit 12 is also connected to a DC circuit via a pair of DC terminals d1 and d2. The DC circuit is, for example, a DC power source or a DC load. The main circuit unit 12 performs at least one of DC to AC conversion and AC to DC conversion by, for example, switching the switches 21 to 26.

[0017] Each of the switch units 21 to 26 has, for example, a pair of main terminals. Each of the switch units 21 to 26 has an on state and an off state. The on state is a state in which a current flows between the pair of main terminals. The off state is a state in which the flow of current between the pair of main terminals is blocked. Note that the off state is not limited to a state in which no current flows between the pair of main terminals, but may also be a state in which a weak current flows between the pair of main terminals within a range that does not affect the operation of the main circuit unit 12.

[0018] Each of the rectifying elements 31 to 36 is connected in anti-parallel to a pair of main terminals of the corresponding switch section 21 to 26. The forward direction of each of the rectifying elements 31 to 36 is opposite to the direction of the current flowing between the pair of main terminals of the corresponding switch section 21 to 26. Each of the rectifying elements 31 to 36 is a so-called free wheel diode.

[0019] However, the configuration of the main circuit unit 12 is not limited to the above. The main circuit unit 12 may be, for example, a single-phase two-level inverter. The AC power is not limited to three-phase AC power, and may be single-phase AC power, etc. The main circuit unit 12 may be, for example, a multilevel inverter such as a three-level inverter. The main circuit unit 12 may be configured in any way that can convert power by switching multiple switch units 21 to 26. Furthermore, the power conversion by the main circuit unit 12 may be conversion from DC power to another DC power, or conversion from AC power to another AC power, etc. The power conversion by the main circuit unit 12 may be any conversion that converts power into another power.

[0020] The control device 14 controls the power conversion operation by the main circuit unit 12. The control device 14 transmits a plurality of control signals corresponding to the plurality of switch units 21-26 to the plurality of drive circuits 41-46, respectively. Each drive circuit 41-46 switches the on / off state of each switch unit 21-26 based on the control signal input from the control device 14. In this way, the control device 14 controls the power conversion by the main circuit unit 12 by transmitting control signals to each drive circuit 41-46 and controlling the switching of each switch unit 21-26.

[0021] FIG. 2 is a block diagram schematically illustrating a switch section and a drive circuit according to the embodiment. 2, switch section 21 has a plurality of switching elements 50 and a plurality of snubber circuits 52. Drive circuit 41 has a plurality of adjustment circuits 54. Note that the configurations of the other switch sections 22 to 26 are substantially the same as the configuration of switch section 21, and the configurations of the other drive circuits 42 to 46 are substantially the same as the configuration of drive circuit 41, so detailed description thereof will be omitted.

[0022] The multiple switching elements 50 are connected in series. The multiple switching elements 50 are connected in series between a pair of main terminals 21a, 21b of the switch section 21. This allows the multiple switching elements 50 in the main circuit section 12 to share the voltage applied to both ends of the switch sections 21 to 26. Therefore, it is possible to perform power conversion at a relatively high voltage while suppressing the need for the multiple switching elements 50 to have a high withstand voltage.

[0023] The multiple switching elements 50 have a pair of main terminals and a control terminal. The multiple switching elements 50 have an on state and an off state. As with each of the switch units 21 to 26, the on state is a state in which current flows between the pair of main terminals. The off state is a state in which current flow between the pair of main terminals is blocked. The off state is not limited to a state in which no current flows between the pair of main terminals, but may be a state in which a weak current flows between the pair of main terminals within a range that does not affect the operation of the main circuit unit 12. The on state of each of the switch units 21 to 26 is, in other words, a state in which all of the multiple switching elements 50 are in the on state. The off state of each of the switch units 21 to 26 is, in other words, a state in which at least one of the multiple switching elements 50 is in the off state.

[0024] The multiple switching elements 50 switch between an on state and an off state in response to the voltage between a pair of main terminals and the voltage at a control terminal. The multiple switching elements 50 are, for example, self-excited semiconductor elements such as IGBTs and MOSFETs. However, the multiple switching elements 50 are not limited to these and may be any elements that can be arbitrarily switched between an on state and an off state.

[0025] The plurality of snubber circuits 52 are provided corresponding to the plurality of switching elements 50, respectively. Each of the plurality of snubber circuits 52 is connected in parallel with each of the plurality of switching elements 50. The snubber circuits 52 suppress a transient high voltage that occurs when the switching elements 50 are turned off.

[0026] Each snubber circuit 52 includes, for example, a series connection of a resistor 52 a and a capacitor 52 b. The resistor 52 a is provided between a pair of main terminals of the switching element 50. The capacitor 52 b is provided between the resistor 52 a and one of the main terminals of the switching element 50.

[0027] In this example, each snubber circuit 52 is a so-called RC snubber circuit. However, the configuration of each snubber circuit 52 is not limited to an RC snubber circuit, and any configuration that is connected in parallel to the switching element 50 and can suppress a transient high voltage that occurs when the switching element 50 is turned off may be used. Furthermore, each snubber circuit 52 is provided as needed and can be omitted.

[0028] The plurality of adjustment circuits 54 are provided corresponding to the plurality of switching elements 50, respectively. Each of the plurality of adjustment circuits 54 is connected to a control terminal of each of the plurality of switching elements 50. Each of the plurality of adjustment circuits 54 is also connected to the control device 14. In other words, the plurality of adjustment circuits 54 are provided between the control device 14 and the control terminals of each of the plurality of switching elements 50. The plurality of adjustment circuits 54 receive as input a control signal for the switch unit 21 (drive circuit 41) output from the control device 14. In this way, the same control signal for the switch unit 21 output from the control device 14 is input to each of the plurality of adjustment circuits 54.

[0029] The plurality of adjustment circuits 54 generate a plurality of drive signals corresponding to the plurality of switching elements 50 based on the control signals input from the control device 14, and switch each of the plurality of switching elements 50 by inputting the generated drive signals to the control terminals of the plurality of switching elements 50. In other words, the plurality of adjustment circuits 54 input the generated drive signals to the control terminals of the plurality of switching elements 50 and change the magnitude of the voltage at the control terminals of the plurality of switching elements 50, thereby switching the plurality of switching elements 50 between the on state and the off state.

[0030] In this case, the switching timing of the multiple switching elements 50 may change due to variations in the characteristics of the multiple switching elements 50 or variations in the characteristics of the multiple snubber circuits 52, even if the same drive signal is input to the control terminals of each switching element 50.

[0031] Therefore, the plurality of adjustment circuits 54 perform switching of the plurality of switching elements 50 based on the input control signals, and also adjust the switching timing of the plurality of switching elements 50. The plurality of adjustment circuits 54 generate a plurality of drive signals so as to adjust the switching timing of the plurality of switching elements 50, thereby enabling adjustment of the switching timing of the plurality of switching elements 50.

[0032] The plurality of adjustment circuits 54 suppresses imbalance in the switching timing of the plurality of switching elements 50, and enables the plurality of switching elements 50 to be switched substantially simultaneously. This makes it possible to suppress, for example, an excessive voltage being applied to only some of the plurality of switching elements 50 due to variations in the switching timing of the plurality of switching elements 50.

[0033] FIG. 3 is a block diagram schematically illustrating an adjustment circuit according to the embodiment. 3, the adjustment circuit 54 includes a plurality of resistance elements 60, a switching circuit 62, a capacitor 64, and an AND circuit 66. The adjustment circuit 54 also includes an input terminal 54a and an output terminal 54b. The input terminal 54a is connected to the control device 14. A control signal output from the control device 14 is input to the input terminal 54a. The output terminal 54b is connected to the control terminal of the corresponding switching element 50.

[0034] The AND circuit 66 has a pair of input terminals 66a, 66b and an output terminal 66c. In other words, the AND circuit 66 is an AND circuit. One input terminal 66a of the AND circuit 66 is connected to the input terminal 54a of the adjustment circuit 54. As a result, a control signal from the control device 14 is input to the input terminal 66a. The output terminal 66c is connected to the output terminal 54b of the adjustment circuit 54. Therefore, in this example, the output of the AND circuit 66 is input to the control terminal of the corresponding switching element 50 as a drive signal.

[0035] One end of each of the plurality of resistive elements 60 is connected to an input terminal 54a of the adjustment circuit 54. As a result, a control signal from the control device 14 is also input to the plurality of resistive elements 60. The other end of each of the plurality of resistive elements 60 is connected to a switching circuit 62.

[0036] The switching circuit 62 has a plurality of switches 62a provided corresponding to the plurality of resistance elements 60, respectively, and an operation unit 62b for switching the plurality of switches 62a between open and closed states. One end of each of the plurality of switches 62a is connected to the other end of each of the plurality of resistance elements 60. The other end of each of the plurality of switches 62a is connected to the other input terminal 66b of the AND circuit 66.

[0037] The switching circuit 62 switches between the open and closed states of the switches 62a to switch the connection states of the resistor elements 60. The switching circuit 62 arbitrarily switches the number of parallel connections of the resistor elements 60 between the input terminal 54a of the adjustment circuit 54 and the input terminal 66b of the AND circuit 66, for example.

[0038] As described above, the switching circuit 62 changes the combined resistance value of the multiple resistance elements 60 by switching the connection states of the multiple resistance elements 60. For example, the switching circuit 62 changes the resistance value between the input terminal 54a of the adjustment circuit 54 and the input terminal 66b of the AND circuit 66 in accordance with the combined resistance value of the multiple resistance elements 60 by switching the connection states of the multiple resistance elements 60. For example, the switching circuit 62 switches between the open and closed states of the multiple switches 62a to change the number of resistance elements 60 connected in parallel among the multiple resistance elements 60, thereby arbitrarily changing the combined resistance value of the multiple resistance elements 60.

[0039] The operation unit 62b is, for example, a rotary operation unit. The switching circuit 62 switches between opening and closing the multiple switches 62a depending on, for example, the operation position (rotation position) of the operation unit 62b. The operation unit 62b has, for example, multiple operation positions corresponding to the number of combinations of connection states of the multiple resistance elements 60. In other words, each of the multiple operation positions corresponds to each of the multiple connection states of the multiple resistance elements 60. In this way, the operation unit 62b can arbitrarily select any one of the multiple connection states of the multiple resistance elements 60 using the multiple operation positions. The switching circuit 62 is, for example, an absolute rotary encoder.

[0040] However, the configuration of the switching circuit 62 is not limited to the above, and may be any configuration that allows the connection states of the plurality of resistance elements 60 to be arbitrarily switched by switching the open / close states of the plurality of switches 62a. The operation unit 62b is not limited to a rotary operation unit, and may be, for example, a sliding operation unit. The operation unit 62b may be any operation unit that has multiple operation positions and allows the connection states of the plurality of resistance elements 60 to be arbitrarily switched by switching the operation positions in response to a manual operation input.

[0041] One end of the capacitor 64 is connected to one of the multiple resistance elements 60 via the switching circuit 62, and is also connected to the other input terminal 66b of the AND circuit 66. The other end of the capacitor 64 is connected to, for example, a terminal at ground potential. In other words, the capacitor 64 is connected in parallel to the input terminal 66b.

[0042] As described above, a control signal from the control device 14 is input to one input terminal 66a of the AND circuit 66. A control signal from the control device 14 is input to the other input terminal 66b of the AND circuit 66 via a plurality of resistance elements 60 and a switching circuit 62. More specifically, the control signal from the control device 14 is input to the input terminal 66b via a resistance element 60 of the plurality of resistance elements 60 that is connected by the switching circuit 62.

[0043] The logical product circuit 66 calculates the logical product of the control signal input to the input terminal 66a and the control signal input to the input terminal 66b, and inputs the result of the logical product to the control terminal of the corresponding switching element 50 as a drive signal.

[0044] FIG. 4 is a table that schematically illustrates an example of the operation of the adjustment circuit according to the embodiment. 4 shows an example of the operation of the adjustment circuit 54 when the number of the plurality of resistance elements 60 is four. As shown in Fig. 4, the resistance values ​​of the plurality of resistance elements 60 are set to different resistance values. The switching circuit 62, for example, switches between opening and closing a plurality of switches 62a to arbitrarily change the number of resistance elements 60 connected in parallel among the plurality of resistance elements 60 and arbitrarily change the combination of resistance elements 60 connected in parallel.

[0045] This allows for more precise setting of the combined resistance value of the multiple resistance elements 60. For example, as shown in FIG. 4, if the number of multiple resistance elements 60 is four and the resistance values ​​of each of the four resistance elements 60 are set to different values, the combined resistance value of the multiple resistance elements 60 can be changed in 16 different ways by changing the combination of resistance elements 60 connected in parallel. However, the resistance values ​​of each of the multiple resistance elements 60 may be the same. The resistance values ​​of each of the multiple resistance elements 60 may be set arbitrarily depending on the required combined resistance value pattern, etc.

[0046] FIG. 5 is a timing chart schematically illustrating an example of the operation of the adjustment circuit according to the embodiment. FIG. 5 shows an example of a control signal (A in FIG. 5) input from the control device 14 to the input terminal 66a of the logical product circuit 66, a control signal (B in FIG. 5) input to the input terminal 66b of the logical product circuit 66 via a plurality of resistive elements 60 and a switching circuit 62, and a drive signal (C in FIG. 5) output from the output terminal 66c of the logical product circuit 66.

[0047] As shown in Fig. 5, the control signal has a high voltage state and a low voltage state. The high voltage state corresponds to, for example, the on state of the switch unit 21, and the low voltage state corresponds to, for example, the off state of the switch unit 21. The control signal is a control signal for controlling the switching of each of the switch units 21 to 26 by, for example, repeating the high voltage state and the low voltage state at a predetermined cycle and changing the ratio between the high voltage state and the low voltage state. The control signal is, for example, a control signal for PWM control. The control signal may also be called, for example, a gate signal or a gate command.

[0048] The drive signal output from the AND circuit 66 is in a high-voltage state when both inputs to the input terminals 66a and 66b are in a high-voltage state, and is in a low-voltage state when at least one of the inputs to the input terminals 66a and 66b is in a low-voltage state. Thus, like the control signal, the drive signal also has a high-voltage state and a low-voltage state. Each switching element 50 is, for example, in an on state when the voltage of the drive signal (control terminal) is in a high-voltage state, and in an off state when the voltage of the drive signal (control terminal) is in a low-voltage state.

[0049] However, the above is not intended to limit the magnitude of the voltage of the control signal, the magnitude of the voltage at the control terminal of each switching element 50, and the on / off relationship of each switching element 50. The magnitude of the voltage of the control signal, the magnitude of the voltage at the control terminal of each switching element 50, and the on / off relationship of each switching element 50 may be set as appropriate in accordance with the characteristics of each switching element 50.

[0050] 5, a delay corresponding to the time constant τ occurs in the control signal input to the input terminal 66b of the AND circuit 66 via the multiple resistance elements 60 and the switching circuit 62 with respect to the original control signal input from the control device 14. Therefore, a delay corresponding to the time constant τ also occurs in the drive signal calculated by the logical product of the control signal input to the input terminal 66a and the control signal input to the input terminal 66b with respect to the original control signal input from the control device 14.

[0051] When the combined resistance value of the multiple resistance elements 60 is Rcom and the capacitance value of the capacitor 64 is C1, the time constant τ can be expressed as τ = Rcom × C1. Therefore, in the adjustment circuit 54, the combined resistance value Rcom of the multiple resistance elements 60 is changed by switching the connection state of the multiple resistance elements 60, thereby changing the time constant τ.

[0052] The capacitor 64, for example, configures an RC low-pass filter together with one of the multiple resistance elements 60 connected via the switching circuit 62. The adjustment circuit 54, for example, switches the connection states of the multiple resistance elements 60 to change the combined resistance value Rcom of the multiple resistance elements 60, thereby changing the characteristics of the RC low-pass filter, thereby changing the time constant τ.

[0053] In this way, the adjustment circuit 54 changes the time constant τ and changes the length of the delay time of the control signal input to the input terminal 66b, thereby adjusting the switching timing of the corresponding switching element 50. The adjustment circuit 54 also outputs the result of a logical AND operation between the original control signal and the control signal after the delay time has been changed as a drive signal. This prevents, for example, a change in the delay time causing a gradient (rounding) in the rise and fall of the drive signal, which causes the switching element 50 to change gradually from the OFF state to the ON state or from the ON state to the OFF state, and thus prevents an increase in loss.

[0054] The adjustment circuit 54 can adjust the timing at which the drive signal switches from a low voltage state to a high voltage state by changing the time constant τ, for example. In other words, the adjustment circuit 54 can adjust the timing at which the corresponding switching element 50 switches from an OFF state to an ON state by changing the time constant τ, for example.

[0055] In this way, each of the plurality of adjustment circuits 54 can set a delay time that delays the switching timing of the plurality of switching elements 50 from the timing according to the control signal. Each of the plurality of adjustment circuits 54 has a plurality of settings with different lengths of delay time, and allows any one of the plurality of settings to be selected arbitrarily. By changing the length of the delay time according to the selected setting, the switching timing of each of the plurality of switching elements 50 can be arbitrarily adjusted.

[0056] In this example, the multiple settings with different lengths of delay time are multiple connection state settings for the multiple resistance elements 60. In other words, the multiple adjustment circuits 54 have multiple connection state settings for the multiple resistance elements 60, and allow any one of the multiple connection state settings for the multiple resistance elements 60 to be selected arbitrarily, and by changing the length of the delay time according to the selected setting, the switching timing of each of the multiple switching elements 50 can be arbitrarily adjusted.

[0057] The adjustment circuit 54, for example, switches the connection states of the multiple resistance elements 60 to change the combined resistance value Rcom of the multiple resistance elements 60, and changes the time constant τ based on the combined resistance value Rcom and the capacitance value of the capacitor 64, thereby making it possible to change the length of the delay time according to the settings of the multiple connection states of the multiple resistance elements 60.

[0058] In an initial state, the plurality of adjustment circuits 54 are set to a state in which an intermediate setting among a plurality of settings with different delay time lengths, such as the seventh setting or the eighth setting shown in the table of FIG. 4, is selected. In the power conversion device 10, for example, when the delay time of the initial state is set, the switching timing of the plurality of switching elements 50 is checked. The switching timing is checked, for example, when a voltage that does not cause an overvoltage on each switching element 50 is applied across the switch unit 21. For example, the on-timing of the other switching elements 50 is adjusted to match the on-timing of the switching element 50 with the most frequent on-timing among the plurality of switching elements 50.

[0059] For example, when four switching elements 50 are connected in series, and two of the switching elements 50 have substantially the same switching timing, but one switching element 50 has a faster switching timing than the other two switching elements 50 and a slower switching timing than the other two switching elements 50, the connection settings of the multiple resistance elements 60 are adjusted to increase the delay time of the switching element 50 with the faster switching timing, and the connection settings of the multiple resistance elements 60 are adjusted to decrease the delay time of the switching element 50 with the slower switching timing. This suppresses imbalance in the switching timing of the multiple switching elements 50, allowing the multiple switching elements 50 to switch substantially simultaneously. In this example, the multiple switching elements 50 can be switched from the OFF state to the ON state substantially simultaneously.

[0060] As described above, in the power conversion device 10 according to this embodiment, each of the plurality of adjustment circuits 54 has a plurality of settings with different lengths of delay time, and any one of the plurality of settings can be selected arbitrarily. By changing the length of the delay time according to the selected setting, the switching timing of each of the plurality of switching elements 50 can be arbitrarily adjusted.

[0061] As a result, in the power conversion device 10, for example, by simply selecting an appropriate setting for the adjustment range of the switching timing, it is possible to appropriately adjust the switching timing of the multiple switching elements 50. For example, as in the case of using a multi-turn volume resistor, it is possible to prevent a situation in which it is not clear how much the volume resistor knob should be turned to match the adjustment range of the switching timing, and the adjustment work takes time. Therefore, in the power conversion device 10, it is possible to more easily adjust the switching timing of the multiple switching elements 50 connected in series.

[0062] Furthermore, in the power conversion device 10, the adjustment circuit 54 switches the connection states of the multiple resistance elements 60 to change the combined resistance value Rcom of the multiple resistance elements 60, and also changes the time constant τ based on the combined resistance value Rcom and the capacitance value of the capacitor 64, thereby making it possible to change the length of the delay time according to the settings of the multiple connection states of the multiple resistance elements 60. This makes it possible to appropriately change the length of the delay time according to the selected setting, and appropriately adjust the switching timing of each of the multiple switching elements 50.

[0063] Furthermore, for example, when a multi-turn volume resistor is used, it is difficult to visually determine how many turns the volume resistor knob has been turned, which can result in a time-consuming adjustment of the switching timing. In contrast, in the power conversion device 10, each of the multiple adjustment circuits 54 has an operation unit 62b for switching between multiple settings with different delay times. The operation unit 62b has multiple operation positions corresponding to each of the multiple settings with different delay times, allowing any one of the multiple settings to be selected using the multiple operation positions. This allows the power conversion device 10 to easily visually check the current setting of the multiple settings with different delay times based on the operation position of the operation unit 62b, making it easier to adjust the switching timing of the multiple switching elements 50.

[0064] FIG. 6 is a block diagram schematically illustrating a modification of the adjustment circuit according to the embodiment. It should be noted that components that are substantially the same in function and configuration as those in the above embodiment are given the same reference numerals and detailed explanations thereof will be omitted. 6, in the adjustment circuit 54 of this example, a plurality of resistance elements 60 are connected in series. The plurality of resistance elements 60 are provided so as to be connected in series between the input terminal 54a of the adjustment circuit 54 and the input terminal 66b of the AND circuit 66.

[0065] In this example, one end of each of the multiple switches 62a is connected to an end of each of the multiple resistor elements 60 opposite the input terminal 54a. The other end of each of the multiple switches 62a is connected to the other input terminal 66b of the AND circuit 66. As a result, in the switching circuit 62 of this example, by switching the opening and closing of the multiple switches 62a, it is possible to arbitrarily switch the number of multiple resistor elements 60 connected in series between the input terminal 54a of the adjustment circuit 54 and the input terminal 66b of the AND circuit 66. In other words, the multiple resistor elements 60 are connected in series between the input terminal 54a of the adjustment circuit 54 and the input terminal 66b of the AND circuit 66 via the switching circuit 62.

[0066] In this example, the operation unit 62b is omitted from the switching circuit 62, and a control unit 62c is provided. The control unit 62c communicates with, for example, an external device and receives switching information from the external device for switching between the open and closed states of the multiple switches 62a. In other words, the switching information is information for switching between multiple settings with different delay times.

[0067] The control unit 62c switches the multiple switches 62a between open and closed states in response to the input switching information. This allows the multiple switches 62a to be switched between open and closed states in response to the switching information input from an external device. In other words, in this example, multiple settings with different delay times can be switched in response to the switching information input from the external device. In this example, the multiple adjustment circuits 54 allow any one of the multiple settings with different delay times to be selected in response to the switching information input from the external device.

[0068] The control unit 62c has, for example, a storage unit (not shown) and stores switching information input from an external device in the storage unit. The control unit 62c switches the multiple switches 62a between open and closed states based on the switching information stored in the storage unit. The storage unit is, for example, a non-volatile storage unit. This allows the open / close settings of each switch 62a to be maintained based on the switching information stored in the storage unit, even if, for example, the adjustment circuit 54 loses power.

[0069] Furthermore, the control unit 62c transmits the switching information stored in the storage unit to the external device in response to a request from the external device. The external device displays the switching information received from each of the multiple adjustment circuits 54 on a display unit or the like. This allows the external device to easily check the current setting of multiple settings with different delay times in this example.

[0070] In this example, the multiple resistance elements 60 and the switching circuit 62 are, for example, a digital potentiometer housed in a single package. However, the multiple resistance elements 60 and the switching circuit 62 do not necessarily need to be provided integrally, and may be configured as separate components.

[0071] In this way, the configuration of the adjustment circuit 54 is not limited to a configuration in which a plurality of resistance elements 60 are connected in parallel, and may be a configuration in which a plurality of resistance elements 60 are connected in series, etc. The adjustment circuit 54 may be configured in any way that allows any one setting to be selected from a plurality of settings with different delay time lengths, and that can adjust the switching timing of each of the plurality of switching elements 50 by changing the length of the delay time according to the selected setting.

[0072] In each of the above embodiments, the multiple settings with different delay time lengths are represented by multiple connection state settings of the multiple resistance elements 60. However, without being limited to this, for example, by providing multiple capacitors 64, the multiple connection state settings of the multiple capacitors 64 may be multiple settings with different delay time lengths.

[0073] As described above, the time constant τ can be calculated by multiplying the resistance value and the capacitance value. Therefore, the adjustment circuit 54 may, for example, switch the connection states of the multiple capacitors 64 to change the combined capacitance value of the multiple capacitors 64, and may also change the time constant τ defined by the resistance value of one resistor element 60 and the combined capacitance value of the multiple capacitors 64, thereby making it possible to change the length of the delay time in accordance with the settings of the multiple connection states of the multiple capacitors 64. The adjustment circuit 54 may, for example, be configured to switch the connection states of the multiple resistor elements 60 and the multiple capacitors 64.

[0074] FIG. 7 is a block diagram schematically illustrating a modification of the adjustment circuit according to the embodiment. 7, in this example, each of the multiple adjustment circuits 54 has a first adjustment unit 71 and a second adjustment unit 72. The first adjustment unit 71 is capable of adjusting the timing at which the corresponding switching element 50 switches from an off state to an on state. The second adjustment unit 72 is capable of adjusting the timing at which the corresponding switching element 50 switches from an on state to an off state.

[0075] The first adjustment unit 71 includes, for example, a plurality of resistance elements 80, a switching circuit 82, a capacitor 84, and a NAND circuit 86. The second adjustment unit 72 includes, for example, a plurality of resistance elements 90, a switching circuit 92, a capacitor 94, and a NAND circuit 96.

[0076] The NAND circuit 86 has a pair of input terminals 86a, 86b and an output terminal 86c. The NAND circuit 96 has a pair of input terminals 96a, 96b and an output terminal 96c. In other words, the NAND circuits 86, 96 are NAND circuits.

[0077] One input terminal 86a of the NAND circuit 86 of the first adjustment unit 71 is connected to the input terminal 54a of the adjustment circuit 54. As a result, a control signal from the control device 14 is input to the input terminal 86a. The output terminal 86c of the NAND circuit 86 is connected to one input terminal 96a of the NAND circuit 96 of the second adjustment unit 72. The output terminal 96c of the NAND circuit 96 is connected to the output terminal 54b of the adjustment circuit 54. Therefore, in this example, the output of the NAND circuit 96 is input to the control terminal of the corresponding switching element 50 as a drive signal.

[0078] The configurations of the plurality of resistive elements 80, the switching circuit 82, and the capacitor 84, and the configurations of the plurality of resistive elements 90, the switching circuit 92, and the capacitor 94 are substantially the same as the configurations of the plurality of resistive elements 60, the switching circuit 62, and the capacitor 64 described with reference to FIG. 3, and therefore detailed description thereof will be omitted.

[0079] A control signal from the control device 14 is input to the other input terminal 86b of the NAND circuit 86 of the first adjustment unit 71 via a plurality of resistance elements 80 and a switching circuit 82. More specifically, the control signal from the control device 14 is input to the input terminal 86b via a resistance element 80 of the plurality of resistance elements 80 that is connected by the switching circuit 82.

[0080] The NAND circuit 86 performs a NAND operation on the control signal input to the input terminal 86a and the control signal input to the input terminal 86b, and inputs the result of the NAND operation to one input terminal 96a of the NAND circuit 96 of the second adjustment unit 72.

[0081] A control signal from the first adjustment unit 71 is input to the other input terminal 96b of the NAND circuit 96 of the second adjustment unit 72 via a plurality of resistance elements 90 and a switching circuit 92. More specifically, the control signal from the first adjustment unit 71 is input to the input terminal 96b via a resistance element 90 of the plurality of resistance elements 90 that is connected by the switching circuit 92.

[0082] The NAND circuit 96 performs a NAND operation on the control signal input to the input terminal 96a and the control signal input to the input terminal 96b, and inputs the result of the NAND operation as a drive signal to the control terminal of the corresponding switching element 50.

[0083] FIG. 8 is a timing chart schematically illustrating an example of the operation of the adjustment circuit of the modified example. Figure 8 schematically shows examples of a control signal (A in Figure 8) input from the control device 14 to the input terminal 86a of the NAND circuit 86 of the first adjustment unit 71, a control signal (B in Figure 8) input to the input terminal 86b of the NAND circuit 86 via multiple resistance elements 80 and the switching circuit 82, a control signal (C in Figure 8) input from the output terminal 86c of the NAND circuit 86 to the input terminal 96a of the NAND circuit 96 of the second adjustment unit 72, a control signal (D in Figure 8) input to the input terminal 96b of the NAND circuit 96 via multiple resistance elements 90 and the switching circuit 92, and a drive signal (E in Figure 8) output from the output terminal 96c of the NAND circuit 96.

[0084] As shown in FIG. 8, the control signal input to the input terminal 86b of the NAND circuit 86 via the multiple resistance elements 80 and the switching circuit 82 is delayed relative to the original control signal input from the control device 14 according to the time constant τ1 (the time constant due to the multiple resistance elements 80 and the capacitor 84).

[0085] The output of the NAND circuit 86 is in a low voltage state when the inputs to both the input terminals 86a and 86b are in a high voltage state, and is in a high voltage state when the input to at least one of the input terminals 86a and 86b is in a low voltage state.

[0086] For this reason, the output of the NAND circuit 86 switches from a high-voltage state to a low-voltage state when the control signals input to both the input terminals 86a and 86b become a high-voltage state corresponding to the on state of the switching element 50. At this time, the timing at which the output of the NAND circuit 86 switches from the high-voltage state to the low-voltage state also occurs with a delay corresponding to the time constant τ1 relative to the original control signal input from the control device 14.

[0087] The first adjustment unit 71 changes the time constant τ1 and changes the length of the delay time of the control signal input to the input terminal 86b, thereby making it possible to adjust the timing at which the corresponding switching element 50 switches from the off state to the on state.

[0088] Also, as shown in FIG. 8, a delay corresponding to the time constant τ2 (the time constant due to the multiple resistance elements 90 and the capacitor 94) occurs in the control signal input to the input terminal 96b of the NAND circuit 96 via the multiple resistance elements 90 and the switching circuit 92 relative to the control signal input to the input terminal 86a from the NAND circuit 86.

[0089] When the control signals input to both input terminals 96a and 96b become high-voltage, the output of NAND circuit 96 switches from a high-voltage state to a low-voltage state. At this time, the timing at which the output of NAND circuit 96 switches from a high-voltage state to a low-voltage state also occurs with a delay corresponding to the time constant τ2 relative to the control signal input from NAND circuit 86 to input terminal 86a.

[0090] The second adjustment unit 72 changes the time constant τ2 and changes the length of the delay time of the control signal input to the input terminal 96b, thereby making it possible to adjust the timing at which the corresponding switching element 50 switches from the on state to the off state.

[0091] As described above, in this example, each of the plurality of adjustment circuits 54 has a first adjustment unit 71 and a second adjustment unit 72. This allows the on-timing and off-timing of each of the plurality of switching elements 50 to be appropriately adjusted. This allows for more appropriately suppressing variations in the switching timing of each of the plurality of switching elements 50. For example, it is possible to more appropriately suppress the application of an excessive voltage to only some of the plurality of switching elements 50 among the plurality of switching elements 50 connected in series, which may cause failure of those switching elements 50.

[0092] The configurations of the first adjustment unit 71 and the second adjustment unit 72 are not limited to those described above. The first adjustment unit 71 may have any configuration that can appropriately adjust the timing at which the corresponding switching element 50 switches from the off state to the on state. The second adjustment unit 72 may have any configuration that can appropriately adjust the timing at which the corresponding switching element 50 switches from the on state to the off state.

[0093] The present embodiment includes the following aspects. (Appendix 1) a main circuit section including a plurality of switch sections and a plurality of drive circuits for driving the plurality of switch sections, respectively, and converting power by switching the plurality of switch sections; a control device that transmits a plurality of control signals corresponding to the plurality of switch units to the plurality of drive circuits, respectively, and controls switching of the plurality of switch units, thereby controlling power conversion by the main circuit unit; Equipped with each of the plurality of switch units has a plurality of switching elements connected in series; the plurality of switching elements each have a pair of main terminals and a control terminal, and each have an on state in which a current flows between the pair of main terminals, and an off state in which the current flow between the pair of main terminals is interrupted, and switch between the on state and the off state according to a voltage between the pair of main terminals and a voltage of the control terminal; each of the plurality of drive circuits includes a plurality of adjustment circuits provided corresponding to each of the plurality of switching elements; Each of the plurality of adjustment circuits generates a plurality of drive signals corresponding to each of the plurality of switching elements based on the control signal input from the control device, and switches each of the plurality of switching elements by inputting the plurality of drive signals to the control terminals of the plurality of switching elements. The power conversion device is also capable of setting a delay time that delays the switching timing of the plurality of switching elements from the timing corresponding to the control signal, and has a plurality of settings with different lengths of the delay time, allowing any one of the plurality of settings to be selected arbitrarily. The length of the delay time can be changed according to the selected setting, thereby adjusting the switching timing of each of the plurality of switching elements.

[0094] (Appendix 2) Each of the plurality of adjustment circuits A plurality of resistive elements; a switching circuit for switching the connection states of the plurality of resistance elements; a capacitor connected to any one of the plurality of resistance elements via the switching circuit; and the plurality of settings of different lengths of delay time are settings of a plurality of connection states of the plurality of resistance elements, The power conversion device according to claim 1, wherein the adjustment circuit switches connection states of the plurality of resistance elements to change a combined resistance value of the plurality of resistance elements and changes a time constant based on the combined resistance value and a capacitance value of the capacitor, thereby making it possible to change the length of the delay time in accordance with settings of a plurality of connection states of the plurality of resistance elements.

[0095] (Appendix 3) each of the plurality of adjustment circuits has an operation unit for switching between a plurality of settings having different lengths of the delay time; The power conversion device according to claim 1 or 2, wherein the operation unit has a plurality of operation positions corresponding to a plurality of settings each having a different length of the delay time, and any one of the plurality of settings can be arbitrarily selected using the plurality of operation positions.

[0096] (Appendix 4) Each of the plurality of adjustment circuits a first adjustment unit that adjusts the timing at which the corresponding switching element switches from the off state to the on state; a second adjustment unit that adjusts the timing at which the corresponding switching element switches from the on state to the off state; 4. The power conversion device according to any one of claims 1 to 3, comprising:

[0097] Although several embodiments of the present invention have been described above, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, as well as within the scope of the invention and its equivalents as set forth in the claims. Furthermore, the above-described embodiments can be implemented in combination with each other. [Explanation of symbols]

[0098] 10...power conversion device, 12...main circuit section, 14...control device, 21-26...switch section, 31-36...rectifier element, 40...charge storage element, 41-46...drive circuit, 50...switching element, 52...snubber circuit, 54...adjustment circuit, 60...resistance element, 62...switching circuit, 64...capacitor, 66...logical product circuit, 71...first adjustment section, 72...second adjustment section, 80...resistance element, 82...switching circuit, 84...capacitor, 86...NON-AND circuit, 90...resistance element, 92...switching circuit, 94...capacitor, 96...NON-AND circuit

Claims

1. a main circuit section including a plurality of switch sections and a plurality of drive circuits for driving the plurality of switch sections, respectively, and converting power by switching the plurality of switch sections; a control device that transmits a plurality of control signals corresponding to the plurality of switch units to the plurality of drive circuits, respectively, and controls switching of the plurality of switch units, thereby controlling power conversion by the main circuit unit; Equipped with each of the plurality of switch units has a plurality of switching elements connected in series; the plurality of switching elements each have a pair of main terminals and a control terminal, and each have an on state in which a current flows between the pair of main terminals, and an off state in which the current flow between the pair of main terminals is interrupted, and switch between the on state and the off state according to a voltage between the pair of main terminals and a voltage of the control terminal; each of the plurality of drive circuits includes a plurality of adjustment circuits provided corresponding to each of the plurality of switching elements; each of the plurality of adjustment circuits generates a plurality of drive signals corresponding to each of the plurality of switching elements based on the control signal input from the control device, and switches each of the plurality of switching elements by inputting the plurality of drive signals to the control terminals of the plurality of switching elements; and is capable of setting a delay time that delays the switching timing of the plurality of switching elements from the timing corresponding to the control signal, and has a plurality of settings with different lengths of the delay time, allowing any one of the plurality of settings to be selected arbitrarily; and by changing the length of the delay time according to the selected setting, it is possible to adjust the switching timing of each of the plurality of switching elements; Each of the plurality of adjustment circuits a first adjustment unit that adjusts the timing at which the corresponding switching element switches from the OFF state to the ON state; a second adjustment unit that adjusts the timing at which the corresponding switching element switches from the on state to the off state; A power conversion device having:

2. The first adjustment unit is a plurality of first resistor elements; a first switching circuit that switches the connection states of the plurality of first resistor elements; a first capacitor connected to any one of the plurality of first resistor elements via the first switching circuit; a first NAND circuit that performs a NAND operation on the control signal and the control signal input via the plurality of first resistor elements and the first switching circuit, and outputs the control signal after the NAND operation; and The second adjustment unit is a plurality of second resistor elements; a second switching circuit that switches the connection states of the plurality of second resistor elements; a second capacitor connected to any one of the plurality of second resistor elements via the second switching circuit; a second NAND circuit that performs a NAND operation on the control signal output from the first NAND circuit and the control signal output from the first NAND circuit and input via the plurality of second resistance elements and the second switching circuit, and outputs the control signal after the NAND operation as the drive signal; The power converter according to claim 1 , further comprising:

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