Multilayer ceramic capacitor and mounting structure of multilayer ceramic capacitor

Abstract

Provided are a multilayer ceramic capacitor that is less susceptible to the tombstoning phenomena, and a mounting structure for said multilayer ceramic capacitor. A multilayer ceramic capacitor 1 comprises: a laminate 2 in which a plurality of internal electrode layers 5 and a plurality of dielectric layers 4 are alternately laminated; and external electrodes 3 disposed on the respective end surfaces C of the laminate 2, wherein both surfaces of the laminate 2 in the lamination direction T are main surfaces A, the surfaces on both sides in the length direction L intersecting the lamination direction T are the end surfaces C, the surfaces on both sides in the width direction W intersecting the lamination direction T and the length direction L are side surfaces B, and each of the external electrodes 3 has a thickest portion 30 in the length direction L at a position biased toward one side surface B in the width direction W.

Description

[Technical Field]

[0001] The present invention relates to a multilayer ceramic capacitor and a mounting structure for the multilayer ceramic capacitor. [Background technology]

[0002] A multilayer ceramic capacitor includes a laminate in which multiple internal electrode layers and multiple dielectric layers are alternately stacked, and external electrodes disposed on each end face of the laminate. In general, the external electrodes of a multilayer ceramic capacitor are connected to mounting lands on a circuit board by solder (see Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2021-141191 Summary of the Invention [Problem to be solved by the invention]

[0004] When connecting a multilayer ceramic capacitor to a circuit board, solder reflow is performed, but there may be variations in the time difference between solder wetting, the left and right land areas, the amount of solder, the temperature, the mounting position, etc. If such variations occur, the tensile force caused by the solder between the pair of external electrodes becomes unbalanced, which can cause one external electrode to lift up, a phenomenon known as tombstone bonding.

[0005] An object of the present invention is to provide a multilayer ceramic capacitor and a mounting structure for the multilayer ceramic capacitor that are less susceptible to the tombstone phenomenon. [Means for solving the problem]

[0006] In order to solve the above problems, the present invention provides a multilayer ceramic capacitor comprising: a laminate in which a plurality of internal electrode layers and a plurality of dielectric layers are alternately stacked; and external electrodes arranged on each of the end faces of the laminate, where the surfaces on both sides of the laminate in the stacking direction are defined as main faces, the surfaces on both sides in a length direction intersecting the stacking direction are defined as end faces, and the surfaces on both sides in a width direction intersecting the stacking direction and the length direction are defined as side faces, and each of the external electrodes has a thickest portion in the length direction, which is located at a position biased toward one side face in the width direction.

[0007] In order to solve the above-described problems, the present invention also provides a mounting structure for the multilayer ceramic capacitor on a circuit board, in which the main surface side of the multilayer ceramic capacitor closer to the thickest portion faces the circuit board. [Effects of the Invention]

[0008] According to the present invention, it is possible to provide a multilayer ceramic capacitor and a mounting structure for the multilayer ceramic capacitor in which the tombstone phenomenon is unlikely to occur. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a schematic perspective view of a multilayer ceramic capacitor 1 according to an embodiment. [Figure 2] 2 is a cross-sectional view taken along line II-II of the multilayer ceramic capacitor 1 of FIG. 1, passing through a thickest part 30 (to be described later). [Figure 3] 3 is a cross-sectional view of the multilayer ceramic capacitor 1 taken along line III-III in FIG. [Figure 4] 4A and 4B are diagrams showing examples of the positions of a first thickest part 30A and a second thickest part 30B, with FIG. 4A showing an embodiment and FIGS. 4B, 4C, and 4D showing modified forms. [Figure 5] 3 is a flowchart illustrating a method for manufacturing the multilayer ceramic capacitor 1. [Figure 6]1 is a side view of a multilayer ceramic capacitor 1 according to an embodiment in a state where the multilayer ceramic capacitor 1 is mounted on a circuit board 60. FIG. [Figure 7] FIG. 10 is a diagram showing a comparative example of a multilayer ceramic capacitor 100 in which a thickest portion 130 is formed in the center of an external electrode 103 formed on an end surface. [Figure 8] 1 is a diagram showing a multilayer ceramic capacitor 1 of the present invention in which a thickest part 30 is formed at a position biased toward one side surface. [Figure 9] 1 is a diagram showing a multilayer ceramic capacitor 1 in which a thickest part 30 is formed biased toward a first main surface A1 opposite to the mounting surface. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, a multilayer ceramic capacitor 1 according to an embodiment of the present invention will be described. Fig. 1 is a schematic perspective view of the multilayer ceramic capacitor 1 of the embodiment. Fig. 2 is a cross-sectional view of the multilayer ceramic capacitor 1 of Fig. 1 taken along line II-II passing through a thickest part 30, which will be described later. Fig. 3 is a cross-sectional view of the multilayer ceramic capacitor 1 of Fig. 1 taken along line III-III.

[0011] (Multilayer ceramic capacitor 1) The multilayer ceramic capacitor 1 has a substantially rectangular parallelepiped shape and includes a laminate 2 and a pair of external electrodes 3 provided on both ends of the laminate 2. The laminate 2 includes an inner layer portion 6 in which a plurality of dielectric layers 4 and a plurality of internal electrode layers 5 are laminated.

[0012] In the following description, the direction in which a pair of external electrodes 3 is provided in the multilayer ceramic capacitor 1 will be referred to as the length direction L. The direction in which the dielectric layers 4 and the internal electrode layers 5 are stacked will be referred to as the stacking direction T. The direction intersecting both the length direction L and the stacking direction T will be referred to as the width direction W. In the embodiment, the width direction W is perpendicular to both the length direction L and the stacking direction T. Although not limited thereto, in the embodiment, when the width W1 of the multilayer ceramic capacitor 1 is taken as W1 and the thickness T in the stacking direction T is taken as T1 as shown in FIG. 1 , W1 / 2≧T1.

[0013] In the following description, of the six outer surfaces of the laminate 2, a pair of outer surfaces facing each other in the stacking direction T will be referred to as the first main surface A1 and the second main surface A2, a pair of outer surfaces facing each other in the width direction W will be referred to as the first side surface B1 and the second side surface B2, and a pair of outer surfaces facing each other in the length direction L will be referred to as the first end surface C1 and the second end surface C2. Note that when there is no need to particularly distinguish between the first main surface A1 and the second main surface A2, they will be collectively referred to as the main surface A, when there is no need to particularly distinguish between the first side surface B1 and the second side surface B2, they will be collectively referred to as the side surface B, and when there is no need to particularly distinguish between the first end surface C1 and the second end surface C2, they will be collectively referred to as the end surface C.

[0014] (Laminate 2) The laminate 2 includes an inner layer portion 6 and outer layer portions 7 disposed on both main surfaces A of the inner layer portion 6.

[0015] (Inner layer 6) The inner layer portion 6 is formed by laminating a plurality of dielectric layers 4 and internal electrode layers 5.

[0016] (Dielectric layer 4) The dielectric layer 4 is made of a ceramic material.

[0017] (Internal electrode layer 5) The internal electrode layers 5 include a plurality of first internal electrode layers 5A and a plurality of second internal electrode layers 5B. The first internal electrode layers 5A and the second internal electrode layers 5B are arranged alternately. Note that, when there is no need to particularly distinguish between the first internal electrode layers 5A and the second internal electrode layers 5B, they will be collectively referred to as the internal electrode layers 5.

[0018] The first internal electrode layer 5A includes a first opposing portion 5Aa opposing the second internal electrode layer 5B, and a first lead portion 5Ab extending from the first opposing portion 5Aa toward the first end face C1. An end of the first lead portion 5Ab is exposed at the first end face C1 and is electrically connected to a first external electrode 3A, which will be described later. The second internal electrode layer 5B includes a second opposing portion 5Ba opposing the first internal electrode layer 5A, and a second lead portion 5Bb extending from the second opposing portion 5Ba to the second end face C2. An end of the second lead portion 5Bb is electrically connected to a second external electrode 3B, which will be described later.

[0019] Charge is accumulated in the first opposing portion 5Aa of the first internal electrode layer 5A and the second opposing portion 5Ba of the second internal electrode layer 5B, and they function as capacitors. Note that, unless it is necessary to particularly distinguish between the first opposing portion 5Aa and the second opposing portion 5Ba, they will be collectively referred to as opposing portions 5a. Furthermore, unless it is necessary to particularly distinguish between the first lead portion 5Ab and the second lead portion 5Bb, they will be collectively referred to as lead portions 5b.

[0020] (Outer layer part 7) The outer layer portion 7 is made of the same dielectric ceramic material as the dielectric layer 4 of the inner layer portion 6 .

[0021] (External electrode 3) The external electrodes 3 include a first external electrode 3A provided on a first end face C1 of the laminate 2 and a second external electrode 3B provided on a second end face C2 of the laminate 2. When there is no need to particularly distinguish between the first external electrode 3A and the second external electrode 3B, they will be collectively referred to as the external electrode 3. The external electrode 3 covers not only the end face C, but also a portion of the main face A and the side face B on the end face C side.

[0022] (Thickest part 30) The first external electrode 3A and the second external electrode 3B each have a thickest portion 30. In this embodiment, one thickest portion 30 is formed on each of the first external electrode 3A and the second external electrode 3B. The thickest portion 30 is the portion of the external electrode 3 that is thickest in the length direction L, and is a convex portion that protrudes from other portions of the external electrode 3. It is preferable that the thickest portion 30 protrudes by 10 μm or more in the length direction.

[0023] The thickest portion 30 formed on the first external electrode 3A is referred to as the first thickest portion 30A, and the thickest portion 30 formed on the second external electrode 3B is referred to as the second thickest portion 30B. When there is no need to particularly distinguish between the first thickest portion 30A and the second thickest portion 30B, they will be collectively referred to as the thickest portion 30.

[0024] The thickest portion 30 is formed so as to be biased toward one of the first side surface B1 or the second side surface B2 in the width direction W of the external electrode 3. The first thickest portion 30A and the second thickest portion 30B are preferably formed so as to be biased toward different side surfaces of the first side surface B1 and the second side surface B2. In the embodiment, the first thickest portion 30A is formed so as to be biased toward the first side surface B1, and the second thickest portion 30B is formed so as to be biased toward the second side surface B2. However, this is not limited thereto, and the first thickest portion 30A and the second thickest portion 30B may be formed so as to be biased toward the same side surface of the first side surface B1 or the second side surface B2.

[0025] Furthermore, the thickest portion 30 is formed biased toward one of the first principal surface A1 or the second principal surface A2 in the stacking direction T of the external electrode 3. The first thickest portion 30A and the second thickest portion 30B are preferably formed biased toward the same principal surface, either the first principal surface A1 or the second principal surface A2. Furthermore, it is more preferable that both the first thickest portion 30A and the second thickest portion 30B are formed biased toward the second principal surface A2, which is the mounting surface to be mounted on the circuit board 60 described below, either the first principal surface A1 or the second principal surface A2.

[0026] Next, the positions of the first thickest portion 30A and the second thickest portion 30B in the multilayer ceramic capacitor 1 will be specifically described. FIG. 4 shows an example of the positions of the first thickest portion 30A and the second thickest portion 30B, and FIG. 4(A) shows the positions of the first thickest portion 30A and the second thickest portion 30B in the multilayer ceramic capacitor 1 of the embodiment shown in FIG. 1. FIGS. 4(B), 4(C), and 4(D) show the positions of the first thickest portion 30A and the second thickest portion 30B in the multilayer ceramic capacitor 1 of a modified embodiment. In the figures, the portion where the thickest portion 30 is provided is indicated by diagonal lines. The second main surface A2 is the mounting surface on which the capacitor is mounted to the circuit board 60.

[0027] As shown in the figure, the first external electrode 3A is divided into two equal parts in the stacking direction T and into three equal parts in the width direction W, with the region on the first main surface A1 side and the first side B1 side being region 1-1, the region on the first main surface A1 side and the center in the width direction W being region 1-2, the region on the first main surface A1 side and the second side B2 side being region 1-3, the region on the second main surface A2 side and the first side B1 side being region 1-4, the region on the second main surface A2 side and the center in the width direction W being region 1-5, and the region on the second main surface A2 side and the second side B2 side being region 1-6.

[0028] Furthermore, the second external electrode 3B is divided into two equal parts in the stacking direction T and into three equal parts in the width direction W, with the region on the first main surface A1 side and the first side B1 side being region 2-1, the region on the first main surface A1 side and the center in the width direction W being region 2-2, the region on the first main surface A1 side and the second side B2 side being region 2-3, the region on the second main surface A2 side and the first side B1 side being region 2-4, the region on the second main surface A2 side and the center in the width direction W being region 2-5, and the region on the second main surface A2 side and the second side B2 side being region 2-6.

[0029] 4A, the first thickest portion 30A and the second thickest portion 30B are both formed biased toward the second principal surface A2, which is the mounting surface, of the first principal surface A1 and the second principal surface A2. The first thickest portion 30A is formed in an area 1-4 biased toward the first side surface B1 of the side surfaces B, and the second thickest portion 30B is formed in an area 2-6 biased toward the other second side surface B2.

[0030] However, without being limited to this, as shown in FIG. 4(B), the first thickest portion 30A and the second thickest portion 30B may both be formed biased toward the second main surface A2, which is the mounting surface, of the first main surface A1 and the second main surface A2, and the first thickest portion 30A and the second thickest portion 30B may both be formed in regions 1-4 and 2-4 biased toward one of the side surfaces B, for example, the first side surface B1.

[0031] Furthermore, as shown in FIG. 4(C), the first thickest portion 30A and the second thickest portion 30B may both be formed biased toward the first main surface A1, which is different from the mounting surface, and the first thickest portion 30A may be formed in an area 1-1 biased toward the first side surface B1 of one of the side surfaces B, and the second thickest portion 30B may be formed in an area 2-3 biased toward the other second side surface B2.

[0032] Furthermore, as shown in FIG. 4(D), the first thickest portion 30A and the second thickest portion 30B may both be formed biased toward the first main surface A1, which is different from the mounting surface, and the first thickest portion 30A and the second thickest portion 30B may both be formed in regions 1-3 and 2-3 biased toward one of the side surfaces B, for example, the second side surface B2.

[0033] (Manufacturing Method of Multilayer Ceramic Capacitor 1) Next, a description will be given of a method for manufacturing the multilayer ceramic capacitor 1. Fig. 5 is a flowchart illustrating a method for manufacturing the multilayer ceramic capacitor 1.

[0034] (Ceramic green sheet printing process S1) In step S1, a ceramic slurry containing ceramic powder, a binder, and a solvent is applied in a sheet form onto a carrier film. Subsequently, an internal electrode layer paste containing metal powder, a binder, additives such as a plasticizer and a dispersant, an organic solvent, etc. is printed onto the ceramic green sheet in a strip-like pattern by screen printing, inkjet printing, gravure printing, etc.

[0035] (Lamination process S2) The plurality of ceramic green sheets are stacked so that the internal electrode layer patterns are shifted by half a pitch in the length direction L between the ceramic green sheets adjacent to each other in the stacking direction T. Furthermore, outer layer ceramic green sheets that will become the outer layer portions 7 are stacked on both sides of the stacked ceramic green sheets in the stacking direction T.

[0036] (Mother block formation step S3) Next, outer layer ceramic green sheets that will become the outer layer portions 7 are stacked on both sides of the stacked ceramic green sheets in the stacking direction T, and the stack is then thermocompression bonded to form a mother block.

[0037] (Mother block division process S4) Next, the mother block is divided to produce a plurality of laminates 2.

[0038] (External electrode formation step S5) An external electrode paste made of metal powder, a binder, additives (plasticizer, dispersant, etc.), an organic solvent, etc. is applied to both end faces C of the laminate 2 by dip coating.

[0039] (Thickest part forming step S6) After the external electrode paste has dried, the same external electrode paste is applied over the surface of the dried external electrode paste at a position where the thickest portion 30 is to be formed.

[0040] (Firing process S7) The laminate is then heated in a nitrogen atmosphere at a set firing temperature for a predetermined time, and the external electrode paste is baked onto the laminate 2, thereby producing the multilayer ceramic capacitor 1 shown in FIG.

[0041] (Mounting structure 50) The multilayer ceramic capacitor 1 manufactured in this manner is mounted on a circuit board 60. FIG. 6 is a side view of the multilayer ceramic capacitor 1 of the embodiment in a state where it is mounted on the circuit board 60.

[0042] The circuit board 60 includes a flat core material 62 and mounting lands 64 arranged on the surface of the core material 62. The core material 62 is, for example, a glass epoxy board made of a base material made by mixing glass fabric (cloth) and glass nonwoven fabric and impregnating it with epoxy resin. The mounting lands 64 are formed on one or both surfaces of the core material 62. The mounting lands 64 are made of, for example, a metal such as Cu, Ag, Pd, or Pt or an alloy thereof. The external electrodes 3 of the multilayer ceramic capacitor 1 are mounted on the mounting lands 64 with solder 70.

[0043] In a mounting structure 50 for mounting a multilayer ceramic capacitor 1 on a circuit board 60 according to the embodiment, the second main surface A2 of the multilayer ceramic capacitor 1 is the mounting surface, and faces the circuit board 60. The mounting lands 64 are connected to the first external electrodes 3A and the second external electrodes 3B by solder 70, respectively.

[0044] When the solder 70 is in a molten state during reflow, it rises up the side surfaces of the external electrodes 3 and reaches the thickest parts 30, but when it hardens it shrinks, reducing its surface area. At this time, the external electrodes 3 are pulled by the contraction of the solder 70.

[0045] If the balance of tensile forces between the first external electrode 3A and the second external electrode 3B is lost in the multilayer ceramic capacitor 1, the side with the weaker tensile force will rise, rotate, and tilt, causing the so-called tombstone phenomenon. In this case, if the external electrode 3 has a protruding thickest part 30, a particularly strong tensile force will act on that part.

[0046] Generally, when forming an external electrode, the thickest portion tends to be formed in the center of the end face. Fig. 7 shows, as a comparative example, a typical multilayer ceramic capacitor 100 in which the thickest portion 130 is formed in the center of the external electrode 103 formed on the end face. In the case of Fig. 7, when the solder hardens in the multilayer ceramic capacitor 100, with one side of the longitudinal direction L being the right and the other being the left, if the balance of the left and right forces acting on the thickest portion 130 is disrupted, the external electrode with the stronger force will be lowered, and the other external electrode will rotate around the axis of the tangent line m between the mounting land 64 and the external electrode 3 and rise up as shown by the dotted line in the figure.

[0047] 8 shows a multilayer ceramic capacitor 1 of the present invention. In the multilayer ceramic capacitor 1, the thickest part 30 is formed at a position offset toward one side surface in the width direction W of the external electrode 3. In this case, the force applied to the thickest portion 30 causes the multilayer ceramic capacitor 1 to rotate not around the tangent line m between the mounting land 64 and the external electrode 3 but around point P, the end point of the tangent line m between the mounting land 64 and the external electrode 3, and to lift from point Q diagonally opposite point P. In this case, lifting the side of point Q around point P requires more force than lifting the other side around line m. Therefore, the multilayer ceramic capacitor 1 of the embodiment shown in FIG. 8 is less likely to suffer from the tombstone phenomenon than the multilayer ceramic capacitor 100 of the comparative embodiment shown in FIG. 7.

[0048] Furthermore, it is preferable that the first thickest part 30A and the second thickest part 30B of the multilayer ceramic capacitor 1 are formed biased toward the second main surface A2, which is the mounting surface facing the circuit board 60 on which the multilayer ceramic capacitor 1 is mounted. Fig. 6 shows this preferred embodiment, in which the thickest part 30 is formed so as to be biased toward the second main surface A2, which is the mounting surface. Fig. 9 shows a multilayer ceramic capacitor 1, which, unlike Fig. 6, has the thickest part 30 formed so as to be biased toward the first main surface A1, which is opposite the mounting surface.

[0049] Point R in the figure is the outermost part in the longitudinal direction L of the contact portion between the external electrode 3 of the multilayer ceramic capacitor 1 and the mounting land 64. Let x be the distance from point R to the top of the thickest part 30, and let F be the force that pulls the thickest part 30 due to the surface tension of the solder 70, in the direction perpendicular to the direction of extension of x. Then, when the solder 70 hardens, a rotational moment of x × F is applied to the multilayer ceramic capacitor 1 with point R in the figure as the axis of rotation.

[0050] In this case, the distance x in Figure 6, in which the thickest part 30 is formed biased toward the second main surface A2, is smaller than that in Figure 9, in which the thickest part 30 is formed biased toward the first main surface A1, and therefore the rotation moment, which is x × F, is smaller. Therefore, in the case of FIG. 6, where the thickest part 30 is formed biased toward the second main surface A2, which is the mounting surface, rotation is less likely to occur even if the balance of the rotational moments acting on the left and right is slightly different, and the tombstone phenomenon is less likely to occur.

[0051] Furthermore, even if the force F is unbalanced between the left and right sides, if the position of the thickest part 30 in the stacking direction T is close to the mounting surface, the difference in the rotation moment applied to the multilayer ceramic capacitor 1 between the left and right sides will be small. Therefore, it is preferable that the first thickest part 30A and the second thickest part 30B are formed biased toward the same main surface side. In the multilayer ceramic capacitor of the embodiment, the first thickest portion 30A and the second thickest portion 30B are formed biased toward the same main surface side. That is, they are arranged at the same position in the stacking direction T, so that a difference in rotation moment between both sides in the length direction L is unlikely to occur, and the tombstone phenomenon is unlikely to occur.

[0052] Furthermore, when comparing the multilayer ceramic capacitor 1 shown in Fig. 4(A) with the multilayer ceramic capacitor 1 shown in Fig. 4(B), it is preferable that the first thickest part 30A is formed biased toward one of the side faces B, for example, the first side face B1 side, and the second thickest part 30B is formed biased toward the other of the side faces B, for example, the second side face B2 side, as shown in Fig. 4(A). The reason for this is as follows. 4(A), in the case of the multilayer ceramic capacitor 1 in Fig. 4(B), tensile force is concentrated on the first side surface B1 side, and therefore the multilayer ceramic capacitor 1 may rotate around the ridgeline between the first side surface B1 and the second main surface A2, causing the second side surface B2 side to lift up. However, in the case of the multilayer ceramic capacitor 1 of FIG. 4(A), the tensile force is distributed between the first side face B1 and the second side face B2, reducing the possibility that one side face of the multilayer ceramic capacitor 1 will lift up.

[0053] Furthermore, when the dimension of the multilayer ceramic capacitor 1 in the stacking direction T is T1 and the dimension in the width direction W is W1, it is preferable that W1 / 2≧T1. The reason for this is as follows. As shown in Figures 6 and 9, the rotation moment of the thickest part 30 decreases as the distance from the mounting surface in the stacking direction T decreases. Therefore, if the height T1 of the multilayer ceramic capacitor 1 in the stacking direction T is smaller than the width W1 in the width direction W, i.e., W1 / 2 ≥ T1, the distance of the thickest part 30 from the mounting surface also becomes relatively small. This is because the rotation moment relative to the size of the multilayer ceramic capacitor 1 becomes smaller, making the tombstone phenomenon less likely to occur. In particular, by having the thickest part 30 located in an area equal to or less than T / 2, which is the center of gravity of the multilayer ceramic capacitor 1, the occurrence of tombstones can be further suppressed.

[0054] Although the preferred embodiments and modifications of the present invention have been described above, the present invention is not limited thereto, and includes the following scope.

[0055] <1> A multilayer ceramic capacitor comprising: a laminate in which a plurality of internal electrode layers and a plurality of dielectric layers are alternately stacked; and external electrodes arranged on each of the end faces of the laminate, where the surfaces on both sides of the laminate in the stacking direction are defined as main surfaces, the surfaces on both sides in the length direction intersecting with the stacking direction are defined as end faces, and the surfaces on both sides in the width direction intersecting with the stacking direction and the length direction are defined as side faces, wherein each of the external electrodes has a thickest portion in the length direction at a position biased toward one of the side faces of the both end faces in the width direction.

[0056] <2> the external electrode comprises a first external electrode disposed on a first end face of one of the end faces on both sides, and a second external electrode disposed on a second end face of the other of the end faces on both sides, the thickest portion comprises a first thickest portion formed in the first external electrode and a second thickest portion formed in the second external electrode, the first thickest portion and the second thickest portion being formed biased toward the same main surface side; <1> The multilayer ceramic capacitor according to claim 1.

[0057] <3> the first thickest portion and the second thickest portion are formed biased toward the main surface facing the circuit board on which the multilayer ceramic capacitor is mounted; <2> The multilayer ceramic capacitor according to claim 1.

[0058] <4> The side surface includes a first side surface on one side in the width direction and a second side surface on the other side, and the first thickest part is formed so as to be biased toward the first side surface, and the second thickest part is formed so as to be biased toward the second side surface. <1> from <3> 10. The multilayer ceramic capacitor according to claim 9, wherein

[0059] <5> When the dimension of the multilayer ceramic capacitor in the lamination direction is T1 and the dimension in the width direction is W1, W1 / 2≧T1. <1> from <4> 10. The multilayer ceramic capacitor according to claim 9, wherein

[0060] <6> The thickest part protrudes 10 μm or more in the longitudinal direction. <1> from <5> 7. The multilayer ceramic capacitor according to any one of 6.

[0061] <7> The main surface of the multilayer ceramic capacitor that is closest to the thickest part faces the circuit board. <1> from <6> 7. A mounting structure for a multilayer ceramic capacitor on a circuit board according to any one of 6. [Explanation of symbols]

[0062] A main surface A1 First main surface A2 2nd main surface B side B1 1st side B2 2nd side C end face C1 1st end surface C2 2nd end face 1. Multilayer ceramic capacitors 2. Laminate 3 External electrode 3A 1st external electrode 3B 2nd external electrode 4 Dielectric Layer 5 Internal electrode layer 6 Inner layer 7 Outer layer 30 Thickest part 30A 1st thickest part 30B 2nd thickest part 50 Mounting structure 60 Circuit Board 62 Core material 64 Mounting Land

Claims

1. a laminate in which a plurality of internal electrode layers and a plurality of dielectric layers are alternately stacked; a multilayer ceramic capacitor comprising: external electrodes disposed on each of the end faces of the laminate, when both surfaces of the laminate in the lamination direction are defined as main surfaces, both surfaces of the laminate in a length direction intersecting with the lamination direction are defined as end faces, and both surfaces of the laminate in a width direction intersecting with the lamination direction and the length direction are defined as side faces, The external electrodes are each The multilayer ceramic capacitor has a thickest portion, which is thickest in the length direction, at a position biased toward one side surface in the width direction.

2. The external electrode is a first external electrode disposed on a first end surface of one of the end surfaces on both sides; a second external electrode disposed on the other of the end surfaces on both sides as a second end surface, The thickest part is a first thickest portion formed on the first external electrode; a second thickest portion formed in the second external electrode, the first thickest portion and the second thickest portion are formed biased toward the same main surface side, The multilayer ceramic capacitor according to claim 1 .

3. the first thickest portion and the second thickest portion are formed biased toward a main surface facing a circuit board on which the multilayer ceramic capacitor is mounted. The multilayer ceramic capacitor according to claim 2 .

4. The side surface includes a first side surface on one side in the width direction and a second side surface on the other side, the first thickest portion is formed biased toward the first side surface, the second thickest portion is formed biased toward the second side surface, The multilayer ceramic capacitor according to claim 2 .

5. When the dimension of the multilayer ceramic capacitor in the lamination direction is T1 and the dimension in the width direction is W1, W1 / 2≧T1. The multilayer ceramic capacitor according to claim 1 .

6. The thickest part protrudes by 10 μm or more in the length direction. The multilayer ceramic capacitor according to claim 1 .

7. 7. A mounting structure for a multilayer ceramic capacitor on a circuit board according to claim 1, the main surface side of the multilayer ceramic capacitor that is closer to the thickest part faces the circuit board; Mounting structure of a multilayer ceramic capacitor.

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