Pixel circuit and microdisplay device including the same

Abstract

A pixel circuit according to an embodiment and a microdisplay device including the same are disclosed, the pixel circuit including a first pixel circuit to which a voltage is applied from a drive circuit, a second pixel circuit to which a voltage is applied from the first pixel circuit, and a capacitor formed between the first pixel circuit and the second pixel circuit.

Description

[Technical Field]

[0001] The present invention relates to a pixel circuit and a microdisplay device including the same. [Background technology]

[0002] Generally, a display device is a device that displays an image on a display panel using electrical and optical characteristics, and includes a liquid crystal display (LCD), an organic light emitting diode (OLED) display, etc. Such a display device has a structure in which a number of pixels are arranged in a two-dimensional matrix of rows and columns.

[0003] FIG. 1 is a diagram illustrating a pixel driving method of a conventional microdisplay device.

[0004] Referring to Figure 1, a display device generally stores desired data in pixel circuits across column lines and row lines, and drives pixels through the pixel circuits to realize a C x R resolution. To realize a C x R resolution, the display device must be configured with C column driving lines and driving circuits, R row driving lines and driving circuits, and C x R pixel circuits.

[0005] In order to increase the resolution, the values ​​corresponding to C and R must be increased by the desired amount. This means that the complexity of the pixel driving lines and driving circuits increases, and if the size of the driving pixel is constant, the size of the display device increases by the amount of increase in resolution. Summary of the Invention [Problem to be solved by the invention]

[0006] Embodiments may provide a pixel circuit and a microdisplay device including the same. [Means for solving the problem]

[0007] A pixel circuit according to an embodiment may include a first pixel circuit to which a voltage is applied from a drive circuit, a second pixel circuit to which a voltage is applied from the first pixel circuit, and a capacitor formed between the first pixel circuit and the second pixel circuit.

[0008] The second pixel circuit may be applied with a voltage that is divided by the capacitor from the first pixel circuit.

[0009] The distributed voltage may be determined by an average value according to the position of the second pixel circuit.

[0010] The first pixel circuit may be formed in a first layer of a panel, and the second pixel circuit may be formed in a second layer located above the first layer.

[0011] The electrodes of the first pixel circuit and the second pixel circuit may be connected by a via wiring.

[0012] The electrodes of the first pixel circuit and the second pixel circuit may not be connected to each other.

[0013] The first pixel circuit and the second pixel circuit may be formed with different numbers of electrodes.

[0014] The electrodes of the first pixel circuit and the second pixel circuit may be formed to have different sizes.

[0015] The electrode of the first pixel circuit may be formed larger than the electrode of the second pixel circuit.

[0016] The electrodes of the first pixel circuit and the second pixel circuit may at least partially overlap.

[0017] A microdisplay device according to an embodiment may include a pixel circuit according to any one of claims 1 to 10, and a pixel drive circuit that applies a voltage to the pixel circuit.

[0018] The microdisplay device further includes a pixel compensation pre-processor that performs pre-processing on an input image by driving an average value of capacitor coupling, and a resolution converter that converts a first resolution of the input image into a second resolution, and the pixel driving circuit can apply a voltage to the pixel circuit at the converted second resolution.

[0019] The second resolution may be set to be lower than the first resolution. [Effects of the Invention]

[0020] According to the embodiment, the number of pixel driving circuits required for driving the pixel circuits can be reduced by a certain ratio, thereby improving the resolution.

[0021] According to the embodiment, the number of pixel driving circuits can be reduced, thereby improving power consumption.

[0022] According to the embodiment, it is possible to minimize the area of ​​the driving pixel and reduce power consumption, thereby reducing the area and power consumption of the microdisplay substrate used in pixel circuits of various driving methods, including SRAM (Static Random Access Memory) circuits, and improving the performance and power consumption of the actual device. [Brief explanation of the drawings]

[0023] [Figure 1] FIG. 1 is a diagram illustrating a pixel driving method of a conventional microdisplay device.

[0024] [Figure 2] FIG. 2 is a diagram showing a pixel circuit according to a first embodiment of the present invention.

[0025] [Figure 3a] FIG. 3a is a plan view and a cross-sectional view of the pixel circuit shown in FIG.

[0026] [Figure 3b] FIG. 3b is a plan view and a cross-sectional view of the pixel circuit shown in FIG.

[0027] [Figure 4] FIG. 4 is a diagram showing a modified pixel circuit according to the first embodiment of the present invention.

[0028] [Figure 5a] FIG. 5a is a plan view and a cross-sectional view of the pixel circuit shown in FIG.

[0029] [Figure 5b] FIG. 5b is a plan view and a cross-sectional view of the pixel circuit shown in FIG.

[0030] [Figure 6a] FIG. 6a is a diagram showing the layout of pixel circuits according to the first embodiment.

[0031] [Figure 6b] FIG. 6b is a diagram showing the layout of pixel circuits according to the first embodiment.

[0032] [Figure 6c] FIG. 6c is a diagram showing the layout of pixel circuits according to the first embodiment.

[0033] [Figure 7] FIG. 7 is a diagram showing a microdisplay device to which the pixel circuit of the first embodiment is applied.

[0034] [Figure 8] FIG. 8 is a diagram showing a pixel circuit according to a second embodiment of the present invention.

[0035] [Figure 9]FIG. 9 is a plan view of the pixel circuit shown in FIG.

[0036] [Figure 10] FIG. 10 is a diagram showing a microdisplay device to which the pixel circuit of the second embodiment is applied.

[0037] [Figure 11a] FIG. 11a is a diagram illustrating an example of pixel resolution conversion according to an embodiment.

[0038] [Figure 11b] FIG. 11b is a diagram illustrating an example of pixel resolution conversion according to an embodiment.

[0039] [Figure 12] FIG. 12 is a diagram illustrating a driving process of a microdisplay device according to an embodiment.

[0040] [Figure 13] FIG. 13 shows various arrangements of pixel circuit electrodes. DETAILED DESCRIPTION OF THE INVENTION

[0041] Hereinafter, the embodiments disclosed in this specification will be described in detail with reference to the accompanying drawings, and the same or similar components will be given the same reference numerals regardless of the drawing numbers, and redundant description thereof will be omitted. The suffix "part" for components used in the following description is given or used interchangeably only for the sake of ease of writing the specification, and does not have any meaning or role that distinguishes them from each other.

[0042] Furthermore, when describing the embodiments disclosed herein, if it is determined that a detailed description of related publicly known technology may obscure the gist of the embodiments disclosed herein, such detailed description will be omitted. Furthermore, the attached drawings are merely provided to facilitate understanding of the embodiments disclosed herein, and the technical ideas disclosed herein should not be limited by the attached drawings, and should be understood to include all modifications, equivalents, or alternatives included within the spirit and technical scope of the present invention.

[0043] Terms including ordinal numbers such as first, second, etc. may be used to describe various components, but the components are not limited by the terms. The terms are used only to distinguish one component from another.

[0044] When a component is referred to as being "coupled" or "connected" to another component, it should be understood that it may be directly coupled or connected to the other component, but that there may be other components in between. Conversely, when a component is referred to as being "directly coupled" or "directly connected" to another component, it should be understood that there are no other components in between. The singular term "a" includes the plural term unless the context clearly dictates otherwise.

[0045] In this application, the terms "comprise" or "have" and the like are intended to specify the presence of features, numbers, steps, operations, components, parts, or combinations thereof stated in the specification, but should be understood as not precluding the possible presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

[0046] In the embodiment, a pixel circuit is configured that includes a first pixel circuit that is driven by a voltage applied from a pixel drive circuit and a second pixel circuit that is driven by a voltage distributed from the first pixel circuit, and this is called a capacitor-coupled pixel circuit.

[0047] FIG. 2 is a diagram showing a pixel circuit according to a first embodiment of the present invention, and FIGS. 3a and 3b are a plan view and a cross-sectional view of the pixel circuit shown in FIG.

[0048] Referring to FIG. 2, the pixel circuit according to the first embodiment of the present invention is a capacitor-coupled pixel circuit, and may include a first pixel circuit 10, a second pixel circuit 20, and a capacitor C.

[0049] The first pixel circuit 10 may be driven by a voltage applied from a pixel driving circuit including a column driving circuit and a row driving circuit.

[0050] The second pixel circuit 20 may not be directly applied with a voltage from the pixel driving circuit, but may be driven by a voltage distributed from the first pixel circuit 10 by capacitor coupling.

[0051] The capacitor C may be formed between the first pixel circuit 10 and the second pixel circuit 20. The capacitor C may be formed to connect the second pixel circuit 20 and the first pixel circuit 10 to each other, or may be formed to connect adjacent second pixel circuits 20 to each other.

[0052] In the pixel array of the first embodiment, the second pixel circuits driven at the respective average values ​​by capacitor coupling are located in the center of the first pixel circuits, but the number of pixels increases at a ratio of 1:4, where the ratio of 1:4 indicates the ratio between the electrodes of the first pixel circuits and the electrodes of the first pixel circuits and the second pixel circuits, but may be changed depending on the arrangement or position of the pixel circuits.

[0053] For example, electrodes of the first pixel circuit CkR1, Ck+2R1, CkR1+2, and Ck+2Rk+2 (Group 1) may be voltage-driven by a driving device, and electrodes of the second pixel circuit Ck+1R1, CkR1+1, Ck+1R1+1, Ck+2R1+1, and Ck+1R1+2 (Group 2) may not be directly connected to the driving device but may be connected by a capacitor via the electrodes of the first pixel circuit (Group 1).

[0054] The electrodes of the first pixel circuit (Group 1) and the electrodes of the second pixel circuit (Group 2) may overlap by 1 / 2 or 1 / 4 depending on the electrode arrangement, or may overlap by opposing electrode surfaces between the electrodes of the second pixel circuit.

[0055] The electrodes of the first pixel circuit and the second pixel circuit may be formed in different numbers and may at least partially overlap each other. The electrodes of the first pixel circuit and the second pixel circuit may be formed in different sizes, but the electrodes of the first pixel circuit may be formed larger than the electrodes of the second pixel circuit.

[0056] As shown in Figures 3a and 3b, the electrodes of the first pixel circuit (Group 1) can be arranged on a first layer, and the electrodes of the second pixel circuit (Group 2) can be arranged on a second layer.

[0057] At this time, the electrodes of the first pixel circuit (Group 1) and the electrodes of the second pixel circuit (Group 2) can be connected using via wiring. That is, the pixel circuit located at the center of the second pixel circuits arranged on the second layer is connected to the first pixel circuit arranged on the first layer using via wiring.

[0058] A dielectric may be present between the layers, and a display element may be located between the top of the substrate and the top blue electrode.

[0059] The space between the electrodes is filled with a dielectric, which forms a capacitor, and the capacitance may be determined by the opposing area between the electrodes.

[0060] The electrodes of the second pixel circuit (Group 2) are connected to the first pixel circuit (Group 1) or the second pixel circuit (Group 2) only through a capacitor, but when actually configured, they are connected to each other with a very high resistance due to the very low electrical conductivity of the dielectric. This means that there is no effect on voltage distribution due to parasitic resistance components at the frame rate at which the pixels actually operate. However, due to this parasitic resistance, the electrodes of the second pixel circuit (Group 2) converge to the average value of the electrodes of the second pixel circuit (Group 2) in the standby state or operating state, forming an initial voltage.

[0061] The voltage of the second pixel circuit (Group 2) is determined by a capacitor voltage distribution formula based on the initial voltage of the second pixel circuit (Group 2) and the voltage change of the first pixel circuit (Group 1), and generally has the average value of the connected electrodes when the capacitor values ​​connected to each electrode are the same.

[0062] At this time, the average value of the electrode may vary depending on the pixel position, but is as follows.

[0063] For example, when an electrode of a second pixel circuit completely overlaps an electrode of a first pixel circuit, the electrode of the second pixel circuit has a capacitance corresponding to the area of ​​the electrodes located on the first and second layers. In this case, since the electrode of the second pixel circuit does not overlap with the electrode of another pixel circuit on the first layer, the electrode of the second pixel circuit is not connected to the electrode of the pixel circuit that does not overlap via a capacitor. In other words, the electrode of the pixel circuit is only affected by the electrode of the second pixel circuit that overlaps with the electrode of the first pixel circuit.

[0064] As another example, if the electrode of the second pixel circuit overlaps half of the electrode of the first pixel circuit to the left and right or half of the top and bottom, the capacitance between the electrode of the second pixel circuit and the electrode of the overlapping first pixel circuit in the first layer will have the same value, and the capacitor voltage distribution formula will result in the average voltage of the two overlapping electrodes of the first pixel circuit in the first layer.

[0065] As another example, if the electrode of the second pixel circuit is located in the center of the electrodes of the four first pixel circuits in the first layer, and overlaps with 1 / 4 of the electrodes of the first pixel circuits in each first layer, the capacitance between the electrode of the second pixel circuit and the electrode of the overlapping first pixel circuit in the first layer will have the same value, and will have the average voltage value of the electrodes of the four overlapping first pixel circuits in the first layer according to the capacitor voltage distribution formula.

[0066] When the voltage value of the electrode of the first pixel circuit (Group 1) changes, the voltage value of the electrode of the second pixel circuit (Group 2) may be determined approximately by the average value according to the position of the second pixel circuit (Group 2) according to the capacitor voltage distribution formula. In the embodiment, this pixel circuit configuration performs an operation similar to that of a general digital resolution conversion device, and the image of each pixel can increase its resolution in the form of an averaged image.

[0067] In addition, although the embodiment has been described as an example configured with the first and second layers, an intermediate layer may be further included. Such an intermediate layer is disposed between the electrode layer located in the first layer and the electrode layer located in the second layer for various resolution conversions, and forms various types of capacitor networks to support various types of resolution conversions.

[0068] The electrode layer stack structure of the first and second layers according to this embodiment is a structure that can create a capacitor network between the first electrode layer and the second electrode layer simply by arranging the electrodes and the dielectric, and does not require additional wiring for connecting the capacitors, making it possible to realize a desired resolution enhancement technology through capacitor coupling with a very simple structure.

[0069] Furthermore, the first electrode layer and the second electrode layer are arranged to cross each other so as to overlap at least partially through the vertical arrangement of the semiconductor process, thereby forming a capacitor.

[0070] FIG. 4 is a diagram showing a modified pixel circuit according to the first embodiment of the present invention, and FIGS. 5a and 5b are a plan view and a cross-sectional view of the pixel circuit shown in FIG.

[0071] Referring to FIG. 4, the modified pixel circuit of the first embodiment of the present invention is a capacitor-coupled pixel circuit, which may include a first pixel circuit 100, a second pixel circuit 200, and a capacitor C.

[0072] Since the pixel circuit modified from the first embodiment has the same configuration, function, and role as the pixel circuit according to the first embodiment of FIG. 2, a detailed description thereof will be omitted. However, since the via wiring of the first embodiment is not used, only this will be described. When the thickness of the dielectric between the first and second layers is sufficiently small, a voltage transfer similar to that achieved by a direct connection through a via is possible. The presence of a via requires an additional via process, and the via process may affect the flatness of the second layer, potentially degrading the optical and physical characteristics of the second layer. In other words, the presence of a via layer allows the voltage of the first layer to be transferred to the second layer without loss, but this may result in additional processes and degradation of performance.

[0073] As shown in FIGS. 5a and 5b, the electrodes of the first pixel circuit (Group 1) can be arranged on a first layer, and the electrodes of the second pixel circuit (Group 2) can be arranged on a second layer.

[0074] At this time, the electrodes of the first pixel circuit (Group 1) and the second pixel circuit (Group 2) are not connected using via wiring, i.e., the pixel circuit located at the center of the second pixel circuits arranged on the second layer is not connected to the first pixel circuit arranged on the first layer using via wiring.

[0075] 6a to 6c are diagrams showing the layout of pixel circuits according to the first embodiment.

[0076] 6a to 6c show various arrangements of pixel circuits according to the first embodiment, and various electrode shapes may be used, and the pixel circuits may be arranged in a structure of three or more layers.

[0077] FIG. 6a shows a case where the electrodes of each pixel circuit are not the same size, FIG. 6b shows a case where the electrode shape of the second pixel circuit is not rectangular, and FIG. 6c shows a case where a three-layer structure is used instead of a two-layer structure to amplify pixel resolution to 1:16 by forming two 1:4 layers, but these are merely exemplary embodiments, and the present invention is not necessarily limited to these embodiments.

[0078] FIG. 7 is a diagram showing a microdisplay device to which the pixel circuit of the first embodiment is applied.

[0079] Referring to FIG. 7, a microdisplay device applying the pixel circuit of the first embodiment can implement a resolution of C×R using capacitor-coupled pixel circuits, (C / 2) column driving circuits, (R / 2) row driving circuits, and (C / 2)×(R / 2) pixel circuits.

[0080] The ratio between the electrodes of the first pixel circuit and the electrodes of the first pixel circuit and the second pixel circuit is arranged at 1:4, and a voltage can be applied to one first pixel circuit to drive four second pixel circuits.

[0081] In this case, the ratio of the electrodes of the first pixel circuit to the electrodes of the first pixel circuit and the second pixel circuit is 1:4, and the number of column driving circuits, row driving circuits, and pixel circuits may be determined by the electrode ratio, i.e., the ratio of the electrodes of the first pixel circuit to the electrodes of the first pixel circuit and the second pixel circuit.

[0082] The odd-numbered pixels in each column and row may be voltage-driven by a driving circuit, and the voltages of the other pixels may be determined by voltage distribution of the voltage-driven pixels.

[0083] FIG. 8 is a diagram showing a pixel circuit according to a second embodiment of the present invention, and FIG. 9 is a plan view of the pixel circuit shown in FIG.

[0084] 8 and 9, a pixel circuit according to a second embodiment of the present invention is a capacitor-coupled pixel circuit, and may include a first pixel circuit 100, a second pixel circuit 200, and a capacitor C.

[0085] The pixel circuit according to the second embodiment has the same configuration and function as the pixel circuit according to the first embodiment shown in FIG. 2, but is formed so that the electrode arrangement of the pixel circuit is different.

[0086] For example, although the pixel circuit according to the second embodiment has a two-layer structure, the ratio between the electrodes of the first pixel circuit and the electrodes of the first pixel circuit and the second pixel circuit may be arranged at 4:9.

[0087] Similarly, in the pixel circuit according to the second embodiment, the first pixel circuit and the second pixel circuit may or may not be connected using a via wiring.

[0088] FIG. 10 is a diagram showing a microdisplay device to which the pixel circuit of the second embodiment is applied.

[0089] Referring to FIG. 10, a microdisplay device employing the pixel circuit of the second embodiment can implement a resolution of C×R using capacitor-coupled pixel circuits, (C / 2) column driving circuits, (R / 2) row driving circuits, and (C / 2)×(R / 2) pixel circuits.

[0090] The ratio between the electrodes of the first pixel circuit and the electrodes of the first pixel circuit and the second pixel circuit is arranged at 4:9, and voltage can be applied to four first pixel circuits to drive nine second pixel circuits.

[0091] 11a and 11b are diagrams illustrating examples of pixel resolution conversion according to an embodiment.

[0092] Referring to FIG. 11a, an example of resolution increase is shown, in which a pixel driving circuit designed with a spacing of 6.3 μm is connected to pixel electrodes with a spacing of 3.15 μm, thereby realizing a four-fold increase in resolution.

[0093] Referring to FIG. 11b, an example of increased resolution is shown, in which a pixel driving circuit designed to have a spacing of 4.3 μm is connected to pixel electrodes having a spacing of 2.82 μm, thereby achieving a four-fold increase in resolution.

[0094] FIG. 12 is a diagram illustrating a driving process of a microdisplay device according to an embodiment.

[0095] Referring to FIG. 12, a microdisplay device 100 according to the embodiment may include an image input unit 100, a pixel compensation preprocessor 200, a resolution converter 300, a pixel driving circuit 400, and a pixel array 500.

[0096] The image input unit 100 can receive a predetermined video or image to be displayed on a screen. For example, the input image may have a resolution of C×R.

[0097] The pixel compensation preprocessor 200 can perform preprocessing by reflecting the characteristics of capacitor coupling to improve image quality degradation caused by driving the average value of capacitor coupling for an input image. Briefly explaining the preprocessor, the proposed pixel enhancement technology is a resolution improvement method mainly using average value insertion. That is, if the image of the inserted pixel in the original image is significantly different from the average value, the color of the pixel that determines the inserted image is preprocessed to be similar to the original image within the range of image quality change allowable through preprocessing.

[0098] The resolution converter 300 can convert a resolution of C×R into a resolution of (C / 2)×(R / 2).

[0099] The pixel driving circuit 400 can drive the pixel array 500 with a resolution of (C / 2)×(R / 2). Here, the pixel array 500 may be a capacitor-coupled pixel circuit including a voltage-driven first pixel circuit and a second pixel circuit driven through capacitor coupling with the first pixel circuit.

[0100] 13 shows various arrangement structures of the first and second pixel circuit electrodes. As shown in FIG. 13, the first pixel circuit electrode may be arranged on a first layer, and the second pixel circuit electrode may be arranged on a second layer.

[0101] In this case, the first pixel circuit electrode may be embodied in a square or equilateral square shape, and the second pixel circuit electrode may be embodied in a shape obtained by rotating the first pixel circuit electrode by 45 degrees.

[0102] The first pixel circuit electrodes may be disposed on a first layer and may be arranged in a checkerboard pattern, i.e., adjacent first pixel circuit electrodes may be disposed at the same spacing from each other.

[0103] The second pixel circuit electrodes may be arranged on the second layer in a checkerboard pattern, i.e., adjacent second pixel circuit electrodes may be arranged at the same distance from each other. In this case, the second pixel circuit electrodes may be configured as electrodes of the same size or electrodes of different sizes.

[0104] First, as shown in FIG. 13(a), the second pixel circuit electrode is an electrode E 2-1 and the second magnitude electrode E 2-2 Specifically, at this time, the second size electrode E 2-2 By forming a 2x2 array, the first size electrode E 2-1 The same size as the electrode E can be formed in a 2x2 array. 2-2 and the first magnitude electrode E 2-1 may be arranged alternately on the left or right side.

[0105] 13(b), the second pixel circuit electrodes may be configured as electrodes E2 of the same size and arranged in a checkerboard pattern, where some of the second pixel circuit electrodes may be arranged to completely overlap the first pixel circuit electrodes E1 of the first layer, and the centers of the remaining second pixel circuit electrodes may be arranged in the area where the vertices of the four first pixel circuit electrodes E1 of the first layer meet.

[0106] Although various arrangements of the first and second layers are illustrated in FIG. 13, these are merely examples, and the present invention is not necessarily limited to these examples.

[0107] The term "module" used in this embodiment refers to software or hardware components such as FPGAs (field-programmable gate arrays) or ASICs, and the "module" performs a certain function. However, the "module" is not limited to software or hardware. A "module" may be configured to reside on an addressable storage medium or to implement one or more processors. Thus, by way of example, a "module" includes components such as software components, object-oriented software components, class components, and task components, as well as processes, functions, attributes, procedures, subroutines, program code segments, drivers, firmware, microcode, circuits, data, databases, data structures, tables, arrays, and variables. The functionality provided by the components and "modules" may be combined into fewer components and "modules" or further separated into additional components and "modules." Furthermore, the components and "modules" may be embodied to implement one or more CPUs within a device or security multimedia card.

[0108] While the present invention has been described above with reference to preferred embodiments, those skilled in the art will understand that the present invention can be modified and changed in various ways without departing from the spirit and scope of the present invention as set forth in the claims below. [Explanation of symbols]

[0109] 10: First pixel circuit 20: Second pixel circuit 100: Video input section 200: Pixel compensation preprocessor 300: Resolution converter 400: Pixel driving circuit 500: pixel array

Claims

1. a plurality of first pixel circuits to which a voltage is applied from a drive circuit; a plurality of second pixel circuits to which voltages are applied from the plurality of first pixel circuits; a capacitor formed between the plurality of first pixel circuits and the plurality of second pixel circuits; the second pixel circuits are applied with voltages distributed by the capacitors from the first pixel circuits; The pixel circuit, wherein the distributed voltage is determined by an average voltage value of electrodes of the first pixel circuits that at least partially overlap with electrodes of the second pixel circuits.

2. the plurality of first pixel circuits are formed on a first layer of a panel; The pixel circuit according to claim 1 , wherein the plurality of second pixel circuits are formed in a second layer located above the first layer.

3. A pixel circuit as described in Claim 2, wherein at least one electrode of the plurality of first pixel circuits and at least one electrode of the plurality of second pixel circuits are connected by the capacitor.

4. The pixel circuit according to claim 1 , wherein at least one electrode of the plurality of first pixel circuits and at least one electrode of the plurality of second pixel circuits are connected by a via wiring.

5. The pixel circuit of claim 1 , wherein at least one electrode of the plurality of first pixel circuits and at least one electrode of the plurality of second pixel circuits are not connected to each other.

6. The pixel circuit according to claim 1 , wherein the number of electrodes of the first pixel circuits and the number of electrodes of the second pixel circuits are different from each other.

7. The pixel circuit according to claim 1 , wherein the electrodes of the first pixel circuits and the second pixel circuits are formed to have different sizes.

8. The pixel circuit according to claim 7 , wherein the electrodes of the first pixel circuits are formed larger than the electrodes of the second pixel circuits. The pixel circuit according to claim 1.

9. A pixel circuit according to any one of claims 1 to 8; a pixel driving circuit that applies a voltage to the pixel circuit.

10. a pixel compensation preprocessor for performing preprocessing on an input image by driving an average value of capacitor coupling; a resolution converter that converts the first resolution of the input image into a second resolution, The pixel driving circuit The microdisplay device of claim 9 , wherein a voltage is applied to the pixel circuit at the converted second resolution.

11. The microdisplay device of claim 10 , wherein the second resolution is lower than the first resolution.

Images