Reset circuit and reset method for railway on-board control device

Abstract

To provide a reset circuit and a reset method which can prevent data damage of a removable memory and enable appropriate reset processing.SOLUTION: A reset circuit of a control device in a railway vehicle comprises: a device power supply; a device power voltage reduction detection unit which detects voltage reduction of the device power supply; a backup power source unit which generates a backup power source through the device power supply; a removable memory; a control unit which controls access to the removable memory; a removable memory power control unit; a backup power voltage reduction detection unit which detects voltage reduction of the backup power source unit; a switch unit for backup power source detection which lies between the backup power source unit and the backup power voltage reduction detection unit; a reset flag unit which stores a reset state of the device power supply; and a reset mask unit which controls the switch unit for backup power source detection through a flag condition signal from the reset flag unit and a mask control signal from the control unit.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a reset circuit and a reset method for an on-board control device of a railway vehicle, and more particularly to a reset circuit and a reset method for an on-board control device of a railway vehicle that uses a removable memory. [Background technology]

[0002] Generally, before cutting off the power to removable memory, you must stop accessing the memory first. If you do not follow this rule and the power is lost while the memory is being accessed, the data stored in the memory may be corrupted.

[0003] For example, Patent Documents 1 and 2 disclose a data storage control device equipped with a backup power supply that continues to supply power to a memory card after the power supply from the main power supply is cut off, until at least a preset backup time has elapsed. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-079428 [Patent Document 2] Japanese Patent Application Laid-Open No. 2015-079430 Summary of the Invention [Problem to be solved by the invention]

[0005] On the other hand, since the power supply to on-board control equipment is subject to interruption without notice, when removable memory is used in on-board control equipment, there is a very high risk of data corruption due to a power loss during memory access. For this reason, it is possible to use a backup power supply, but in this case, it is necessary to perform appropriate reset processing of the microcomputer to prevent an unstable situation caused by using the backup power supply.

[0006] Furthermore, although Patent Documents 1 and 2 describe a backup power supply, they do not describe a reset process for avoiding an unstable situation caused by using a backup power supply.

[0007] In view of the above-mentioned problems, an object of the present invention is to provide a reset circuit and a reset method that prevent data corruption in a removable memory and enable appropriate reset processing. [Means for solving the problem]

[0008] In order to achieve the above object, one representative reset circuit for a railway on-board control device of the present invention comprises: a device power supply that supplies power to the reset circuit; a device power supply voltage drop detection unit that detects a voltage drop in the device power supply; a backup power supply unit that generates backup power from the device power supply; a detachable non-volatile removable memory; a control unit that operates on power backed up by the backup power supply unit and controls access to the removable memory; a removable memory power supply control unit that controls the power supply of the removable memory; a backup power supply voltage drop detection unit that detects a voltage drop in the backup power supply unit; a backup power supply detection switch unit that is interposed between the backup power supply unit and the backup power supply voltage drop detection unit; a reset flag unit that stores the reset state of the device power supply; and a reset mask unit that controls a switch of the backup power supply detection switch unit based on a flag state signal from the reset flag unit and a mask control signal from the control unit, and the control unit performs termination processing of the removable memory after the device power supply voltage drop detection unit detects a voltage drop in the device power supply. [Effects of the Invention]

[0009] According to the present invention, in a reset circuit and a reset method for a railway on-board control device, damage to data in a removable memory is prevented and appropriate reset processing is possible. Problems, configurations, and effects other than those described above will become apparent from the following embodiments. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is a block diagram of a computer system for implementing aspects according to an embodiment of the present disclosure. [Figure 2] FIG. 2 is a circuit block diagram showing one embodiment of the present invention. [Figure 3] FIG. 3 is a flowchart showing an example of the operation of the present invention. [Figure 4] FIG. 4 is a flowchart showing an example of the subroutine of FIG. DETAILED DESCRIPTION OF THE INVENTION

[0011] An embodiment of the present invention will be described.

[0012] <Computer system for implementing aspects according to the embodiment> 1 is a block diagram of a computer system 300 for implementing aspects according to an embodiment of the present disclosure. The mechanisms and devices of various embodiments disclosed herein may be applied to any suitable computing system. The main components of the computer system 300 include one or more processors 302, memory 304, a terminal interface 312, a storage interface 314, an I / O (input / output) device interface 316, and a network interface 318. These components may be interconnected via a memory bus 306, an I / O bus 308, a bus interface unit 309, and an I / O bus interface unit 310.

[0013] Computer system 300 may include one or more processing units 302A and 302B, collectively referred to as processors 302. Each processor 302 executes instructions stored in memory 304 and may include an on-board cache. In some embodiments, computer system 300 may include multiple processors, while in other embodiments, computer system 300 may be a single processing unit system. The processing unit may be a central processing unit (CPU), a field-programmable gate array (FPGA), a graphics processing unit (GPU), a digital signal processor (DSP), or the like.

[0014] In some embodiments, memory 304 may include random-access semiconductor memory, storage devices, or storage media (either volatile or nonvolatile) for storing data and programs. In some embodiments, memory 304 represents the entire virtual memory of computer system 300 and may include virtual memory of other computer systems connected to computer system 300 via a network. While memory 304 may be conceptually considered a single entity, in other embodiments, memory 304 may be a more complex organization, such as a hierarchy of caches and other memory devices. For example, memory may exist as multiple levels of caches, and these caches may be divided by function. As a result, one cache may hold instructions, while other caches hold non-instruction data used by the processor. Memory may also be distributed and associated with various different processing units, such as in a so-called Non-Uniform Memory Access (NUMA) computer architecture.

[0015] Memory 304 may store all or part of the programs, modules, and data structures that implement the functions described herein. For example, memory 304 may store latent factor identification application 350. In some embodiments, latent factor identification application 350 may include instructions or descriptions that execute the functions described below on processor 302, or may include instructions or descriptions that are interpreted by other instructions or descriptions. In some embodiments, latent factor identification application 350 may be implemented in hardware via semiconductor devices, chips, logic gates, circuits, circuit cards, and / or other physical hardware devices instead of or in addition to a processor-based system. In some embodiments, latent factor identification application 350 may include data other than instructions or descriptions.

[0016] Computer system 300 may include a bus interface unit 309 that facilitates communication between processor 302, memory 304, display system 324, and I / O bus interface unit 310. I / O bus interface unit 310 may couple to I / O bus 308 for transferring data to and from various I / O units. I / O bus interface unit 310 may communicate via I / O bus 308 with multiple I / O interface units 312, 314, 316, and 318, also known as I / O processors (IOPs) or I / O adapters (IOAs). Computer system 300 may also include one or more sensors or other devices configured to collect data and provide the data to processor 302. Similarly, the functionality provided by bus interface unit 309 may be implemented by an integrated circuit that includes processor 302.

[0017] The I / O interface unit provides the ability to communicate with various storage or I / O devices.

[0018] Storage interface 314 may be attached to one or more disk drives or direct access storage devices 322. In some embodiments, storage device 322 may be implemented as any secondary storage device. Contents of memory 304 may be stored in storage device 322 and retrieved as needed from storage device 322. Network interface 318 may provide a communications path that allows computer system 300 and other devices to communicate with each other. This communications path may be, for example, a network 330.

[0019] 1 includes a bus structure providing direct communication paths between processor 302, memory 304, bus interface 309, display system 324, and I / O bus interface unit 310; however, in other embodiments, computer system 300 may include point-to-point links, multiple hierarchical buses, parallel or redundant communication paths in a hierarchical, star, or web configuration. Furthermore, while I / O bus interface unit 310 and I / O bus 308 are shown as a single unit, computer system 300 may actually include multiple I / O bus interface units 310 or multiple I / O buses 308. Additionally, while multiple I / O interface units are shown isolating I / O bus 308 from various communication paths leading to various I / O devices, in other embodiments, some or all of the I / O devices may be directly connected to a single system I / O bus.

[0020] In one embodiment, computer system 300 may be a device that receives requests from other computer systems (clients) without a direct user interface, such as a multi-user mainframe computer system, a single-user system, or a server computer.

[0021] <Block diagram> Figure 2 is a circuit block diagram showing one embodiment of the present invention. In Figure 2, solid arrows indicate the direction of power supply, and power is actually supplied. Also, in Figure 2, dashed arrows indicate the direction of signal transmission.

[0022] The reset circuit of the on-board railway control device shown in Figure 2 comprises a device power supply 11, a backup power supply unit 12, a device power supply voltage drop detection unit 13, a removable memory control unit 14, a reset flag unit 15, a reset mask unit 16, a backup power supply voltage drop detection unit 17, a removable memory 18, a removable memory power supply control unit 19, a backup power supply detection switch unit 20, and a circuit unit 21. The on-board railway control device is a device that is mounted on a train and can control the running of the train, etc.

[0023] 2 is the power supply backup range 201. The power supply backup range 201 includes a removable memory control unit 14, a reset flag unit 15, a reset mask unit 16, a backup power supply voltage drop detection unit 17, a removable memory 18, a removable memory power supply control unit 19, a backup power supply detection switch unit 20, and a circuit unit 21.

[0024] Here, the backup power supply unit 12, device power supply voltage drop detection unit 13, removable memory control unit 14, reset flag unit 15, reset mask unit 16, backup power supply voltage drop detection unit 17, removable memory power supply control unit 19, backup power supply detection switch unit 20, and circuit unit 21 can be configured on the same board, or each or some of them can be configured on separate boards.

[0025] Power is supplied to the circuit from the device power supply 11. This circuit may be the power backup area 201 shown in FIG. 2. The device power supply 11 may also be the power supply for an on-board control device for a railway vehicle. As long as power is supplied from the device power supply 11, the removable memory 18 can operate normally.

[0026] The backup power supply unit 12 is connected to the device power supply 11 and supplies power to the circuits in the power backup range 201 for a certain period of time after the device power supply 11 is interrupted. The backup power supply unit 12 is configured to store electricity, for example, by using a capacitor or battery. In this case, a super capacitor with a large capacitance of several tens of millifarad or more is particularly advantageous because it has a long life and can store a large amount of electricity. On the other hand, if the device power supply 11 is not interrupted and electricity is being supplied normally, the backup power supply unit 12 is configured to continue supplying electricity to the circuits.

[0027] The device power supply voltage drop detection unit 13 detects a drop in the power supply voltage supplied to the circuit from the device power supply 11, and is equipped with a mechanism for this purpose. When the device power supply voltage drop detection unit 13 detects a voltage drop, it outputs a drop detection signal 101. A threshold is set and a voltage drop is detected when the voltage drops below that threshold. For example, this occurs when the voltage of the device power supply 11 falls below a stable operating voltage. Specifically, in the case of a 5V power supply, this would occur when the voltage falls below the stable operating voltage of 4.5V. This can also be said to indicate a loss of power. The drop detection signal 101 is output to the removable memory control unit 14 and the reset flag unit 15. In the case of the removable memory control unit 14, the drop detection signal 101 is input from an interrupt input terminal of the removable memory control unit 14, requesting the execution of an interrupt process.

[0028] The removable memory control unit 14 controls access to the removable memory 18. Furthermore, the removable memory control unit 14 executes, by interrupt processing, a termination process for the removable memory 18 and a reset process for waiting for the next time the device power supply 11 is turned on again or for turning off the device power supply 11. The removable memory control unit 14 can be configured with a microcomputer, and for example, the computer system 300 shown in FIG. 1 can be applied.

[0029] A drop detection signal 101 is input to the reset flag unit 15. When the output of the drop detection signal 101 from the device power supply voltage drop detection unit 13 to the reset flag unit 15 is canceled, the drop detection signal 101 that was being input is no longer input. In this case, since the device power supply 11 has been turned on again (recovered to a normal voltage value) after the voltage of the device power supply 11 dropped (shut off), a reset flag is set to memorize this state. The reset flag unit 15 memorizes the state in which the reset flag is set as information, for example, "1," and the state in which the reset flag is cleared as information, for example, "0." The reset flag unit 15 is configured as a mechanism using an IC (integrated circuit) or the like for this purpose.

[0030] The information stored in the reset flag unit 15 is input to the IO input port of the removable memory control unit 14 as a flag state signal 102. The flag state signal 102 is also input to the reset mask unit 16.

[0031] The reset mask unit 16 receives a mask control signal 104 output from the IO port output of the removable memory control unit 14. The reset mask unit 16 controls whether or not to open the switch of the backup power supply detection switch unit 20 based on this mask control signal 104 and the flag state signal 102 input from the reset flag unit 15. This control can be performed by a mask that determines whether or not to transmit the flag state signal 102 to the backup power supply detection switch unit 20 in the subsequent circuit. In the masked state, signal transmission is blocked, and in the mask OFF state, the signal is transmitted. The reset mask unit 16 normally maintains the masked state.

[0032] The backup power supply voltage drop detection unit 17 detects a voltage drop of the backup power supply of the backup power supply unit 12. When a voltage drop of the backup power supply is detected, it outputs a drop detection signal 103. The drop detection signal 103 is input to the reset input terminal of the removable memory control unit 14. When the drop detection signal 103 is input to the reset input terminal, the removable memory control unit 14 is requested to perform a reset process, and starts the reset process after the termination process of the removable memory 18. The backup power supply voltage drop detection unit 17 is configured as a mechanism using an IC (integrated circuit) or the like for this purpose. The drop detection signal 103 is also output to the circuit unit 21.

[0033] Here, the reset process refers to entering a reset state, which is a state in which the microcomputer in the removable memory control unit 14 is powered on but the software (application) is not running (a state in which the software is intentionally inhibited from running).

[0034] The removable memory 18 is a removable nonvolatile storage device, such as an SD memory card, a USB memory, or an external hard disk.

[0035] The removable memory power control unit 19 controls whether or not power is supplied from the backup power supply unit 12 to the removable memory 18. This control can be performed in response to an instruction from the removable memory control unit 14. The removable memory power control unit 19 is configured as a mechanism using an IC (integrated circuit) or the like for this purpose. For example, a switch such as a FET (field effect transistor) can be used.

[0036] The backup power supply detection switch unit 20 is provided between the backup power supply unit 12 and the backup power supply voltage drop detection unit 17. The backup power supply detection switch unit 20 has a switch function that controls whether or not power from the backup power supply unit 12 is supplied to the backup power supply voltage drop detection unit 17. This switch function can be performed based on a control signal 105 from the reset mask unit 16. When the switch is open, power is not supplied to the backup power supply voltage drop detection unit 17, and when the switch is closed, power is supplied to the backup power supply voltage drop detection unit 17. The switch of the backup power supply detection switch unit 20 is normally closed. The backup power supply voltage drop detection unit 17 can handle the supplied power as voltage information. The backup power supply detection switch unit 20 is configured as a mechanism using an IC (integrated circuit) or the like for this purpose.

[0037] The circuit unit 21 receives a drop detection signal 103 from the backup power supply voltage drop detection unit 17 and a flag clear signal 106 from the removable memory control unit 14. When either of these signals is received, the circuit unit 21 sends a flag clear signal 107 to the reset flag unit 15. The circuit unit 21 is configured as a mechanism using an IC (integrated circuit) or the like for this purpose. Specifically, the circuit unit 21 includes an OR circuit. When the flag clear signal 107 is received, the reset flag unit 15 clears the reset flag to "0."

[0038] The removable memory control unit 14 accesses the removable memory 18 to send and receive data (transmits and receives a data signal 110) while power is being supplied appropriately from the device power supply 11. A case will be described where the voltage of the device power supply 11 drops and the power source is switched to power from the backup power supply unit 12. In this case, a drop detection signal 101 is output from the device power supply voltage drop detection unit 13, and the drop detection signal 101 is input to the interrupt terminal of the removable memory control unit 14. This means that an interrupt process is requested in the removable memory control unit 14, and the removable memory control unit 14 performs a process to stop access to the removable memory 18.

[0039] When the process of stopping access to the removable memory 18 is completed normally, the removable memory control unit 14 instructs the removable memory power control unit 19 to cut off the power supply to the removable memory 18. This constitutes the process of shutting down the removable memory 18.

[0040] After the access to the removable memory 18 has been completed successfully, the removable memory control unit 14 is transitioned to a standby state for the next re-apply of the device power supply 11. For this purpose, a backup power supply voltage drop detection unit 17 and a backup power supply detection switch unit 20 are used. These are used in combination with a reset flag unit 15 and a reset mask unit 16.

[0041] The following describes a case where the backup power supply of the backup power supply unit 12 drops (is lost) after the termination process of the removable memory 18 has been executed. In this case, the backup power supply voltage drop detection unit 17 detects the voltage drop of the backup power supply and outputs a drop detection signal 103. The removable memory power control unit 19 then inputs the drop detection signal 103 to its reset input terminal and starts reset processing. This causes the removable memory control unit 14 to transition to a reset processing state. If the backup power supply unit 12 is subsequently lost, the removable memory control unit 14 stops operating in response to this power loss, and can prepare for the next time the device power supply 11 is re-applied. The drop detection signal 103 is also output to the circuit unit 21, which then outputs a flag clear signal 107, causing the reset flag unit 15 to clear the reset flag.

[0042] On the other hand, if the device power supply 11 is turned back on after power loss and before the voltage of the backup power supply unit 12 drops, initialization processing is executed outside the power backup range 201, and the device enters an initialized state. However, because power continues to be supplied to the power backup range 201 from the backup power supply unit 12, the removable memory power control unit 19 is not reset, and the initialization processing is not performed correctly. In this state, discrepancies occur in the initialization processing inside and outside the power backup range 201, adversely affecting communication processing, etc. To avoid this state, the removable memory power control unit 19 is transitioned to a reset processing state after the termination processing of the removable memory 18 using the following method.

[0043] Because the power supply of the device power supply 11 has been lost, the device power supply voltage drop detection unit 13 outputs a drop detection signal 101. Next, the removable memory control unit 14 performs a termination process for the removable memory 18 by interrupt processing in response to the input of the drop detection signal 101. Thereafter, the removable memory control unit 14 outputs a mask control signal 104 to the reset mask unit 16. In this case, the mask control signal 104 is a signal that issues an instruction to turn the mask OFF (remove the mask).

[0044] At this time, since the power supply of the device power supply 11 has been lost and then re-applied, the flag state signal 102 of the reset flag unit 15 is in a state in which the reset flag is set (state of "1"). Therefore, the reset mask unit 16 is in a state in which it receives the flag state signal 102 in which the reset flag is set from the reset flag unit 15. In other words, when the reset mask unit 16 receives the mask control signal 104 with mask OFF and the flag state signal 102 in which the reset flag is set, it outputs the control signal 105 to the backup power supply detection switch unit 20 to open the switch.

[0045] Upon receiving the control signal 105, the backup power detection switch unit 20 opens its internal switch and intentionally cuts off the power supply from the backup power unit 12. This causes the backup power supply voltage drop detection unit 17 to detect a voltage drop and output a drop detection signal 103 to the removable memory control unit 14 to request a reset process. The removable memory control unit 14, which has input the drop detection signal 103 to its reset input, transitions to a reset state after completing the process for the removable memory 18, thereby transitioning to a state ready for the next time the device power supply 11 is turned on. Then, since the device power supply 11 is turned on again in the reset state, the removable memory control unit 14 performs an initialization process. At this time, the drop detection signal 103 is also output to the circuit unit 21, which outputs a flag clear signal 107, causing the reset flag unit 15 to clear the reset flag.

[0046] When the removable memory is terminated, a flag clear signal 106 is output from the IO port output of the removable memory control unit 14 to the circuit unit 21. In this case, a flag clear signal 107 is output from the circuit unit 21, and the reset flag unit 15 clears the reset flag (to "0" state). This allows the next reset flag to be cleared accurately.

[0047] <Flowchart> FIG. 3 is a flowchart showing an example of the operation of the present invention.

[0048] First, in step S101, the device power supply is turned on. Here, the device power supply 11 starts supplying power. Then, the voltage of the backup power supply unit 12 rises and charges the super capacitor, etc. At the same time, power from the device power supply 11 is also supplied to the power supply backup range 201. At this time, the reset mask unit 16 maintains the normal masked state, and this causes the backup power supply detection switch unit 20 to be in the ON state (the switch is connected).

[0049] Next, in step S102, a reset flag is set. Device power supply voltage drop detection unit 13 stops outputting drop detection signal 101 due to a voltage rise of device power supply 11. This causes reset flag unit 15 to set (raise) a reset flag.

[0050] Next, in step S103, initialization processing is performed. In this state, power is supplied to the removable memory control unit 14, and the backup power supply voltage drop detection unit 17 does not detect a power drop. Therefore, the drop detection signal 103 is not input to the reset input of the removable memory control unit 14, and the removable memory control unit 14 is released from reset, so initialization processing is performed.

[0051] Next, in step S104, normal operation is started. The power supply backup range 201 is in a normal operating state with the device power supply 11 as the power source.

[0052] Next, in step S105, a power cutoff occurs in the device, assuming that the power supply from the device power supply 11 is stopped.

[0053] Next, in step S106, a low voltage of the device is detected. The device power supply voltage drop detector 13 detects a voltage drop of the device power supply 11 and outputs a drop detection signal 101.

[0054] Next, in step S107, an interrupt occurs. The removable memory control unit 14 inputs the drop detection signal 101 output from the device power supply voltage drop detection unit 13 to the interrupt input. As a result, an interrupt process occurs in the removable memory control unit 14.

[0055] Next, in step S108, a subroutine is executed by the removable memory control unit 14. The contents of this subroutine will be explained with reference to FIG.

[0056] Next, in step S109, the device enters a standby state for powering on again. After the removable memory control unit 14 executes the subroutine, the device waits for power to be turned on again by the device power supply 11. If the voltage of the backup power supply unit 12 drops without the power being turned on again, the operation of the board including the removable memory control unit 14 ends.

[0057] Fig. 4 is a flowchart showing an example of the subroutine of Fig. 3. Here, the process of step 108 of Fig. 3 is shown.

[0058] First, in step S201, the removable memory control unit 14 performs interrupt disable processing. After starting the interrupt processing, the removable memory control unit 14 performs new interrupt disable processing.

[0059] Next, in step S202, a reset flag clearing process is performed. The removable memory control unit 14 clears the reset flag of the reset flag unit 15. This can be done by outputting a flag clear signal 106 from the IO port output of the removable memory control unit 14. The reset flag unit 15 receives a flag clear signal 107 via the circuit unit 21 and clears the reset flag.

[0060] Next, in step S203, the removable memory is shut down. The removable memory control unit 14 stops access to the removable memory 18 and issues a power cut-off instruction to the removable memory power control unit 19.

[0061] Next, in step S204, the reset mask is released. The removable memory control unit 14 instructs the reset mask unit to release the mask. This is done by outputting the mask control signal 104 for releasing the mask from the IO port output of the removable memory control unit 14.

[0062] At the time when the processing of step S204 is completed, in S202 the reset mask unit 16 receives the flag clear signal 107, which clears the reset flag, from the reset flag unit 15. In addition, in S204 the reset mask unit 16 receives the mask control signal 104 for unmasking from the removable memory control unit 14. Here, since the reset flag is cleared, the reset mask unit 16 does not output the control signal 105 for opening the switch to the backup power supply detection switch unit 20.

[0063] On the other hand, the next time device power supply 11 is turned back on, reset flag unit 15 sends a signal raising the reset flag to reset mask unit 16. In this case, as explained in FIG. 1, reset mask unit 16, which has received mask control signal 104 to unmask, outputs control signal 105 to open the switch to backup power supply detection switch unit 20. This opens the switch of backup power supply detection switch unit 120, and backup power supply voltage drop detection unit 17 detects a voltage drop and outputs drop detection signal 103 to removable memory control unit 14. Removable memory control unit 14, which has received drop detection signal 103, then transitions to a reset state.

[0064] <Effects> According to the above-described embodiment, firstly, even if the device power supply 11 is suddenly cut off, it is possible to normally terminate access to the removable memory 18. Furthermore, by subsequently cutting off the power supply to the removable memory 18, it is possible to maintain a state in which the recorded contents of the removable memory 18 are not damaged (are not unintentionally rewritten).

[0065] Furthermore, after executing the termination process for the removable memory 18, the removable memory control unit 14 detects a voltage drop in the backup power supply and transitions to a reset state. This prevents the removable memory control unit 14 from running software when the power supply voltage is unstable, making it possible to prevent malfunctions.

[0066] Furthermore, if the device power supply 11 is turned on again after power loss and before the voltage of the backup power supply unit 12 drops, the removable memory control unit 14 is put into a reset state. This also causes the removable memory control unit 14 to be initialized, preventing adverse effects on communication processing and the like due to discrepancies in the initialization processing inside and outside the power backup range 201.

[0067] The present invention is not limited to the above-described embodiments and includes various modifications. For example, the above-described embodiments have been described in detail to clearly explain the present invention, and the present invention is not necessarily limited to those including all of the described configurations. Furthermore, it is possible to replace part of the configuration of one embodiment with the configuration of another embodiment, or to add the configuration of another embodiment to the configuration of one embodiment. Furthermore, it is possible to add, delete, or replace part of the configuration of each embodiment with other configurations.

[0068] This specification also includes the disclosure of the following aspects. (Aspect 1) a device power supply that supplies power to a reset circuit; a device power supply voltage drop detection unit that detects a voltage drop of the device power supply; a backup power supply unit that generates backup power from the device power supply; a detachable nonvolatile removable memory; a control unit that operates on power backed up by the backup power supply unit and controls access to the removable memory; a removable memory power supply control unit that controls the power supply of the removable memory; a backup power supply voltage drop detection unit that detects a voltage drop of the backup power supply unit; a backup power supply detection switch unit that is interposed between the backup power supply unit and the backup power supply voltage drop detection unit; a reset flag unit that stores the reset state of the device power supply; and a reset mask unit that controls a switch of the backup power supply detection switch unit according to a flag state signal from the reset flag unit and a mask control signal from the control unit, The control unit is a reset circuit for an on-board control device that performs termination processing of the removable memory after the device power supply voltage drop detection unit detects a voltage drop of the device power supply.

[0069] (Aspect 2) In the reset circuit of the on-board control device of aspect 1, A reset circuit for a railway on-board control device, characterized in that the control unit performs termination processing of the removable memory by using a drop detection signal from the device power supply voltage drop detection unit, which detects a voltage drop in the device power supply, as an interrupt input signal to the control unit.

[0070] (Aspect 3) In the reset circuit of the on-board control device of aspect 1 or aspect 2, A reset circuit for a railway on-board control device, characterized in that the removable memory termination processing is a process in which the control unit stops access to the removable memory and controls the removable memory power control unit to cut off power to the removable memory.

[0071] (Aspect 4) In the reset circuit of the on-board control device of any one of aspects 1 to 3, a reset circuit for an on-board control device, characterized in that the reset flag unit receives a drop detection signal from the device power supply voltage drop detection unit, which detects a voltage drop in the device power supply, and when the signal is released, stores the signal as a reset occurrence state and outputs a reset occurrence flag state signal to the reset mask unit.

[0072] (Aspect 5) In the reset circuit of the on-board control device of aspect 4, The reset circuit for a railway on-board control device is characterized in that the control unit outputs a mask control signal to the reset mask unit to release the mask after completing the termination process of the removable memory.

[0073] (Aspect 6) In the reset circuit of the on-board control device of aspect 5, a reset circuit for an on-board control device for railway vehicles, characterized in that when the reset mask unit receives a flag state signal indicating a reset occurrence from the reset flag unit and a mask control signal for releasing the mask from the control unit, the reset mask unit controls to open a switch in a backup power supply detection switch unit, thereby reducing the voltage input to the backup power supply voltage drop detection unit.

[0074] (Aspect 7) In the reset circuit of the on-board control device of any one of aspects 1 to 6, When the backup power supply voltage drop detection unit detects a voltage drop, it outputs a drop detection signal to the control unit; A reset circuit for a railway on-board control device, characterized in that when the control unit receives the drop detection signal from the backup power supply voltage drop detection unit, it transitions to a reset state in which the software of the control unit is not operated after terminating the removable memory.

[0075] (Aspect 8) a control unit that operates on power backed up by the backup power unit and controls access to the removable memory; a removable memory power control unit that controls the power of the removable memory; a backup power supply voltage drop detection unit that detects a voltage drop in the backup power supply; a backup power supply detection switch unit that is interposed between the backup power supply unit and the backup power supply voltage drop detection unit; a reset flag unit that stores a reset state of the device power supply; and a reset mask unit that controls a switch of the backup power supply detection switch unit according to a flag state signal from the reset flag unit and a mask control signal from the control unit, A reset method for a railway on-board control device, comprising a step in which the control unit performs a termination process for the removable memory after the device power supply voltage drop detection unit detects a voltage drop of the device power supply. [Explanation of symbols]

[0076] 11...device power supply, 12...backup power supply unit, 13...device power supply voltage drop detection unit, 14...removable memory control unit, 15...reset flag unit, 16...reset mask unit, 17...backup power supply voltage drop detection unit, 18...removable memory, 19...removable memory power supply control unit, 20...backup power supply detection switch unit, 21...circuit unit, 101...drop detection signal, 102...flag state signal, 103...drop detection signal, 104...mask control signal, 105...control signal, 106...flag clear signal, 107...flag clear signal, 108...step, 110...data signal, 120...backup power supply detection switch unit , 201...power backup range, 300...computer system, 302...processor, 302A, 302B...processing unit, 304...memory, 306...memory bus, 308...I / O bus, 309...bus interface unit, 310...I / O bus interface unit, 312...terminal interface unit, 314...storage interface, 316...I / O device interface, 318...network interface, 320...user I / O device, 322...storage device, 324...display system, 326...display device, 330...network, 350...latent factor identification application

Claims

1. a device power supply that supplies power to a reset circuit; a device power supply voltage drop detection unit that detects a voltage drop of the device power supply; a backup power supply unit that generates backup power from the device power supply; a detachable nonvolatile removable memory; a control unit that operates on power backed up by the backup power supply unit and controls access to the removable memory; a removable memory power supply control unit that controls the power supply of the removable memory; a backup power supply voltage drop detection unit that detects a voltage drop of the backup power supply unit; a backup power supply detection switch unit that is interposed between the backup power supply unit and the backup power supply voltage drop detection unit; a reset flag unit that stores the reset state of the device power supply; and a reset mask unit that controls a switch of the backup power supply detection switch unit according to a flag state signal from the reset flag unit and a mask control signal from the control unit, The control unit is a reset circuit for an on-board railway control device that performs termination processing of the removable memory after the device power supply voltage drop detection unit detects a voltage drop of the device power supply.

2. 2. The reset circuit for a railway on-board control device according to claim 1, A reset circuit for a railway on-board control device, characterized in that the control unit performs termination processing of the removable memory by using a drop detection signal from the device power supply voltage drop detection unit, which detects a voltage drop in the device power supply, as an interrupt input signal to the control unit.

3. 2. The reset circuit for a railway on-board control device according to claim 1, A reset circuit for a railway on-board control device, characterized in that the termination processing of the removable memory is a process in which the control unit stops access to the removable memory and controls the removable memory power control unit to cut off power to the removable memory.

4. 2. The reset circuit for a railway on-board control device according to claim 1, a reset circuit for an on-board control device, characterized in that the reset flag unit receives a drop detection signal from the device power supply voltage drop detection unit, which detects a voltage drop in the device power supply, and when the signal is released, stores the signal as a reset occurrence state and outputs a reset occurrence flag state signal to the reset mask unit.

5. 5. The reset circuit for a railway on-board control device according to claim 4, The reset circuit for a railway on-board control device is characterized in that the control unit outputs a mask control signal to the reset mask unit to release the mask after completing the termination process of the removable memory.

6. 6. The reset circuit for a railway on-board control device according to claim 5, a reset circuit for an on-board control device for railway vehicles, characterized in that when the reset mask unit receives a flag state signal indicating a reset occurrence from the reset flag unit and a mask control signal for releasing the mask from the control unit, the reset mask unit controls to open a switch in a backup power supply detection switch unit, thereby reducing the voltage input to the backup power supply voltage drop detection unit.

7. 2. The reset circuit for a railway on-board control device according to claim 1, When the backup power supply voltage drop detection unit detects a voltage drop, it outputs a drop detection signal to the control unit; A reset circuit for a railway on-board control device, characterized in that when the control unit receives the drop detection signal from the backup power supply voltage drop detection unit, it transitions to a reset state in which the software of the control unit is not operated after terminating the removable memory.

8. a reset method using a reset circuit comprising: a device power supply for supplying power to a reset circuit; device power supply voltage drop detection means for detecting a voltage drop of the device power supply; backup power supply means for generating backup power from the device power supply; a detachable nonvolatile removable memory; control means operated by power backed up by the backup power supply means and for controlling access to the removable memory; removable memory power supply control means for controlling the power supply of the removable memory; backup power supply voltage drop detection means for detecting a voltage drop of the backup power supply; backup power supply detection switch means interposed between the backup power supply means and the backup power supply voltage drop detection means; reset flag means for storing a reset state of the device power supply; and reset mask means for controlling a switch of the backup power supply detection switch means in response to a flag state signal from the reset flag means and a mask control signal from the control means, A method for resetting a railway on-board control device, comprising a step in which the control means performs termination processing of the removable memory after the device power supply voltage drop detection means detects a voltage drop of the device power supply.

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