Manufacturing method of piezoelectric element

Abstract

To provide a manufacturing method of a piezoelectric element, capable of improving a yield.SOLUTION: A manufacturing method of a piezoelectric element, includes steps of: forming a lower electrode onto an insulation substrate; coating a precursor solution to the insulation substrate and the lower electrode; drying the precursor solution by burning; forming a first precursor layer; patterning the first precursor layer in a plurality of island shapes so as to be positioned onto the lower electrode; performing a crystallization of the first precursor layer in the island shape by burning; and forming a first piezoelectric layer.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] An embodiment of the present invention relates to a method for manufacturing a piezoelectric element. [Background technology]

[0002] Piezoelectric elements include those that are constructed by sandwiching a piezoelectric layer made of a piezoelectric material that exhibits electromechanical conversion function, such as crystallized piezoelectric ceramics, between two electrodes. Such piezoelectric elements can be deformed by applying a voltage between the two electrodes, and can be used, for example, as actuators.

[0003] A known method for forming a piezoelectric layer is to grow crystals on a silicon wafer using sputtering. However, silicon wafers are not suitable for manufacturing large-area devices, so expanding the device area increases manufacturing costs, resulting in expensive products. Therefore, to expand the device area, it is effective to manufacture the device using a glass substrate. That is, a method of forming a piezoelectric layer on a glass substrate is used.

[0004] The method of forming a piezoelectric layer by sputtering requires a high-temperature process at around 600°C, which can cause deformation of the glass substrate. Therefore, a method of forming a piezoelectric layer below the heat-resistant temperature of the glass substrate is used, in which a sol-gel liquid is applied to the glass substrate and then baked to crystallize it. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2012-49161 [Patent Document 2] International Publication No. 2014 / 185274 [Patent Document 3] International Publication No. 2017 / 038676 [Patent Document 4] Special Publication No. 2008-522426 Summary of the Invention [Problem to be solved by the invention]

[0006] An object of this embodiment is to provide a method for manufacturing a piezoelectric element that can improve the yield. [Means for solving the problem]

[0007] According to this embodiment, there is provided a method for manufacturing a piezoelectric element, which includes forming a lower electrode on an insulating substrate, applying a precursor solution onto the insulating substrate and the lower electrode, drying the precursor solution by firing to form a first precursor layer, patterning the first precursor layer into a plurality of islands so as to be located on the lower electrode, and crystallizing the island-shaped first precursor layer by firing to form a first piezoelectric layer. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a schematic plan view of an electronic device according to the present embodiment. [Figure 2] FIG. 2 is a cross-sectional view of the piezoelectric element shown in FIG. [Figure 3] FIG. 3 is a diagram showing a process of forming a lower electrode on an insulating substrate. [Figure 4] FIG. 4 is a diagram showing the process of applying the first precursor solution. [Figure 5] FIG. 5 is a diagram showing a step of patterning the first precursor layer. [Figure 6] FIG. 6 is a diagram showing a step of firing the island-shaped first precursor layer. [Figure 7] FIG. 7 is a diagram showing the process of applying the precursor solution for the second time. [Figure 8] FIG. 8 is a diagram showing a step of patterning the second precursor layer. [Figure 9] FIG. 9 is a diagram showing a step of firing the island-shaped second precursor layer. [Figure 10]FIG. 10 is a diagram showing the piezoelectric layer formed by the above-mentioned manufacturing process. [Figure 11] FIG. 11 is a diagram showing another example of the configuration of an electronic device. [Figure 12] FIG. 12 is a diagram showing a detailed configuration of the piezoelectric layer of this embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0009] The present embodiment will be described below with reference to the drawings. The disclosure is merely an example, and appropriate modifications that a person skilled in the art can easily make while maintaining the gist of the invention are naturally included within the scope of the present invention. Furthermore, the drawings may be schematic in terms of the width, thickness, shape, etc. of each part compared to the actual embodiment for clarity of explanation, but these are merely examples and are not intended to limit the interpretation of the present invention. Furthermore, in this specification and each drawing, components that perform the same or similar functions as those described above with reference to the previous drawings are designated by the same reference numerals, and redundant detailed descriptions may be omitted as appropriate.

[0010] FIG. 1 is a schematic plan view of an electronic device 100 according to this embodiment. In this embodiment, a first direction D1, a second direction D2, and a third direction D3 are defined as shown in the figure. The first direction D1 and the second direction D2 are parallel to the main surface of the electronic device 100 and intersect with each other. The third direction D3 is perpendicular to the first direction D1 and the second direction D2 and corresponds to the thickness direction of the electronic device 100. In this embodiment, the first direction D1 and the second direction D2 intersect perpendicularly, but they may intersect at an angle other than perpendicular. In this specification, the direction toward the tip of the arrow indicating the third direction D3 is referred to as "up," and the direction opposite from the tip of the arrow is referred to as "down." In addition, it is assumed that an observation position for observing the electronic device 100 is located at the tip of the arrow indicating the third direction D3. Looking from this observation position toward the D1-D2 plane defined by the first direction D1 and the second direction D2 is referred to as a planar view.

[0011] The electronic device 100 includes an insulating substrate 10 and a plurality of piezoelectric elements 30. The insulating substrate 10 is made of glass. The plurality of piezoelectric elements 30 are located on the insulating substrate 10 and are arranged in a matrix in a first direction D1 and a second direction D2.

[0012] The piezoelectric element 30 includes a lower electrode EL1, an upper electrode EL2, and a piezoelectric layer PZ. One piezoelectric layer PZ and one upper electrode EL2 are located on one lower electrode EL1. In other words, the plurality of lower electrodes EL1, the plurality of piezoelectric layers PZ, and the plurality of upper electrodes EL2 are arranged in a matrix. The piezoelectric element 30 is electrically connected to a piezoelectric element drive circuit (not shown) and performs operations such as vibration and deformation based on signals from the piezoelectric element drive circuit. In the illustrated example, the lower electrode EL1, the upper electrode EL2, and the piezoelectric layer PZ are rectangular in plan view, but this is not a limitation.

[0013] Fig. 2 is a cross-sectional view of the piezoelectric element 30 shown in Fig. 1. The electronic device 100 further includes an insulating film IL and wiring WR. The bottom electrode EL1 is located on an insulating substrate 10. The bottom electrode EL1 includes, for example, a metal layer MT and a seed layer SD, as will be described later.

[0014] The upper electrode EL2 faces the lower electrode EL1 and is formed of, for example, titanium (Ti), tungsten (W), molybdenum tungsten (MoW), or the like.

[0015] The piezoelectric layer PZ is located between the lower electrode EL1 and the upper electrode EL2. The piezoelectric layer PZ is made of, for example, lead zirconate titanate (PZT).

[0016] The insulating film IL covers the insulating substrate 10 and the piezoelectric element 30. The insulating film IL is made of an inorganic insulating material such as silicon oxide (SiO), silicon nitride (SiN), or silicon oxynitride (SiON).

[0017] The wiring WR is located on the insulating film IL. The wiring WR is formed of a metal material such as aluminum (Al), titanium (Ti), molybdenum (Mo), or tungsten (W), or an alloy combining these metal materials, and may have a single-layer structure or a multilayer structure. The wiring WR is connected to the upper electrode EL2 via a contact hole CH formed in the insulating film IL.

[0018] Next, a manufacturing method for forming the piezoelectric element 30 on the insulating substrate 10 will be described with reference to FIGS.

[0019] FIG. 3 is a diagram showing a process of forming the lower electrode EL1 on the insulating substrate 10. As shown in FIG. In the illustrated example, the lower electrode EL1 includes a metal layer MT and a seed layer SD. First, the metal layer MT is formed over substantially the entire surface of the insulating substrate 10. The seed layer SD is formed on the metal layer MT. The metal layer MT and the seed layer SD are patterned together to form an island shape. The metal layer MT is formed using, for example, platinum (Pt). The seed layer SD is formed using, for example, lanthanum-doped lead titanate (PLT). The seed layer SD is used as a nucleus for crystal growth of the piezoelectric layer PZ.

[0020] The step of forming the seed layer SD may be omitted. Although not shown, various members such as a switching element, wiring, and an insulating film are positioned between the insulating substrate 10 and the lower electrode EL1.

[0021] FIG. 4 is a diagram showing the process of applying the precursor solution 1a for the first time. A precursor solution 1a is applied onto the insulating substrate 10 and the lower electrode EL1. The precursor solution 1a is applied by, for example, a spin coating method, an inkjet method, or a spray method. The precursor solution 1a contains metal elements that constitute the piezoelectric layer PZ.

[0022] Thereafter, the precursor solution 1a is dried by baking to form a first precursor layer 1b. The precursor solution 1a is dried, for example, at about 200°C for about 10 minutes. Note that "drying" here refers to evaporating the solvent in the precursor solution 1a.

[0023] FIG. 5 is a diagram showing a step of patterning the first precursor layer 1b. Next, a resist 2 is patterned on the first precursor layer 1b. The resist 2 is formed in a position that overlaps with the lower electrode EL1. Then, the first precursor layer 1b is wet-etched. That is, in the step shown in FIG. 5, the first precursor layer 1b is patterned into a plurality of islands that are located above the lower electrode EL1.

[0024] FIG. 6 is a diagram showing a process of firing the island-shaped first precursor layer 1b. Next, the island-shaped first precursor layer 1b is crystallized by baking to form the first piezoelectric layer L1. The baking for crystallizing the first precursor layer 1b is performed, for example, at about 500° C. for about 30 minutes.

[0025] The above steps form the first piezoelectric layer L1. The first piezoelectric layer L1 has a thickness of approximately 200 nm. By repeating the steps shown in FIGS. 4 to 6, island-shaped piezoelectric layers are stacked, and the piezoelectric layer PZ can be formed to a desired thickness. For example, to form a piezoelectric layer PZ with a thickness of approximately 2 μm, the steps shown in FIGS. 4 to 6 are repeated approximately 10 times.

[0026] The baking temperature for drying the precursor solution 1a and the baking temperature for crystallizing the first precursor layer 1b are equal to or lower than the heat-resistant temperature of the insulating substrate 10, which is a glass substrate. Therefore, even if the insulating substrate 10 is exposed to the above baking temperatures, deformation of the insulating substrate 10 can be suppressed.

[0027] FIG. 7 is a diagram showing the process of applying the precursor solution 1a for the second time. A precursor solution 1a is applied onto the insulating substrate 10, the lower electrode EL1, and the first piezoelectric layer L1, and then the precursor solution 1a is dried by baking to form a second precursor layer 1c.

[0028] FIG. 8 is a diagram showing a step of patterning the second precursor layer 1c. Next, a resist 2 is patterned on the second precursor layer 1c. The resist 2 is formed in a position that overlaps with the first piezoelectric layer L1. Then, the second precursor layer 1c is wet-etched. That is, in the step shown in FIG. 8, the second precursor layer 1c is patterned into a plurality of islands that are located on the first piezoelectric layer L1.

[0029] FIG. 9 is a diagram showing a step of firing the island-shaped second precursor layer 1c. Next, the island-shaped second precursor layer 1c is crystallized by firing to form the second piezoelectric layer L2.

[0030] The second piezoelectric layer L2 is formed by the above steps. The second piezoelectric layer L2 has a thickness of about 200 nm.

[0031] FIG. 10 is a diagram showing the piezoelectric layer PZ formed by the above-described manufacturing process. In the illustrated example, each piezoelectric layer PZ is composed of a first piezoelectric layer L1 to a tenth piezoelectric layer L10. The first piezoelectric layer L1 to the tenth piezoelectric layer L10 are stacked in the third direction D3. Note that the number of layers constituting the piezoelectric layer PZ is not limited to the illustrated example.

[0032] After forming the piezoelectric layer PZ, the upper electrode EL2 is patterned on the piezoelectric layer PZ. Although not shown, an insulating film IL is formed on the upper electrode EL2 as shown in FIG. 2, and a wiring WR is patterned on the insulating film IL.

[0033] Next, the problem with this embodiment will be described. Unlike the above-described configuration, assume that the piezoelectric layer PZ is not patterned and is formed over substantially the entire surface of the insulating substrate 10. When the precursor layer is crystallized by firing to form the piezoelectric layer, the larger the area of ​​the piezoelectric layer, the more likely cracks are to occur. Furthermore, when the piezoelectric layer is crystallized over a large area, the stress in the film increases, which can warp the insulating substrate 10, making it impossible to carry out subsequent processes.

[0034] According to this embodiment, the precursor layer is patterned to a desired size before being subjected to crystallization firing. In other words, by performing crystallization firing after reducing the area of ​​the precursor layer, stress is distributed to each pattern, preventing warping of the insulating substrate 10 and cracks in the piezoelectric layer. The present invention allows for the fabrication of large-area devices equipped with piezoelectric elements. It also improves yield.

[0035] In the illustrated example, the lower electrodes EL1 are separated from one another as individual electrodes in each piezoelectric element 30, but may be connected to one another as a common electrode. Similarly, in the illustrated example, the upper electrodes EL2 are separated from one another as individual electrodes in each piezoelectric element 30, but may be connected to one another as a common electrode.

[0036] Fig. 11 is a diagram showing another example of the configuration of the electronic device 100. The configuration shown in Fig. 11 differs from the configuration shown in Fig. 1 in the shapes of the lower electrode EL1 and the upper electrode EL2. The plurality of bottom electrodes EL1 extend in the first direction D1 and are aligned in the second direction D2. The plurality of top electrodes EL2 extend in the second direction D2 and are aligned in the first direction D1. The piezoelectric layer PZ is located at the intersection of the bottom electrode EL1 and the top electrode EL2. The piezoelectric layer PZ is also located between the bottom electrode EL1 and the top electrode EL2 in the third direction D3. In the configuration shown in FIG. 11, the plurality of piezoelectric layers PZ are aligned in the first direction D1 on one bottom electrode EL1. The top electrode EL2 may be formed in an island shape as shown in FIG. 1. In this configuration as well, the same effects as those described above can be obtained.

[0037] FIG. 12 is a diagram showing a detailed configuration of the piezoelectric layer PZ of this embodiment. The first piezoelectric layer L1 has an end EG1. The second piezoelectric layer L2 has an end EG2. The end EG1 of the first piezoelectric layer L1 does not overlap with the end EG2 of the second piezoelectric layer L2 in the third direction D3. Similarly, the ends of the third piezoelectric layer L3 to the tenth piezoelectric layer L10 do not overlap with the end of the piezoelectric layer located one layer below. The first piezoelectric layer L1 to the tenth piezoelectric layer L10 are formed by individually patterning, and therefore the ends are not aligned with each other.

[0038] As described above, according to this embodiment, it is possible to obtain a method for manufacturing a piezoelectric element that can improve the yield.

[0039] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the inventions and their equivalents as defined in the claims. [Explanation of symbols]

[0040] 10...insulating substrate, EL1...lower electrode, EL2...upper electrode, 1a... precursor solution, 1b... first precursor layer, 1c... second precursor layer, L1...first piezoelectric layer, L2...second piezoelectric layer, EG1, EG2...end portions.

Claims

1. A lower electrode is formed on a glass substrate, applying a first precursor solution onto the glass substrate and the lower electrode; drying the first precursor solution by baking to form a first precursor layer; patterning the first precursor layer into a plurality of islands positioned on the lower electrode; The island-shaped first precursor layer is crystallized by firing to form a first piezoelectric layer; After forming the first piezoelectric layer, a second precursor solution is applied onto the glass substrate and the first piezoelectric layer; drying the second precursor solution by baking to form a second precursor layer; patterning the second precursor layer into a plurality of islands so as to be located on the first piezoelectric layer; The island-shaped second precursor layer is crystallized by firing to form a second piezoelectric layer; A method for manufacturing a piezoelectric element, further comprising forming a patterned upper electrode after forming the second piezoelectric layer.

2. The method for manufacturing a piezoelectric element according to claim 1 , wherein an end portion of the first piezoelectric layer does not overlap an end portion of the second piezoelectric layer.

3. One of the first piezoelectric layers is located on one of the lower electrodes, The method for manufacturing a piezoelectric element according to claim 1 , wherein the plurality of lower electrodes and the plurality of first piezoelectric layers are arranged in a matrix.

4. the plurality of lower electrodes extend in a first direction and are arranged in a second direction intersecting the first direction; 3. The method for manufacturing a piezoelectric element according to claim 1, wherein a plurality of the first piezoelectric layers are arranged in the first direction on one of the lower electrodes.

Images