Program, recording medium, and simulation device

Abstract

Provided is a program for performing a simulation of a circuit comprising an antiferroelectric element. In the program, an equivalent circuit model of the antiferroelectric element is set. The equivalent circuit model includes, between a first terminal and a second terminal, a ferroelectric element, a linear resistance, a first transistor, and a second transistor. The first terminal is connected to one of a pair of electrodes of the ferroelectric element and to a first terminal of the linear resistance. The other of the pair of electrodes of the ferroelectric element is connected to one of a source electrode and a drain electrode of the first transistor. A gate electrode of the first transistor is connected to a gate electrode of the second transistor and one of a source electrode and a drain electrode of the second transistor, and to a second terminal of the linear resistance. The second terminal is connected to the other of the source electrode and drain electrode of the first transistor, and to the other of the source electrode and drain electrode of the second transistor.

Description

[Technical Field]

[0001] One aspect of the present invention relates to an equivalent circuit model, a program, a simulation device, and a recording medium.

[0002] Note that one aspect of the present invention is not limited to the above-mentioned technical fields. The technical fields of the inventions disclosed in this specification relate to products, methods, or manufacturing methods. Alternatively, one aspect of the present invention relates to processes, machines, manufactures, or compositions of matter. [Background technology]

[0003] Ferroelectric materials and applications are being actively researched. For example, according to Non-Patent Document 1, research and development of memory arrays using ferroelectrics is being actively conducted. In addition, materials that exhibit antiferroelectricity are expected to be applied to circuits such as DRAM (Dynamic Random Access Memory).

[0004] Furthermore, circuit simulators are used in circuit design using transistors. Circuit simulators have the function of verifying various circuit operations through simulation. Simulations are performed using device models that approximate the electrical characteristics of transistors, diodes, capacitance, resistance, etc. In order to improve the accuracy of simulations, it is necessary to improve the accuracy of device models. Non-Patent Document 2 proposes a device model having ferroelectricity. Note that in this specification and the like, the device model may be referred to as a circuit model, an equivalent circuit, an equivalent circuit model, etc. [Prior art documents] [Non-patent literature]

[0005] [Non-Patent Document 1] TS Boescke, et al, “Ferroelectricity in hafnium oxide thin films”, Applied Physics Letters, 2011, vol 99, p. 102903 [Non-patent document 2] Y. Ishibashi, “Polarization Reversal Kinetics in Ferroelectric Liquid Crystals”, Japanese Journal of Applied Physics, 1985, vol. 24, Suppl. 24-2, pp. 126-129 Summary of the Invention [Problem to be solved by the invention]

[0006] As mentioned above, Non-Patent Document 2 proposes a device model having ferroelectricity. However, a device model having antiferroelectricity is not known. Therefore, it is difficult to perform a simulation of a circuit including an antiferroelectric element.

[0007] In view of the above, an object of one embodiment of the present invention is to provide an equivalent circuit model of an antiferroelectric element. Another object of one embodiment of the present invention is to provide a program in which an equivalent circuit model of an antiferroelectric element is set. Another object of one embodiment of the present invention is to provide a recording medium on which the program is recorded. Another object of one embodiment of the present invention is to provide a simulation device having the program.

[0008] Note that the description of these problems does not preclude the existence of other problems. Note that one embodiment of the present invention does not necessarily solve all of these problems. Note that problems other than these will become apparent from the description of the specification, drawings, claims, etc., and it is possible to extract other problems from the description of the specification, drawings, claims, etc. [Means for solving the problem]

[0009] One aspect of the present invention is an equivalent circuit model of an antiferroelectric element for simulation. One of a pair of electrodes of the antiferroelectric element is electrically connected to a first terminal, and the other of the pair of electrodes of the antiferroelectric element is electrically connected to a second terminal. The equivalent circuit model of the antiferroelectric element includes a ferroelectric element, a linear resistor, a first transistor, and a second transistor between the first terminal and a second terminal. The first terminal is electrically connected to one of the pair of electrodes of the ferroelectric element and the first terminal of the linear resistor. The other of the pair of electrodes of the ferroelectric element is electrically connected to one of the source and drain electrodes of the first transistor. The gate electrode of the first transistor is electrically connected to the gate electrode of the second transistor, one of the source and drain electrodes of the second transistor, and the second terminal of the linear resistor. The second terminal is electrically connected to the other of the source and drain electrodes of the first transistor and the other of the source and drain electrodes of the second transistor.

[0010] Another aspect of the present invention is a program for execution by a computer, in which an equivalent circuit model of an antiferroelectric element is set. One of a pair of electrodes of the antiferroelectric element is electrically connected to a first terminal, and the other of the pair of electrodes of the antiferroelectric element is electrically connected to a second terminal. The equivalent circuit model of the antiferroelectric element includes a ferroelectric element, a linear resistor, a first transistor, and a second transistor between the first terminal and the second terminal. The first terminal is electrically connected to one of the pair of electrodes of the ferroelectric element and the first terminal of the linear resistor, the other of the pair of electrodes of the ferroelectric element is electrically connected to one of the source electrode and drain electrode of the first transistor, the gate electrode of the first transistor is electrically connected to the gate electrode of the second transistor, one of the source electrode and drain electrode of the second transistor, and the second terminal of the linear resistor, and the second terminal is electrically connected to the other of the source electrode and drain electrode of the first transistor and the other of the source electrode and drain electrode of the second transistor.

[0011] Another aspect of the present invention is a computer-readable recording medium on which the above program is recorded.

[0012] Another aspect of the present invention is a simulation device that performs a simulation by causing a computer to execute the program.

[0013] Another aspect of the present invention is a method for generating an equivalent circuit model of an antiferroelectric element, which includes a first step of inputting an equivalent circuit model of the antiferroelectric element, a second step of inputting initial values ​​of parameters related to the equivalent circuit model of the antiferroelectric element, a third step of inputting measured values ​​of the PV characteristics or the IV characteristics of the antiferroelectric element, and a fourth step of adjusting the initial values ​​of parameters related to the equivalent circuit model of the antiferroelectric element.

[0014] Another aspect of the present invention is an equivalent circuit model for simulation of a ferroelectric element. One of a pair of electrodes of the ferroelectric element is electrically connected to a first terminal, and the other of the pair of electrodes of the ferroelectric element is electrically connected to a second terminal. The equivalent circuit model includes an antiferroelectric element and a linear resistor between the first terminal and the second terminal. The first terminal is electrically connected to one of the pair of electrodes of the antiferroelectric element and the first terminal of the linear resistor, and the second terminal is electrically connected to the other of the pair of electrodes of the antiferroelectric element and the second terminal of the linear resistor. [Effects of the Invention]

[0015] According to one aspect of the present invention, an equivalent circuit model of an antiferroelectric element can be provided. Also, according to another aspect of the present invention, a program in which an equivalent circuit model of an antiferroelectric element is set can be provided. Also, according to another aspect of the present invention, a recording medium on which the program is recorded can be provided. Also, according to another aspect of the present invention, a simulation device having the program can be provided.

[0016] From the above, it is possible to carry out a simulation of a circuit including an antiferroelectric element.

[0017] Note that the description of these effects does not preclude the existence of other effects. Note that one embodiment of the present invention does not necessarily have all of these effects. Note that effects other than these will become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract other effects from the description in the specification, drawings, claims, etc. [Brief explanation of the drawings]

[0018] 1A and 1B are diagrams illustrating the PV characteristics and IV characteristics of the sample, respectively. 2A and 2B are diagrams illustrating the PV characteristics and IV characteristics of the sample, respectively. Fig. 3A is a diagram illustrating the configuration of an antiferroelectric element, Fig. 3B is a diagram illustrating the circuit symbol of the antiferroelectric element, and Fig. 3C and Fig. 3D are diagrams illustrating an equivalent circuit model of the antiferroelectric element. Fig. 4A is a diagram showing a circuit symbol of a ferroelectric element, and Fig. 4B is a diagram explaining an equivalent circuit model of a ferroelectric element. FIG. 5 is a flowchart for generating an equivalent circuit model of an antiferroelectric element. FIG. 6 is a block diagram illustrating an example of the configuration of a simulation device. DETAILED DESCRIPTION OF THE INVENTION

[0019] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be readily understood by those skilled in the art that various changes in form and details can be made without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments shown below. In the configuration of the invention described below, the same parts or parts having similar functions will be denoted by the same reference numerals in different drawings, and repeated explanations will be omitted.

[0020] Furthermore, the position, size, range, etc. of each component shown in the drawings, etc. may not represent the actual position, size, range, etc. in order to facilitate understanding of the invention. Therefore, the disclosed invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings, etc. For example, in an actual manufacturing process, a resist mask, etc. may be unintentionally eroded by a process such as etching, but this may not be reflected in the drawings in order to facilitate understanding.

[0021] In addition, in top views (also called "plan views"), perspective views, and the like, some components may be omitted to make the drawings easier to understand.

[0022] Furthermore, the terms "electrode" and "wiring" used in this specification and the like do not limit the functionality of these components. For example, an "electrode" may be used as part of a "wiring," and vice versa. Furthermore, the terms "electrode" and "wiring" also include cases where multiple "electrodes" or "wirings" are integrally formed.

[0023] In addition, in this specification, a "terminal" in an electric circuit refers to a portion where a current is input or output, a voltage is input or output, and / or a signal is received or transmitted. Therefore, a part of a wiring or an electrode may function as a terminal.

[0024] In this specification, the terms "above" and "below" do not limit the positional relationship of components to being directly above or below, and being in direct contact with each other. For example, the expression "electrode B on insulating layer A" does not require that electrode B be formed in direct contact with insulating layer A, and does not exclude the inclusion of other components between insulating layer A and electrode B.

[0025] In addition, the functions of the source and drain are interchangeable depending on the operating conditions, such as when transistors of different polarities are used or when the direction of current changes during circuit operation, making it difficult to define which is the source and which is the drain. For this reason, the terms source and drain can be used interchangeably in this specification.

[0026] Furthermore, in this specification, "electrically connected" includes both direct connection and connection via "something that has some kind of electrical effect." Here, "something that has some kind of electrical effect" is not particularly limited as long as it allows electrical signals to be transmitted and received between the connected objects. Therefore, even when the expression "electrically connected" is used, in an actual circuit, there may be no physical connection and only wiring may be extended.

[0027] In this specification, when referring to counting values ​​and measurement values, terms such as "same," "equal," "uniform," etc. are used, they include an error of plus or minus 10%, unless otherwise specified.

[0028] Furthermore, voltage often refers to the potential difference between a certain potential and a reference potential (for example, ground potential or source potential). Therefore, voltage and potential can often be used interchangeably. In this specification and the like, unless otherwise specified, voltage and potential can be used interchangeably.

[0029] It should be noted that even when written as "semiconductor," if the conductivity is sufficiently low, it will have the properties of an "insulator." Therefore, it is also possible to use "semiconductor" instead of "insulator." In this case, the boundary between "semiconductor" and "insulator" is vague, and it is difficult to strictly distinguish between the two. Therefore, "semiconductor" and "insulator" described in this specification may be read interchangeably.

[0030] Furthermore, even when written as "semiconductor," if the conductivity is sufficiently high, it will have the properties of a "conductor." Therefore, it is also possible to use "semiconductor" instead of "conductor." In this case, the boundary between "semiconductor" and "conductor" is vague, and it is difficult to strictly distinguish between the two. Therefore, "semiconductor" and "conductor" described in this specification may be read interchangeably.

[0031] Note that ordinal numbers such as "first" and "second" used in this specification are used to avoid confusion between components, and do not indicate any order or ranking, such as the order of processes or stacking. Furthermore, even if a term does not have an ordinal number in this specification, an ordinal number may be added in the claims to avoid confusion between components. Furthermore, even if a term has an ordinal number in this specification, a different ordinal number may be added in the claims. Furthermore, even if a term has an ordinal number in this specification, the ordinal number may be omitted in the claims.

[0032] In this specification and the like, the "on state" of a transistor refers to a state in which the source and drain of the transistor are considered to be electrically short-circuited (also referred to as a "conductive state"). The "off state" of a transistor refers to a state in which the source and drain of the transistor are considered to be electrically disconnected (also referred to as a "non-conductive state").

[0033] In this specification, the term "on-state current" may refer to a current that flows between the source and drain of a transistor when the transistor is on, and the term "off-state current" may refer to a current that flows between the source and drain of a transistor when the transistor is off.

[0034] In this specification, the high power supply potential VDD (hereinafter simply referred to as "VDD" or "H potential") refers to a power supply potential that is higher than the low power supply potential VSS. The low power supply potential VSS (hereinafter simply referred to as "VSS" or "L potential") refers to a power supply potential that is lower than the high power supply potential VDD. The ground potential can also be used as VDD or VSS. For example, when VDD is the ground potential, VSS is a potential lower than the ground potential, and when VSS is the ground potential, VDD is a potential higher than the ground potential.

[0035] In this specification and the like, a gate refers to a gate electrode and a part or all of a gate wiring, and a gate wiring refers to a wiring for electrically connecting the gate electrode of at least one transistor to another electrode or another wiring.

[0036] In this specification, the term "source" refers to a source region, a source electrode, and part or all of a source wiring. The term "source region" refers to a region of a semiconductor layer whose resistivity is equal to or less than a certain value. The term "source electrode" refers to a conductive layer connected to the source region. The term "source wiring" refers to wiring that electrically connects the source electrode of at least one transistor to another electrode or wiring.

[0037] In this specification, the term "drain" refers to a part or all of the drain region, drain electrode, and drain wiring. The term "drain region" refers to a region of the semiconductor layer whose resistivity is equal to or less than a certain value. The term "drain electrode" refers to a conductive layer connected to the drain region. The term "drain wiring" refers to wiring that electrically connects the drain electrode of at least one transistor to another electrode or wiring.

[0038] (Embodiment 1) In this embodiment, an equivalent circuit model of an antiferroelectric element and a program in which the equivalent circuit model of the antiferroelectric element is set according to one embodiment of the present invention will be described with reference to drawings.

[0039] In this specification and the like, an antiferroelectric element is defined as having an antiferroelectric substance and a pair of conductors arranged to sandwich the antiferroelectric substance. Note that the pair of conductors may function as electrodes.

[0040] An equivalent circuit model of an antiferroelectric element can be expressed using a ferroelectric element and a linear resistor. First, it will be explained that a sample of an antiferroelectric element can be expressed using a sample of a ferroelectric element and a sample of a linear resistor.

[0041] First, a sample of a ferroelectric element is prepared. The remanent polarization of the sample of the ferroelectric element is 12.4 μC / cm 2 (1.24×10 -5 C / cm 2 ) Hereinafter, this ferroelectric element sample will be referred to as Sample 11.

[0042] The current flowing through sample 11 is I fe Then, the polarization P of sample 11 fe is calculated by the following formula (1): fe is the current I flowing through sample 11 fe is calculated by integrating the above with respect to time.

[0043]

number

[0044] where A fe is the electrode area of ​​sample 11.

[0045] 1A shows the polarization (P)-voltage (V) characteristics expected for sample 11. In FIG. 1A, the horizontal axis represents the voltage [V] input to sample 11, and the vertical axis represents the polarization [C / cm 2 ]. Note that applying a voltage to a ferroelectric element corresponds to applying an external electric field. As shown in FIG. 1A, Sample 11 has hysteresis characteristics.

[0046] 1B shows the current (I)-voltage (V) characteristics expected for sample 11. In FIG. 1B, the horizontal axis represents the voltage [V] input to sample 11, and the vertical axis represents the current [A] output from sample 11.

[0047] Next, a linear resistor sample is prepared. The resistance value of the linear resistor sample is 38 kΩ. Hereinafter, this linear resistor sample will be referred to as sample 12.

[0048] Sample 12 has the same current I fe In this case, the current flowing through the sample 12 is assumed to be I res Let's say.

[0049] Next, sample 13 is prepared. The current flowing through sample 13 is I afe Let's say.

[0050] Here, the current I flowing through sample 11 fe and the current I flowing through sample 12 res and the current I flowing through sample 13 afe The relationship between is defined by the following formula (2).

[0051]

number

[0052] Current I flowing through sample 11 fe The current I flows from sample 12 to res The IV characteristics when subtracting is shown in Figure 2B. From the definition of equation (2), the waveform shown in Figure 2B can be rephrased as the IV characteristics of sample 13. In Figure 2B, the horizontal axis represents the voltage [V] input to sample 13, and the vertical axis represents the current [A] output from sample 13.

[0053] Polarization P of sample 13 afe is calculated by the following formula (3): afeis the current I flowing through sample 13 afe is calculated by integrating the above with respect to time.

[0054]

number

[0055] where A afe is the electrode area of ​​sample 13.

[0056] 2A shows the PV characteristics of sample 13. In FIG. 2A, the horizontal axis represents the voltage [V] input to sample 13, and the vertical axis represents the polarization [C / cm 2 As shown in FIG. 2A, Sample 13 exhibits increased polarization as the voltage increases, but the polarization becomes almost zero when the voltage is set to 0 V. In other words, Sample 13 has no remanent polarization but has hysteresis characteristics. In other words, Sample 13 exhibits the characteristics of an antiferroelectric element.

[0057] Therefore, by taking the difference between the waveform showing the characteristics of the ferroelectric element and the current component derived from the linear resistance, a waveform showing the characteristics of the antiferroelectric element can be obtained.

[0058] From the above, the equivalent circuit model of an antiferroelectric element can be expressed using a ferroelectric element and a linear resistor. Also, the equivalent circuit model of a ferroelectric element can be expressed using an antiferroelectric element and a linear element.

[0059] <Equivalent circuit model of antiferroelectric element> An equivalent circuit model of an antiferroelectric element can be expressed using a ferroelectric element and a linear resistor. Here, the equivalent circuit model of an antiferroelectric element will be described with reference to Figures 3A to 3D.

[0060] 3A is a diagram illustrating the configuration of the antiferroelectric element 100. The antiferroelectric element 100 has a structure in which a conductor 103, an antiferroelectric material 104, and a conductor 105 are stacked. The conductor 103 is electrically connected to a terminal 101, and the conductor 105 is electrically connected to a terminal 102. The antiferroelectric material 104 is located between the conductors 103 and 105. The conductors 103 and 105 function as a pair of electrodes of the antiferroelectric element 100. The conductors 103 and 105 may be made of the same material or different materials.

[0061] 3B is a diagram showing a circuit symbol for the antiferroelectric element 100. One of a pair of electrodes of the antiferroelectric element 100 is electrically connected to a terminal 101, and the other of the pair of electrodes of the antiferroelectric element 100 is electrically connected to a terminal 102.

[0062] FIG. 3C is a diagram illustrating an equivalent circuit model 110 of the antiferroelectric element 100. As shown in FIG. 3C, the equivalent circuit model 110 of the antiferroelectric element 100 includes a ferroelectric element 111, a linear resistor 112, a transistor 113, and a transistor 114 between a terminal 101 and a terminal 102. The terminal 101 is electrically connected to one of a pair of electrodes of the ferroelectric element 111 and a first terminal of the linear resistor 112. The other of the pair of electrodes of the ferroelectric element 111 is electrically connected to one of a source electrode and a drain electrode of the transistor 113. The gate electrode of the transistor 113 is electrically connected to a gate electrode of the transistor 114, one of a source electrode and a drain electrode of the transistor 114, and a second terminal of the linear resistor 112. The terminal 102 is electrically connected to the other of the source electrode and the drain electrode of the transistor 113 and the other of the source electrode and the drain electrode of the transistor 114.

[0063] It should be noted that the equivalent circuit model 110 of the antiferroelectric element 100 is not limited to the configuration shown in Fig. 3C. As shown in Fig. 3D, the equivalent circuit model 110 of the antiferroelectric element 100 may have a configuration in which, compared to the equivalent circuit model 110 shown in Fig. 3C, the transistor 113 is replaced with a transistor 115 having a back gate, and the transistor 114 is replaced with a transistor 116 having a back gate. Alternatively, the equivalent circuit model 110 of the antiferroelectric element 100 may have a configuration in which one of the two transistors included in the equivalent circuit model 110 is a single-gate transistor and the other is a transistor having a back gate.

[0064] <Equivalent circuit model of ferroelectric element> As described above, the equivalent circuit model of a ferroelectric element can be expressed using an antiferroelectric element and a linear resistor. Here, the equivalent circuit model of a ferroelectric element will be explained using Figures 4A and 4B.

[0065] 4A is a diagram showing a circuit symbol for the ferroelectric element 150. One of a pair of electrodes of the ferroelectric element 150 is electrically connected to a terminal 151, and the other of the pair of electrodes of the ferroelectric element 150 is electrically connected to a terminal 152.

[0066] 4B is a circuit diagram illustrating an equivalent circuit model 160 of the ferroelectric element 150. As shown in FIG. 4B, the equivalent circuit model 160 of the ferroelectric element 150 includes an antiferroelectric element 161 and a linear resistor 162 between a terminal 151 and a terminal 152. The terminal 151 is electrically connected to one of a pair of electrodes of the antiferroelectric element 161 and a first terminal of the linear resistor 162. The terminal 152 is electrically connected to the other of the pair of electrodes of the antiferroelectric element 161 and a second terminal of the linear resistor 162.

[0067] <Program> Here, a program executed on a computer according to one aspect of the present invention will be described.

[0068] The above program has a function of generating an equivalent circuit model of an antiferroelectric element. Figure 5 is a flowchart showing the process of generating an equivalent circuit model of an antiferroelectric element.

[0069] First, the user inputs an equivalent circuit model of an antiferroelectric element (step S301).

[0070] Next, the user inputs initial values ​​of parameters related to the equivalent circuit model of the antiferroelectric element (step S302). Specifically, the user inputs initial values ​​of parameters related to the ferroelectric element, initial values ​​of parameters related to the linear resistor, and initial values ​​of parameters related to the transistor. Note that these initial values ​​may be set in advance.

[0071] Next, the measured values ​​of the PV characteristics or the IV characteristics of the antiferroelectric element are input (step S303). The user acquires the PV characteristics or the IV characteristics of the target antiferroelectric element in advance.

[0072] Next, parameters relating to the equivalent circuit model of the antiferroelectric element are adjusted so as to approach the actual measured values ​​of the PV characteristics or the IV characteristics of the antiferroelectric element input in step S303 (step S304). Specifically, one or more of the parameters relating to the ferroelectric element, the parameters relating to the linear resistance, and the parameters relating to the transistor are adjusted.

[0073] Next, it is determined whether the difference between the measured value of the PV characteristic or the measured value of the IV characteristic of the antiferroelectric element input in step S303 and the PV characteristic or the IV characteristic calculated from the equivalent circuit model of the antiferroelectric element is within the allowable range (step S305). If the difference is not within the allowable range (No), the process returns to step S304 and the parameters are adjusted again. If the difference is within the allowable range (Yes), the process ends.

[0074] As a result, an equivalent circuit model of an antiferroelectric element can be generated. The program may have a function for optimizing parameters related to the equivalent circuit model of an antiferroelectric element. This function automatically performs steps S304 and S305. The parameters may be optimized using an optimization algorithm such as the steepest descent method, or machine learning such as a neural network.

[0075] By setting the equivalent circuit model of the antiferroelectric element generated by the above method in a program, the program can execute a simulation of a circuit including the antiferroelectric element, such as a circuit including an antiferroelectric element used as a capacitor or a circuit including a DRAM having an antiferroelectric element.

[0076] The program for generating an equivalent circuit model of an antiferroelectric element may be different from the program for executing a simulation of a circuit including an antiferroelectric element, or may be incorporated into the program for executing a simulation of a circuit including an antiferroelectric element. Furthermore, the generated equivalent circuit model of an antiferroelectric element may be recorded in an auxiliary storage device or a database, and the equivalent circuit model of an antiferroelectric element recorded in the auxiliary storage device or the database may be accepted when executing a simulation of a circuit including an antiferroelectric element.

[0077] The structures, methods, and the like described in this embodiment mode can be used in appropriate combination with structures, methods, and the like described in other embodiments.

[0078] (Embodiment 2) In this embodiment, a simulation device 200 according to one aspect of the present invention will be described.

[0079] <Simulation device> 6 is a block diagram showing an example of the configuration of a simulation device 200. The simulation device 200 includes a control device 210, an arithmetic device 220, a storage device 230, an auxiliary storage device 240, an input / output device 250, and a communication device 260. Each device is electrically connected via a bus line 201.

[0080] [Control device 210, arithmetic device 220] The control device 210 has a function of controlling the operations of other devices. The arithmetic device 220 has a function of executing arithmetic processing related to simulation. As the arithmetic device 220, for example, a central processing unit (CPU) or the like can be used.

[0081] Furthermore, the control device 210 and / or the arithmetic device 220 may be realized by a PLD (Programmable Logic Device) such as an FPGA (Field Programmable Gate Array) and an FPAA (Field Programmable Analog Array).

[0082] The calculation results obtained by the calculation device 220 are output to the storage device 230 and / or the auxiliary storage device 240. The calculation results obtained by the calculation device 220 are also output to a display device (not shown) or a printer via the input / output device 250 and / or the communication device 260.

[0083] [Storage device 230] The storage device 230 has a function of storing programs and parameters related to the simulation operation, and is preferably at least partially rewritable. For example, the storage device 230 can include a volatile memory such as a random access memory (RAM) or a non-volatile memory such as a read only memory (ROM).

[0084] The RAM provided in the storage device 230 may be, for example, a DRAM. A part of the RAM is allocated as a memory space as a working space for the simulation device 200. The operating system, application programs, data, etc. stored in the auxiliary storage device 240 are loaded into the RAM for execution.

[0085] For example, when a computer is made to function as the simulation device 200, when a signal for starting a simulation program according to one embodiment of the present invention is input to the control device 210 via the input / output device 250 or the communication device 260, the control device 210 loads the simulation program stored in the auxiliary storage device 240 into the storage device 230. By loading the simulation program into the storage device 230, the computer can be made to function as the simulation device 200.

[0086] The control device 210 also loads various data, such as setting parameters, input via the input / output device 250 or the communication device 260 into the storage device 230. The arithmetic device 220 executes arithmetic processing using the programs and data loaded into the storage device 230. The auxiliary storage device 240 can also be used as the storage device 230. A cache provided inside the arithmetic device 220 can also be used as the storage device 230.

[0087] ROM can store BIOS (Basic Input / Output System), firmware, etc., which do not require rewriting. ROM can be mask ROM, OTPROM (One-Time Programmable Read Only Memory), EPROM (Erasable Programmable Read Only Memory), etc. EPROM can be UV-EPROM (Ultra-Violet Erasable Programmable Read Only Memory), which allows stored data to be erased by exposure to ultraviolet light, EEPROM (Electrically Erasable Programmable Read Only Memory), flash memory, etc.

[0088] A part or all of the simulation program may be stored in ROM.

[0089] [Auxiliary storage device 240] The auxiliary storage device 240 is a storage device for storing the operating system, application programs, data, etc. It may also store various parameters used by the arithmetic unit 220.

[0090] The auxiliary storage device 240 may be, for example, a storage device using nonvolatile storage elements such as flash memory, MRAM (Magnetoresistive Random Access Memory), PRAM (Phase change RAM), ReRAM (Resistive RAM), or FeRAM (Ferroelectric RAM), or a storage device using volatile storage elements such as DRAM or SRAM (Static RAM).Furthermore, a recording media drive such as a hard disk drive (HDD) or a solid state drive (SSD) may also be used.

[0091] Furthermore, for example, a storage device such as an HDD or SSD that is detachable via the input / output device 250 may be used as the auxiliary storage device 240. A media drive for a recording medium such as a DVD, such as a Blu-ray Disc (registered trademark), may also be used as the auxiliary storage device 240. A part or all of the simulation program may be recorded on the recording medium.

[0092] When a storage device placed outside the simulation device 200 is used as the auxiliary storage device 240, the communication device 260 may be used to input and output data to and from the simulation device 200 via wireless communication.

[0093] [Input / output device 250] The input / output device 250 has a function of controlling input and output of signals between external devices and the simulation device 200. Furthermore, an HDMI (registered trademark) terminal, a USB terminal, a LAN (Local Area Network) connection terminal, or the like may be used as an external port of the input / output device 250. Furthermore, the input / output device 250 may have a transmission / reception function for optical communication using infrared light, visible light, ultraviolet light, or the like.

[0094] [Communication device 260] The communication device 260 can perform communication via an antenna. For example, the communication device 260 controls a control signal for connecting the simulation device 200 to a computer network in response to a command from the arithmetic device 220 and transmits the control signal to the computer network. This allows the simulation device 200 to be connected to and communicate with computer networks such as the Internet, which is the foundation of the World Wide Web (WWW), an intranet, an extranet, a personal area network (PAN), a local area network (LAN), a campus area network (CAN), a metropolitan area network (MAN), a wide area network (WAN), or a global area network (GAN). When multiple communication methods are used, the device may have multiple antennas depending on the communication methods.

[0095] The communication device 260 may be provided with, for example, a high-frequency circuit (RF circuit) for transmitting and receiving RF signals. The high-frequency circuit is a circuit for converting between electromagnetic signals and electric signals in a frequency band defined by the laws of each country, and for communicating wirelessly with other communication devices using the electromagnetic signals. A practical frequency band is generally several tens of kilohertz to several tens of gigahertz. The high-frequency circuit connected to the antenna has a high-frequency circuit section compatible with multiple frequency bands, and the high-frequency circuit section may be configured to include an amplifier, a mixer, a filter, a DSP (Digital Signal Processor), an RF transceiver, etc. When performing wireless communication, communication standards such as LTE (Long Term Evolution), GSM (Global System for Mobile Communication: registered trademark), EDGE (Enhanced Data Rates for GSM Evolution), CDMA2000 (Code Division Multiple Access 2000), WCDMA (Wideband Code Division Multiple Access: registered trademark), or IEEE communication standard specifications such as Wi-Fi (registered trademark), Bluetooth (registered trademark), and ZigBee (registered trademark) can be used as communication protocols or communication technologies.

[0096] The simulation device 200 includes the programs described in the previous embodiments. The simulation device 200 also includes programs for verifying various circuit operations in addition to the programs. Furthermore, the simulation device 200 can use the results obtained by executing one verification program in another verification program.

[0097] The structures, methods, and the like described in this embodiment mode can be used in appropriate combination with structures, methods, and the like described in other embodiments. [Explanation of symbols]

[0098] 11: sample, 12: sample, 13: sample, 100: antiferroelectric element, 101: terminal, 102: terminal, 103: conductor, 104: antiferroelectric, 105: conductor, 110: equivalent circuit model, 111: ferroelectric element, 112: linear resistor, 113: transistor, 114: transistor, 115: transistor, 116: transistor, 150: ferroelectric element, 151: terminal, 152: terminal, 160: equivalent circuit model, 161: antiferroelectric element, 162: linear resistor, 200: simulation device, 201: bus line, 210: control device, 220: arithmetic device, 230: storage device, 240: auxiliary storage device, 250: input / output device, 260: communication device

Claims

1. A program for executing a simulation of a circuit including an antiferroelectric element on a computer, comprising: an equivalent circuit of an antiferroelectric element is set in the program; The equivalent circuit of the antiferroelectric element is set as follows: a means for inputting an actual measured value of the PV characteristic or the IV characteristic of the antiferroelectric element; means for inputting initial values ​​of parameters related to the ferroelectric element, initial values ​​of parameters related to the linear resistor, and initial values ​​of parameters related to the first transistor and the second transistor; a means for adjusting one or more of the initial values ​​of parameters related to the ferroelectric element, the initial values ​​of parameters related to linear resistance, and the initial values ​​of parameters related to transistors so as to approach the actual measured values ​​of the P-V characteristics or the actual measured values ​​of the I-V characteristics of the antiferroelectric element; a means for determining a difference between the actual measured value of the PV characteristic or the actual measured value of the IV characteristic and the PV characteristic or the IV characteristic calculated from the adjusted parameters; means for generating an equivalent circuit of the antiferroelectric element; The simulation can be executed on a computer by inputting information about a circuit including an antiferroelectric element into the program. program.

2. In claim 1, one of the pair of electrodes of the ferroelectric element and a first terminal of a linear resistor are electrically connected; the other of the pair of electrodes of the ferroelectric element is electrically connected to one of the source electrode and the drain electrode of the first transistor; a gate electrode of the first transistor electrically connected to a gate electrode of the second transistor, one of a source electrode and a drain electrode of the second transistor, and a second terminal of the linear resistor; a second terminal of the linear resistor is electrically connected to the other of the source electrode and the drain electrode of the first transistor and the other of the source electrode and the drain electrode of the second transistor; program.

3. A computer-readable recording medium on which the program described in claim 1 or claim 2 is recorded.

4. A simulation device in which the computer executes the program described in claim 1 or claim 2 to perform a simulation.

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