Multilayer circuit board

The multilayer circuit board addresses connection reliability issues by using a combination of Cu-based and alloy/resin composite interlayer connection conductors, ensuring strong connections and efficient manufacturing.

JP7806969B2Active Publication Date: 2026-01-27MURATA MFG CO LTD
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Patent Information

Application Number
JP2025515175
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2023-04-20
Filing Date
2024-04-09
Publication Date
2026-01-27
Estimated Expiration
2044-04-09

AI Technical Summary

Technical Problem

Existing multilayer circuit boards face challenges in achieving reliable connections between interlayer connection conductors with small diameters and narrow pitches, leading to insufficient connection reliability.

Method used

The multilayer circuit board design includes interlayer connection conductors with a combination of Cu-based and alloy/resin composite portions, ensuring strong connections by using plated vias and paste vias, and allowing for larger diameters and pitches where necessary.

Benefits of technology

This design enhances connection reliability between interlayer connection conductors and conductor layers, even with small diameters and narrow pitches, improving manufacturing efficiency and reducing insertion loss.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

A multilayer circuit board 1A comprises: an insulating base material 10 formed by stacking a plurality of insulating layers 11 and having a first main surface 10a and a second main surface 10b opposing one other in a stacking direction; a plurality of conductor layers 20 provided between the insulating layers 11 and on the first main surface 10a or the second main surface 10b; a plurality of inter-layer connecting conductors 30 provided penetrating through the insulating layers 11 in the stacking direction; mounting electrodes E1 arranged on the first main surface 10a; and radiating electrodes E2 arranged on the second main surface 10b side of the mounting electrodes E1 in the stacking direction. The conductor layers 20 include a first conductor layer 21, a second conductor layer 22, a third conductor layer 23, and a fourth conductor layer 24, all of which are made of Cu foil. The inter-layer connecting conductors 30 include: first inter-layer connecting conductors 31 sandwiched between the first conductor layer 21 and the second conductor layer 22 in the stacking direction; and second inter-layer connecting conductors 32 sandwiched between the third conductor layer 23 and the fourth conductor layer 24 in the stacking direction. Each first inter-layer connecting conductor 31 includes, in the stacking direction: a first part 31A comprising a single metal having Cu as a main component; and a second part 31B comprising an alloy material containing two or more types of metal, or a composite material containing one or more types of metal and a resin. One end of the first part 31A is joined to the first conductor layer 21, and the other end of the first part 31A is joined to one end of the second part 31B. The second inter-layer connecting conductors 32 include a third part 32A made of an alloy material containing two or more types of metal, or a composite material containing one or more types of metal and a resin. One end of each third part 32A is joined to the third conductor layer 23, and the other end of each third part 32A is joined to the fourth conductor layer 24. The first conductor layer 21 or the second conductor layer 22 connected to at least one first inter-layer connecting conductor 31 constitutes the mounting electrodes E1. The radiating electrodes E2 are the conductor layer disposed closest to the second main surface 10b among the conductor layers 20. The third conductor layer 23 or the fourth conductor layer 24 connected to at least one second inter-layer connecting conductor 32 constitutes the radiating electrodes E2.
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Description

[Technical Field]

[0001] The present invention relates to a multilayer circuit board. [Background technology]

[0002] Patent Document 1 discloses an antenna substrate including a dielectric substrate having a first main surface and a second main surface, and an antenna conductor formed on the first main surface. Patent Document 1 further describes that a connecting conductor is formed on the second main surface of the dielectric substrate, and that a connector of the circuit board is connected to the connecting conductor of the antenna board, thereby connecting the circuit board to the antenna board. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Publication No. 2021 / 060168 Summary of the Invention [Problem to be solved by the invention]

[0004] In a multilayer circuit board such as the antenna board described in Patent Document 1, it is preferable to shorten the current path by directly connecting interlayer connection conductors from electronic components such as integrated circuits (ICs) to the multilayer circuit board. This reduces insertion loss. Therefore, the interlayer connection conductors connected to conductors for connection with electronic components (hereinafter referred to as mounting electrodes) are required to have a small diameter and a narrow pitch.

[0005] Patent Document 1 describes a method for forming an interlayer connection conductor by filling a hole provided in a dielectric layer with a conductive paste and solidifying it. However, with this method, the smaller the diameter of the hole, the more difficult it becomes to fill the conductive paste in the depth direction, which may result in insufficient connection reliability between the interlayer connection conductor and the conductor layer.

[0006] The present invention has been made to solve the above problems, and aims to provide a multilayer circuit board that has excellent connection reliability between interlayer connection conductors and conductor layers even when the interlayer connection conductors are arranged with small diameters and narrow pitches on the mounting surface for electronic components. [Means for solving the problem]

[0007] The multilayer circuit board of the present invention includes an insulating base material formed by stacking a plurality of insulating layers and having a first main surface and a second main surface opposing each other in a stacking direction, a plurality of conductor layers provided between the insulating layers and on the first main surface or the second main surface, a plurality of interlayer connection conductors provided so as to penetrate the insulating layers in the stacking direction, a mounting electrode provided on the first main surface, and a radiation electrode provided closer to the second main surface than the mounting electrode in the stacking direction. The conductor layers include a first conductor layer, a second conductor layer, a third conductor layer, and a fourth conductor layer, all made of Cu foil. The interlayer connection conductors include a first interlayer connection conductor sandwiched between the first conductor layer and the second conductor layer in the stacking direction, and a second interlayer connection conductor sandwiched between the third conductor layer and the fourth conductor layer in the stacking direction. The first interlayer connection conductor includes, in the stacking direction, a first portion made of a single metal containing Cu as a main component and a second portion made of an alloy material containing two or more metals or a composite material containing one or more metals and a resin. One end of the first portion is joined to the first conductor layer, and the other end of the first portion is joined to one end of the second portion. The second interlayer connection conductor includes a third portion made of an alloy material containing two or more metals or a composite material containing one or more metals and a resin. One end of the third portion is joined to the third conductor layer, and the other end of the third portion is joined to the fourth conductor layer. The first conductor layer or the second conductor layer connected to at least one of the first interlayer connection conductors is the mounting electrode. The radiation electrode is the conductor layer among the conductor layers arranged closest to the second principal surface. The third conductor layer or the fourth conductor layer connected to at least one of the second interlayer connection conductors is the radiation electrode. [Effects of the Invention]

[0008] According to the present invention, it is possible to provide a multilayer circuit board that has excellent connection reliability between interlayer connection conductors and conductor layers even when the interlayer connection conductors are arranged with small diameters and narrow pitches on the mounting surface for electronic components. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a cross-sectional view schematically showing an example of a multilayer circuit board according to the present invention. [Figure 2] FIG. 2 is a cross-sectional view schematically showing an example of a multilayer circuit board according to the first embodiment of the present invention. [Figure 3] FIG. 3 is a cross-sectional view schematically showing an example of the first interlayer connection conductor 31. As shown in FIG. [Figure 4] FIG. 4 is a cross-sectional view schematically showing an example of the second interlayer connection conductor 32. As shown in FIG. [Figure 5] FIG. 5 is a cross-sectional view schematically showing an example of the second interlayer connection conductor 33. As shown in FIG. [Figure 6] 6A and 6B are cross-sectional views that schematically show an example of a method for manufacturing the multilayer circuit board 1A. [Figure 7] FIG. 7 is a cross-sectional view schematically showing an example of a multilayer circuit board according to a second embodiment of the present invention. [Figure 8] FIG. 8 is a cross-sectional view schematically showing an example of a multilayer circuit board according to a third embodiment of the present invention. [Figure 9] FIG. 9 is a cross-sectional view schematically showing an example of a multilayer circuit board according to a fourth embodiment of the present invention. [Figure 10] FIG. 10 is a cross-sectional view that schematically shows an example of the first interlayer connection conductor 34. As shown in FIG. [Figure 11] FIG. 11 is a cross-sectional view schematically showing an example of a multilayer circuit board according to a fifth embodiment of the present invention. [Figure 12] FIG. 12 is a cross-sectional view schematically showing an example of a multilayer circuit board according to a sixth embodiment of the present invention. [Figure 13] FIG. 13 is a cross-sectional view schematically showing another example of the multilayer circuit board according to the sixth embodiment of the present invention. [Figure 14]FIG. 14 is a cross-sectional view schematically showing an example of a multilayer circuit board according to a seventh embodiment of the present invention. [Figure 15] FIG. 15 is a cross-sectional view schematically showing an example of a multilayer circuit board according to an eighth embodiment of the present invention. [Figure 16] FIG. 16 is a cross-sectional view schematically showing an example of a multilayer circuit board according to a ninth embodiment of the present invention. [Figure 17] FIG. 17 is a cross-sectional view schematically showing an example of a multilayer circuit board according to a tenth embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0010] The multilayer circuit board of the present invention will now be described. However, the present invention is not limited to the following configurations, and can be appropriately modified and applied within the scope of the present invention. The present invention also includes a combination of two or more of the individual preferred configurations of the present invention described below.

[0011] In this specification, terms indicating the relationship between elements (e.g., "perpendicular," "parallel," "orthogonal," etc.) and terms indicating the shapes of elements are not expressions that only express a strict meaning, but are expressions that mean that they are substantially equivalent, for example, including a difference of about a few percent. Furthermore, in this specification, "equivalent" is not an expression that means only complete equivalent, but is an expression that means that they are substantially equivalent, for example, including a difference of about a few percent.

[0012] The drawings shown below are schematic diagrams, and the dimensions, aspect ratio, and other scales may differ from those of the actual product. In the drawings, the same or equivalent parts will be designated by the same reference numerals. In addition, the same elements will be designated by the same reference numerals in each drawing, and duplicate explanations will be omitted.

[0013] FIG. 1 is a cross-sectional view schematically showing an example of a multilayer circuit board according to the present invention.

[0014] The multilayer circuit board 1 shown in FIG. 1 includes an insulating substrate 10, a plurality of conductor layers 20, and a plurality of interlayer connection conductors 30.

[0015] The multilayer circuit board 1 may be a rigid board or a flexible board, and may have a curved portion.

[0016] The insulating base material 10 is a laminate formed by stacking a plurality of insulating layers 11. The insulating base material 10 has a first main surface 10a (upper surface in FIG. 1) and a second main surface 10b (lower surface in FIG. 1) that face each other in the stacking direction (vertical direction in FIG. 1).

[0017] The conductor layer 20 is provided between the insulating layers 11 on the first main surface 10a or the second main surface 10b.

[0018] On the first main surface 10a of the insulating base material 10, a mounting electrode E1 is arranged as a conductor layer 20.

[0019] A radiating electrode E2 is disposed on the second main surface 10b of the insulating substrate 10 as a conductor layer 20. The radiating electrode E2 need only be the conductor layer of the conductor layer 20 that is disposed closest to the second main surface 10b, and does not necessarily have to be disposed on the second main surface 10b. The radiating electrode E2 constitutes a radiating element of the antenna. The operating frequency band of the radiating element is a high-frequency band such as the millimeter wave band.

[0020] The interlayer connection conductors 30 are provided so as to penetrate the insulating layers 11 in the stacking direction. Each interlayer connection conductor 30 may be provided so as to penetrate one insulating layer 11 in the stacking direction, or may be provided so as to penetrate two or more insulating layers 11 in the stacking direction.

[0021] Each interlayer connection conductor 30 is sandwiched between the conductor layer 20 on the first principal surface 10a side and the conductor layer 20 on the second principal surface 10b side in the stacking direction.

[0022] An insulating protective layer 40 may be provided on the surface layer of the multilayer circuit board 1. The protective layer 40 may be, for example, a coverlay, a resist layer, or the like. The protective layer 40 may be provided on both or either of the first main surface 10a and the second main surface 10b.

[0023] An electronic component 100 is mounted on a multilayer circuit board 1 shown in Fig. 1. In the example shown in Fig. 1, an integrated circuit (IC) 110, a high-frequency component 120, and a connector 130 are mounted as the electronic component 100 on a first main surface 10a of the multilayer circuit board 1. Of these, the integrated circuit 110 and the high-frequency component 120 are mounted on a dielectric substrate 140, and are mounted on the multilayer circuit board 1 via the dielectric substrate 140.

[0024] 1, it is preferable to shorten the current path by directly connecting the interlayer connection conductor from the electronic component 100, such as the integrated circuit 110, to the multilayer circuit board 1. This reduces insertion loss. Therefore, the interlayer connection conductor 30 connected to the mounting electrode E1 is required to have a small diameter and a narrow pitch.

[0025] On the other hand, the interlayer connection conductors 30 connected to the radiation electrode E2 do not need to be as small in diameter and have a narrower pitch as the interlayer connection conductors 30 connected to the mounting electrode E1. For example, the connection strength can be increased by making the diameter of the interlayer connection conductors 30 connected to the radiation electrode E2 larger than the diameter of the interlayer connection conductors 30 connected to the mounting electrode E1.

[0026] In the multilayer circuit board 1, the interlayer connection conductors 30 are provided as first interlayer connection conductors or second interlayer connection conductors, which will be described in the following embodiments.

[0027] As will be described later, the conductor layer 20 connected to at least one first interlayer connection conductor is a mounting electrode E1, and the conductor layer 20 connected to at least one second interlayer connection conductor is a radiation electrode E2.

[0028] The following embodiments are merely examples, and it goes without saying that partial substitution or combination of the configurations shown in different embodiments is possible. From the second embodiment onwards, descriptions of matters common to the first embodiment will be omitted, and only differences will be described. In particular, similar effects resulting from similar configurations will not be mentioned in each embodiment.

[0029] [First embodiment] FIG. 2 is a cross-sectional view schematically showing an example of a multilayer circuit board according to the first embodiment of the present invention.

[0030] The multilayer circuit board 1A shown in FIG. 2 includes an insulating substrate 10, a plurality of conductor layers 20, and a plurality of interlayer connection conductors 30.

[0031] The insulating base material 10 is a laminate formed by stacking a plurality of insulating layers 11. The insulating base material 10 has a first main surface 10a (upper surface in FIG. 2) and a second main surface 10b (lower surface in FIG. 2) that face each other in the stacking direction (vertical direction in FIG. 2).

[0032] The insulating layer 11 is, for example, a resin insulating layer containing resin as a main component.

[0033] When the insulating layer 11 is a resin insulating layer, the insulating layer 11 may be a layer mainly composed of a thermosetting resin or a thermoplastic resin, but preferably includes a layer mainly composed of a thermoplastic resin. When the insulating layer 11 is made of a thermoplastic resin, a plurality of resin sheets on which the conductor layer 20 is formed can be stacked and pressure-bonded together (collectively pressed) by heat treatment.

[0034] Examples of the thermosetting resin include epoxy resin, phenol resin, polyimide resin or modified resin thereof, and acrylic resin.

[0035] Examples of thermoplastic resins include liquid crystal polymers (LCP), fluororesins, thermoplastic polyimide resins, polyether ether ketone resins (PEEK), and polyphenylene sulfide resins (PPS).

[0036] The insulating layer 11 preferably includes a layer mainly composed of a liquid crystal polymer. Liquid crystal polymers have a lower water absorption rate than other thermoplastic resins. Therefore, when the insulating layer 11 includes a layer mainly composed of a liquid crystal polymer, the amount of moisture remaining in the insulating layer 11 can be reduced.

[0037] The insulating layer 11 may contain an inorganic material such as a ceramic filler.

[0038] Examples of ceramic fillers include boron nitride, talc, and fused silica.

[0039] The thickness of one insulating layer 11 (length in the stacking direction) is preferably 10 μm or more and 100 μm or less. The thickness of one insulating layer 11 may be the same as or different from one another.

[0040] The conductor layer 20 is provided between the insulating layers 11 on the first main surface 10a or the second main surface 10b.

[0041] The conductor layer 20 may have a patterned shape such as a wiring, or may have a planar shape that spreads over a surface. The shapes of the conductor layers 20 may be the same or different from each other.

[0042] Each of the conductor layers 20 is preferably made of Cu (copper) foil.

[0043] The conductor layer 20 may have a matte surface on one main surface and a shiny surface on the other main surface.

[0044] The thickness of the conductor layer 20 (length in the stacking direction) is preferably 1 μm or more and 35 μm or less, and more preferably 6 μm or more and 18 μm or less. The thicknesses of the conductor layers 20 may be the same or different from each other.

[0045] The conductor layers 20 may or may not be parallel to each other.

[0046] On the first main surface 10a of the insulating base material 10, a mounting electrode E1 is arranged as a conductor layer 20.

[0047] A radiating electrode E2 is disposed on the second main surface 10b of the insulating base material 10 as a conductor layer 20. The radiating electrode E2 may be any conductor layer of the conductor layer 20 that is disposed closest to the second main surface 10b, and is not necessarily disposed on the second main surface 10b.

[0048] 2, the interlayer connection conductor 30 includes a first interlayer connection conductor 31 and second interlayer connection conductors 32 and 33. The interlayer connection conductor 30 may include only one of the second interlayer connection conductors 32 and 33.

[0049] In a cross section perpendicular to the lamination direction, the shape of the interlayer connection conductor 30 is preferably circular. In this case, not only a perfect circle but also an ellipse, an oval, etc. are included in the circle.

[0050] The first interlayer connection conductor 31 includes a first portion 31A and a second portion 31B in the stacking direction.

[0051] 3 is a cross-sectional view schematically showing an example of the first interlayer connection conductor 31. In FIG. 3, the top and bottom are reversed compared to FIG.

[0052] The first interlayer connection conductor 31 is sandwiched in the stacking direction between the first conductor layer 21 and the second conductor layer 22. In the example shown in Fig. 3, the first interlayer connection conductor 31 is provided so as to penetrate one insulating layer 11 in the stacking direction.

[0053] In the first interlayer connection conductor 31, the first portion 31A is made of a single metal containing Cu as a main component.

[0054] The first portion 31A is, for example, a plated via, where the plated via means a film grown by a liquid phase method or a vapor phase method.

[0055] The second portion 31B is made of an alloy material containing two or more metals, or a composite material containing one or more metals and a resin. For example, the second portion 31B is made of an alloy containing two or more metals, such as Ag, Cu, Ni, Sn, Cr, Pt, Mo, Ga, Ge, Sb, In, or Pb, or a composite material containing one or more metals, such as Ag, Cu, Ni, Sn, Cr, Pt, Mo, Ga, Ge, Sb, In, or Pb, and a resin. Specific examples of alloy materials include Cu-Sn alloys, such as Cu3Sn and Cu5Sn, and Ag-Sn alloys, such as Ag3Sn and Ag5Sn.

[0056] The second portion 31B is, for example, a paste via. Here, the paste via means a solidified paste. When the multilayer circuit board 1A is fabricated by batch pressing, which will be described later, the second portion 31B functions as a bonding material, thereby electrically connecting the first portion 31A and the second conductor layer 22.

[0057] One end of the first portion 31A is joined to the first conductor layer 21, and the other end of the first portion 31A is joined to one end of the second portion 31B.

[0058] The first portion 31A and the first conductor layer 21 are directly bonded without any dissimilar material therebetween. Therefore, at the interface between the first portion 31A and the first conductor layer 21, there is a portion where no dissimilar material exists, i.e., a portion where the first portion 31A and the first conductor layer 21 are in direct contact with each other.

[0059] When the second portion 31B is made of an alloy material, an intermediate layer 51 containing Cu and the metal contained in the second portion 31B is formed on the end of the second portion 31B on the first portion 31A side. As an example, an intermediate layer 51 containing Cu and Sn is formed on the end of the second portion 31B on the first portion 31A side. In this case, for example, the intermediate layer 51 is made of a Cu-Sn alloy such as Cu3Sn or Cu5Sn. However, the composition of the intermediate layer 51 is different from the composition of the second portion 31B.

[0060] The other end of the second portion 31B is joined to the second conductor layer 22.

[0061] When the second portion 31B is made of an alloy material, an intermediate layer 51 containing Cu and the metal contained in the second portion 31B is formed in the end portion of the second portion 31B on the side of the second conductor layer 22. As an example, an intermediate layer 51 containing Cu and Sn is formed in the end portion of the second portion 31B on the side of the second conductor layer 22. In this case, for example, the intermediate layer 51 is made of a Cu-Sn alloy such as Cu3Sn or Cu5Sn.

[0062] The intermediate layer 51 can be confirmed, for example, by using a scanning electron microscope (SEM) to observe a cross section of the insulating layer 11 cut in a direction parallel to the stacking direction. The intermediate layer 51 has a composition different from both the first portion 31A and the second portion 31B, and therefore appears in a color tone different from the first portion 31A and the second portion 31B in the SEM photograph.

[0063] Note that even if the types of metal elements contained are the same, if the content ratios of the respective metal elements are different, they are also considered to have "different compositions." For example, compositions such as Cu5Sn, Cu3Sn, and Cu6Sn5 all contain Cu and Sn as metal species, but because the content ratios of the metal species are different, they can be said to have different compositions.

[0064] 4 is a cross-sectional view schematically showing an example of the second interlayer connection conductor 32. In FIG. 4, the top and bottom are reversed compared to FIG.

[0065] The second interlayer connection conductor 32 is sandwiched in the stacking direction between the third conductor layer 23 and the fourth conductor layer 24. In the example shown in Fig. 4, the second interlayer connection conductor 32 is provided so as to penetrate one insulating layer 11 in the stacking direction.

[0066] The second interlayer connection conductor 32 includes a third portion 32A.

[0067] In the second interlayer connection conductor 32, the third portion 32A is made of an alloy material containing two or more metals or a composite material containing one or more metals and a resin. For example, the third portion 32A is made of an alloy containing two or more metals, such as Ag, Cu, Ni, Sn, Cr, Pt, Mo, Ga, Ge, Sb, In, or Pb, or a composite material containing one or more metals, such as Ag, Cu, Ni, Sn, Cr, Pt, Mo, Ga, Ge, Sb, In, or Pb, and a resin. Specific examples of alloy materials include Cu-Sn alloys, such as Cu3Sn and Cu5Sn, and Ag-Sn alloys, such as Ag3Sn and Ag5Sn.

[0068] The third portion 32A is, for example, a paste via.

[0069] One end of the third portion 32A is joined to the third conductor layer 23, and the other end of the third portion 32A is joined to the fourth conductor layer 24.

[0070] When the third portion 32A is made of an alloy material, an intermediate layer 52 containing Cu and the metal contained in the third portion 32A is formed in the end portion of the third portion 32A facing the third conductor layer 23 and the end portion of the third portion 32A facing the fourth conductor layer 24. As an example, an intermediate layer 52 containing Cu and Sn is formed in the end portion of the third portion 32A facing the third conductor layer 23 and the end portion of the third portion 32A facing the fourth conductor layer 24. In this case, for example, the intermediate layer 52 is made of a Cu-Sn alloy such as Cu3Sn or Cu5Sn. However, the composition of the intermediate layer 52 is different from the composition of the third portion 32A.

[0071] 5 is a cross-sectional view schematically showing an example of the second interlayer connection conductor 33. In FIG. 5, the top and bottom are reversed compared to FIG.

[0072] The second interlayer connection conductor 33 is sandwiched between the third conductor layer 23 and the fourth conductor layer 24 in the stacking direction. In the example shown in Fig. 5, the second interlayer connection conductor 33 is provided so as to penetrate two insulating layers 11 in the stacking direction. The second interlayer connection conductor 33 has a shape in which a pair of second interlayer connection conductors 32 are connected in an inverted state.

[0073] The second interlayer connection conductor 33 includes a third portion 33A.

[0074] In the second interlayer connection conductor 33, the third portion 33A is made of an alloy material containing two or more metals or a composite material containing one or more metals and a resin. For example, the third portion 33A is made of an alloy containing two or more metals such as Ag, Cu, Ni, Sn, Cr, Pt, Mo, Ga, Ge, Sb, In, and Pb, or a composite material containing one or more metals such as Ag, Cu, Ni, Sn, Cr, Pt, Mo, Ga, Ge, Sb, In, and Pb and a resin. Specific examples of alloy materials include Cu-Sn alloys such as Cu3Sn and Cu5Sn, and Ag-Sn alloys such as Ag3Sn and Ag5Sn.

[0075] The third portion 33A is, for example, a paste via.

[0076] One end of the third portion 33A is joined to the third conductor layer 23, and the other end of the third portion 33A is joined to the fourth conductor layer 24.

[0077] When the third portion 33A is made of an alloy material, an intermediate layer 52 containing Cu and the metal contained in the third portion 33A is formed in the end portion of the third portion 33A facing the third conductor layer 23 and the end portion of the third portion 33A facing the fourth conductor layer 24. As an example, an intermediate layer 53 containing Cu and Sn is formed in the end portion of the third portion 33A facing the third conductor layer 23 and the end portion of the third portion 33A facing the fourth conductor layer 24. In this case, the intermediate layer 53 is made of a Cu-Sn alloy such as Cu3Sn or Cu5Sn. However, the composition of the intermediate layer 53 is different from the composition of the third portion 33A.

[0078] The multilayer circuit board 1A is characterized in that the first conductor layer 21 or the second conductor layer 22 connected to at least one first interlayer connection conductor 31 is a mounting electrode E1.

[0079] As described above, the interlayer connection conductor 30 connected to the mounting electrode E1 is required to have a smaller diameter and a narrower pitch. When forming the interlayer connection conductor by filling holes in a dielectric layer with a conductive paste and solidifying it, as described in Patent Document 1, the smaller the diameter of the hole, the more difficult it becomes for the conductive paste to fill the hole in the depth direction, which may result in insufficient connection reliability with the conductor foil. Therefore, it is preferable to join the mounting electrode E1 with a first interlayer connection conductor 31 that includes a first portion 31A such as a plated via that can reliably fill a hole even with a small diameter, and a second portion 31B such as a paste via that complements the connection with an adjacent layer.

[0080] The first conductor layer 21 connected to the first interlayer connection conductor 31 may be the mounting electrode E1, or the second conductor layer 22 connected to the first interlayer connection conductor 31 may be the mounting electrode E1, but it is preferable that the first conductor layer 21 connected to the first interlayer connection conductor 31 is the mounting electrode E1, as shown in Fig. 2. That is, it is preferable that one end of the first portion 31A is joined to the mounting electrode E1, as shown in Fig. 2.

[0081] Furthermore, the multilayer circuit board 1A is characterized in that the third conductor layer 23 or the fourth conductor layer 24 connected to at least one second interlayer connection conductor 32 or 33 is the radiation electrode E2.

[0082] As described above, the interlayer connection conductor 30 connected to the radiation electrode E2 does not need to have a smaller diameter or a narrower pitch than the interlayer connection conductor 30 connected to the mounting electrode E1. Therefore, the interlayer connection conductor 30 joined to the radiation electrode E2 may be a second interlayer connection conductor 32 or 33 such as a paste via. Unlike the first interlayer connection conductor 31, this eliminates the need for additional processes such as plating, improving manufacturing efficiency.

[0083] 2, the second interlayer connection conductor 33 is connected to the radiation electrode E2, but the second interlayer connection conductor 32 may be connected to the radiation electrode E2. Also, the radiation electrode E2 connected to the second interlayer connection conductor 32 and the radiation electrode E2 connected to the second interlayer connection conductor 33 may be mixed.

[0084] It is preferable that the insulating layer 11 on which the first interlayer connection conductor 31 is provided and the insulating layer 11 on which the second interlayer connection conductor 32 or 33 is provided are both resin insulating layers whose main component is resin. In this case, the insulating layer 11 on which the first interlayer connection conductor 31 is provided and the insulating layer 11 on which the second interlayer connection conductor 32 or 33 is provided may be resin insulating layers whose main component is the same resin, or may be resin insulating layers whose main components are different resins.

[0085] The shape, arrangement, etc. of the first interlayer connection conductor 31 are not limited to those shown in FIG. 2 or FIG.

[0086] The interlayer connection conductor 30 may include a first interlayer connection conductor 31 in which the first conductor layer 21 or the second conductor layer 22 is not the mounting electrode E1. In this case, the first interlayer connection conductor 31 may be provided on the insulating layer 11 located in the outermost layer on the first principal surface 10a side, on an insulating layer 11 located in an inner layer, or on the insulating layer 11 located in the outermost layer on the second principal surface 10b side. The first interlayer connection conductor 31 and the second interlayer connection conductor 32 or 33 may be provided together on the same insulating layer 11.

[0087] The first interlayer connection conductor 31 may have a tapered shape in which the area of ​​the end on the first conductor layer 21 side is smaller than the area of ​​the end on the second conductor layer 22 side (see FIG. 3), or may not have a tapered shape. When the first interlayer connection conductor 31 has a tapered shape, the inclination angle may be constant (see FIG. 3), or may not be constant.

[0088] The end face of the first portion 31A on the second conductor layer 22 side may be flat (see Figure 2), may protrude toward the second portion 31B (see Figure 3), or may be recessed toward the first portion 31A (not shown).

[0089] When the intermediate layer 51 is formed on the end of the second portion 31B on the first portion 31A side, the intermediate layer 51 may or may not extend to the interface between the first portion 31A and the insulating layer 11 (see FIG. 3). When the intermediate layer 51 formed on the end of the second portion 31B on the first portion 31A side extends to the interface between the first portion 31A and the insulating layer 11, it may or may not reach the interface between the first conductor layer 21 and the insulating layer 11 (see FIG. 3).

[0090] When an intermediate layer 51 is formed at the end of the second portion 31B on the second conductor layer 22 side, the intermediate layer 51 may or may not extend to the interface between the second conductor layer 22 and the insulating layer 11 (see Figure 3).

[0091] The shape, arrangement, etc. of the second interlayer connection conductor 32 are not limited to those shown in FIG. 2 or FIG.

[0092] The interlayer connection conductor 30 may include a second interlayer connection conductor 32 in which the third conductor layer 23 or the fourth conductor layer 24 is not the radiating electrode E2. In this case, the second interlayer connection conductor 32 may be provided on the insulating layer 11 located in the outermost layer on the first principal surface 10a side, on an insulating layer 11 located in an inner layer, or on the insulating layer 11 located in the outermost layer on the second principal surface 10b side. The second interlayer connection conductor 32 and the second interlayer connection conductor 33 may be provided together on the same insulating layer 11.

[0093] The second interlayer connection conductor 32 may have a tapered shape in which the area of ​​the end of the end face on the third conductor layer 23 side is smaller than the area of ​​the end on the fourth conductor layer 24 side (see FIG. 4), or may not have a tapered shape. When the second interlayer connection conductor 32 has a tapered shape, the inclination angle may be constant (see FIG. 4), or may not be constant.

[0094] When the intermediate layer 52 is formed on the end of the third portion 32A on the third conductor layer 23 side, the intermediate layer 52 may or may not extend to the interface between the third conductor layer 23 and the insulating layer 11 (see FIG. 4). Similarly, when the intermediate layer 52 is formed on the end of the third portion 32A on the fourth conductor layer 24 side, the intermediate layer 52 may or may not extend to the interface between the fourth conductor layer 24 and the insulating layer 11 (see FIG. 4).

[0095] The height of the second interlayer connection conductor 32 is preferably greater than the height of the first interlayer connection conductor 31 .

[0096] The diameter of the second interlayer connection conductor 32 is preferably equal to or greater than the diameter of the first interlayer connection conductor 31. That is, the diameter of the second interlayer connection conductor 32 is preferably equal to or greater than the diameter of the first interlayer connection conductor 31. When the first interlayer connection conductor 31 has a tapered shape, the diameter of the largest portion is defined as the diameter of the first interlayer connection conductor 31. The same applies to the second interlayer connection conductor 32 and the second interlayer connection conductor 33.

[0097] The shape, arrangement, etc. of the second interlayer connection conductor 33 are not limited to those shown in FIG. 2 or FIG.

[0098] The interlayer connection conductor 30 may include a second interlayer connection conductor 33 in which the third conductor layer 23 or the fourth conductor layer 24 is not the radiating electrode E2. In this case, the second interlayer connection conductor 33 may be provided on the insulating layer 11 located in the outermost layer on the first principal surface 10a side, on an insulating layer 11 located in an inner layer, or on the insulating layer 11 located in the outermost layer on the second principal surface 10b side. The second interlayer connection conductor 32 and the second interlayer connection conductor 33 may be provided together on the same insulating layer 11.

[0099] The second interlayer connection conductor 33 may have a shape in which a pair of second interlayer connection conductors 32 having a tapered shape are connected in an inverted state (see FIG. 5), or may not have a tapered shape.

[0100] When the intermediate layer 53 is formed on the end of the third portion 33A on the third conductor layer 23 side, the intermediate layer 53 may or may not extend to the interface between the third conductor layer 23 and the insulating layer 11 (see FIG. 5). Similarly, when the intermediate layer 53 is formed on the end of the third portion 33A on the fourth conductor layer 24 side, the intermediate layer 53 may or may not extend to the interface between the fourth conductor layer 24 and the insulating layer 11 (see FIG. 5).

[0101] The height of the second interlayer connection conductor 33 is preferably greater than the height of the first interlayer connection conductor 31. In addition, the height of the second interlayer connection conductor 33 is preferably greater than the height of the second interlayer connection conductor 32.

[0102] The diameter of the second interlayer connection conductor 33 is preferably equal to or larger than the diameter of the first interlayer connection conductor 31. That is, the diameter of the second interlayer connection conductor 33 is preferably equal to or larger than the diameter of the first interlayer connection conductor 31. Furthermore, the diameter of the second interlayer connection conductor 33 is preferably equal to or larger than the diameter of the second interlayer connection conductor 32. That is, the diameter of the second interlayer connection conductor 33 is preferably equal to or larger than the diameter of the second interlayer connection conductor 32.

[0103] The multilayer circuit board 1A is manufactured, for example, by the following method.

[0104] 6A and 6B are cross-sectional views schematically illustrating an example of a method for manufacturing a multilayer circuit board 1A. The multilayer circuit board 1A may be manufactured in the form of a single chip (individual piece), or may be manufactured by producing an aggregate substrate and then separating it into individual pieces. The aggregate substrate here refers to a substrate that includes multiple multilayer circuit boards 1A.

[0105] First, as shown in FIG. 6A, a plurality of insulating layers 11 are prepared, and a conductor layer 20 is formed on each insulating layer 11.

[0106] For example, a Cu foil is laminated on one main surface of the insulating layer 11, and the Cu foil is patterned by photolithography to form the conductor layer 20. The insulating layer 11 is, for example, a resin sheet whose main component is a thermoplastic resin such as a liquid crystal polymer.

[0107] Furthermore, on the insulating layer 11, a first interlayer connection conductor 31 and a second interlayer connection conductor 32 are formed.

[0108] For example, a through hole (also referred to as a via hole) is formed in the insulating layer 11 using a laser or the like so that one surface of the conductor layer 20 is exposed. The through hole may have a tapered shape in which the hole diameter decreases toward the conductor layer 20. Thereafter, a plating process is performed to fill the through hole partway with Cu as a metal material, thereby forming the first portion 31A. Subsequently, a conductive paste containing a metal material such as Cu or Sn and a resin material is filled into the through hole to form the second portion 31B. The conductive paste is solidified by a heat press described below, thereby forming the first interlayer connection conductor 31.

[0109] Separately, a through hole is formed in the insulating layer 11 using a laser or the like so that one surface of the conductor layer 20 is exposed, and then a conductive paste containing a metal material such as Cu or Sn and a resin material is filled into the through hole to form the third portion 32A. The conductive paste is solidified by a heat press, which will be described later, to form the second interlayer connection conductor 32. Furthermore, a second interlayer connection conductor 33 (see FIG. 6B) is formed at the portion where the two third portions 32A are connected in an inverted state.

[0110] The insulating layers 11 are stacked in order, and then hot-pressed (collectively pressed) in the stacking direction, thereby producing the multilayer circuit board 1A shown in Fig. 6B.

[0111] According to this manufacturing method, insulating base material 10 can be easily produced by batch pressing insulating layer 11. This reduces the number of manufacturing steps for multilayer circuit board 1A, and makes it possible to keep manufacturing costs low.

[0112] Although not shown in Fig. 2 etc., an anti-corrosion layer may be provided on the surface of the conductor layer 20. This also applies to the following embodiments.

[0113] The anticorrosion layer is formed by subjecting the surface of the metal foil to an anticorrosion treatment using a metal such as Zn, Ni, Cr, Mo, or Pt.

[0114] When the multilayer circuit board 1A is produced by the above-mentioned batch pressing, by placing an anti-rust layer at the interface between the conductor layer 20 and the insulating layer 11, oxidation of the metal foil such as Cu foil that constitutes the conductor layer 20 is prevented, thereby suppressing a decrease in adhesion between the conductor layer 20 and the insulating layer 11.

[0115] [Second embodiment] In the second embodiment of the present invention, a first interlayer connection conductor is provided in an insulating layer located in an inner layer.

[0116] FIG. 7 is a cross-sectional view schematically showing an example of a multilayer circuit board according to a second embodiment of the present invention.

[0117] 7, the first interlayer connection conductors 31 are provided not only on the insulating layer 11 located on the outermost layer on the first main surface 10a side but also on the insulating layers 11 located on inner layers. Note that the first interlayer connection conductors 31 and the second interlayer connection conductors 32 or 33 may be provided together in the same insulating layer 11.

[0118] In this way, first interlayer connection conductors may be provided on adjacent insulating layers in the stacking direction. This allows wiring to be routed to inner layers via small-diameter interlayer connection conductors, thereby reducing parasitic capacitance in high-frequency circuits connecting, for example, integrated circuits to antennas and improving characteristics. Furthermore, by arranging the interlayer connection conductors as ground conductors around signal lines with small diameters and narrow pitches, electric field leakage can be prevented even at high frequencies of, for example, several tens of GHz.

[0119] [Third embodiment] In the third embodiment of the present invention, when viewed in the stacking direction, the first interlayer connection conductor overlaps with at least a part of the first or second interlayer connection conductor adjacent to it in the stacking direction.

[0120] FIG. 8 is a cross-sectional view schematically showing an example of a multilayer circuit board according to a third embodiment of the present invention.

[0121] In the multilayer circuit board 1C shown in Fig. 8, when viewed in the stacking direction, a first interlayer connection conductor 31 provided on the first insulating layer 11 from the top overlaps with at least a part of a second interlayer connection conductor 32 provided on the second insulating layer 11. In the example shown in Fig. 8, the central axis of the first interlayer connection conductor 31 provided on the first insulating layer 11 coincides with the central axis of the second interlayer connection conductor 32 provided on the second insulating layer 11, but they do not have to coincide.

[0122] Furthermore, when viewed from the stacking direction, the first interlayer connection conductor 31 provided in the second insulating layer 11 from the top overlaps at least a part of the first interlayer connection conductor 31 provided in the third insulating layer 11. In the example shown in Fig. 8, the central axis of the first interlayer connection conductor 31 provided in the second insulating layer 11 coincides with the central axis of the first interlayer connection conductor 31 provided in the third insulating layer 11, but they do not have to coincide.

[0123] When the interlayer connection conductors of upper and lower layers overlap in the stacking direction, the degree of freedom for routing the wiring increases, and more space can be secured for the circuit, which results in higher density wiring on the inner layers.

[0124] 8, two interlayer connection conductors including the first interlayer connection conductor are overlapped, but three or more interlayer connection conductors including the first interlayer connection conductor may be overlapped, for example, the first interlayer connection conductor, the second interlayer connection conductor, and the first interlayer connection conductor may be overlapped in this order.

[0125] Furthermore, when viewed from the stacking direction, the second interlayer connection conductor may overlap at least a part of the first or second interlayer connection conductor adjacent to it in the stacking direction. In this case, two interlayer connection conductors including the second interlayer connection conductor may overlap, or three or more interlayer connection conductors including the second interlayer connection conductor may overlap.

[0126] [Fourth embodiment] In the fourth embodiment of the present invention, the first interlayer connection conductor further includes a fourth portion, and is provided so as to penetrate two insulating layers in the stacking direction.

[0127] FIG. 9 is a cross-sectional view schematically showing an example of a multilayer circuit board according to a fourth embodiment of the present invention.

[0128] In the multilayer circuit board 1D shown in Fig. 9, the interlayer connection conductor 30 includes a first interlayer connection conductor 34 and second interlayer connection conductors 32 and 33. The interlayer connection conductor 30 may include only one of the second interlayer connection conductors 32 and 33. The interlayer connection conductor 30 may also include a first interlayer connection conductor 31 (see Fig. 2).

[0129] The first interlayer connection conductor 34 includes a first portion 34A, a second portion 34B, and a fourth portion 34C in the stacking direction.

[0130] 10 is a cross-sectional view schematically showing an example of the first interlayer connection conductor 34. In FIG. 10, the top and bottom are reversed compared to FIG.

[0131] The first interlayer connection conductor 34 is sandwiched between the first conductor layer 21 and the second conductor layer 22 in the stacking direction. The first interlayer connection conductor 34 is provided so as to penetrate the two insulating layers 11 in the stacking direction. The first interlayer connection conductor 34 has a shape in which a pair of first interlayer connection conductors 31 are connected in an inverted state.

[0132] In the first interlayer connection conductor 34, the first portion 34A is made of a single metal containing Cu as a main component.

[0133] The first portion 34A is, for example, a plated via.

[0134] The second portion 34B is made of an alloy material containing two or more metals, or a composite material containing one or more metals and a resin. For example, the second portion 34B is made of an alloy containing two or more metals, such as Ag, Cu, Ni, Sn, Cr, Pt, Mo, Ga, Ge, Sb, In, or Pb, or a composite material containing one or more metals, such as Ag, Cu, Ni, Sn, Cr, Pt, Mo, Ga, Ge, Sb, In, or Pb, and a resin. Specific examples of alloy materials include Cu-Sn alloys, such as Cu3Sn and Cu5Sn, and Ag-Sn alloys, such as Ag3Sn and Ag5Sn.

[0135] The second portion 34B is, for example, a paste via.

[0136] The fourth portion 34C is made of a single metal containing Cu as a main component.

[0137] The fourth portion 34C is, for example, a plated via.

[0138] One end of the first portion 34A is joined to the first conductor layer 21, and the other end of the first portion 34A is joined to one end of the second portion 34B.

[0139] The first portion 34A and the first conductor layer 21 are directly bonded without any dissimilar material therebetween. Therefore, at the interface between the first portion 34A and the first conductor layer 21, there is a portion where no dissimilar material exists, i.e., a portion where the first portion 34A and the first conductor layer 21 are in direct contact with each other.

[0140] When the second portion 34B is made of an alloy material, an intermediate layer 54 containing Cu and the metal contained in the second portion 34B is formed on the end of the second portion 34B on the first portion 34A side. As an example, an intermediate layer 54 containing Cu and Sn is formed on the end of the second portion 34B on the first portion 34A side. In this case, for example, the intermediate layer 54 is made of a Cu-Sn alloy such as Cu3Sn or Cu5Sn. However, the composition of the intermediate layer 54 is different from the composition of the second portion 34B.

[0141] One end of the fourth portion 34C is joined to the other end of the second portion 34B, and the other end of the fourth portion 34C is joined to the second conductor layer 22.

[0142] The fourth portion 34C and the second conductor layer 22 are directly bonded without a dissimilar material therebetween. Therefore, at the interface between the fourth portion 34C and the second conductor layer 22, there is a portion where no dissimilar material exists, i.e., a portion where the fourth portion 34C and the second conductor layer 22 are in direct contact with each other.

[0143] When the second portion 34B is made of an alloy material, an intermediate layer 54 containing Cu and the metal contained in the second portion 34B is formed on the end of the second portion 34B on the fourth portion 34C side. As an example, an intermediate layer 54 containing Cu and Sn is formed on the end of the second portion 34B on the fourth portion 34C side. In this case, for example, the intermediate layer 54 is made of a Cu-Sn alloy such as Cu3Sn or Cu5Sn. However, the composition of the intermediate layer 54 is different from the composition of the second portion 34B.

[0144] When the first interlayer connection conductor 34 is disposed, the degree of freedom in routing the wiring increases compared to the first interlayer connection conductor 31, and therefore more space can be secured for the circuit, thereby enabling higher density wiring in the inner layers.

[0145] The shape, arrangement, etc. of the first interlayer connection conductor 34 are not limited to those shown in FIG. 9 or FIG.

[0146] The interlayer connection conductor 30 may include a first interlayer connection conductor 34 in which the first conductor layer 21 or the second conductor layer 22 is not the mounting electrode E1. In this case, the first interlayer connection conductor 34 may be provided on the insulating layer 11 located in the outermost layer on the first principal surface 10a side, on an insulating layer 11 located in an inner layer, or on the insulating layer 11 located in the outermost layer on the second principal surface 10b side. The multilayer circuit board 1D may include a mixture of first interlayer connection conductors 31 and first interlayer connection conductors 34.

[0147] The first interlayer connection conductor 34 may have a shape in which a pair of first interlayer connection conductors 31 having a tapered shape are connected in an inverted state (see FIG. 10), or may not have a tapered shape.

[0148] The height of the first interlayer connection conductor 34 is preferably greater than the height of the first interlayer connection conductor 31. In addition, the height of the first interlayer connection conductor 34 may be equal to the height of the second interlayer connection conductor 32 or 33, greater than the height of the second interlayer connection conductor 32 or 33, or less than the height of the second interlayer connection conductor 32 or 33.

[0149] The diameter of the first interlayer connection conductor 34 is preferably equal to the diameter of the first interlayer connection conductor 31. Furthermore, the diameter of the first interlayer connection conductor 34 is preferably equal to or smaller than the diameter of the second interlayer connection conductor 32 or 33. That is, the diameter of the first interlayer connection conductor 34 is preferably equal to or smaller than the diameter of the second interlayer connection conductor 32 or 33.

[0150] [Fifth embodiment] In the fifth embodiment of the present invention, a recess is provided in the second main surface of the insulating base material, and the insulating base material is bent at the recess toward the first main surface.

[0151] FIG. 11 is a cross-sectional view schematically showing an example of a multilayer circuit board according to a fifth embodiment of the present invention.

[0152] 11, a recess 10M is provided on the second main surface 10b of the insulating base material 10, and the insulating base material 10 is bent toward the first main surface 10a at the recess 10M. The depth and bending angle of the recess 10M are not particularly limited. Furthermore, a plurality of recesses 10M may be provided.

[0153] By forming a recess on the second main surface and thinning it, the insulating substrate becomes more flexible, which makes it possible to change the direction of the antenna surface for different frequencies or bands, for example, and thus give a single multilayer circuit board multiple antenna directivities.

[0154] [Sixth embodiment] In the sixth embodiment of the present invention, the material constituting the insulating layer on which the second interlayer connection conductor connected to the radiation electrode is provided is different from the material constituting the insulating layer on which the first interlayer connection conductor connected to the mounting electrode is provided. For example, the dielectric constant of the insulating layer on which the second interlayer connection conductor connected to the radiation electrode is provided is higher than the dielectric constant of the insulating layer on which the first interlayer connection conductor connected to the mounting electrode is provided.

[0155] FIG. 12 is a cross-sectional view schematically showing an example of a multilayer circuit board according to a sixth embodiment of the present invention.

[0156] 12, insulating substrate 10 includes insulating layer 11 and insulating layer 12 made of a material different from that of insulating layer 11. For example, insulating substrate 10 includes insulating layer 11 and insulating layer 12 having a higher dielectric constant than insulating layer 11.

[0157] 12, the insulating layer 11 is provided with a first interlayer connection conductor 31, and the insulating layer 12 is provided with a second interlayer connection conductor 32 or 33. However, the boundary between the insulating layer 11 and the insulating layer 12 is not particularly limited, and it is sufficient that the material constituting the insulating layer 12, on which the second interlayer connection conductor (second interlayer connection conductor 33 in FIG. 12) connected to the radiation electrode E2 is provided, is different from the material constituting the insulating layer 11, on which the first interlayer connection conductor 31 connected to the mounting electrode E1 is provided. For example, the insulating layer 11 may be provided with the first interlayer connection conductor 31 or 34, or the second interlayer connection conductor 32 or 33. Similarly, the insulating layer 12 may be provided with the first interlayer connection conductor 31 or 34, or the second interlayer connection conductor 32 or 33.

[0158] The insulating layer 11 is a resin insulating layer containing, for example, a thermoplastic resin as a main component. Examples of the thermoplastic resin include a liquid crystal polymer, a fluororesin, a thermoplastic polyimide resin, a polyether ether ketone resin, and a polyphenylene sulfide resin.

[0159] The insulating layer 12 is a resin insulating layer whose main component is, for example, a thermosetting resin, such as an epoxy resin, a phenol resin, a polyimide resin or a modified resin thereof, or an acrylic resin.

[0160] The insulating layer 12 may be a resin insulating layer containing an inorganic material such as a ceramic filler. In this case, the insulating layer 12 may be a resin insulating layer containing a thermoplastic resin as a main component, or a resin insulating layer containing a thermosetting resin as a main component.

[0161] Alternatively, the insulating layer 12 may be a ceramic insulating layer whose main component is ceramic such as low-temperature co-fired ceramic (LTCC), high-temperature co-fired ceramic (HTCC), etc. The insulating layer 12 may be a combination of a resin insulating layer and a ceramic insulating layer.

[0162] For example, by making the dielectric constant of the insulating layer higher on the radiation electrode side than on the mounting electrode side, the degree of freedom in the antenna's bandwidth range can be increased. On the other hand, since the mounting electrode side contains many signal lines and other wiring whose characteristics are important, lowering the dielectric constant of the insulating layer can improve insertion loss. In this way, stacking multiple types of insulating layers on the same multilayer circuit board increases the degree of design freedom.

[0163] In this embodiment, an insulating layer with a high dielectric constant also has a high dielectric loss tangent. Therefore, in the sixth embodiment of the present invention, it is preferable that the dielectric constant of the insulating layer on which the second interlayer connection conductor connected to the radiation electrode is provided is higher than the dielectric constant of the insulating layer on which the first interlayer connection conductor connected to the mounting electrode is provided, or that the dielectric loss tangent of the insulating layer on which the second interlayer connection conductor connected to the radiation electrode is provided is higher than the dielectric loss tangent of the insulating layer on which the first interlayer connection conductor connected to the mounting electrode is provided, or both.

[0164] In the above case, the dielectric constant or dielectric dissipation factor of the insulating layer is lower on the mounting electrode side than on the radiating electrode side. By placing the wiring line that runs from the integrated circuit to the antenna on the mounting surface side, it is expected that the insertion loss (IL) will be improved by increasing the conductor width.

[0165] On the other hand, the dielectric constant or dielectric loss tangent of the insulating layer is higher on the radiation electrode side than on the mounting electrode side. This makes it easier to adjust the frequency bandwidth of the antenna. In addition, the antenna size can be reduced, which allows for a more compact module.

[0166] In the multilayer circuit board 1F shown in Figure 12, for example, a first substrate portion including an insulating layer 11 on which a first interlayer connection conductor 31 connected to the mounting electrode E1 is provided, and a second substrate portion including an insulating layer 12 on which a second interlayer connection conductor (second interlayer connection conductor 33 in Figure 12) connected to the radiation electrode E2 is provided may be joined by a method such as lamination.

[0167] FIG. 13 is a cross-sectional view schematically showing another example of the multilayer circuit board according to the sixth embodiment of the present invention.

[0168] As in the multilayer circuit board 1Fa shown in Fig. 13, a first substrate portion including an insulating layer 11 provided with a first interlayer connection conductor 31 connected to the mounting electrode E1 and a second substrate portion including an insulating layer 12 provided with a second interlayer connection conductor (second interlayer connection conductor 33 in Fig. 12) connected to the radiating electrode E2 may be joined via a conductive bonding material 150 such as solder. In this case, the electrodes of the first substrate portion and the second substrate portion are joined via the conductive bonding material 150. By joining the second substrate portion provided with the radiating electrode E2 to the first substrate portion, the required band of the antenna can be adjusted, thereby improving the degree of freedom.

[0169] [Seventh embodiment] In the seventh embodiment of the present invention, the radiation electrodes have different inclinations.

[0170] FIG. 14 is a cross-sectional view schematically showing an example of a multilayer circuit board according to a seventh embodiment of the present invention.

[0171] In the multilayer circuit board 1G shown in FIG. 14, two or more radiation electrodes E2 are provided on the main surface of the same insulating layer 11, and the inclinations of the radiation electrodes E2 with respect to the first main surface 10a are different from each other.

[0172] The multilayer circuit board 1G can be manufactured by, for example, changing the orientation of the radiation electrode E2 on the second main surface 10b side during collective pressing.

[0173] By tilting the radiation electrode in multiple directions, it is possible to create a structure in which the directivity of the antenna can be changed.

[0174] The number of radiating electrodes E2 may be two, or may be three or more. The radiating electrodes E2 do not necessarily have to be provided on the second main surface 10b. As long as the inclinations of the radiating electrodes E2 with respect to the first main surface 10a are different, some radiating electrodes E2 may be parallel to the first main surface 10a. Furthermore, when three or more radiating electrodes E2 are provided, some of the radiating electrodes E2 may have the same inclination.

[0175] [Eighth embodiment] In the eighth embodiment of the present invention, the area of ​​the main surface of the insulating layer on which the radiation electrode is provided is larger than the area of ​​the main surface of the insulating layer on which the mounting electrode is provided.

[0176] FIG. 15 is a cross-sectional view schematically showing an example of a multilayer circuit board according to an eighth embodiment of the present invention.

[0177] 15, the area of ​​the main surface (second main surface 10b in FIG. 15) of the insulating layer 11 on which the radiating electrode E2 is provided is larger than the area of ​​the main surface (first main surface 10a in FIG. 15) of the insulating layer 11 on which the mounting electrode E1 is provided. The radiating electrode E2 does not necessarily have to be provided on the second main surface 10b.

[0178] By making the area of ​​the main surface on the radiation electrode side larger than the area of ​​the main surface on the mounting electrode side, the radiation electrode can be expanded within the limited board size, thereby improving the characteristics.

[0179] [Ninth embodiment] In the ninth embodiment of the present invention, electronic components are mounted on the first main surface.

[0180] FIG. 16 is a cross-sectional view schematically showing an example of a multilayer circuit board according to a ninth embodiment of the present invention.

[0181] 16, an electronic component 100 is mounted on a first main surface 10a of a multilayer circuit board 1I. The electronic component 100 is, for example, an integrated circuit (IC) or a connector. The electronic component 100 is connected to the multilayer circuit board 1I via a conductive bonding material 150 such as solder.

[0182] By mounting electronic components on the first main surface, an integrated module substrate can be provided. In particular, by arranging the first interlayer connection conductors 31 on the mounting electrodes E1 side, electronic components with narrow mounting bump pitches can be mounted.

[0183] [Tenth embodiment] In the tenth embodiment of the present invention, an insulating protective layer is provided on the first main surface.

[0184] FIG. 17 is a cross-sectional view schematically showing an example of a multilayer circuit board according to a tenth embodiment of the present invention.

[0185] In the multilayer circuit board 1J shown in Fig. 17, an insulating protective layer 40 is provided on the first main surface 10a. At least a portion of the mounting electrode E1 is exposed from the protective layer 40. As shown in Fig. 17, the insulating protective layer 40 may be provided on the second main surface 10b. The protective layer 40 is, for example, a coverlay, a resist layer, or the like.

[0186] By providing a protective layer on the surface of a multilayer circuit board, the adhesive strength between the insulating layer and the conductor layer is improved, making it difficult for the conductor layer to peel off from the insulating layer. In particular, when mounting electrodes are densely arranged on the first main surface, the protective layer can prevent short circuits or migration between lands due to foreign matter, etc.

[0187] [Other embodiments] The multilayer circuit board of the present invention is not limited to the above-described embodiment, and various applications and modifications can be made within the scope of the present invention with respect to the configuration, manufacturing conditions, etc. of the multilayer circuit board.

[0188] For example, the first interlayer connection conductor 31 may be provided so as to penetrate one insulating layer, or may be provided so as to penetrate two or more insulating layers. When the first interlayer connection conductor 31 is provided so as to penetrate two or more insulating layers, the configurations of the insulating layers may be the same as or different from each other. Furthermore, when the first interlayer connection conductor 31 is provided so as to penetrate two or more insulating layers, the thicknesses of the insulating layers may be the same as or different from each other.

[0189] The second interlayer connection conductor 32 may be provided so as to penetrate one insulating layer, or may be provided so as to penetrate two or more insulating layers. When the second interlayer connection conductor 32 is provided so as to penetrate two or more insulating layers, the configurations of the insulating layers may be the same as or different from each other. Furthermore, when the second interlayer connection conductor 32 is provided so as to penetrate two or more insulating layers, the thicknesses of the insulating layers may be the same as or different from each other.

[0190] The second interlayer connection conductor 33 may be provided so as to penetrate two insulating layers, or may be provided so as to penetrate three or more insulating layers. The insulating layers may have the same configuration or different thicknesses.

[0191] The first interlayer connection conductor 34 may be provided so as to penetrate two insulating layers, or may be provided so as to penetrate three or more insulating layers. When the first interlayer connection conductor 34 is provided so as to penetrate two or more insulating layers, the configurations of the insulating layers may be the same as or different from one another. Furthermore, when the first interlayer connection conductor 34 is provided so as to penetrate two or more insulating layers, the thicknesses of the insulating layers may be the same as or different from one another.

[0192] The present specification discloses the following:

[0193] <1> an insulating substrate formed by stacking a plurality of insulating layers and having a first main surface and a second main surface opposing each other in the stacking direction; a plurality of conductor layers provided between the insulating layers, on the first principal surface, or on the second principal surface; a plurality of interlayer connection conductors provided to penetrate the insulating layers in the stacking direction; a mounting electrode disposed on the first main surface; a radiation electrode disposed on the second principal surface side of the mounting electrode in the stacking direction, the conductor layers include a first conductor layer, a second conductor layer, a third conductor layer, and a fourth conductor layer, all of which are made of Cu foil; the interlayer connection conductors include a first interlayer connection conductor sandwiched between the first conductor layer and the second conductor layer in the stacking direction, and a second interlayer connection conductor sandwiched between the third conductor layer and the fourth conductor layer in the stacking direction; the first interlayer connection conductor includes, in the stacking direction, a first portion made of a single metal containing Cu as a main component, and a second portion made of an alloy material containing two or more metals or a composite material containing one or more metals and a resin; one end of the first portion is joined to the first conductor layer, and the other end of the first portion is joined to one end of the second portion; the second interlayer connection conductor includes a third portion made of an alloy material containing two or more kinds of metals or a composite material containing one or more kinds of metals and a resin, one end of the third portion is joined to the third conductor layer, and the other end of the third portion is joined to the fourth conductor layer; the first conductor layer or the second conductor layer connected to at least one of the first interlayer connection conductors is the mounting electrode; the radiation electrode is one of the conductor layers that is disposed closest to the second principal surface, a multilayer circuit board, wherein the third conductor layer or the fourth conductor layer connected to at least one of the second interlayer connection conductors is the radiation electrode;

[0194] <2> the first conductor layer connected to at least one of the first interlayer connection conductors is the mounting electrode; <1> The multilayer circuit board according to claim 1.

[0195] <3> the insulating layer on which the first interlayer connection conductor is provided and the insulating layer on which the second interlayer connection conductor is provided are both resin insulating layers containing resin as a main component; <1> or <2> The multilayer circuit board according to claim 1.

[0196] <4> the second portion is made of an alloy material containing two or more metals, an intermediate layer containing the metal contained in the second portion and Cu is formed at an end portion of the second portion on the first portion side; the third portion is made of an alloy material containing two or more metals, an intermediate layer containing the metal contained in the third portion and Cu is formed at an end portion on the third conductor layer side and an end portion on the fourth conductor layer side in the third portion; <1> ~ <3> 10. The multilayer circuit board according to claim 9, wherein the first and second electrodes are formed on the first and second substrates.

[0197] <5> the other end of the second portion is joined to the second conductor layer; <1> ~ <4> 10. The multilayer circuit board according to claim 9, wherein the first and second electrodes are formed on the first and second substrates.

[0198] <6> the first interlayer connection conductor further includes a fourth portion made of a single metal containing Cu as a main component; one end of the fourth portion is joined to the other end of the second portion, and the other end of the fourth portion is joined to the second conductor layer; <1> ~ <4> 10. The multilayer circuit board according to claim 9, wherein the first and second electrodes are formed on the first and second substrates.

[0199] <7> The height of the second interlayer connection conductor is greater than the height of the first interlayer connection conductor. <1> ~ <6> 10. The multilayer circuit board according to claim 9, wherein the first and second electrodes are formed on the first and second substrates.

[0200] <8> the diameter of the second interlayer connection conductor is equal to or greater than the diameter of the first interlayer connection conductor; <1> ~ <7> 10. The multilayer circuit board according to claim 9, wherein the first and second electrodes are formed on the first and second substrates.

[0201] <9> the first interlayer connection conductors are provided on the insulating layers adjacent to each other in the stacking direction, <1> ~ <8> 10. The multilayer circuit board according to claim 9, wherein the first and second electrodes are formed on the first and second substrates.

[0202] <10> the first interlayer connection conductor and the second interlayer connection conductor are provided in the insulating layer of the same layer; <1> ~ <9> 10. The multilayer circuit board according to claim 9, wherein the first and second electrodes are formed on the first and second substrates.

[0203] <11> When viewed from the stacking direction, the first interlayer connection conductor overlaps with at least a part of the first or second interlayer connection conductor adjacent to it in the stacking direction. <1> ~ <10> 10. The multilayer circuit board according to claim 9, wherein the first and second electrodes are formed on the first and second substrates.

[0204] <12> a recess is provided on the second main surface of the insulating base material; the insulating base material is bent toward the first main surface at the recess; <1> ~ <11> 10. The multilayer circuit board according to claim 9, wherein the first and second electrodes are formed on the first and second substrates.

[0205] <13> a material constituting the insulating layer on which the second interlayer connection conductor connected to the radiation electrode is provided is different from a material constituting the insulating layer on which the first interlayer connection conductor connected to the mounting electrode is provided; <1> ~ <12> 10. The multilayer circuit board according to claim 9, wherein the first and second electrodes are formed on the first and second substrates.

[0206] <14> the dielectric constant of the insulating layer on which the second interlayer connection conductor connected to the radiation electrode is provided is higher than the dielectric constant of the insulating layer on which the first interlayer connection conductor connected to the mounting electrode is provided; <1> ~ <13> 10. The multilayer circuit board according to claim 9, wherein the first and second electrodes are formed on the first and second substrates.

[0207] <15> a first substrate portion including the insulating layer on which the second interlayer connection conductor connected to the radiation electrode is provided, and a second substrate portion including the insulating layer on which the first interlayer connection conductor connected to the mounting electrode is provided are joined together; <13> or <14> The multilayer circuit board according to claim 1.

[0208] <16> two or more of the radiation electrodes are provided on a main surface of the insulating layer of the same layer, the radiation electrodes have different inclinations with respect to the first principal surface; <1> ~ <15> 10. The multilayer circuit board according to claim 9, wherein the first and second electrodes are formed on the first and second substrates.

[0209] <17> an area of ​​a main surface of the insulating layer on which the radiation electrode is provided is larger than an area of ​​a main surface of the insulating layer on which the mounting electrode is provided; <1> ~ <16> 10. The multilayer circuit board according to claim 9, wherein the first and second electrodes are formed on the first and second substrates.

[0210] <18> Further, an electronic component is mounted on the first main surface. <1> ~ <17> 10. The multilayer circuit board according to claim 9, wherein the first and second electrodes are formed on the first and second substrates.

[0211] <19> Further comprising an insulating protective layer provided on the first main surface. <1> ~ <18> 10. The multilayer circuit board according to claim 9, wherein the first and second electrodes are formed on the first and second substrates.

[0212] <20> The insulating layer includes a layer containing a thermoplastic resin as a main component. <1> ~ <19> 10. The multilayer circuit board according to claim 9, wherein the first and second electrodes are formed on the first and second substrates. [Explanation of symbols]

[0213] 1, 1A, 1B, 1C, 1D, 1E, 1F, 1Fa, 1G, 1H, 1I, 1J multilayer circuit board 10. Insulating substrate 10a First principal surface 10b Second principal surface 10M recess 11, 12 Insulation layer 20 Conductor layer 21 First conductor layer 22 Second conductor layer 23 Third conductor layer 24 Fourth conductor layer 30 Interlayer connecting conductor 31, 34 First interlayer connection conductor 31A, 34A 1st part 31B, 34B 2nd part 32, 33 Second interlayer connecting conductor 32A, 33A 3rd part 34C Part 4 40 protective layer 51, 52, 53, 54 Middle class 100 Electronic Components 110 Integrated Circuits (ICs) 120 High-frequency components 130 Connector 140 Dielectric Substrate 150 Conductive bonding material E1 Mounting electrode E2 radiation electrode

Claims

1. an insulating substrate formed by stacking a plurality of insulating layers and having a first main surface and a second main surface opposing each other in a stacking direction; a plurality of conductor layers provided between the insulating layers, on the first principal surface, or on the second principal surface; a plurality of interlayer connection conductors provided to penetrate the insulating layers in the stacking direction; a mounting electrode disposed on the first main surface; a radiation electrode disposed closer to the second principal surface than the mounting electrode in the stacking direction, the conductor layers include a first conductor layer, a second conductor layer, a third conductor layer, and a fourth conductor layer, all of which are made of Cu foil; the interlayer connection conductors include a first interlayer connection conductor sandwiched between the first conductor layer and the second conductor layer in the stacking direction, and a second interlayer connection conductor sandwiched between the third conductor layer and the fourth conductor layer in the stacking direction; the first interlayer connection conductor includes, in the stacking direction, a first portion made of a single metal containing Cu as a main component, and a second portion made of an alloy material containing two or more metals or a composite material containing one or more metals and a resin; one end of the first portion is joined to the first conductor layer, and the other end of the first portion is joined to one end of the second portion; the second interlayer connection conductor includes a third portion made of an alloy material containing two or more kinds of metals or a composite material containing one or more kinds of metals and a resin, one end of the third portion is joined to the third conductor layer, and the other end of the third portion is joined to the fourth conductor layer; the first conductor layer or the second conductor layer connected to at least one of the first interlayer connection conductors is the mounting electrode, the radiation electrode is a conductor layer that is disposed closest to the second principal surface among the conductor layers, a third conductor layer or a fourth conductor layer connected to at least one of the second interlayer connection conductors, the third conductor layer or the fourth conductor layer being the radiation electrode;

2. The multilayer circuit board according to claim 1 , wherein the first conductor layer connected to at least one of the first interlayer connection conductors is the mounting electrode.

3. 3. The multilayer circuit board according to claim 1, wherein the insulating layer on which the first interlayer connection conductor is provided and the insulating layer on which the second interlayer connection conductor is provided are both resin insulating layers containing resin as a main component.

4. the second portion is made of an alloy material containing two or more metals, an intermediate layer containing Cu and the metal contained in the second portion is formed at an end of the second portion on the first portion side; the third portion is made of an alloy material containing two or more metals, 3. The multilayer circuit board according to claim 1, wherein an intermediate layer containing the metal contained in the third portion and Cu is formed in the third portion at an end on the third conductor layer side and an end on the fourth conductor layer side.

5. 3. The multilayer circuit board according to claim 1, wherein the other end of the second portion is joined to the second conductor layer.

6. the first interlayer connection conductor further includes a fourth portion made of a single metal containing Cu as a main component; 3. The multilayer circuit board according to claim 1, wherein one end of the fourth portion is joined to the other end of the second portion, and the other end of the fourth portion is joined to the second conductor layer.

7. 3. The multilayer circuit board according to claim 1, wherein the height of the second interlayer connection conductor is greater than the height of the first interlayer connection conductor.

8. 3. The multilayer circuit board according to claim 1, wherein the diameter of the second interlayer connection conductor is equal to or greater than the diameter of the first interlayer connection conductor.

9. 3. The multilayer circuit board according to claim 1, wherein the first interlayer connection conductors are provided on the insulating layers adjacent to each other in the stacking direction.

10. 3. The multilayer circuit board according to claim 1, wherein the first interlayer connection conductor and the second interlayer connection conductor are provided in the insulating layer of the same layer.

11. 3. The multilayer circuit board according to claim 1, wherein, when viewed from the stacking direction, the first interlayer connection conductor overlaps at least a portion of the first or second interlayer connection conductor adjacent to the first or second interlayer connection conductor in the stacking direction.

12. a recess is provided on the second main surface of the insulating substrate, The multilayer circuit board according to claim 1 , wherein the insulating substrate is bent toward the first main surface at the recess.

13. 3. The multilayer circuit board according to claim 1, wherein a material constituting the insulating layer on which the second interlayer connection conductor connected to the radiation electrode is provided is different from a material constituting the insulating layer on which the first interlayer connection conductor connected to the mounting electrode is provided.

14. 3. The multilayer circuit board according to claim 1, wherein the dielectric constant of the insulating layer on which the second interlayer connection conductor connected to the radiation electrode is provided is higher than the dielectric constant of the insulating layer on which the first interlayer connection conductor connected to the mounting electrode is provided.

15. 14. The multilayer circuit board according to claim 13, wherein a first substrate portion including the insulating layer on which the second interlayer connection conductor connected to the radiation electrode is provided is joined to a second substrate portion including the insulating layer on which the first interlayer connection conductor connected to the mounting electrode is provided.

16. two or more of the radiation electrodes are provided on the main surface of the insulating layer of the same layer, The multilayer circuit board according to claim 1 , wherein the radiation electrodes are inclined at different angles relative to the first main surface.

17. 3. The multilayer circuit board according to claim 1, wherein an area of ​​the main surface of the insulating layer on which the radiation electrode is provided is larger than an area of ​​the main surface of the insulating layer on which the mounting electrode is provided.

18. The multilayer circuit board according to claim 1 , further comprising an electronic component mounted on the first main surface.

19. The multilayer circuit board according to claim 1 , further comprising an insulating protective layer provided on the first main surface.

20. The multilayer circuit board according to claim 1 or 2, wherein the insulating layer includes a layer containing a thermoplastic resin as a main component.

Citation Information

Patent Citations

  • Compound wiring board structure and its production process

    JP2006237233A

  • Printed wiring board and manufacturing method thereof

    JP2010123830A

  • Printed circuit board

    JP2019080034A

  • Resin multilayered substrate and resin multilayered substrate manufacturing method

    WO2020122156A1

  • Antenna installation structure and electronic device

    WO2021060168A1