Semiconductor element drive circuit

Abstract

Driving circuits (50a, 50b) each comprise a control unit (4a, 4b) that controls one semiconductor element of semiconductor elements (5a, 5b) of upper and lower arms which are connected in series, and that applies a gate voltage to the semiconductor element (5a, 5b) to drive the semiconductor element (5a, 5b). The driving circuits (50a, 50b) detect a short circuit of the semiconductor elements (5a, 5b) of the upper and lower arms on the basis of a main terminal voltage of the semiconductor elements (5a, 5b). The control units (4a, 4b) each perform control to temporarily raise the gate voltage applied to the semiconductor element (5a or 5b) to a first voltage which is higher than a prescribed voltage when the semiconductor element (5a or 5b) of an arm to be driven is turned on. The control unit (4a or 4b) that controls the driving of the arm which differs from the arm to be driven detects a short circuit of the semiconductor elements (5a, 5b) of the upper and lower arms on the basis of the main terminal voltage.

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor element drive circuit that drives semiconductor elements of upper and lower arms connected in series. [Background technology]

[0002] In a power conversion device having upper and lower arm semiconductor elements connected in series, a phenomenon called an upper and lower arm short circuit may occur, in which both upper and lower arm semiconductor elements are accidentally turned on simultaneously. When an upper and lower arm short circuit occurs, a large short circuit current flows through the upper and lower arm semiconductor elements, which may damage the semiconductor elements. Patent Document 1 listed below discloses a technology for detecting an upper and lower arm short circuit based on the voltage of a sense resistor connected to the sense terminal of the semiconductor element and the collector voltage of the semiconductor element.

[0003] There are various methods for detecting short circuits in the upper and lower arms. When the semiconductor element is an IGBT (Insulated Gate Bipolar Transistor), typical methods include monitoring the collector current, the emitter current, and the collector voltage. In this article, the method of detecting short circuits in the upper and lower arms based on the collector voltage is called the "collector voltage detection method."

[0004] In the collector voltage detection method, the detection unit is provided with a first capacitor for holding a detection voltage, and one end of the first capacitor is connected to the collector of the semiconductor element via at least one resistor, and a second capacitor may be connected in parallel across both ends of the at least one resistor. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Publication No. 2019-187172 Summary of the Invention [Problem to be solved by the invention]

[0006] In the collector voltage detection method, if a semiconductor element in one of the series-connected upper and lower arms is on and a semiconductor element in the opposite arm is accidentally turned on, the resistance values ​​of the semiconductor elements in the upper and lower arms will be similar, and the voltage applied to the semiconductor element in the opposite arm will be divided according to the respective resistance values ​​of the semiconductor elements in the upper and lower arms. This phenomenon is referred to as "voltage sharing" in this paper. The collector voltage of the semiconductor element in the opposite arm that was accidentally turned on will drop sharply due to voltage sharing, causing a current from the detection unit to flow to the collector via the second capacitor. This current is in a direction that inhibits the charging of the first capacitor, resulting in a delay in the detection of a short circuit in the upper and lower arms. For this reason, there is a need to prevent this detection delay in the collector voltage detection method.

[0007] The present disclosure has been made in view of the above, and has an object to provide a drive circuit for a semiconductor element that can prevent detection delays in the collector voltage detection method. [Means for solving the problem]

[0008] To solve the above-mentioned problems and achieve the object, a semiconductor element drive circuit according to the present disclosure includes a control unit that individually controls one of the semiconductor elements of upper and lower arms connected in series and applies a gate voltage to the semiconductor element to drive the semiconductor element. The semiconductor element drive circuit detects a short circuit between the semiconductor elements of the upper and lower arms based on the main terminal voltage of the semiconductor element. When the semiconductor element of the arm to be driven is turned on, each control unit controls the gate voltage applied to the semiconductor element to temporarily increase to a first voltage higher than a specified voltage. A control unit that controls the drive of an arm other than the arm to be driven detects a short circuit between the semiconductor elements of the upper and lower arms based on the main terminal voltage. [Effects of the Invention]

[0009] The semiconductor element drive circuit according to the present disclosure has the effect of preventing detection delays in the collector voltage detection method. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is a schematic circuit diagram illustrating the connection relationship between a drive circuit according to a first embodiment and a semiconductor element to be driven. [Figure 2] FIG. 1 is a diagram showing an example of a power conversion device to which a drive circuit according to a first embodiment is applied; [Figure 3] FIG. 1 is a diagram illustrating a short-circuit mode assumed in the drive circuit according to the first embodiment. [Figure 4] FIG. 1 is a diagram showing an example of a short-circuit detection circuit provided in a drive circuit according to the first embodiment; [Figure 5] This diagram explains the operation of a general short circuit detection circuit in short circuit mode (1). [Figure 6] This diagram explains the operation of a general short circuit detection circuit in short circuit mode (2). [Figure 7] This diagram explains the displacement current that can flow in a typical short circuit detection circuit in short circuit mode (2). [Figure 8] FIG. 1 is a diagram illustrating a control method in a drive circuit according to the first embodiment. [Figure 9] FIG. 1 is a diagram showing an example of a hardware configuration that realizes the functions of a control unit included in a drive circuit according to a first embodiment; [Figure 10] FIG. 10 is a diagram illustrating a first control method in a drive circuit according to a second embodiment. [Figure 11] FIG. 10 is a diagram illustrating a second control method in the drive circuit according to the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0011] A semiconductor device driver circuit (hereinafter referred to as "driver circuit") according to an embodiment of the present disclosure will be described in detail below with reference to the accompanying drawings. In the following description, multiple components of the same type will be indicated by subscripted symbols, but the subscripts will be omitted where necessary to distinguish between the individual components.

[0012] Embodiment 1 1 is a schematic circuit diagram illustrating the connection relationship between a drive circuit according to embodiment 1 and a semiconductor element to be driven. Drive circuit 50 according to embodiment 1 individually drives one of upper and lower arm semiconductor elements 5a and 5b connected in series. Series-connected semiconductor elements 5a and 5b are connected to both ends of DC power supply 1, and operate to open and close the flow of power supplied from DC power supply 1, i.e., switch between supplying and cutting off power.

[0013] Each drive circuit 50 is connected to the collector (C), gate (G), and emitter (E) of the semiconductor element 5. Drive circuit 50a drives the semiconductor element 5a of the upper arm, and drive circuit 50b drives the semiconductor element 5b of the lower arm. While FIG. 1 illustrates a case where the semiconductor elements 5a and 5b are IGBTs, they may be semiconductor elements other than IGBTs. Another example of the semiconductor elements 5a and 5b is a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). Furthermore, while FIG. 1 illustrates the semiconductor elements 5a and 5b as single elements, each of the semiconductor elements 5a and 5b may be configured by connecting multiple elements in parallel.

[0014] The drive circuit 50a includes a gate drive circuit 2a, a short-circuit detection circuit 3a, and a control unit 4a. Similarly, the drive circuit 50b includes a gate drive circuit 2b, a short-circuit detection circuit 3b, and a control unit 4b. The gate drive circuit 2 applies a drive voltage between the gate and emitter of the semiconductor element 5 to drive the semiconductor element 5. The short-circuit detection circuit 3 detects a short circuit between the upper and lower arm semiconductor elements 5a and 5b based on the collector-emitter voltage of the semiconductor element 5. In this document, the drive voltage applied between the gate and emitter is referred to as the "gate voltage" as appropriate, and the collector-emitter voltage is referred to as the "main terminal voltage" as appropriate. The control unit 4 controls the drive of the semiconductor element 5 and, if the short-circuit detection circuit 3 detects a short circuit between the upper and lower arm semiconductor elements 5a and 5b, turns off the semiconductor element 5 to be controlled.

[0015] FIG. 2 is a diagram illustrating an example of a power conversion device to which the drive circuit according to the first embodiment is applied. In FIG. 2, components identical or equivalent to those in FIG. 1 are denoted by the same reference numerals. In addition to semiconductor elements 5a and 5b, FIG. 2 also illustrates a set of upper and lower arm semiconductor elements 5c and 5d connected in series and a set of upper and lower arm semiconductor elements 5e and 5f connected in series. These six semiconductor elements 5a to 5f are connected in a three-phase bridge to form a three-phase inverter circuit, which is connected to a motor 6. The three-phase inverter circuit converts DC power supplied from a DC power source 1 into three-phase AC power for supplying to the motor 6. While FIG. 2 illustrates a case in which the semiconductor elements 5a to 5f are IGBTs, they may also be MOSFETs. Furthermore, while FIG. 2 illustrates a configuration in which a diode is connected in antiparallel to each IGBT, if the semiconductor element 5 is a MOSFET, a body diode of the MOSFET may be used instead.

[0016] The drive circuit 50 according to the first embodiment uses a collector voltage detection method to detect short circuits between the upper and lower arms of the semiconductor elements 5a and 5b. The collector voltage detection method detects short circuits between the upper and lower arms based on the collector-emitter voltage, which is the main terminal voltage of the semiconductor element 5. In the following description, for simplicity, the collector-emitter voltage will be simply referred to as the "collector voltage."

[0017] Fig. 3 is a diagram illustrating short-circuit modes assumed in the drive circuit according to embodiment 1. The short-circuit modes are categorized based on the state of the semiconductor element 5 and the mode of switching control for the semiconductor element 5, and Fig. 3 shows three short-circuit modes (1) to (3).

[0018] Short-circuit mode (1) is a mode in which, when the semiconductor element 5 of one arm is in a short-circuit fault state, the semiconductor element 5 of the opposite arm is turned on, i.e., the semiconductor element 5 of the opposite arm is switched from off to on, causing a short circuit between the upper and lower arms. Short-circuit mode (2) is a mode in which, when the semiconductor element 5 of one arm is on, the semiconductor element 5 of the opposite arm is mistakenly turned on, causing a short circuit between the upper and lower arms. Short-circuit mode (3) is a mode in which the semiconductor elements 5 of the upper and lower arms are turned on simultaneously, causing a short circuit between the upper and lower arms.

[0019] In the drive circuit 50 according to the first embodiment, for any of the three short-circuit modes (1) to (3), it is required to detect the upper and lower arm short circuit in each of these modes and cut off the collector current of the semiconductor element 5 before the amount of current flowing through the semiconductor element 5 reaches the short-circuit tolerance of the semiconductor element 5.

[0020] FIG. 4 is a diagram showing an example of a short-circuit detection circuit provided in the drive circuit according to the first embodiment, illustrating a circuit example using a collector voltage detection method. The short-circuit detection circuit 3 mainly comprises a comparator 11, a detection capacitor 12, a diode 13, and a resistance circuit 15. The resistance circuit 15 includes at least one resistor 16. A capacitor 17 is connected across the resistor 16. If the resistance circuit 15 does not include a physical capacitor, the capacitor 17 refers to the parasitic capacitance of the resistance circuit 15. The collector voltage of the semiconductor element 5, not shown in FIG. 4, is applied to the negative terminal of the comparator 11 via the resistance circuit 15 and the like. A reference voltage Vref is applied to the positive terminal of the comparator 11.

[0021] Next, the operation of the short-circuit detection circuit 3 will be described. First, when the semiconductor element 5 is in the gate-off state, the cathode potential of the diode 13 is set to the GND potential. As a result, the potential on the side connected to the negative terminal of the capacitor 12 is also approximately the GND potential, and the capacitor 12 is not charged. In the short-circuit detection circuit 3, the GND potential is generally set to the emitter potential or negative bias potential of the drive circuit 50. On the other hand, when the semiconductor element 5 is in the gate-on state, the capacitor 12 is charged as the collector voltage increases. The voltage generated across the capacitor 12 is applied to the negative terminal of the comparator 11 as the detection voltage Vsig by the short-circuit detection circuit 3. The detection voltage Vsig increases according to a time constant determined by the resistance values ​​of the resistive elements, including the resistor 16, in the charging path of the capacitor 12 and the capacitance values ​​of the capacitive elements, including the capacitor 17, in the charging path of the capacitor 12.

[0022] The short circuit detection circuit 3 outputs a detection signal when the detection voltage Vsig exceeds the reference voltage Vref. When the detection signal is output from the short circuit detection circuit 3, the control unit 4 can determine that a short circuit has occurred between the upper and lower arms.

[0023] FIG. 5 is a diagram illustrating the operation of a typical short-circuit detection circuit in short-circuit mode (1). First, regarding the symbols used in FIG. 5, "P" is used as a symbol representing the "upper arm" and "N" is used as a symbol representing the "lower arm." Therefore, "P side" means the "upper arm side" and "N side" means the "lower arm side." Furthermore, "Vce_P" means the collector-emitter voltage (collector voltage) of the semiconductor element 5 on the upper arm side, "Vce_N" means the collector-emitter voltage (collector voltage) of the semiconductor element 5 on the lower arm side, and "Vsig_N" means the detection voltage Vsig of the short-circuit detection circuit 3 on the lower arm side. Furthermore, in FIG. 5 and FIGS. 6, 8, 10, and 11 described below, the horizontal axis represents time and the vertical axis represents voltage.

[0024] In short-circuit mode (1), the P-side semiconductor element 5 is short-circuited, so the resistance of the P-side semiconductor element 5 is extremely small. Therefore, when the N-side semiconductor element 5 is turned on at time t1, the voltage divided by the P-side and N-side semiconductor elements 5 is higher for the N-side semiconductor element 5, and the N-side collector voltage Vce_N remains high. Therefore, when the N-side semiconductor element 5 is turned on, as shown in the figure, the N-side collector voltage Vce_N increases the N-side detection voltage Vsig_N, and at time t2 when the detection voltage Vsig_N is about to exceed the reference voltage Vref, it becomes possible to detect a short circuit in the upper and lower arms. In other words, in short-circuit mode (1), it is possible to detect a short circuit in the upper and lower arms by using the N-side short-circuit detection circuit 3, which is not short-circuited.

[0025] Next, operation in short-circuit mode (2) will be described. Fig. 6 is a diagram illustrating operation in short-circuit mode (2) in a typical short-circuit detection circuit. Fig. 7 is a diagram illustrating displacement current that can flow in a typical short-circuit detection circuit in short-circuit mode (2).

[0026] In Figure 6, consider the case where the N-side semiconductor element 5 is turned on at time t1. Under normal control, the P-side and N-side semiconductor elements 5 are not controlled to be in the on state at the same time, so this case is one in which the N-side semiconductor element 5 is turned on by mistake. In this case, the resistance value of the P-side semiconductor element 5 in the on state is equal to the resistance value of the N-side semiconductor element 5 that is turned on. Therefore, the voltage applied to the P-side and N-side semiconductor elements 5 is divided between them. Figure 6 shows that this phenomenon occurs after time t2, which is after time t1.

[0027] Furthermore, after time t2, charging of capacitor 12 in N-side short-circuit detection circuit 3 is inhibited. As shown in FIG. 6, after time t2, P-side collector voltage Vce_P rises sharply, and accordingly, N-side collector voltage Vce_N drops sharply. As a result, in N-side short-circuit detection circuit 3, a displacement current flows in a direction that inhibits charging of capacitor 12, as shown in FIG. 7. This displacement current discharges the charge in capacitor 12, causing the collector voltage to drop.

[0028] 6, after time t3, the displacement current stops flowing and charging resumes, but it takes until time t4 for the reference voltage Vref to be reached. This causes a detection delay, making it difficult to detect a short circuit in the upper and lower arms before the short circuit withstand capability of the semiconductor element 5 is reached.

[0029] 8 is a diagram illustrating a control method in the drive circuit according to the first embodiment. In each diagram in FIG. 8, the solid lines indicate the operating waveforms according to the conventional method, and the dashed dotted lines indicate the operating waveforms according to the control method of the first embodiment. The operating waveforms indicated by the solid lines are the same as those shown in FIG. .figure The waveforms of the collector voltages Vce_P and Vce_N shown in the middle part of FIG. 8 correspond to "Vce_P" and "Vce_N" in FIG. 6. 1, the solid line represents the detection voltage Vsig_N of the N-side short circuit detection circuit 3 according to the conventional method, and the dashed dotted line represents the detection voltage Vsig_N of the N-side short circuit detection circuit 3 according to the control method of the first embodiment. This represents the detection voltage Vsig_P of the short circuit detection circuit 3 on the P side.

[0030] In the upper part of Figure 8, "Vge_N" refers to the gate-emitter voltage (gate voltage) of the semiconductor element 5 on the lower arm side. "Vge_N0" refers to the specified gate voltage. The "specified voltage" here refers to the gate voltage when the device is in a steady-state on state. "Vge_N1" refers to a voltage higher than the specified voltage Vge_N0. ​​In this paper, "Vge_N1" is referred to as the "first voltage" where appropriate.

[0031] Next, a control method of the first embodiment will be described. When the control unit 4 turns on the semiconductor element 5 of the arm to be driven at time t11, the control unit 4 performs control to temporarily increase the gate voltage Vge_N applied to the semiconductor element 5 to a first voltage Vge_N1 higher than a specified voltage Vge_N0 between time t12 and time t15. The period from time t11 to time t12 may be a specified period of time, or may be any period of time after the gate voltage of the semiconductor element 5 exceeds the mirror voltage.

[0032] When operated using the conventional method, the N-side detection voltage Vsig_N is If the specified voltage Vge_N0 is maintained without changing the gate voltage Vge_N, a phenomenon occurs in which charging of the capacitor 12 is hindered between time t12 and time t13. As a result, the detected voltage Vsig_N However, it takes a time t16 for the voltage to reach the reference voltage Vref.

[0033] In contrast, when the gate voltage Vge_N applied to the N-side semiconductor element 5 is temporarily increased to a first voltage Vge_N1 higher than the specified voltage Vge_N0, as shown in the figure, voltage sharing is performed so that a larger voltage is generated in the P-side semiconductor element 5 to which the relatively low specified voltage Vge_N0 is applied. This allows the upper and lower arm short circuit to be detected at time t14, thereby preventing a detection delay. Furthermore, it is also possible to reduce switching loss and conduction loss in the semiconductor element 5 on the side where the gate voltage Vge is increased.

[0034] The voltage difference between the first voltage Vge_N1 and the specified voltage Vge_N0, i.e., the difference in the gate voltage Vge_N, may be such that a significant difference occurs in the voltage distribution of the collector voltage between the P-side and N-side semiconductor elements 5, and can be determined according to the characteristics of the semiconductor element 5.

[0035] Next, a description will be given of a hardware configuration for realizing the functions of the control unit 4. Fig. 9 is a diagram showing an example of a hardware configuration for realizing the functions of the control unit included in the drive circuit according to embodiment 1. The functions of the control unit 4 are realized by a processor 200 and a memory 202.

[0036] The processor 200 is a CPU (Central Processing Unit, also referred to as a central processing unit, processing unit, arithmetic unit, microprocessor, microcomputer, processor, or DSP (Digital Signal Processor)) or a system LSI (Large Scale Integration). The memory 202 can be exemplified by non-volatile or volatile semiconductor memories such as RAM (Random Access Memory), ROM (Read Only Memory), flash memory, EPROM (Erasable Programmable Read Only Memory), and EEPROM (registered trademark) (Electrically Erasable Programmable Read Only Memory).

[0037] The memory 202 stores a program that executes the functions of the control unit 4 according to the first embodiment. The processor 200 reads the program stored in the memory 202, runs the program, and refers to the data stored in the memory 202, thereby executing the above-described processing.

[0038] As described above, the semiconductor element drive circuit according to the first embodiment includes a control unit that individually controls one of the semiconductor elements of the upper and lower arms connected in series, applies a gate voltage to the semiconductor element to drive it, and detects a short circuit between the upper and lower arm semiconductor elements based on the main terminal voltage of the semiconductor element. In this drive circuit, when the semiconductor element of the driven arm is turned on, each control unit temporarily increases the gate voltage applied to the semiconductor element to a first voltage higher than a specified voltage. The control unit that controls the drive of the arm other than the driven arm detects a short circuit between the upper and lower arm semiconductor elements based on the main terminal voltage. This allows for a drive circuit that can prevent detection delays associated with the collector voltage detection method. Furthermore, it is possible to reduce switching loss and conduction loss in the semiconductor element for which the gate voltage is increased.

[0039] In the above control, the timing for changing the gate voltage to the first voltage may be after a specified time has elapsed since a turn-on command was issued to the semiconductor element of the arm to be driven, or after the gate voltage of the semiconductor element of the arm to be driven exceeds the mirror voltage. If the change is made at such a timing, the control operation can be performed without affecting the switching characteristics.

[0040] Embodiment 2 In the second embodiment, a control method suitable for dealing with the short circuit mode (3) will be described with reference to Fig. 10 and Fig. 11. Fig. 10 is a diagram illustrating a first control method in the drive circuit according to the second embodiment. Fig. 11 is a diagram illustrating a second control method in the drive circuit according to the second embodiment.

[0041] As described above, short-circuit mode (3) is a mode in which the P-side and N-side semiconductor elements 5 are simultaneously turned on, causing a short circuit in the upper and lower arms. In short-circuit mode (3), the P-side and N-side semiconductor elements 5 are simultaneously turned on, so in the control of embodiment 1, the P-side and N-side control units 4 perform control to temporarily increase the gate voltage Vge, i.e., the gate voltages Vge_P and Vge_N. This operation is shown in the center of Figure 10. In Figure 10, the waveform of "Vge_P" is shown with a solid line, and the waveform of "Vge_N" is shown with a dashed dotted line. Furthermore, the waveforms of "Vce_P" and "Vce_N" are each shown with a dashed dotted line.

[0042] When the P-side and N-side semiconductor elements 5 are turned on simultaneously, the P-side and N-side control units 4 operate simultaneously, and control to increase the gate voltages of each is performed simultaneously. This prevents a significant difference in the collector voltage distribution between the P-side and N-side semiconductor elements 5. This may result in a delay in detecting a short circuit in the upper and lower arms.

[0043] Therefore, in the second embodiment, a difference is set between the set values ​​of the voltages for raising the gate voltage Vge between the P-side and N-side. The right side of FIG. 10 shows an example in which the gate voltage Vge_P controlled by the P-side control unit 4 is higher than the gate voltage Vge_N controlled by the N-side control unit 4. That is, when the P-side control unit 4 turns on the semiconductor element 5, it controls the gate voltage applied to the semiconductor element 5 to temporarily increase it to a first voltage Vge_P1, which is higher than the specified voltage Vge_P0 (=Vge_N0), which is the gate voltage during steady-state on. On the other hand, when the N-side control unit 4 turns on the semiconductor element 5, it controls the gate voltage applied to the semiconductor element 5 to temporarily increase it to a second voltage Vge_N2, which is higher than the specified voltage Vge_N0 (=Vge_P0) but lower than the first voltage Vge_P1. This control results in voltage sharing such that a larger collector voltage is generated in the N-side semiconductor element 5 to which the relatively low second voltage Vge_N2 is applied. This makes it possible to detect short circuits in the upper and lower arms while preventing delays in detection.

[0044] 10 illustrates an example in which the first voltage Vge_P1 controlled by the P-side controller 4 is higher than the second voltage Vge_N2 controlled by the N-side controller 4, but this is not limiting. It is sufficient to control the P-side collector voltage Vce_P and the N-side collector voltage Vce_N so that a significant difference occurs between them, so the second voltage Vge_N2 may be higher than the first voltage Vge_P1. Even with this control, it is possible to prevent a detection delay while detecting an upper or lower arm short circuit.

[0045] 10 illustrates an example in which the first voltage Vge_P1 and the second voltage Vge_N2 are both higher than the specified voltage Vge_P0 (=Vge_N0), but this is not limiting. Either the first voltage Vge_P1 or the second voltage Vge_N2 may be lower than the specified voltage Vge_P0 (=Vge_N0). Controlling in this manner also has the effect of enabling detection of upper and lower arm short circuits while preventing a detection delay.

[0046] 11 shows an example in which the first voltage Vge_P1 and the second voltage Vge_N2 are both lower than the specified voltage Vge_P0 (=Vge_N0). The line types are distinguished in the same way as in FIG.

[0047] When the P-side control unit 4 turns on the semiconductor element 5, it controls the gate voltage applied to the semiconductor element 5 to temporarily lower it to a first voltage Vge_P1 that is lower than the specified voltage Vge_P0 (=Vge_N0). On the other hand, when the N-side control unit 4 turns on the semiconductor element 5, it controls the gate voltage applied to the semiconductor element 5 to temporarily lower it to a second voltage Vge_N2 that is lower than the specified voltage Vge_N0 (=Vge_P0) and lower than the first voltage Vge_P1. By controlling in this manner, voltage sharing is performed so that a larger collector voltage is generated in the N-side semiconductor element 5 to which the relatively lower second voltage Vge_N2 is applied. This makes it possible to detect upper and lower arm short circuits while preventing detection delays.

[0048] 11 illustrates a case in which the second voltage Vge_N2 controlled by the N-side control unit 4 is lower than the first voltage Vge_P1 controlled by the P-side control unit 4, but this is not limiting. It is sufficient to control the P-side collector voltage Vce_P and the N-side collector voltage Vce_N so that a significant difference occurs between them, so the first voltage Vge_P1 may be lower than the second voltage Vge_N2. Even with this control, it is possible to prevent a detection delay while detecting an upper or lower arm short circuit.

[0049] Also, Fig. 11 Although the above describes an example in which the first voltage Vge_P1 and the second voltage Vge_N2 are both lower than the specified voltage Vge_P0 (=Vge_N0), the present invention is not limited to this example. Either the first voltage Vge_P1 or the second voltage Vge_N2 may be higher than the specified voltage Vge_P0 (=Vge_N0). Even with this control, it is possible to prevent a detection delay while detecting an upper or lower arm short circuit.

[0050] As described above, the semiconductor element drive circuit according to the second embodiment includes a control unit that individually controls one of the semiconductor elements of the upper and lower arms connected in series, applies a gate voltage to the semiconductor element to drive it, and detects a short circuit between the upper and lower arms' semiconductor elements based on the main terminal voltage of the semiconductor element. In this drive circuit, one of the two control units driving the upper and lower arms' semiconductor elements controls the gate voltage applied to the semiconductor element to temporarily increase to a first voltage higher than a specified voltage when the semiconductor element is turned on. Each control unit controls the gate voltage applied to the semiconductor element to temporarily increase to the first voltage higher than the specified voltage when the semiconductor element of the arm to be driven is turned on. The other of the two control units controls the gate voltage applied to the semiconductor element to temporarily change to a second voltage higher or lower than the first voltage when the semiconductor element is turned on. This makes it possible to obtain a drive circuit that can prevent detection delays in the collector voltage detection method. Furthermore, the drive circuit according to the second embodiment can handle the extremely special case of short circuit mode (3), thereby ensuring reliable implementation of control to prevent detection delays.

[0051] In the above control, one of the two control units driving the semiconductor elements of the upper and lower arms may perform control to temporarily lower the gate voltage applied to the semiconductor element to a first voltage lower than a specified voltage when the semiconductor element is turned on. In this case, the other of the two control units performs control to temporarily change the gate voltage applied to the semiconductor element to a second voltage higher or lower than the first voltage when the semiconductor element is turned on.

[0052] In the above control, when the first voltage is higher than the second voltage, the control unit that applies the second voltage can detect a short circuit in the semiconductor elements of the upper and lower arms based on the main terminal voltage. Also, when the first voltage is lower than the second voltage, the control unit that applies the first voltage can detect a short circuit in the semiconductor elements of the upper and lower arms based on the main terminal voltage.

[0053] In the above control, the timing for changing the gate voltage to the first voltage may be after a specified time has elapsed since a turn-on command was issued to the semiconductor element of the driven arm, or after the gate voltage of the semiconductor element of the driven arm has exceeded the mirror voltage. If the change is made at such a timing, the control operation can be performed without affecting the switching characteristics.

[0054] The configurations shown in the above embodiments are merely examples, and may be combined with other known technologies, or different embodiments may be combined with each other. It is also possible to omit or modify parts of the configurations as long as they do not deviate from the gist of the invention. Various aspects of the present disclosure are summarized below as appendices. [Appendix 1] A semiconductor element drive circuit includes a control unit that individually controls one of upper and lower arm semiconductor elements connected in series to apply a gate voltage to the semiconductor element to drive the semiconductor element, and detects a short circuit of the upper and lower arm semiconductor elements based on a main terminal voltage of the semiconductor element, When the semiconductor element of the arm to be driven is turned on, each of the control units performs control to temporarily increase a gate voltage applied to the semiconductor element to a first voltage that is higher than a specified voltage; The control unit, which controls the drive of the arm different from the arm to be driven, detects a short circuit in the semiconductor elements of the upper and lower arms based on the main terminal voltage. A semiconductor element drive circuit comprising: [Appendix 2] Each of the control units changes the gate voltage to the first voltage after a specified time has elapsed since a turn-on command was issued to the semiconductor element of the arm to be driven. 2. A semiconductor element drive circuit according to claim 1. [Appendix 3] Each of the control units changes the gate voltage of the semiconductor element of the arm to be driven to the first voltage after the gate voltage of the semiconductor element of the arm to be driven exceeds a mirror voltage. 2. A semiconductor element drive circuit according to claim 1. [Appendix 4] A semiconductor element drive circuit includes a control unit that individually controls one of upper and lower arm semiconductor elements connected in series to apply a gate voltage to the semiconductor element to drive the semiconductor element, and detects a short circuit of the upper and lower arm semiconductor elements based on a main terminal voltage of the semiconductor element, one of the two control units that drive the semiconductor elements of the upper and lower arms controls, when turning on the semiconductor element, to temporarily increase a gate voltage applied to the semiconductor element to a first voltage that is higher than a specified voltage; The other of the two control units performs control to temporarily change the gate voltage applied to the semiconductor element to a second voltage that is higher or lower than the first voltage when the semiconductor element is turned on. A semiconductor element drive circuit comprising: [Appendix 5] A semiconductor element drive circuit includes a control unit that individually controls one of upper and lower arm semiconductor elements connected in series to apply a gate voltage to the semiconductor element to drive the semiconductor element, and detects a short circuit of the upper and lower arm semiconductor elements based on a main terminal voltage of the semiconductor element, one of the two control units that drive the semiconductor elements of the upper and lower arms performs control to temporarily lower a gate voltage applied to the semiconductor element to a first voltage that is lower than a specified voltage when the semiconductor element is turned on; The other of the two control units performs control to temporarily change the gate voltage applied to the semiconductor element to a second voltage that is higher or lower than the first voltage when the semiconductor element is turned on. A semiconductor element drive circuit comprising: [Appendix 6] When the first voltage is higher than the second voltage, the control unit that applies the second voltage detects a short circuit between the semiconductor elements of the upper and lower arms based on the main terminal voltage; When the first voltage is lower than the second voltage, the control unit that applies the first voltage detects a short circuit in the semiconductor elements of the upper and lower arms based on the main terminal voltage. 6. A semiconductor element drive circuit according to claim 4 or 5. [Appendix 7] Each of the control units changes the gate voltage to the first voltage or the second voltage after a specified time has elapsed since a turn-on command was issued to the semiconductor element of the arm to be driven. 7. A semiconductor element drive circuit according to any one of claims 4 to 6. [Appendix 8] Each of the control units changes the gate voltage of the semiconductor element of the arm to be driven to the first voltage or the second voltage after the gate voltage of the semiconductor element of the arm to be driven exceeds a mirror voltage. 7. A semiconductor element drive circuit according to any one of claims 4 to 6. [Explanation of symbols]

[0055] 1 DC power supply, 2, 2a, 2b gate drive circuit, 3, 3a, 3b short circuit detection circuit, 4, 4a, 4b control unit, 5, 5a, 5b, 5c, 5d, 5e, 5f semiconductor element, 6 motor, 11 comparator, 12, 17 capacitor, 13 diode, 15 resistor circuit, 16 resistor, 50, 50a, 50b drive circuit, 200 processor, 202 memory.

Claims

1. A semiconductor element drive circuit includes a control unit that individually controls one of upper and lower arm semiconductor elements connected in series to apply a gate voltage to the semiconductor element to drive the semiconductor element, and detects a short circuit in the upper and lower arm semiconductor elements based on a main terminal voltage of the semiconductor element, When the semiconductor element of the arm to be driven is turned on, each of the control units performs control to temporarily increase a gate voltage applied to the semiconductor element to a first voltage higher than a specified voltage, The control unit, which controls the drive of the arm different from the arm to be driven, detects a short circuit in the semiconductor elements of the upper and lower arms based on the main terminal voltage. A semiconductor element drive circuit comprising:

2. Each of the control units changes the gate voltage to the first voltage after a specified time has elapsed since a turn-on command was issued to the semiconductor element of the arm to be driven.

2. The semiconductor device drive circuit according to claim 1.

3. Each of the control units changes the gate voltage of the semiconductor element of the arm to be driven to the first voltage after the gate voltage of the semiconductor element of the arm to be driven exceeds a mirror voltage.

2. The semiconductor device drive circuit according to claim 1.

4. A semiconductor element drive circuit includes a control unit that individually controls one of upper and lower arm semiconductor elements connected in series to apply a gate voltage to the semiconductor element to drive the semiconductor element, and detects a short circuit in the upper and lower arm semiconductor elements based on a main terminal voltage of the semiconductor element, one of the two control units that drive the semiconductor elements of the upper and lower arms controls, when turning on the semiconductor element, to temporarily increase a gate voltage applied to the semiconductor element to a first voltage that is higher than a specified voltage; The other of the two control units performs control to temporarily change the gate voltage applied to the semiconductor element to a second voltage that is higher or lower than the first voltage when the semiconductor element is turned on. A semiconductor element drive circuit comprising:

5. A semiconductor element drive circuit includes a control unit that individually controls one of upper and lower arm semiconductor elements connected in series to apply a gate voltage to the semiconductor element to drive the semiconductor element, and detects a short circuit in the upper and lower arm semiconductor elements based on a main terminal voltage of the semiconductor element, one of the two control units that drive the semiconductor elements of the upper and lower arms performs control to temporarily lower a gate voltage applied to the semiconductor element to a first voltage that is lower than a specified voltage when the semiconductor element is turned on; The other of the two control units performs control to temporarily change the gate voltage applied to the semiconductor element to a second voltage that is higher or lower than the first voltage when the semiconductor element is turned on. A semiconductor element drive circuit comprising:

6. When the first voltage is higher than the second voltage, the control unit that applies the second voltage detects a short circuit between the semiconductor elements of the upper and lower arms based on the main terminal voltage; When the first voltage is lower than the second voltage, the control unit that applies the first voltage detects a short circuit in the semiconductor elements of the upper and lower arms based on the main terminal voltage.

6. The semiconductor device drive circuit according to claim 4 or 5.

7. Each of the control units changes the gate voltage to the first voltage or the second voltage after a specified time has elapsed since a turn-on command was issued to the semiconductor element of the arm to be driven.

6. The semiconductor device drive circuit according to claim 4 or 5.

8. Each of the control units changes the gate voltage of the semiconductor element of the arm to be driven to the first voltage or the second voltage after the gate voltage of the semiconductor element of the arm to be driven exceeds a mirror voltage.

6. The semiconductor device drive circuit according to claim 4 or 5.

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