Photoelectric conversion device, photoelectric conversion system, and equipment
The digital still camera employs a noise-resistant photoelectric conversion device with a signal path devoid of sample-and-hold units, utilizing an oversampling analog-to-digital converter to achieve high-precision photoelectric conversion by multiple samplings, thereby reducing pixel noise and enhancing image quality.
Patent Information
- Application Number
- JP2022000022
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-01-01
- Publication Date
- 2026-02-17
- Estimated Expiration
- 2042-01-01
AI Technical Summary
Conventional photoelectric conversion devices suffer from reduced accuracy and image quality due to the influence of random noise in pixel signals during analog-to-digital conversion, as they sample and hold pixel signals before conversion.
A digital still camera with a photoelectric conversion device that includes a pixel, a signal line, a voltage-to-current converter, and an oversampling analog-to-digital converter circuit, where the signal path does not include a sample-and-hold unit, allowing multiple samplings without holding the signal, and uses a ΔΣ analog-to-digital converter to reduce noise.
Enables high-precision, high-quality photoelectric conversion by significantly reducing pixel noise through oversampling, achieving accurate analog-to-digital conversion.
Smart Images

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Figure 0007814939000002 
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Abstract
Description
[Technical Field]
[0001] The present invention relates to a photoelectric conversion device, a photoelectric conversion system, and an apparatus including the same. [Background technology]
[0002] A solid-state imaging device that samples and holds pixel signals and then performs analog-to-digital conversion is disclosed in Patent Document 1. More specifically, the solid-state imaging device disclosed in Patent Document 1 includes a circuit that samples and holds, as a sample signal voltage, the difference between a voltage of a vertical signal line corresponding to the amount of light received by the pixel and a predetermined reference voltage, and an ADC that performs analog-to-digital conversion of the sample signal voltage. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Publication No. 2020-014110 Summary of the Invention [Problem to be solved by the invention]
[0004] However, in a configuration in which pixel signals are sampled and held before being converted to analog-to-digital form, as in conventional devices, the accuracy of the analog-to-digital conversion and, ultimately, image quality may be reduced due to the influence of random noise contained in the pixel signals.
[0005] The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide a technology that is less susceptible to the influence of noise and enables high-precision, high-quality photoelectric conversion. [Means for solving the problem]
[0006] The present disclosure provides a digital still camera comprising: a pixel having a photoelectric conversion element; a signal line connected to the pixel; a voltage-to-current converter that converts a voltage signal on the signal line into a current; and a converter having an oversampling analog-to-digital converter circuit that converts the current output from the voltage-to-current converter into a digital signal, the digital still camera comprising: a pixel having a photoelectric conversion element; a signal line connected to the pixel; First, the voltage-current conversion unit has a first transistor, a second transistor, a resistor connected between the source of the first transistor and the source of the second transistor, a first amplifier that drives the gate of the first transistor, and a second amplifier that drives the gate of the second transistor, and is capable of inputting an output of the first amplifier to an input of the second amplifier. , including a photoelectric conversion device.
[0007] The present disclosure provides a pixel array including a pixel having a photoelectric conversion element, a signal line connected to the pixel, a voltage-current converter that converts a voltage signal on the signal line into a current, and a converter having an oversampling type analog-to-digital converter circuit that converts the current output from the voltage-to-current converter into a digital signal, wherein a signal path from the signal line to the converter does not include a path that does not have a sample-and-hold unit. The voltage-current conversion unit includes a first transistor, a second transistor, a resistor connected between the source of the first transistor and the source of the second transistor, a first amplifier that drives the gate of the first transistor, and a second amplifier that drives the gate of the second transistor, and is capable of inputting an output of the first amplifier to an input of the second amplifier. , including a photoelectric conversion device.
[0008] The present disclosure provides a pixel having a photoelectric conversion element, a signal line connected to the pixel, a voltage-to-current converter that converts a voltage signal of the signal line into a current, and a converter having an oversampling analog-to-digital converter circuit that converts the current output from the voltage-to-current converter into a digital signal, wherein the voltage-to-current converter is configured to be able to output the current obtained by converting the voltage signal of the signal line without sampling and holding it to the converter. The voltage-current conversion unit includes a first transistor, a second transistor, a resistor connected between the source of the first transistor and the source of the second transistor, a first amplifier that drives the gate of the first transistor, and a second amplifier that drives the gate of the second transistor, and is capable of inputting an output of the first amplifier to an input of the second amplifier. , including a photoelectric conversion device.
[0009] The present disclosure includes a photoelectric conversion system having the photoelectric conversion device and a signal processing unit that processes a signal output from the photoelectric conversion device.
[0010] The present disclosure includes an apparatus characterized by comprising the photoelectric conversion device, and at least one of an optical system corresponding to the photoelectric conversion device, a control device that controls the photoelectric conversion device, a processing device that processes signals output from the photoelectric conversion device, a display device that displays information obtained by the photoelectric conversion device, a storage device that stores information obtained by the photoelectric conversion device, and a mechanical device that operates based on information obtained by the photoelectric conversion device. [Effects of the Invention]
[0011] According to the present invention, it is possible to perform photoelectric conversion with high accuracy and quality that is less susceptible to the influence of noise. [Brief explanation of the drawings]
[0012] [Figure 1] 1 is a schematic diagram of a photoelectric conversion device according to a first embodiment. [Figure 2] 1 is a schematic diagram of a photoelectric conversion device according to a first embodiment. [Figure 3] 1 is a schematic diagram of a photoelectric conversion device according to a first embodiment. [Figure 4] FIG. 2 is a timing chart of the photoelectric conversion device according to the first embodiment. [Figure 5] FIG. 10 is a schematic diagram of a photoelectric conversion device according to a second embodiment. [Figure 6] FIG. 10 is a timing chart of the photoelectric conversion device according to the second embodiment. [Figure 7] FIG. 10 is a schematic diagram of a photoelectric conversion device according to a third embodiment. [Figure 8] FIG. 10 is a schematic diagram of a photoelectric conversion device according to Example 4. [Figure 9] FIG. 10 is a schematic diagram of a photoelectric conversion device according to a fifth embodiment. [Figure 10] FIG. 10 is a timing chart of the photoelectric conversion device according to the fifth embodiment. [Figure 11] FIG. 10 is a schematic diagram of a photoelectric conversion device according to Example 6. [Figure 12] FIG. 10 is a timing chart of the photoelectric conversion device according to the sixth embodiment. [Figure 13] FIG. 10 is a schematic diagram of a photoelectric conversion device according to Example 7. [Figure 14] FIG. 10 is a timing chart of the photoelectric conversion device according to the seventh embodiment. [Figure 15] FIG. 10 is a timing chart of the photoelectric conversion device according to the seventh embodiment. [Figure 16] FIG. 10 is a schematic diagram of a photoelectric conversion device according to Example 8. [Figure 17] FIG. 10 is a timing chart of the photoelectric conversion device according to the eighth embodiment. [Figure 18] FIG. 13 is a schematic diagram of a photoelectric conversion device according to a modified example of the eighth embodiment. [Figure 19] FIG. 13 is a timing chart of a photoelectric conversion device according to a modified example of the eighth embodiment. [Figure 20] FIG. 13 is a schematic diagram of a photoelectric conversion device according to a modified example of the eighth embodiment. [Figure 21] FIG. 13 is a schematic diagram of a photoelectric conversion device according to a modified example of the eighth embodiment. [Figure 22] FIG. 13 is a schematic diagram of a photoelectric conversion device according to a modified example of the eighth embodiment. [Figure 23] FIG. 13 is a schematic diagram of a photoelectric conversion device according to a modified example of the eighth embodiment. [Figure 24] FIG. 13 is a schematic diagram of a photoelectric conversion device according to a modified example of the eighth embodiment. [Figure 25] FIG. 10 is a schematic diagram of a photoelectric conversion system according to a ninth embodiment. [Figure 26] FIG. 13 is a schematic diagram of a photoelectric conversion system according to a tenth embodiment. [Figure 27] FIG. 16 is a schematic diagram of a photoelectric conversion system according to an eleventh embodiment. [Figure 28] FIG. 16 is a schematic diagram of a photoelectric conversion system according to Example 12. [Figure 29] FIG. 22 is a schematic diagram of a photoelectric conversion system according to Example 13. [Figure 30] FIG. 20 is a schematic diagram of a photoelectric conversion system according to Example 14. DETAILED DESCRIPTION OF THE INVENTION
[0013] Example 1 1, 2, 3, and 4 are schematic diagrams and timing charts of a photoelectric conversion device according to Example 1. In Fig. 1, 1 is a pixel substrate, 2 is a circuit board, 5 is a pixel unit, 10 is a pixel, 30 is a vertical signal line, 40 is a current source, 50 is a voltage-current conversion unit, 60 is a conversion unit, 90 is a data processing unit, and 100 is an output unit.
[0014] In the pixel section 5, a plurality of pixels 10 each including a photoelectric conversion element are arranged in a matrix. Here, the row direction refers to the left-right direction in Fig. 1, and the column direction refers to the up-down direction in Fig. 1. The pixel 10 generates signal charges according to incident light.
[0015] In the pixel section 5, vertical signal lines 30 are arranged along the column direction corresponding to the pixel columns in which the pixels 10 are arranged. The vertical signal lines 30 transfer signals corresponding to signal charges generated by the photoelectric conversion elements of the pixels 10 from the pixels 10 to the voltage-current converter 50.
[0016] The current sources 40 are arranged corresponding to the respective vertical signal lines 30. The current sources 40 supply bias currents via the vertical signal lines 30 to the pixels 10 selected for signal readout.
[0017] The voltage-current converter 50 converts the voltage signal of the vertical signal line 30 into a current and supplies it to the converter 60 .
[0018] The conversion unit 60 performs analog-to-digital conversion on the signal current output from the voltage-to-current conversion unit 50. In the conversion unit 60, an analog-to-digital conversion circuit is connected to each vertical signal line 30. In this embodiment, an oversampling type conversion circuit is used as the analog-to-digital conversion circuit. As an example, a delta-sigma (ΔΣ) type analog-to-digital conversion circuit is used, but the present invention is not limited to this.
[0019] The data processing unit 90 is a digital signal processing unit that processes the digital signal output from the conversion unit 60. For example, correction processing, complementation processing, etc. may be performed on the digital signal output from the conversion unit 60. The output unit 100 outputs the signal processed by the data processing unit 90 to the outside of the chip.
[0020] FIG. 2 is a circuit diagram showing an example configuration of a pixel 10. The pixel 10 includes a photoelectric conversion element 400, a transfer transistor 410, a reset transistor 455, an amplification transistor 430, and a selection transistor 440. The photoelectric conversion element 400 may be, for example, a photodiode. One of the main electrodes of the photoelectric conversion element 400 is connected to a ground potential 450, and the photoelectric conversion element 400 photoelectrically converts received light into signal charges (e.g., photoelectrons) of an amount corresponding to the amount of light, and stores the signal charges. The other main electrode of the photoelectric conversion element 400 is electrically connected to the gate electrode of the amplification transistor 430 via the transfer transistor 410. A node 420 electrically connected to the gate electrode of the amplification transistor 430 functions as a floating diffusion. The floating diffusion is a charge-voltage converter that converts the signal charges generated by the photoelectric conversion element 400 into a signal voltage.
[0021] A transfer signal TX is supplied to the gate electrode of the transfer transistor 410. When the transfer transistor 410 becomes conductive in response to the transfer signal TX, photoelectric conversion is performed in the photoelectric conversion element 400, and the signal charge accumulated in the photoelectric conversion element 400 is transferred to a node 420, which is a floating diffusion.
[0022] The reset transistor 455 is connected between a power supply potential 460 and a node 420. Here, the expression "a transistor is connected between A and B" means "one of the main electrodes (source and drain) of the transistor is connected to A, and the other of the main electrodes is connected to B." In this case, the gate electrode of the transistor is not connected to A or B.
[0023] A reset signal RES is supplied to the gate electrode of the reset transistor 455. When the reset transistor 455 becomes conductive in response to the reset signal RES, the potential of the node 420 (floating diffusion) is reset to the power supply potential 460. This sweeps out the charge held in the floating diffusion.
[0024] The amplifier transistor 430 has a gate electrode connected to the node 420, one main electrode connected to a power supply potential 460, and the other main electrode connected to the selection transistor 440. The amplifier transistor 430 serves as an input section of a source follower that reads out a signal obtained by photoelectric conversion of the photoelectric conversion element 400. That is, the other main electrode of the amplifier transistor 430 is connected to the vertical signal line 30 via the selection transistor 440. The amplifier transistor 430 and the above-described current source 40 connected to the vertical signal line 30 constitute a source follower that converts the voltage of the node 420 into the potential of the vertical signal line 30.
[0025] The selection transistor 440 is connected between the amplification transistor 430 and the vertical signal line 30. A selection signal SEL is supplied to the gate electrode of the selection transistor 440. When the selection transistor 440 becomes conductive in response to the selection signal SEL, the pixel 10 is placed in a selected state, and a signal is output from the amplification transistor 430 to the vertical signal line 30.
[0026] The circuit configuration of the pixel 10 is not limited to the configuration shown in FIG. 2 . For example, the selection transistor 440 may be connected between the power supply potential 460 and the amplification transistor 430. Although FIG. 2 illustrates a so-called four-transistor (4Tr.) configuration of the pixel 10 including the transfer transistor 410, the reset transistor 455, the amplification transistor 430, and the selection transistor 440, the configuration is not limited to this. For example, the selection transistor 440 may be omitted, and a three-transistor configuration may be used in which the amplification transistor 430 also functions as the selection transistor. Furthermore, a five-transistor or more configuration with an increased number of transistors may be used. The pixel 10 may sequentially output a reset signal generated when the reset transistor 455 resets the potential of the node 420 and resets the photoelectric conversion element 400, and a data signal representing the signal level when photoelectric conversion is performed by the photoelectric conversion element 400.
[0027] 3 is a diagram showing an example of a circuit configuration focusing on the voltage-current converter 50 and the converter 60. Fig. 3 shows the voltage-current converter 50 and the converter 60 arranged corresponding to one vertical signal line 30. The voltage-current converter 50 has current sources 110 and 120, a variable resistor 130, N-type transistors 140 and 150, and P-type transistors 160 and 170.
[0028] 3, a variable resistor 130 is arranged between the source of the N-type transistor 140 and the source of the N-type transistor 150. A reference voltage REF is applied to the gate of the N-type transistor 140, and the voltage of the vertical signal line 30 is applied to the gate of the N-type transistor 150. A signal voltage ΔV corresponding to the difference between the reference voltage REF and the voltage of the vertical signal line 30 is generated across the variable resistor 130, and when the resistance value of the variable resistor 130 is R, ΔI=ΔV / R A signal current of 2ΔI flows through variable resistor 130. At this time, the current flowing through N-type transistor 140 increases by ΔI, and the current flowing through N-type transistor 150 decreases by ΔI. Because P-type transistors 160 and 170 form a current mirror, the current flowing through P-type transistor 170 increases by ΔI. As a result, a signal current of 2ΔI is output from voltage-to-current converter 50.
[0029] In this embodiment, a ΔΣ analog-to-digital converter is used as the converter 60 so as to correspond to one vertical signal line 30. The ΔΣ analog-to-digital converter includes a first integrator, a second integrator, a quantizer 370, and a decimation filter 380. The first integrator is configured with an integral capacitor 320. The second integrator is configured with a Gm cell that converts voltage into current. The first integrator is composed of a filter 330 and an integral capacitor 360. A digital-to-analog converter 305 including a current source 300 and a switch 310 is connected to the input node of the first integrator. The digital-to-analog converter 305 controls the current to the first integrator in accordance with the digital signal via the second integrator and quantizer 370. A digital-to-analog converter 345 including a current source 340 and a switch 350 is connected to the input node of the second integrator. The digital-to-analog converter 345 controls the current to the second integrator in accordance with the result of quantizing the output of the second integrator by the quantizer 370.
[0030] In the ΔΣ analog-to-digital converter, the quantizer 370 feeds back the previous quantized value to the digital-to-analog converters 305 and 345. The first integrator integrates the difference between the signal current 2ΔI generated by the voltage-to-current converter 50 and the output current of the digital-to-analog converter 305, and the second integrator integrates the difference between the output current of the Gm cell 330 and the output current of the digital-to-analog converter 345. This operation is repeated multiple times during the AD conversion period (for example, 128 times if the oversampling rate is 128), integrating the noise component of the pixel 10 contained in the signal current 2ΔI multiple times. This makes it possible to significantly compress and reduce the noise component of the pixel 10. In this way, by inputting the pixel signal to the ΔΣ analog-to-digital converter without sample-and-holding, it is possible to oversample and reduce pixel noise.
[0031] On the other hand, in conventional photoelectric conversion devices, pixel signals fixed (sampled) by a sample-and-hold circuit are input to an analog-to-digital conversion circuit. In this configuration, the instantaneous value of the pixel signal at the time of sampling is held, resulting in pixel signals containing pixel noise (random noise caused by pixels) being converted to digital form. Therefore, the pixel noise reduction effect achieved by oversampling in a ΔΣ analog-to-digital conversion circuit cannot be achieved. In contrast, the photoelectric conversion device of this embodiment does not include a sample-and-hold circuit between the vertical signal line 30 and the conversion unit 60. That is, in this embodiment, the signal path from the vertical signal line 30 to the conversion unit 60 includes a path without a sample-and-hold circuit. By passing through this path, the voltage signal of the vertical signal line 30 can be converted to a current 2ΔI without being sampled and held, and output to the conversion unit 60. In other words, while conventional devices sample pixel signals only once using a sample-and-hold circuit, in this embodiment, the pixel signal is sampled multiple times for a predetermined period while the vertical signal line 30 and the conversion unit 60 are connected (tracked). This configuration reduces pixel noise, enabling high-precision, high-quality photoelectric conversion.
[0032] An example of operation will be further described using the timing chart of FIG. 4. Between times t0 and t1, the control signal RES in FIG. 2 goes high, turning on the reset transistor 455 and resetting the floating diffusion 420. In response, the potential of the vertical signal line 30 is at the reset level. At time t1, the control signal RES goes low, turning off the reset transistor 455. At this time, the potential of the vertical signal line 30 also drops as the potential of the floating diffusion 420 drops. After the potential of the vertical signal line 30 has settled, AD conversion (NAD) of the reset level starts at time t2. As described above, the voltage-current converter 50 outputs a signal current 2ΔI corresponding to the difference between the reference voltage REF and the potential of the vertical signal line 30. Here, the signal current corresponding to the reset level of the vertical signal line 30 is assumed to be 2ΔIn. For example, if the NAD period is 128 clock cycles, the previous quantized value from the quantizer 370 is fed back to the digital-to-analog converters 305 and 345 while the same quantized value is sent to the decimation filter 380. High-precision AD conversion is achieved by performing moving average processing in the decimation filter 380. Furthermore, at this time, the noise component from pixel 10 contained in the signal current 2ΔIn is integrated multiple times, which makes it possible to significantly reduce the noise component from pixel 10.
[0033] Between times t3 and t4, the control signal TX in FIG. 2 goes high, turning on the transfer transistor 410 and transferring photocharges from the photoelectric conversion element 400 to the floating diffusion 420. The potential of the floating diffusion 420 decreases in accordance with the amount of charge. This decreases the potential of the vertical signal line 30. After the potential of the vertical signal line 30 settles, AD conversion (SAD) of the signal level of the vertical signal line 30 starts at time t5. Here, the signal current corresponding to the signal level of the vertical signal line 30 is set to 2ΔIs. During the SAD period, as with the NAD period, AD conversion with significantly reduced noise components of the pixel 10 is possible. The AD conversion results of the reset level and the signal level are sent to the data processing unit 90, where a so-called digital CDS (Correlated Double Sampling) process is performed by calculating the difference.
[0034] As described above, in this embodiment, no sample-and-hold circuit is provided between the vertical signal line 30 and the conversion unit 60, and pixel signals are sampled multiple times for a predetermined period while the vertical signal line 30 and the conversion unit 60 are connected (tracked), thereby making it possible to reduce pixel noise.
[0035] Furthermore, the use of a current input type ΔΣ analog-to-digital converter circuit as the conversion unit 60 is advantageous in terms of lower voltage.
[0036] Moreover, by switching the resistance value of the variable resistor 130, the gain can be switched.
[0037] In this embodiment, a differential pair is used as the voltage-current converter 50, but the present invention is not limited to this. A single-ended voltage-current converter may also be used. However, a differential configuration is preferable from the viewpoint of PSRR (Power Supply Rejection Ratio).
[0038] Example 2 FIGS. 5 and 6 show a schematic diagram and a timing chart of a photoelectric conversion device according to the second embodiment. Below, only the differences from FIGS. 3 and 4 of the first embodiment will be described. In FIG. 5, a switch 200 and a capacitor 210 are provided for sampling and holding the reference voltage REF. This makes it possible to suppress image quality degradation due to noise in the reference voltage REF. Also, in FIG. 5, a capacitor 180 and switches 190 and 220 are provided for clamping the voltage of the vertical signal line 30 and performing auto-zero operation of the voltage-current conversion unit 50. This makes it possible to reduce output current variations due to characteristic variations in the pixels 10 and offset variations in the voltage-current conversion unit 50.
[0039] The operation will be described using the timing chart of FIG. 6. The control signal BSH is set to a high level from time t0 to time t2, thereby turning the switch 200 on. Switching the control signal BSH to a low level at time t2 turns the switch 200 off, and the low level is maintained during the NAD period from time t4 to t5 and the SAD period from time t7 to t8. This makes it possible to prevent the gate voltage of the transistor 140 from fluctuating during the NAD and SAD periods due to random noise in the reference voltage REF. This also makes it possible to prevent image quality degradation due to noise in the reference voltage REF. Furthermore, the control signal AZ is set to a high level and the control signal AZb is set to a low level from time t0 to t3, thereby turning the switch 190 on and the switch 220 off. Switching the control signal AZ to a low level and the control signal AZb to a high level at time t3 turns the switch 190 off and the switch 220 on. This operation causes the reset level of the vertical signal line 30 to be held in the clamp capacitor 180. This makes it possible to cancel the DC offset of the reset level due to variations in the characteristics of the pixel 10 (variations in the threshold voltage of the selection transistor 440, etc.) (auto-zero operation). This makes it possible to reduce variations in the output current of the voltage-current converter 50.
[0040] In this embodiment, although the signal path from the vertical signal line 30 to the conversion unit 60 includes a capacitor 180, all noise other than the DC component generated by the pixel 10 is transmitted to the conversion unit 60. However, even in this embodiment, no sample-and-hold circuit is provided between the vertical signal line 30 and the conversion unit 60, and the pixel signal is sampled multiple times for a predetermined period with the vertical signal line 30 to the conversion unit 60 connected. This makes it possible to reduce pixel noise.
[0041] Example 3 FIG. 7 is a schematic diagram of a photoelectric conversion device according to Example 3. Below, only the differences from FIG. 5 of Example 2 will be described. While FIG. 5 shows a single-stage configuration of voltage-to-current conversion unit 50, this example further includes N-type transistors 230 and 240 and P-type transistors 250 and 260, forming a current amplification stage. In FIG. 7, signal currents of +ΔI and −ΔI flow through N-type transistors 140 and 150, as in FIG. 5. In this example, P-type transistor 160 forms a current mirror with P-type transistor 260, and P-type transistor 170 forms a current mirror with P-type transistor 250. As a result, a signal current of +ΔI flows through P-type transistors 160 and 260, and a signal current of −ΔI flows through P-type transistors 170 and 250, and ΔI is output to conversion unit 60, as in FIG. 5. However, at this time, while the sum of the signal currents of P-type transistors 160 and 170 in Fig. 5 is 2ΔI, the sum of the signal currents of P-type transistors 160, 170, 250, and 260 in Fig. 7 is zero. In other words, in Fig. 7, it is possible to suppress the illuminance dependence of the current consumption of voltage-current converter 50 (dependence on the signal of vertical signal line 30). This makes it possible to suppress interference between voltage-current converters 50 and suppress image quality degradation.
[0042] Also in this embodiment, there is no sample-and-hold circuit between the vertical signal line 30 and the conversion unit 60, and pixel signals are sampled multiple times for a predetermined period while the vertical signal line 30 is connected to the conversion unit 60. This makes it possible to reduce pixel noise.
[0043] Example 4 FIG. 8 is a schematic diagram of a photoelectric conversion device according to the fourth embodiment. Below, only differences from FIG. 5 of the second embodiment will be described. In this embodiment, a differential pair is formed in the voltage-to-current converter 50 using P-type transistors 140 and 150. Furthermore, a current mirror is formed using N-type transistors 160 and 170. In this embodiment, due to the difference between the reference voltage REF and the voltage of the vertical signal line 30, when a signal current of +ΔI flows through the P-type transistor 140, a signal current of −ΔI flows through the P-type transistor 150. Similarly to the above embodiments, a signal current of 2ΔI is output from the voltage-to-current converter 50. Assuming that the currents of the current sources 110 and 120 are constant, this embodiment also makes it possible to suppress the illuminance dependence of the current consumption of the voltage-to-current converter 50 (dependence on the signal of the vertical signal line 30) as in the third embodiment. Furthermore, compared to the third embodiment, the number of elements is smaller, which is advantageous in terms of area saving. It is to be noted that by sharing the GND of the N-type transistors 160 and 170 and the current source 300, it can be considered possible to keep the current on the GND side constant.
[0044] Also in this embodiment, there is no sample-and-hold circuit between the vertical signal line 30 and the conversion unit 60, and pixel signals are sampled multiple times for a predetermined period while the vertical signal line 30 is connected to the conversion unit 60. This makes it possible to reduce pixel noise.
[0045] Example 5 FIGS. 9 and 10 show a schematic diagram and a timing chart of a photoelectric conversion device according to Example 5. Below, only differences from FIGS. 3 and 4 of Example 1 will be described. FIG. 9 includes a capacitor 500, a switch 510, operational amplifiers 520 and 530, a capacitor 540, a switch 550, current sources 551 and 552, a P-type transistor 560, an N-type transistor 570, a variable resistor 580, and a P-type transistor 590. In FIG. 3, the voltage of the vertical signal line 30 and the reference voltage REF are applied directly to the gates of the differential pair of transistors 140 and 150 connected to the variable resistor 130. In contrast, in this example, the gates of the P-type transistors 560 and 590 connected to the variable resistor 580 are driven via operational amplifiers 520 and 530. The operational amplifiers 520 and 530 operate so that the sources of the P-type transistors 560 and 590 are equal to the potential of the non-inverting input terminals of the operational amplifiers 520 and 530, respectively. The voltage at the former non-inverting input terminal is based on the signal on the vertical signal line 30, and the voltage at the latter non-inverting input terminal is the reference voltage REF. This allows the variable resistor 580 to perform more ideal voltage-current conversion, thereby improving accuracy.
[0046] 10, differences from the chart in FIG. 4 will be mainly described below. Between times t0 and t1, the control signal RES goes high, turning on the reset transistor 455 and resetting the floating diffusion 420. Accordingly, the potential of the vertical signal line 30 is at the reset level. At time t1, the control signal RES goes low, turning off the reset transistor 455. At this time, as the potential of the floating diffusion 420 drops, the potential of the vertical signal line 30 also drops.
[0047] After the potential of the vertical signal line 30 has settled, the control signal CLMP is set to low level, and the switch 510 is turned off. As a result, the voltage corresponding to the reset level of the vertical signal line 30 is clamped using the capacitor 500. This makes it possible to suppress the influence of kT / C noise generated in the pixel 10, threshold variation of the amplification transistor 430, and the like on the output current. The potential of the source of the P-type transistor 590 becomes approximately equal to the reference voltage VC. At time t3, the control signal AZ is set to low level, and the switch 550 is turned off. The potential of the source of the P-type transistor 560 becomes approximately equal to the reference voltage REF.
[0048] AD conversion (NAD) of the reset level starts from time t4. When the resistance value of the variable resistor 580 is R, a signal voltage ΔV corresponding to the difference between the source voltages of the P-type transistors 560 and 590 is generated across the variable resistor 580, and ΔI=ΔV / R The signal current ΔI flows through the variable resistor 580 and is output to the conversion unit 60. The random noise component of the pixel 10 appears on the vertical signal line 30 and is transmitted to the source of the P-type transistor 590. Therefore, although the output current ΔI fluctuates due to the random noise component of the pixel 10, the influence of this fluctuation can be significantly suppressed during the NAD period from time t4, as in the above-described embodiment.
[0049] Between times t5 and t6, the control signal TX goes high, turning on the transfer transistor 410, and photocharges are transferred from the photoelectric conversion element 400 to the floating diffusion 420. The potential of the floating diffusion 420 drops according to the amount of charge. This causes the potential of the vertical signal line 30 to drop. After the potential of the vertical signal line 30 has settled, AD conversion (SAD) of the signal level of the vertical signal line 30 starts at time t7. During the SAD period, as with the NAD period, AD conversion with a significant reduction in the noise component of the pixel 10 is possible. The AD conversion results of the reset level and the signal level are sent to the data processing unit 90, and by taking the difference, so-called digital CDS (Correlated Double Sampling) is performed. ng) processing.
[0050] As described above, in this embodiment, it is possible to perform more ideal voltage-current conversion, and it is possible to improve accuracy.
[0051] Also in this embodiment, there is no sample-and-hold circuit between the vertical signal line 30 and the conversion unit 60, and pixel signals are sampled multiple times for a predetermined period while the vertical signal line 30 is connected to the conversion unit 60. This makes it possible to reduce pixel noise.
[0052] Example 6 11 and 12 show a schematic diagram and a timing chart of a photoelectric conversion device according to Example 6. Below, only the differences from Example 5 shown in FIGS. 9 and 10 will be described. In this example, the switches 600 and 610 are provided, which allows the source potential of the P-type transistor 560 to be set to a level equivalent to the reset level of the vertical signal line 30. This makes it possible to suppress the effects on the output current of kT / C noise generated in the pixel 10, threshold voltage variations of the amplifying transistor 430, and the like, without using the capacitor 500 shown in FIG. 9.
[0053] 12, differences from the chart in FIG. 10 will be mainly described below. Between times t0 and t1, the control signal RES goes high, turning on the reset transistor 455 and resetting the floating diffusion 420. Accordingly, the potential of the vertical signal line 30 is at the reset level. At time t1, the control signal RES goes low, turning off the reset transistor 455. At this time, as the potential of the floating diffusion 420 drops, the potential of the vertical signal line 30 also drops.
[0054] After the potential of the vertical signal line 30 has settled, at time t2, the control signal AZ_N is set to low level, and the switch 550 is turned off. Thereafter, at time t3, the control signal SMP_N is set to low level, and the switch 600 is turned off, and at time t4, the control signal HLD_N is set to high level, and the switch 610 is turned on. Through this series of operations, the source potential of the P-type transistor 560 becomes a potential equivalent to the reset level of the vertical signal line 30. Furthermore, this reset level becomes a potential that includes kT / C noise generated in the pixel 10 when the control signal RES is set to low level at time t1 and the reset transistor 455 is turned off, and threshold variations of the amplification transistor 430. It is.
[0055] AD conversion (NAD) of the reset level starts from time t5. When the resistance value of the variable resistor 580 is R, a signal voltage ΔV corresponding to the difference between the source voltages of the P-type transistors 560 and 590 is generated across the variable resistor 580, and ΔI=ΔV / R The signal current flows through the variable resistor 580 and is output to the conversion unit 60. At this time, the source voltages of both the P-type transistors 560 and 590 contain kT / C noise generated in the pixel 10 and threshold voltage variations of the amplifying transistor 430, so that the influence on the output current can be suppressed.
[0056] Furthermore, in this embodiment, no sample-and-hold circuit is provided between the vertical signal line 30 and the voltage-to-current converter 50, and pixel signals are sampled multiple times for a predetermined period while the vertical signal line 30 is connected to the converter 60. This makes it possible to reduce pixel noise.
[0057] In this embodiment, the voltage-to-current converter 50 includes a sample-and-hold circuit configured of an amplifier 530, a capacitor 540, and switches 600 and 610. However, as described above, during both the NAD period and the SAD period, the signal and noise of the pixel 10 are transmitted to the converter 60 via the vertical signal line 30, the operational amplifier 520, and the source of the P-type transistor 590, and are therefore transmitted to the converter 60 without passing through the sample-and-hold circuit. In other words, there is a path between the vertical signal line 30 and the converter 60 that does not pass through the sample-and-hold unit. As a result, in this embodiment as well, the pixel signal is sampled multiple times for a predetermined period while the vertical signal line 30 to the converter 60 are connected, thereby making it possible to reduce pixel noise.
[0058] Example 7 13, 14, and 15 show schematic diagrams and timing charts of a photoelectric conversion device according to Example 7. Below, only differences from Example 6 shown in FIGS. 11 and 12 will be described. In FIG. 13, a capacitor 650 and switches 660, 670, 680, 690, and 700 are provided. This makes it possible to implement a high-speed operation mode in addition to a low-noise operation mode similar to that of Example 6.
[0059] <Low noise operation mode> FIG. 14 shows a timing chart for performing an operation similar to that of the sixth embodiment. As shown in FIG. 14, the control signals AZ_S, SMP_S, and HLD_S are always high, low, and low, respectively. As a result, in FIG. 13, switch 660 is on and switches 670 and 680 are off. Although not shown in the chart of FIG. 14, when the control signal PSEL is high and the control signal RSEL is low, switch 690 is on and switch 700 is off. At this time, the circuit of FIG. 13 is in the same operating state as in FIG. 11, and the chart of FIG. 14 enables the same operation as that of the chart of FIG. 12.
[0060] <High-speed operation mode> FIG. 15 shows a timing chart for performing a faster operation compared to FIG. 14. In this operation mode, the control signal PSEL is at a low level and the control signal RSEL is at a high level, thereby turning the switch 690 off and the switch 700 on. The following mainly describes the differences from the chart in FIG. 14. Between times t0 and t1, the control signal RES is at a high level, turning on the reset transistor 455 and resetting the floating diffusion 420. In response, the potential of the vertical signal line 30 is at the reset level. At time t1, the control signal RES is set to a low level, turning off the reset transistor 455. At this time, as the potential of the floating diffusion 420 drops, the potential of the vertical signal line 30 also drops.
[0061] After the potential of the vertical signal line 30 has settled, at time t2, the control signal AZ_N is set to low level, and the switch 550 is turned off. Thereafter, at time t3, the control signal SMP_N is set to low level, and the switch 600 is turned off, and at time t4, the control signal HLD_N is set to high level, and the switch 610 is turned on. Through this series of operations, the source potential of the P-type transistor 560 becomes a potential equivalent to the reset level of the vertical signal line 30. Furthermore, this reset level becomes a potential that includes kT / C noise generated in the pixel 10 when the control signal RES is set to low level at time t1 and the reset transistor 455 is turned off, and threshold variations of the amplification transistor 430. It is.
[0062] Between times t5 and t6, the control signal TX goes high and the transfer transistor 410 is turned on, transferring the photoelectric conversion element 400 to the floating diffusion 420. The photocharges are transferred. The potential of the floating diffusion 420 decreases according to the amount of charge. This decreases the potential of the vertical signal line 30. Also, at time t5, the control signals AZ_S and SMP_S are set to high level, turning on the switches 660 and 670. After the potential of the vertical signal line 30 has settled, at time t7, the control signal AZ_S is set to low level, turning off the switch 660. Thereafter, at time t8, the control signal SMP_S is set to low level, turning off the switch 670, and at time t9, the control signal HLD_S is set to high level, turning on the switch 680. Through this series of operations, the source potential of the P-type transistor 590 becomes a potential equivalent to the signal level of the vertical signal line 30.
[0063] AD conversion (AD) starts at time t10. When a signal voltage ΔV corresponding to the difference between the source voltages of the P-type transistors 560 and 590 is generated across the variable resistor 580, the resistance value of the variable resistor 580 is R, and thus ΔI=ΔV / R The signal current flows through the variable resistor 580 and is output to the conversion unit 60. At this time, the source voltages of both the P-type transistors 560 and 590 contain kT / C noise generated in the pixel 10 and threshold voltage variations of the amplifying transistor 430, so that the influence on the output current can be suppressed.
[0064] Furthermore, since the control signals SMP_N and SMP_S are at a low level during the AD conversion period, the switches 600 and 670 are in an off state. Furthermore, since the control signal PSEL is at a low level, the switch 690 is also in an off state. As a result, the vertical signal line 30 and the internal circuitry of the voltage-current converter 50 are not electrically connected, so that the next pixel readout operation can be started during the AD conversion period. Specifically, in FIG. 15, the control signal RES is set to a high level at time t11 during the AD conversion, starting the pixel reset operation. In this way, a high-speed operation mode can also be implemented.
[0065] In this embodiment, the voltage-to-current converter 50 includes a sample-and-hold circuit configured with an operational amplifier 520, a capacitor 650, and switches 670 and 680. Therefore, although a sample-and-hold circuit is provided in the path from the vertical signal line 30 to the converter 60, this sample-and-hold circuit is used only in the high-speed operation mode. In the low-noise operation mode shown in FIG. 14 , the operational amplifier 520 operates as a buffer amplifier, driving the converter 60 to sample the signal on the vertical signal line 30 for a predetermined period. In other words, the circuit configuration in the low-noise operation mode is equivalent to that of the sixth embodiment, i.e., a configuration having a path between the vertical signal line 30 and the converter 60 that does not pass through a sample-and-hold circuit. Therefore, in the low-noise operation mode, pixel noise can be reduced, similar to the above embodiments.
[0066] Example 8 FIGS. 16 and 17 show a schematic diagram and a timing chart of a photoelectric conversion device according to Example 8. Below, only differences from FIGS. 11 and 12 of Example 6 will be described. FIG. 16 includes switches 700, 710, 720, 730, and 740 and a capacitor 750. While FIG. 11 of Example 6 connects the vertical signal line 30 to the capacitor 540 via the switch 600, this example uses a circuit that can connect the capacitor 540 to the amplifier 520 via the switches 700 and 710. That is, the output of the amplifier 520 can be input to the input of the amplifier 530. This allows the offset of the amplifier 520 to be reflected in the source potential of the P-type transistor 560. This makes it possible to suppress the effect of the offset of the amplifier 520 on the output current.
[0067] 17, differences from the chart in FIG. 12 will be mainly described below. Between times t0 and t1, the control signal RES goes high to turn on the reset transistor 455, thereby resetting the floating diffusion 420. In response, the potential of the vertical signal line 30 is at the reset level. At time t1, the control signal RES goes low to turn off the reset transistor 455. At this time, as the potential of the floating diffusion 420 drops, the potential of the vertical signal line 30 also drops.
[0068] After the potential of the vertical signal line 30 has settled, the control signal CLMP is set to low level, and the switch 510 is turned off. As a result, the voltage corresponding to the reset level of the vertical signal line 30 is clamped using the capacitor 500. This makes it possible to suppress the effects on the output current of kT / C noise generated in the pixel 10, threshold variation of the amplification transistor 430, and the like.
[0069] At time t3, the control signal AZ_N is set to low level, turning off the switch 550. Thereafter, at time t4, the control signal SMP_N is set to low level, turning off the switches 700 and 710, and at time t5, the control signal HLD_N is set to high level, turning on the switch 610. Through this series of operations, the source potential of the P-type transistor 560 becomes a potential obtained by adding the offset of the amplifier 520 to the reference voltage VC. At time t6, the control signal SMP_S is set to high level, turning on the switches 720 and 720. As a result, the source potential of the P-type transistor 590 also becomes a potential obtained by adding the offset of the amplifier 520 to the reference voltage VC.
[0070] AD conversion (NAD) of the reset level starts at time t7. At this time, the offset of amplifier 520 is superimposed on both the source potentials of P-type transistors 560 and 590, making it possible to reduce the effect on the output current. This reduces the output current variation, particularly when the resistance of variable resistor 580 is lowered to apply gain to the output current, making it possible to perform high-gain operation.
[0071] Between times t8 and t9, the control signal TX goes high, turning on the transfer transistor 410 and transferring photocharges from the photoelectric conversion element 400 to the floating diffusion 420. The potential of the floating diffusion 420 drops according to the amount of charge. This causes the potential of the vertical signal line 30 to drop. After the potential of the vertical signal line 30 has settled, AD conversion (SAD) of the signal level of the vertical signal line 30 starts at time t10. The AD conversion results of the reset level and the signal level are sent to the data processing unit 90, and so-called digital CDS (Correlated Double Sampling) processing is performed by calculating the difference.
[0072] In this way, in the present embodiment as well, similar to the sixth embodiment, a path that does not go through a sample-and-hold circuit is provided between the vertical signal line 30 and the conversion unit 60. As a result, in the present embodiment as well, pixel signals are sampled multiple times for a predetermined period while the vertical signal line 30 and the conversion unit 60 are connected, thereby making it possible to reduce pixel noise.
[0073] As shown in FIG. 18, a determination circuit 751 may be provided to switch the resistance value of the variable resistor 580 according to the amplitude of the vertical signal line 30. An example of operation is shown in FIG. 19. The difference from FIG. 17 is that AD conversion of the reset level is performed twice, from time t7 to t9. For example, AD conversion is performed with the variable resistor 580 at a low resistance in the first NAD1 conversion, and AD conversion is performed with the variable resistor 580 at a high resistance in the second NAD2 conversion. Then, before SAD from time t11, the determination circuit 751 determines the amplitude of the vertical signal line 30, and if it determines that the amplitude is large, it sets the variable resistor 580 to a high resistance, and if it determines that the amplitude is small, it sets the variable resistor 580 to a low resistance. In the former case, CDS is performed with NAD2, and in the latter case, CDS is performed with NAD1. The above operation makes it possible to expand the dynamic range while suppressing degradation of CDS performance. It becomes possible.
[0074] 20, a single-ended amplifier 770 may be used instead of the operational amplifier 530. This allows the circuit size to be reduced. Also, instead of using the operational amplifier 520 to form a non-inverting buffer amplifier, an inverting amplifier may be formed together with the capacitors 500 and 750. In this case, both differential inputs of the operational amplifier 520 do not depend on the signal of the vertical signal line 30, which is advantageous for reducing voltage.
[0075] A bias voltage may be supplied to the conversion unit 60 using a bias circuit such as that shown in FIG. 21. In FIG. 21, 820 denotes an operational amplifier, 860 denotes a resistive element, 850 and 870 denote N-type transistors, 830 and 840 denote P-type transistors, and 810 denotes a bandgap circuit. A voltage of approximately 1.2 V, which has very little temperature dependence, is output from the bandgap circuit 810. Therefore, the voltage across the resistive element 860 is also approximately 1.2 V, and the current flowing through the N-type transistors 850 and 870 and the P-type transistors 830 and 840 is 1.2 / R. If the resistive element 860 is the same type of resistor as the variable resistor 580, the temperature dependence of the current through the variable resistor 580 is equal to the temperature dependence of the current through the resistive element 860 and the N-type transistor 850. This allows the temperature dependence of the signal current flowing through the variable resistor 580 to be linked to the temperature dependence of the current value of the current source 300, thereby canceling them out. This makes it possible to suppress the temperature dependency of the readout gain.
[0076] 21 is an example. For example, even in the bias circuit shown in FIG. 22, it is possible to link the bias circuit to the temperature dependency of the current resistance element of N-type transistor 550.
[0077] The variable resistor 580 and the resistor element 860 can be configured, for example, by a polysilicon resistor, a diffused resistor, or a metal resistor.
[0078] It is desirable to provide the variable resistor 580 and the resistance element 860 on the same substrate, which makes it possible to equalize process variations and suppress temperature dependency.
[0079] It is also possible to provide an inter-column addition (averaging) function. For example, as shown in FIG. 23, switches 950 and 951 that short-circuit signals on the vertical signal lines 30 may be provided. In this case, as shown in FIG. 23, the power control lines (gpwr1, gpwr2) may be divided between the voltage-to-current converters 50 for odd-numbered columns and the voltage-to-current converters 60 for even-numbered columns. Similarly, the power control lines (apwr1, apwr2) may be divided between the converters 60 for odd-numbered columns and the voltage-to-current converters 50 for even-numbered columns. This reduces the number of operations of the voltage-to-current converters 50 and the converters 60 during inter-column addition, thereby enabling power saving.
[0080] 24, a three-layer laminated structure may be formed by providing a second circuit board 3. This allows the readout circuit to be distributed between the circuit board 2 and the second circuit board 3, thereby making it possible to reduce the chip size and accommodate narrower pitches for the pixels 10. Note that FIG. 24 is just an example, and modifications may be made, such as providing part of the conversion unit 60 on the circuit board 2.
[0081] The configuration of the photoelectric conversion device is not limited to the above. For example, the pixel 10 is not limited to that shown in FIG. 2. The capacitance of the floating diffusion 420 may be switchable. The pixel 10 may also be configured such that a plurality of photoelectric conversion elements 400 share the floating diffusion 420. A plurality of photoelectric conversion elements 400 may be formed under the same microlens to form a pixel capable of detecting a phase difference. When a pixel column has a plurality of vertical signal lines 30, a configuration having a plurality of selection transistors 440 may also be used. A pixel may also be a hole accumulation type pixel instead of an electron accumulation type pixel. A pixel may also be a type that outputs using a source-grounded amplifier circuit or a differential amplifier circuit instead of a pixel that uses a source follower. stomach.
[0082] Example 9 A photoelectric conversion system according to a ninth embodiment will be described with reference to Fig. 25. Fig. 25 is a block diagram showing a schematic configuration of a photoelectric conversion system according to the ninth embodiment.
[0083] The photoelectric conversion devices described in the first to eighth embodiments are applicable to various photoelectric conversion systems. A photoelectric conversion system includes at least a photoelectric conversion device according to any one of the above embodiments and a signal processing unit that processes signals output from the photoelectric conversion device. Examples of devices to which such photoelectric conversion systems can be applied include digital still cameras, digital camcorders, surveillance cameras, copiers, fax machines, mobile phones, vehicle-mounted cameras, observation satellites, sensors, and measuring instruments. Camera modules equipped with an optical system such as a lens and an imaging device are also included in devices to which photoelectric conversion systems are applied. FIG. 25 illustrates a block diagram of a digital still camera as an example of such devices.
[0084] FIG. 25 shows an example of the configuration of an imaging system SYS constructed using an imaging device IS. The imaging system SYS is an information terminal having a camera or imaging function. The imaging device IS may further include a package PKG that houses an imaging device IC. The package PKG may include a base to which the imaging device IC is fixed, a lid facing the imaging device IC, and a connecting member that connects terminals provided on the base with terminals provided on the imaging device IC. The imaging device IS may also have multiple imaging device ICs mounted side by side in a common package PKG. The imaging device IS may also have imaging device ICs and other semiconductor devices mounted on top of each other in a common package PKG.
[0085] The imaging system SYS may include an optical system OU that forms an image on the imaging device IS. The imaging system SYS may also include at least one of a control device CU, a processing device PU, a display device DU, and a storage device MU. The control device CU is a device that controls the imaging device IS, and the processing device PU is a device that processes signals obtained from the imaging device IS. The display device DU is a device that displays images obtained from the imaging device IS, and the storage device MU is a device that stores images obtained from the imaging device IS.
[0086] Example 10 An apparatus to which the photoelectric conversion system of Example 10 is applied will be described with reference to Figures 26A and 26B. Figures 26A and 26B are diagrams showing the configurations of the photoelectric conversion system and apparatus of this example.
[0087] FIG. 26A shows an example of a photoelectric conversion system related to an in-vehicle camera. The photoelectric conversion system 2300 includes an imaging device 2310. The imaging device 2310 is the photoelectric conversion device described in any of the above embodiments. The photoelectric conversion system 2300 includes an image processing unit 2312 that performs image processing on multiple pieces of image data acquired by the imaging device 2310, and a parallax acquisition unit 2314 that calculates parallax (phase difference between parallax images) from the multiple pieces of image data acquired by the photoelectric conversion system 2300. The photoelectric conversion system 2300 also includes a distance measurement unit 2316 that calculates the distance to an object based on the calculated parallax, and a collision determination unit 2318 that determines whether or not there is a possibility of a collision based on the calculated distance. Here, the parallax acquisition unit 2314 and the distance measurement unit 2316 are examples of distance information acquisition means that acquire distance information to the object. In other words, the distance information is information related to the parallax, the amount of defocus, the distance to the object, etc. The collision determination unit 2318 may use any of these pieces of distance information to determine the possibility of a collision. The distance information acquisition means may be realized by dedicated hardware or by a software module. In addition, FPGA (Field Programmable Gate Array) or ASIC ( It may be realized by a circuit such as an Application Specific Integrated Circuit (ASIC), or by a combination of these.
[0088] The photoelectric conversion system 2300 is connected to a vehicle information acquisition device 2320 and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. The photoelectric conversion system 2300 is also connected to a control ECU 2330, which is a control unit that outputs a control signal to generate a braking force for the vehicle based on the determination result of the collision determination unit 2318. The photoelectric conversion system 2300 is also connected to an alarm device 2340 that issues an alarm to the driver based on the determination result of the collision determination unit 2318. For example, if the determination result of the collision determination unit 2318 indicates a high possibility of a collision, the control ECU 2330 performs vehicle control to avoid the collision and mitigate damage by applying the brakes, releasing the accelerator, suppressing engine output, etc. The alarm device 2340 warns the user by sounding an alarm, displaying alarm information on the screen of a car navigation system, etc., or vibrating the seat belt or steering wheel.
[0089] In this embodiment, the surroundings of the vehicle, for example, the front or rear, are imaged by the photoelectric conversion system 2300. Fig. 26B shows the photoelectric conversion system 2300 when imaging the area in front of the vehicle (imaging range 2350). A vehicle information acquisition device 2320 sends instructions to the photoelectric conversion system 2300 or the imaging device 2310. Such a configuration can further improve the accuracy of distance measurement.
[0090] Although the above describes an example of control to prevent collision with other vehicles, the photoelectric conversion system can also be applied to control of automatic driving by following other vehicles, control of automatic driving to prevent deviation from a lane, etc. Furthermore, the photoelectric conversion system is not limited to vehicles such as the subject vehicle, but can be applied to moving bodies (moving devices) such as ships, aircraft, and industrial robots. In addition, the photoelectric conversion system can be applied not only to moving bodies but also to a wide range of devices that use object recognition, such as intelligent transport systems (ITS).
[0091] Example 11 An apparatus to which a photoelectric conversion system according to an eleventh embodiment is applied will be described with reference to Fig. 27. Fig. 27 is a block diagram showing an example of the configuration of a range image sensor, which is an example of an apparatus to which the photoelectric conversion system of this embodiment is applied.
[0092] 27, the range image sensor 1401 is configured to include an optical system 1402, a photoelectric conversion device 1403, an image processing circuit 1404, a monitor 1405, and a memory 1406. The range image sensor 1401 can obtain a range image according to the distance to the subject by receiving light (modulated light or pulsed light) that is projected toward the subject from a light source device 1411 and reflected from the surface of the subject.
[0093] The optical system 1402 is configured to have one or more lenses, and guides image light (incident light) from an object to the photoelectric conversion device 1403 , forming an image on the light receiving surface (sensor section) of the photoelectric conversion device 1403 .
[0094] The photoelectric conversion device 1403 is one of the photoelectric conversion devices of the above-described embodiments, and a distance signal indicating a distance determined from a light receiving signal output from the photoelectric conversion device 1403 is supplied to an image processing circuit 1404 .
[0095] The image processing circuit 1404 performs image processing to construct a distance image based on the distance signal supplied from the photoelectric conversion device 1403. The distance image (image data) obtained by this image processing is then supplied to a monitor 1405 for display, or supplied to a memory 1406 for storage (recording).
[0096] In the range image sensor 1401 configured in this way, by applying the above-described photoelectric conversion device, it is possible to obtain a more accurate range image.
[0097] Example 12 An apparatus to which a photoelectric conversion system according to Example 12 is applied will be described with reference to Fig. 28. Fig. 28 is a diagram showing an example of a schematic configuration of an endoscopic surgery system that is an apparatus to which the photoelectric conversion system of this example is applied.
[0098] 28 shows a state in which an operator (doctor) 1131 is performing surgery on a patient 1132 on a patient bed 1133 using an endoscopic surgery system 1003. As shown in the figure, the endoscopic surgery system 1003 is composed of an endoscope 1100, a surgical tool 1110, and a cart 1134 on which various devices for endoscopic surgery are mounted.
[0099] The endoscope 1100 is composed of a lens barrel 1101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 1132, and a camera head 1102 connected to the base end of the lens barrel 1101. In the example shown, the endoscope 1100 is configured as a so-called rigid lens barrel having a rigid lens barrel 1101, but the endoscope 1100 may also be configured as a so-called flexible lens barrel having a flexible lens barrel.
[0100] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 1101. A light source device 1203 is connected to the endoscope 1100. Light generated by the light source device 1203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 1101, and is irradiated via the objective lens towards an observation target inside the body cavity of the patient 1132. The endoscope 1100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.
[0101] An optical system and a photoelectric conversion device are provided inside the camera head 1102, and light reflected from an observation object (observation light) is focused onto the photoelectric conversion device by the optical system. The observation light is photoelectrically converted by the photoelectric conversion device to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observation image. The photoelectric conversion device may be any of the photoelectric conversion devices described in the above-mentioned embodiments. The image signal is sent to a camera control unit (CCU) 1135 as RAW data.
[0102] The CCU 1135 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and performs overall control of the operations of the endoscope 1100 and the display device 1136. Furthermore, the CCU 1135 receives an image signal from the camera head 1102, and performs various types of image processing on the image signal, such as development processing (demosaic processing), to display an image based on the image signal.
[0103] Under the control of the CCU 1135 , the display device 1136 displays an image based on the image signal that has been subjected to image processing by the CCU 1135 .
[0104] The light source device 1203 is configured from a light source such as an LED (Light Emitting Diode), and supplies the endoscope 1100 with irradiation light when photographing an operation site or the like.
[0105] The input device 1137 is an input interface for the endoscopic surgery system 1003. A user can input various information and instructions to the endoscopic surgery system 1003 via the input device 1137.
[0106] The control device 1138 controls the driving of the energy treatment device 1112 for cauterizing tissue, cutting, sealing blood vessels, or the like.
[0107] The light source device 1203, which supplies illumination light to the endoscope 1100 when photographing the surgical site, can be configured from a white light source configured from, for example, an LED, a laser light source, or a combination of these. When the white light source is configured from a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, making it possible to adjust the white balance of the captured image in the light source device 1203. In this case, it is also possible to capture images corresponding to each RGB color in a time-division manner by irradiating the object of observation with laser light from each RGB laser light source in a time-division manner and controlling the drive of the image sensor of the camera head 1102 in synchronization with the irradiation timing. According to this method, a color image can be obtained without providing a color filter to the image sensor.
[0108] Furthermore, the light source device 1203 may be controlled to change the intensity of light it outputs at predetermined time intervals. By controlling the driving of the image sensor of the camera head 1102 in synchronization with the timing of the change in the light intensity to acquire images in a time-division manner and combining the images, it is possible to generate an image with a high dynamic range that is free of so-called blocked-up shadows and blown-out highlights.
[0109] The light source device 1203 may also be configured to supply light in a predetermined wavelength band corresponding to special light observation. Special light observation utilizes, for example, the wavelength dependency of light absorption in body tissue. Specifically, specific tissue, such as blood vessels on the surface of the mucous membrane, can be photographed with high contrast by irradiating light with a narrower band than the light (i.e., white light) used in normal observation. Alternatively, special light observation may involve fluorescence observation, in which an image is obtained using fluorescence generated by irradiating excitation light. Fluorescence observation can involve irradiating excitation light onto body tissue and observing the fluorescence from the body tissue, or locally injecting a reagent such as indocyanine green (ICG) into the body tissue and irradiating the body tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 1203 may be configured to supply narrow band light and / or excitation light corresponding to such special light observation.
[0110] Example 13 An apparatus to which a photoelectric conversion system according to a thirteenth embodiment is applied will be described with reference to FIGS. 29A and 29B.
[0111] FIG. 29A shows glasses 1600 (smart glasses) that are a device to which the photoelectric conversion system of this embodiment is applied. The glasses 1600 have a photoelectric conversion device 1602. The photoelectric conversion device 1602 is the photoelectric conversion device described in each of the above embodiments. A display device including a light-emitting device such as an OLED or LED may be provided on the back side of the lens 1601. There may be one or more photoelectric conversion devices 1602. Furthermore, multiple types of photoelectric conversion devices may be used in combination. The arrangement position of the photoelectric conversion device 1602 is not limited to that shown in FIG. 29A.
[0112] The glasses 1600 further include a control device 1603. The control device 1603 functions as a power source that supplies power to the photoelectric conversion device 1602 and the display device. The control device 1603 also controls the operations of the photoelectric conversion device 1602 and the display device. The control device 1603 also functions as a signal processing unit that processes signals output from the photoelectric conversion device 1602. The lens 1601 is formed with an optical system for focusing light onto the photoelectric conversion device 1602.
[0113] FIG. 29B shows glasses 1610 (smart glasses) that are devices to which the photoelectric conversion system of this embodiment is applied. The arrangement of the photoelectric conversion system is different from that of FIG. 29A. The glasses 1610 have a control The control device 1612 includes a photoelectric conversion device equivalent to the photoelectric conversion device 1602 and a display device. The lens 1611 includes an optical system for projecting light emitted from the photoelectric conversion device in the control device 1612 and the display device, and an image is projected onto the lens 1611. The control device 1612 functions as a power source for supplying power to the photoelectric conversion device and the display device, and controls the operation of the photoelectric conversion device and the display device. The control device 1612 may also include a gaze detection unit for detecting the gaze of the wearer. Infrared light may be used for gaze detection. The infrared light emitting unit emits infrared light toward the eyeball of a user gazing at a displayed image. An imaging unit with a light receiving element detects the reflected light of the emitted infrared light from the eyeball, thereby obtaining an image of the eyeball. By including a reduction unit for reducing light from the infrared light emitting unit to the display unit in a planar view, degradation of image quality is reduced.
[0114] The gaze of the user relative to the displayed image is detected from an image of the eyeball obtained by capturing infrared light. Any known method can be used for gaze detection using an image of the eyeball. One example is a gaze detection method based on the Purkinje image formed by reflection of irradiated light on the cornea.
[0115] More specifically, gaze detection processing is performed based on the pupil-corneal reflex method, which calculates a gaze vector representing the direction (rotation angle) of the eyeball based on the pupil image and Purkinje image included in the captured image of the eyeball, thereby detecting the user's gaze.
[0116] The display device of this embodiment may have a photoelectric conversion device having a light receiving element, and may control the image displayed on the display device based on information on the user's line of sight from the photoelectric conversion device.
[0117] Specifically, the display device determines a first field of view area where the user gazes and a second field of view area other than the first field of view area based on the line-of-sight information. The first field of view area and the second field of view area may be determined by a control device of the display device, or may be determined by an external control device and received. In the display area of the display device, the display resolution of the first field of view area may be controlled to be higher than the display resolution of the second field of view area. In other words, the resolution of the second field of view area may be lower than that of the first field of view area.
[0118] The display area may include a first display area and a second display area different from the first display area, and a high-priority area may be determined from the first display area and the second display area based on line-of-sight information. The first and second field-of-view areas may be determined by a control device of the display device, or may be determined by an external control device and received. The resolution of the high-priority area may be controlled to be higher than the resolution of areas other than the high-priority area. In other words, the resolution of an area with a relatively low priority may be lowered.
[0119] Note that AI may be used to determine the first field of view area and areas with high priority. The AI may be a model configured to estimate the angle of gaze and the distance to an object in the line of sight from an image of the eyeball, using as training data an image of the eyeball and the direction in which the eyeball in the image was actually looking. The AI program may be included in the display device, the photoelectric conversion device, or an external device. If included in an external device, it is transmitted to the display device via communication.
[0120] When display control is performed based on visual recognition detection, the present invention is preferably applied to smart glasses that further include a photoelectric conversion device for capturing images of the outside world. The smart glasses can display captured external information in real time.
[0121] Example 14 The above-described photoelectric conversion device and photoelectric conversion system may be applied to electronic devices such as so-called smartphones and tablets.
[0122] 30A and 30B are diagrams showing an example of an electronic device 1500 equipped with a photoelectric conversion device. Fig. 30A shows the front side of the electronic device 1500, and Fig. 30B shows the back side of the electronic device 1500.
[0123] 30A, a display 1510 that displays an image is disposed in the center of the surface of electronic device 1500. Then, along the upper side of the surface of electronic device 1500, front cameras 1521 and 1522 that use photoelectric conversion devices, an IR light source 1530 that emits infrared light, and a visible light source 1540 that emits visible light are disposed.
[0124] Also, as shown in FIG. 30B, rear cameras 1551 and 1552 using photoelectric conversion devices, an IR light source 1560 that emits infrared light, and a visible light source 1570 that emits visible light are arranged along the upper edge of the back surface of electronic device 1500.
[0125] By applying the photoelectric conversion device described above to the electronic device 1500 configured as described above, it is possible to capture higher quality images, for example. The photoelectric conversion device can also be applied to other electronic devices such as infrared sensors, distance measuring sensors using active infrared light sources, security cameras, and personal or biometric authentication cameras. This can improve the accuracy and performance of these electronic devices.
[0126] Various devices have been described in the above embodiments, but a mechanical device may also be provided. The mechanical device in the camera can drive optical components for zooming, focusing, and shutter operation. Alternatively, the mechanical device in the camera can move a photoelectric conversion device for vibration reduction.
[0127] The equipment may also be transportation equipment such as a vehicle, a ship, or an aircraft. A mechanical device in transportation equipment can be used as a moving device. Equipment as transportation equipment is suitable for transporting a photoelectric conversion device or for assisting and / or automating driving (piloting) using a photographing function. A processing device for assisting and / or automating driving (piloting) can perform processing to operate the mechanical device as a moving device based on information obtained by the photoelectric conversion device.
[0128] (others) The present invention is not limited to the above-described embodiments and can be modified in various ways. For example, adding a portion of one of the embodiments to another embodiment or substituting a portion of the other embodiment is also included in the present invention. Note that the above-described embodiments are merely illustrative examples of how the present invention can be implemented, and the technical scope of the present invention should not be interpreted as being limited by these examples. In other words, the present invention can be implemented in various forms without departing from its technical concept or main features. [Explanation of symbols]
[0129] 10: Pixels 30: Vertical signal line 50: Voltage-current conversion unit 60:Conversion section 400: Photoelectric conversion element
Claims
1. a pixel having a photoelectric conversion element; signal lines connected to the pixels; a voltage-current converter that converts the voltage signal of the signal line into a current; a conversion unit having an oversampling analog-to-digital conversion circuit that converts the current output from the voltage-to-current conversion unit into a digital signal, There is no sample-and-hold unit between the signal line and the conversion unit, the voltage-current converter includes a first transistor, a second transistor, a resistor connected between a source of the first transistor and a source of the second transistor, a first amplifier that drives a gate of the first transistor, and a second amplifier that drives a gate of the second transistor; The output of the first amplifier can be input to the input of the second amplifier. Photoelectric conversion device.
2. an output node of the signal line is connected to an input node of the voltage-to-current converter; an input node of the conversion unit is connected to an output node of the voltage-to-current conversion unit; There is no sample-and-hold unit between the output node of the signal line and the input node of the conversion unit. The photoelectric conversion device according to claim 1 .
3. an output node of the signal line is connected to an input node of the voltage-to-current converter; an input node of the conversion unit is connected to an output node of the voltage-to-current conversion unit; a sample-and-hold unit is not provided between the input node of the voltage-to-current converter and the output node of the voltage-to-current converter; The photoelectric conversion device according to claim 1 .
4. a pixel having a photoelectric conversion element; signal lines connected to the pixels; a voltage-current converter that converts the voltage signal of the signal line into a current; An oversampling circuit that converts the current output from the voltage-to-current converter into a digital signal. a conversion unit having a ring-type analog-to-digital conversion circuit, a signal path from the signal line to the conversion unit includes a path that does not have a sample-and-hold unit; the voltage-current converter includes a first transistor, a second transistor, a resistor connected between a source of the first transistor and a source of the second transistor, a first amplifier that drives a gate of the first transistor, and a second amplifier that drives a gate of the second transistor; The output of the first amplifier can be input to the input of the second amplifier. Photoelectric conversion device.
5. a pixel having a photoelectric conversion element; signal lines connected to the pixels; a voltage-current converter that converts the voltage signal of the signal line into a current; a conversion unit having an oversampling analog-to-digital conversion circuit that converts the current output from the voltage-to-current conversion unit into a digital signal, the voltage-current converter is configured to be able to output the current obtained by converting the voltage signal of the signal line without sampling and holding it, to the converter; the voltage-current converter includes a first transistor, a second transistor, a resistor connected between a source of the first transistor and a source of the second transistor, a first amplifier that drives a gate of the first transistor, and a second amplifier that drives a gate of the second transistor; The output of the first amplifier can be input to the input of the second amplifier. Photoelectric conversion device.
6. the voltage-to-current converter includes a differential pair; The photoelectric conversion device according to any one of claims 1 to 5.
7. a resistor is connected between the sources of the two transistors that make up the differential pair; The photoelectric conversion device according to claim 6 .
8. The resistor is a variable resistor. The photoelectric conversion device according to claim 7 .
9. The two transistors are N-type transistors. The photoelectric conversion device according to claim 7 or 8.
10. the voltage-to-current converter includes a differential stage having the differential pair, and an amplifier stage that amplifies an output current of the differential stage; The photoelectric conversion device according to any one of claims 6 to 9.
11. The differential pair is composed of two P-type transistors. The photoelectric conversion device according to claim 6 .
12. the voltage-to-current converter has a capacitance for clamping a voltage corresponding to a reset level of the signal line; The photoelectric conversion device according to any one of claims 1 to 11.
13. the voltage-current converter converts a voltage corresponding to a difference between a reference voltage and a voltage on the signal line into the current; a circuit for sampling and holding the reference voltage; The photoelectric conversion device according to any one of claims 1 to 12.
14. the voltage-current converter has a capacitance between at least one of the first amplifier and the second amplifier and the signal line, for clamping a voltage corresponding to a reset level of the signal line; The photoelectric conversion device according to any one of claims 1 to 5.
15. the first amplifier and the second amplifier are each connectable to the signal line; The photoelectric conversion device according to any one of claims 1 to 14.
16. the voltage-to-current converter has a circuit for sampling and holding an input of at least one of the first amplifier and the second amplifier; The photoelectric conversion device according to any one of claims 1 to 15.
17. A first pixel having a photoelectric conversion element and a second pixel having a photoelectric conversion element; a first signal line connected to the first pixel and a second signal line connected to the second pixel; a first voltage-to-current converter that converts the voltage signal of the first signal line into a current; a first conversion unit having an oversampling analog-to-digital conversion circuit that converts the current output from the first voltage-to-current conversion unit into a digital signal; a switch having a first terminal connected to the first signal line and a second terminal connected to the second signal line; There is no sample-and-hold unit between the first signal line and the first conversion unit. Photoelectric conversion device.
18. A second voltage-to-current converter converts the voltage signal of the second signal line into a current; the first voltage-current converter and the second voltage-current converter are connected to different control lines; The photoelectric conversion device according to claim 17.
19. A second conversion unit having an oversampling analog-to-digital conversion circuit that converts the current output from the second voltage-to-current conversion unit into a digital signal, The first conversion unit and the second conversion unit are connected to different control lines. The photoelectric conversion device according to claim 18.
20. The photoelectric conversion device according to any one of claims 1 to 19, a signal processing unit that processes a signal output from the photoelectric conversion device; A photoelectric conversion system having:
21. The photoelectric conversion device according to any one of claims 1 to 19, an optical system corresponding to the photoelectric conversion device; a control device that controls the photoelectric conversion device; a processing device that processes a signal output from the photoelectric conversion device; a display device that displays information obtained by the photoelectric conversion device; a storage device that stores information obtained by the photoelectric conversion device; and a mechanical device that operates based on information obtained by the photoelectric conversion device; An apparatus characterized by comprising:
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