Automatic Basic Input / Output System (BIOS) Recovery

Abstract

In general, the subject matter of the present disclosure relates to automatic basic input / output system (BIOS) recovery. In some implementations, the automatic BIOS recovery may include attempting to boot an operating system (OS) from the BIOS while running an Intelligent Platform Management Interface (IPMI) watchdog timer. The BIOS may be stored in a first partition of a memory of a communication device in a wireless communication system. After a timeout of the watchdog timer, execution of a BIOS recovery procedure may be automatically triggered. After execution of the BIOS recovery procedure, the OS may automatically retry to boot from the BIOS.

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to Indian Patent Application No. 202241055636, entitled "Automated Basic Input / Output System (BIOS) Recovery," filed on September 28, 2022, the disclosure of which is incorporated herein by reference in its entirety.

[0002] In some implementations, the subject matter of this disclosure relates to telecommunications systems, and more particularly to automatic basic input / output system (BIOS) recovery, such as for communication devices in wireless communication systems. [Background technology]

[0003] In today's world, cellular networks provide on-demand communication capabilities to individuals and businesses. Typically, cellular networks are wireless networks that can be distributed over a terrestrial area called a cell. Each such cell is served by at least one fixed-location transceiver called a cell site or base station. Each cell may use a different set of frequencies from its neighboring cells to avoid interference and provide improved service within each cell. When cells are combined, they provide radio coverage over a wide geographic area, allowing numerous mobile phones and / or other wireless devices or portable transceivers to communicate with each other and with fixed transceivers and phones anywhere in the network. Such communication is performed through base stations and is achieved even when a mobile transceiver is traveling through two or more cells during transmission. Major wireless communication providers have deployed such cell sites worldwide, allowing communicating mobile phones and mobile computing devices to connect to the public switched telephone network and the public Internet.

[0004] A mobile phone is a portable telephone that can receive and / or make telephone and / or data communications through a cell site or transmission tower by using radio waves to transmit signals to and from the device (mobile phone). Given the large number of mobile phone users, current mobile phone networks offer limited shared resources. In that regard, cell sites and handsets may change frequencies and use low-power transmitters to allow simultaneous use of the network by many callers with less interference. Coverage by a cell site may depend on the particular geographic location and / or the number of users that can potentially use the network. For example, in cities, cell sites may have a range of up to about 1 / 2 mile, while in rural areas, the range may be as much as 5 miles, and in some areas, users may receive signals from cell sites as far as 25 miles away.

[0005] The following are some examples of digital cellular technologies used by communication providers: Global System for Mobile Communications (GSM), General Packet Radio Service (GPRS), cdmaOne, CDMA2000, Evolution-Data Optimized (EV-DO), Enhanced Data Rates for GSM Evolution (EDGE), Universal Mobile Telecommunications System (UMTS), Digital Enhanced Cordless Telecommunications (DECT), Digital AMPS (IS-136 / TDMA), and Integrated Digital Enhanced Network (iDEN). Long Term Evolution, or 4G LTE, developed by the Third Generation Partnership Project (3GPP®) standards organization, is a standard for high-speed data wireless communication for mobile phones and data terminals. 5G standards are currently being developed and deployed. 3GPP cellular technologies such as LTE and 5G NR are an evolution of earlier generations of 3GPP technologies such as GSM / EDGE and UMTS / HSPA digital cellular technologies, and allow for increased capacity and speeds by using a different air interface along with core network improvements.

[0006] A cellular network may be divided into a radio access network and a core network. The radio access network (RAN) may include network functions capable of handling radio layer communication processing. The core network may include network functions capable of handling higher layer communication, e.g., Internet Protocol (IP), transport layer, and application layer. In some cases, the RAN function may be divided into baseband unit function and radio unit function; for example, a radio unit connected to a baseband unit via a fronthaul network may be responsible for lower layer processing of the radio physical layer, and the baseband unit may be responsible for higher layer radio protocols, e.g., MAC, RLC, etc.

[0007] Computer systems in cells, such as base stations and / or base station components, run operating systems (OSs) to manage their operation, including the management of their hardware components and software resources. An OS may be installed on a computer system that is first used when the hardware is deployed to a cell. However, at some point during the operation of the computer system, the OS may experience an error that partially or completely impairs the operation of the computer system. Thus, the computer system may be partially or completely inoperable, thereby impairing the functionality of the cell site while the computer system experiences downtime. Furthermore, traditionally, maintenance personnel physically visit the cell site to evaluate errors and repair the OS, which may include reinstalling the OS on the computer system, such as in the event of an OS boot failure. Waiting for a maintenance personnel to reach the cell site and then address the OS error results in extended downtime. While some computer systems may allow for remote OS repair or reinstallation, such remote access of computer systems may be insecure and still require manual intervention by a maintenance personnel.

[0008] Additionally, OSes typically need to be updated over time to address various issues, such as newly deployed software bugs and other problems, and to provide improved security. Traditionally, the cell site's computer system must be taken offline while the OS is updated, thereby compromising the functionality of the cell site while the computer system experiences downtime. Summary of the Invention

[0009] In some implementations, the subject matter of this disclosure relates to a computer-implemented method that can include attempting to boot an operating system (OS) from a basic input / output system (BIOS) while running an Intelligent Platform Management Interface (IPMI) watchdog timer. The BIOS can be stored in a first partition of memory of a communication device in a wireless communication system. The method can also include automatically triggering execution of a BIOS recovery procedure after a timeout of the watchdog timer, and automatically retrying to boot the OS from the BIOS after the BIOS recovery procedure is executed.

[0010] In some implementations, the subject matter of this disclosure can include one or more of the following optional features.

[0011] In some implementations, the method may further include incrementing a failure counter upon timeout of the watchdog timer and before triggering execution of a BIOS recovery procedure, and may further include determining whether the failure counter is less than a threshold value, and execution of a BIOS recovery procedure may be triggered in response to determining that the failure counter is equal to or greater than the threshold value. Additionally, the method may further include retrying to boot the OS from the BIOS without triggering execution of a BIOS recovery procedure in response to determining that the failure counter is less than the threshold value, and the failure counter may be 0 when the OS is attempted to be booted from the first BIOS, and the method may further include resetting the failure counter to 0 in response to determining that the failure counter is equal to or greater than the threshold value, and / or the failure counter may be 0 when the OS is attempted to be booted from the first BIOS, and the method may further include incrementing the failure counter by 1 in response to timeout of the watchdog timer.

[0012] In some implementations, attempting to boot the OS may include a BIOS POST attempt, during which a watchdog timer timeout may occur.

[0013] In some implementations, attempting to boot the OS may include attempting to load the OS, and a watchdog timer timeout may occur during the OS load attempt.

[0014] In some implementations, the watchdog timer timeout may include at least one of a BIOS FRB2 timeout, a BIOS FRB3 timeout, and a BIOS POST timeout.

[0015] In some implementations, performing the BIOS recovery procedure can include copying a golden BIOS image stored in a second partition of the memory of the communications device to the BIOS. Further, the golden BIOS image can be pre-stored in the second partition of the memory during manufacturing of the communications device.

[0016] In some implementations, the communication device may be a DU.

[0017] In some implementations, the attempting and / or automatically attempting may be performed by a base station in the wireless communication system. Further, the base station may include at least one of an eNodeB base station, a gNodeB base station, a wireless base station, and any combination thereof.

[0018] In some implementations, the wireless communication system may be at least one of a long term evolution communication system, a new radio communications system, and any combination thereof.

[0019] Non-transitory computer program products (i.e., physically embodied computer program products) that store instructions that, when executed by one or more data processors of one or more computing systems, cause at least one data processor to perform the operations described herein are also described. Similarly, computer systems that may include one or more data processors and memory coupled to the one or more data processors are also described. The memory may store, on a temporary or permanent basis, instructions that cause at least one processor to perform one or more of the operations described herein. Furthermore, methods may be implemented by one or more data processors within a single computing system or distributed across two or more computing systems. Such computing systems may be connected via one or more connections and may exchange data and / or commands or other instructions, etc., including, but not limited to, connections over a network (e.g., the Internet, a wireless wide area network, a local area network, a wide area network, a wired network, etc.), such as via a direct connection between one or more of the computing systems.

[0020] The details of one or more variations of the presently disclosed subject matter described herein are set forth in the accompanying drawings and the description below. Other features and advantages of the presently disclosed subject matter described herein will be apparent from the description and drawings, and from the claims.

[0021] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate certain aspects of the disclosed subject matter disclosed herein and, together with the description, serve to explain some of the principles associated with the disclosed implementations. [Brief explanation of the drawings]

[0022] [Figure 1a] FIG. 1 illustrates an exemplary conventional long term evolution (LTE) communication system.

[0023] [Figure 1b] FIG. 1b illustrates further details of the exemplary LTE system shown in FIG. 1a.

[0024] [Figure 1c] FIG. 1b illustrates further details of the evolved packet core of the exemplary LTE system shown in FIG. 1a.

[0025] [Figure 1d] FIG. 1B illustrates an exemplary evolved Node B of the exemplary LTE system shown in FIG. 1a.

[0026] [Figure 2] FIG. 2 shows further details of the evolved Node B shown in FIGS. 1a to 1d.

[0027] [Figure 3] FIG. 1 illustrates an example virtual radio access network in accordance with some implementations of the subject matter of this disclosure.

[0028] [Figure 4] FIG. 1 illustrates an exemplary 3GPP split architecture for providing use of higher frequency bands to its users.

[0029] [Figure 5a] FIG. 1 illustrates an exemplary 5G wireless communication system.

[0030] [Figure 5b] A diagram showing an example layer architecture of a split gNB and / or a split ng-eNB (e.g., a next-generation eNB that may be connected to 5GC).

[0031] [Figure 5c]FIG. 5B illustrates an exemplary functional split in the gNB architecture shown in FIGS. 5a-5b.

[0032] [Figure 6] A diagram showing a dual BIOS FLASH configuration of a device according to some implementations of the subject matter of this disclosure.

[0033] [Figure 7] FIG. 1 illustrates a method for performing automatic BIOS recovery according to some implementations of the presently disclosed subject matter.

[0034] [Figure 8] FIG. 10 illustrates another method for performing automatic BIOS recovery according to some implementations of the presently disclosed subject matter.

[0035] [Figure 9] FIG. 1 illustrates an exemplary system in accordance with some implementations of the subject matter of this disclosure.

[0036] [Figure 10] FIG. 1 illustrates an exemplary method according to some implementations of the subject matter of this disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0037] The subject matter of the present disclosure may provide systems and methods that may be implemented in wireless communication systems, which may include various wireless communication systems, including 5G new wireless communication systems, long-term evolution communication systems, and the like.

[0038] Generally, the subject matter of this disclosure relates to automated BIOS recovery.

[0039] In some implementations of the subject matter of this disclosure, a computer system can have multiple instances of an OS installed on the computer system. The OS instances, also referred to herein as OS partitions, are partitioned from one another in the computer system's memory. Thus, an error by one of the OS instances is isolated from and does not affect any of the other OS instances. If a running instance of the OS fails to start successfully, the other OS instances can provide redundancy such that one of the other OS instances is automatically started.

[0040] In some implementations of the subject matter of this disclosure, an OS may be attempted to boot from a first basic input / output system (BIOS) pre-stored in a first partition of memory of a computer system, e.g., a communication device in a wireless communication system, such as a long-term evolution communication system, a new wireless communication system, or other wireless communication system. The OS may be run on the communication device in response to the OS successfully booting from the first BIOS. In response to the OS not successfully booting from the first BIOS, a BIOS recovery procedure may be automatically triggered. The BIOS recovery procedure may be performed according to a typical BIOS recovery procedure, as will be understood by those skilled in the art. Generally, the BIOS recovery procedure may load a backup BIOS image that successfully loads a compatible backup OS image available on either the same computer system or an additional computer system.

[0041] One or more aspects of the subject matter of this disclosure may be incorporated into transmitter and / or receiver components of base stations (e.g., gNodeB, eNodeB, etc.) within such communication systems. The following is a general discussion of Long Term Evolution communication systems and new 5G wireless communication systems.

[0042] I. Long Term Evolution Communication System 1a-1c and 2 illustrate an exemplary conventional Long Term Evolution (LTE) communication system 100 along with its various components. The LTE system, or 4G LTE, as it is commercially known, is governed by a standard for high-speed data wireless communication for mobile phones and data terminals. The standard is an evolution of GSM / EDGE (Global System for Mobile communications / Enhanced Data Rates for GSM Evolution) and UMTS / HSPA (Universal Mobile Telecommunications System / High-Speed ​​Packet Access) network technologies. The standard was developed by 3GPP (3rd Generation Partnership Project).

[0043] 1a, system 100 may include an evolved universal terrestrial radio access network (EUTRAN) 102, an evolved packet core (EPC) 108, and a packet data network (PDN) 101, where EUTRAN 102 and EPC 108 provide communication between user equipment 104 and PDN 101. EUTRAN 102 may include multiple evolved Node Bs (eNodeBs or ENODEBs or enodeb or eNBs) or base stations 106(a, b, c) (as shown in FIG. 1b) that provide communication capabilities to multiple user equipment 104(a, b, c). User equipment 104 may be a mobile phone, a smartphone, a tablet, a personal computer, a personal digital assistant (PDA), a server, a data terminal, and / or any other type of user equipment, and / or any combination thereof. User equipment 104 can connect to the EPC 108 and ultimately to the PDN 101 via any eNodeB 106. Typically, user equipment 104 can connect to the nearest eNodeB 106 in terms of distance. In the LTE system 100, the EUTRAN 102 and the EPC 108 cooperate to provide connectivity, mobility, and services for user equipment 104.

[0044] Figure 1b shows further details of the network 100 shown in Figure 1a. As mentioned above, the EUTRAN 102 includes multiple eNodeBs 106, also known as cell sites. The eNodeBs 106 provide radio functionality and perform important control functions, including air link resource scheduling or radio resource management, active mode mobility or handover, and admission control for services. The eNodeBs 106 are responsible for selecting which mobility management entity (MME, as shown in Figure 1c) will serve the user equipment 104, as well as protocol features such as header compression and encryption. The eNodeBs 106 that make up the EUTRAN 102 cooperate with each other for radio resource management and handover.

[0045] Communication between the user equipment 104 and the eNodeB 106 occurs over an air interface 122 (also known as the LTE-Uu interface). As shown in FIG. 1b, the air interface 122 provides communication between the user equipment 104b and the eNodeB 106a. The air interface 122 uses Orthogonal Frequency Division Multiple Access (OFDMA) and Single Carrier Frequency Division Multiple Access (SC-FDMA), an OFDMA variant, on the downlink and uplink, respectively. OFDMA allows the use of multiple known antenna technologies, such as Multiple Input Multiple Output (MIMO).

[0046] The air interface 122 uses various protocols, including radio resource control (RRC) for signaling between the user equipment 104 and the eNodeB 106 and non-access stratum (NAS) for signaling between the user equipment 104 and the MME (as shown in FIG. 1c). In addition to signaling, user traffic is transferred between the user equipment 104 and the eNodeB 106. Both signaling and traffic in the system 100 are carried by physical layer (PHY) channels.

[0047] Multiple eNodeBs 106 may be interconnected with each other using X2 interfaces 130(a, b, c). As shown in FIG. 1b, X2 interface 130a provides interconnection between eNodeB 106a and eNodeB 106b, X2 interface 130b provides interconnection between eNodeB 106a and eNodeB 106c, and X2 interface 130c provides interconnection between eNodeB 106b and eNodeB 106c. The X2 interfaces may be established between two eNodeBs to provide for the exchange of signals, which may include information related to loading or interference, as well as information related to handover. The eNodeBs 106 communicate with the evolved packet core 108 via S1 interfaces 124(a, b, c). The S1 interface 124 can be divided into two interfaces, one for the control plane (shown in FIG. 1c as control plane interface (S1-MME interface) 128) and the other for the user plane (shown in FIG. 1c as user plane interface (S1-U interface) 125).

[0048] The EPC 108 establishes and enforces Quality of Service (QoS) for user services and allows the user equipment 104 to maintain a consistent Internet Protocol (IP) address while moving. Note that each node in the network 100 has its own IP address. The EPC 108 is designed to interwork with legacy wireless networks. The EPC 108 is also designed to separate the control plane (i.e., signaling) and the user plane (i.e., traffic) in the core network architecture, which allows for more flexibility in implementation and independent scalability of control and user data functions.

[0049] The EPC 108 architecture is dedicated to packet data and is shown in more detail in Figure 1c. The EPC 108 includes a serving gateway (S-GW) 110, a PDN gateway (P-GW) 112, a mobility management entity (MME) 114, a home subscriber server (HSS) 116 (a subscriber database for the EPC 108), and a policy control and charging rules function (PCRF) 118. Some of these (such as the S-GW, P-GW, MME, and HSS) are often combined into nodes according to manufacturer implementations.

[0050] The S-GW 110 functions as an IP packet data router and is the bearer path anchor for the user equipment within the EPC 108. Thus, when the user equipment moves from one eNodeB 106 to another during mobility operation, the S-GW 110 remains the same and the bearer path towards the EUTRAN 102 is switched to communicate with the new eNodeB 106 serving the user equipment 104. If the user equipment 104 moves to the domain of a different S-GW 110, the MME 114 can transfer all of the user equipment's bearer path to the new S-GW. The S-GW 110 establishes a bearer path for the user equipment to one or more P-GWs 112. When downstream data is received for an idle user equipment, the S-GW 110 buffers the downstream packets and requests the MME 114 to identify and re-establish a bearer path to and through the EUTRAN 102.

[0051] The P-GW 112 is the gateway between the EPC 108 (and user equipment 104 and EUTRAN 102) and the PDN 101 (shown in FIG. 1a). The P-GW 112 acts as a router for user traffic and performs functions on behalf of the user equipment. These include IP address allocation for the user equipment, packet filtering of downstream user traffic to ensure that it is placed on the appropriate bearer path, and enforcement of downstream QoS, including data rate. Depending on the services a subscriber is using, there may be multiple user data bearer paths between the user equipment 104 and the P-GW 112. A subscriber may use services on PDNs served by different P-GWs, in which case the user equipment has at least one bearer path established to each P-GW 112. During handover of a user equipment from one eNodeB to another, if the S-GW 110 is also changing, the bearer path from the P-GW 112 is switched to the new S-GW.

[0052] The MME 114 manages the user equipment 104 within the EPC 108. This management includes managing subscriber authentication, maintaining context for authenticated user equipment 104, establishing data bearer paths within the network for user traffic, and tracking the location of idle mobiles that have not detached from the network. In the case of an idle user equipment 104 that needs to be reconnected to the access network to receive downstream data, the MME 114 initiates paging to locate the user equipment and reestablishes the bearer path to and through the EUTRAN 102. The MME 114 for a particular user equipment 104 is selected by the eNodeB 106 from which the user equipment 104 initiates system access. An MME is typically part of a collection of MMEs within the EPC 108 for load sharing and redundancy purposes. In establishing a user's data bearer path, the MME 114 is responsible for selecting the P-GW 112 and the S-GW 110, which constitute the termination points of the data path through the EPC 108.

[0053] The PCRF 118 is responsible for policy control decision-making and controlling flow-based charging functionality within the policy control enforcement function (PCEF) residing within the P-GW 110. The PCRF 118 provides QoS authorization (QoS class identifier (QCI) and bit rate), which determines how a data flow is treated within the PCEF and ensures that this is in accordance with the user's subscription profile.

[0054] As mentioned above, IP services 119 are provided by PDN 101 (as shown in FIG. 1a).

[0055] 1d shows an example structure of the eNodeB 106. The eNodeB 106 may include at least one remote radio head (RRH) 132 (typically, there may be three RRHs 132) and a baseband unit (BBU) 134. The RRHs 132 may be connected to an antenna 136. The RRHs 132 and BBU 134 may be connected using an optical interface compliant with the common public radio interface (CPRI) / enhanced CPRI (eCPRI) 142 standard specification, either using RRH-specific custom control and user plane framing methods or using O-RAN Alliance compliant Control and User plane framing methods. The operation of the eNodeB 106 can be characterized using the following standard parameters (and specifications): radio frequency band (Band 4, Band 9, Band 17, etc.), bandwidth (5, 10, 15, 20 MHz), access method (downlink: OFDMA, uplink: SC-OFDMA), antenna technology (single-user and multi-user MIMO, uplink: single-user and multi-user MIMO), number of sectors (up to 6), maximum transmission speed (downlink: 150 Mb / s, uplink: 50 Mb / s), S1 / X2 interface (1000Base-SX, 1000Base-T), and mobile environment (up to 350 km / h). The BBU 134 can be responsible for digital baseband signal processing, S1 line termination, X2 line termination, call processing, and monitoring and control processing. IP packets received from the EPC 108 (not shown in FIG. 1d) can be modulated into digital baseband signals and transmitted to the RRH 132. Conversely, digital baseband signals received from the RRH 132 may be demodulated into IP packets for transmission to the EPC 108.

[0056] The RRH 132 can transmit and receive wireless signals using the antenna 136. The RRH 132 can convert digital baseband signals from the BBU 134 (using a converter (CONV) 140) to radio frequency (RF) signals and power amplify them (using an amplifier (AMP) 138) for transmission to the user equipment 104 (not shown in FIG. 1d). Conversely, radio frequency (RF) signals received from the user equipment 104 are amplified (using AMP 138) and converted (using CONV 140) to digital baseband signals for transmission to the BBU 134.

[0057] 2 shows additional details of an exemplary eNodeB 106. The eNodeB 106 includes multiple layers: LTE Layer 1 202, LTE Layer 2 204, and LTE Layer 3 206. LTE Layer 1 includes the physical layer (PHY). LTE Layer 2 includes medium access control (MAC), radio link control (RLC), and packet data convergence protocol (PDCP). LTE Layer 3 includes various functions and protocols, including radio resource control (RRC), dynamic resource allocation, eNodeB measurement configuration and provisioning, radio admission control, connection mobility control, and radio resource management (RRM). The RLC protocol is an automatic repeat request (ARQ) fragmentation protocol used over the cellular air interface. The RRC protocol handles LTE Layer 3 control plane signaling between user equipment and EUTRAN. RRC includes functions for connection establishment and release, system information broadcast, radio bearer establishment / reconfiguration and release, RRC connection mobility procedures, paging notification and release, and outer loop power control. PDCP performs IP header compression and decompression, user data transfer, and radio bearer sequence number maintenance. The BBU 134 shown in FIG. 1d may include LTE layers L1 to L3.

[0058] One of the primary functions of the eNodeB 106 is radio resource management, including scheduling of both uplink and downlink air interface resources for the user equipment 104, control of bearer resources, and admission control. As an agent for the EPC 108, the eNodeB 106 is responsible for forwarding paging messages used to locate a mobile when it is idle. The eNodeB 106 also communicates common control channel information over the air, performs header compression, encryption and decryption of user data sent over the air, and establishes handover reporting and trigger criteria. As mentioned above, the eNodeB 106 can cooperate with other eNodeBs 106 via the X2 interface for handover and interference management purposes. The eNodeB 106 communicates with the MME of the EPC via the S1-MME interface and with the S-GW using the S1-U interface. Additionally, the eNodeB 106 exchanges user data with the S-GW via the S1-U interface. The eNodeBs 106 and the EPC 108 have a many-to-many relationship to support load sharing and redundancy between the MMEs and the S-GWs. The eNodeB 106 selects an MME from a group of MMEs so that the load can be shared by multiple MMEs to avoid congestion.

[0059] II. 5G NR Wireless Communication Network In some implementations, the subject matter of this disclosure relates to 5G new radio (NR) communication systems. 5G NR is the next communication standard beyond the 4G / IMT-Advanced standard. 5G networks offer higher capacity than current 4G, allowing for a larger number of mobile broadband users per unit area, and allowing for consumption of more and / or unlimited data amounts in gigabytes per month and per user. This may enable users to stream high-definition media for many hours per day using their mobile devices, even when Wi-Fi networks do not allow for this. 5G networks have improved support for device-to-device communication, lower costs, lower latency and lower battery consumption than 4G equipment, etc. Such a network would have data rates of tens of megabits per second for many users, data rates of 100 Mb / s for metropolitan areas, simultaneous 1 Gb / s to users within a limited area (e.g., an office floor), many simultaneous connections for wireless sensor networks, increased spectral efficiency, improved coverage, increased signaling efficiency, 1-10 ms latency, and reduced latency compared to existing systems.

[0060] 3 illustrates an exemplary virtual radio access network 300. The network 300 can provide communication between various components, including a base station (e.g., eNodeB, gNodeB) 301, radio equipment 303, a centralized unit 302, a digital unit 304, and wireless devices 306. The components in the system 300 can be communicatively coupled to a core using a backhaul link 305. The centralized unit (CU) 302 can be communicatively coupled to a distributed unit (DU) 304 using a midhaul connection 308. The radio frequency (RU) component 306 can be communicatively coupled to the DU 304 using a fronthaul connection 310.

[0061] In some implementations, the CU 302 can provide intelligent communication capabilities to one or more DU units 304. The units 302, 304 can include one or more base stations, macro base stations, micro base stations, remote radio heads, etc., and / or any combination thereof.

[0062] In a lower layer split architecture environment, the CPRI bandwidth requirement for NR can be several hundred Gb / s. CPRI compression can be implemented in the DU and RU (as shown in Figure 3). In 5G communication systems, compressed CPRI over Ethernet frames is referred to as eCPRI and is the recommended fronthaul network. This architecture can enable standardization of fronthaul / midhaul, which can include upper layer splitting (e.g., Option 2 or Option 3-1 (upper / lower RLC split architecture)) and fronthaul using L1 split architecture (Option 7).

[0063] In some implementations, a lower layer split architecture (e.g., Option 7) may include receiver in the uplink and joint processing across multiple transmission points (TPs) for both DL / UL and transport bandwidth and latency requirements to facilitate deployment. Additionally, the lower layer split architecture of the presently disclosed subject matter can include splitting between cell-level processing and user-level processing, which may include cell-level processing in a remote unit (RU) and user-level processing in a DU. Furthermore, using the lower layer split architecture of the presently disclosed subject matter, frequency-domain samples may be transported over the Ethernet fronthaul, and the frequency-domain samples may be compressed for reduced fronthaul bandwidth.

[0064] 4 illustrates an example communication system 400 that may implement 5G technology and provide users of the communication system 400 with use of higher frequency bands (e.g., greater than 10 GHz). The communication system 400 may include a macrocell 402 and small cells 404, 406.

[0065] The mobile device 408 may be configured to communicate with one or more of the small cells 404, 406. The communication system 400 may enable splitting of the control plane (C-plane) and user plane (U-plane) between the macrocell 402 and the small cells 404, 406, with the C-plane and U-plane utilizing different frequency bands. Specifically, the small cells 404, 406 may be configured to utilize higher frequency bands when communicating with the mobile device 408. The macrocell 402 may utilize existing cellular bands for C-plane communications. The mobile device 408 may be communicatively coupled via the U-plane 412, where the small cell (e.g., the small cell 406) may provide higher data rates and more flexible / cost / energy-efficient operation. The macrocell 402 may maintain good connectivity and mobility via the C-plane 410. Furthermore, in some cases, LTE and NR may be transmitted on the same frequency.

[0066] 5a illustrates an exemplary 5G wireless communication system 500 according to some implementations of the subject matter of this disclosure. The system 500 may be configured to have a lower-layer split architecture according to Option 7-2. The system 500 may include a core network 502 (e.g., 5G Core) and one or more gNodeBs (or gNBs), where the gNBs may have a centralized unit gNB-CU. The gNB-CU may be logically divided into a control plane portion gNB-CU-CP 504 and one or more user plane portions gNB-CU-UP 506. The control plane portion 504 and the user plane portion 506 may be configured to be communicatively coupled using an E1 communication interface 514 (as defined in the 3GPP standard). The control plane portion 504 may be configured to be responsible for executing the RRC and PDCP protocols of the radio stack.

[0067] The control plane portion 504 and user plane portion 506 of the centralized unit of the gNB may be configured to be communicatively coupled to one or more distributed units (DUs) 508, 510 according to an upper layer split architecture. The distributed units 508, 510 may be configured to execute upper portions of the RLC, MAC, and PHY layer protocols of the radio stack. The control plane portion 504 may be configured to be communicatively coupled to the distributed units 508, 510 using an F1-C communication interface 516, and the user plane portion 506 may be configured to be communicatively coupled to the distributed units 508, 510 using an F1-U communication interface 518. The distributed units 508, 510 may be coupled to one or more remote radio units (RUs) 512 via a fronthaul network 520 (which may include one or more switches, links, etc.), which in turn communicate with one or more user equipment (not shown in FIG. 5a). The remote radio unit 512 may be configured to execute lower portions of the PHY layer protocol and provide antenna capabilities to the remote unit for communication with user equipment (similar to the description above in connection with Figures 1a-2).

[0068] Figure 5b shows an example layer architecture 530 for a split gNB. The architecture 530 can be implemented within the communication system 500 shown in Figure 5a, which can be configured as a virtualized disaggregated radio access network (RAN) architecture, whereby layers L1, L2, L3 and radio processing can be virtualized and disaggregated within centralized, distributed, and radio units. As shown in Figure 5b, the gNB-DU 508 can be communicatively coupled to the gNB-CU-CP control plane portion 504 (also shown in Figure 5a) and the gNB-CU-UP user plane portion 506. Each of the components 504, 506, 508 can be configured to include one or more layers.

[0069] The gNB-DU 508 may include RLC, MAC, and PHY layers, as well as various communications sublayers. These may include an F1-Application Protocol (F1-AP) sublayer, a GPRS Tunneling Protocol (GTPU) sublayer, a Stream Control Transmission Protocol (SCTP) sublayer, a User Datagram Protocol (UDP) sublayer, and an Internet Protocol (IP) sublayer. As described above, the distributed unit 508 may be communicatively coupled to the control plane portion 504 of the centralized unit, which may also include the F1-AP, SCTP, and IP sublayers, as well as the Radio Resource Control and PDCP Control (PDCP-C) sublayer. Furthermore, the distributed unit 508 may also be communicatively coupled to the user plane portion 506 of the centralized unit of the gNB. The user plane portion 506 may include a Service Data Adaptation Protocol (SDAP), a PDCP User (PDCP-U), a GTPU, a UDP, and an IP sublayer.

[0070] Figure 5c shows an example functional division in the gNB architecture shown in Figures 5a-5b. As shown in Figure 5c, the gNB-DU 508 may be communicatively coupled to the gNB-CU-CP 504 and the GNB-CU-UP 506 using an F1-C communication interface. The gNB-CU-CP 504 and the GNB-CU-UP 506 may be communicatively coupled using an E1 communication interface. The upper portion of the PHY layer (or Layer 1) may be performed by the gNB-DU 508, and the lower portion of the PHY layer may be performed by the RU (not shown in Figure 5c). As shown in Figure 5c, the RRC and PDCP-C portions may be performed by the control plane portion 504, and the SDAP and PDCP-U portions may be performed by the user plane portion 506.

[0071] Some of the functions of the PHY layer in a 5G communication network may include error detection on transport channels and indication to higher layers, FEC encoding / decoding of transport channels, hybrid ARQ soft combining, rate matching of coded transport channels to physical channels, mapping of coded transport channels to physical channels, power weighting of physical channels, modulation and demodulation of physical channels, frequency and time synchronization, radio characteristic measurements and indication to higher layers, MIMO antenna processing, digital and analog beamforming, RF processing, and other functions.

[0072] The MAC sublayer of Layer 2 may perform beam management, random access procedures, mapping between logical channels and transport channels, concatenation of multiple MAC service data units (SDUs) belonging to one logical channel into transport blocks (TBs), multiplexing / demultiplexing of SDUs belonging to logical channels to / from TBs passed to / from the physical layer on transport channels, scheduling information reporting, error correction using HARQ, priority handling between logical channels for one UE, priority handling between UEs using dynamic scheduling, transport format selection, and other functions. The RLC sublayer's functions may include forwarding upper-layer packet data units (PDUs), error correction using ARQ, reordering of data PDUs, duplication and protocol error detection, reestablishment, etc. The PDCP sublayer may be responsible for forwarding user data, various functions during reestablishment procedures, retransmission of SDUs, discarding SDUs in the uplink, forwarding of control plane data, etc.

[0073] The RRC sublayer of Layer 3 may perform the broadcasting of system information to the NAS and AS, establishment, maintenance, and release of RRC connections, security, establishment, configuration, maintenance, and release of point-to-point radio bearers, mobility functions, reporting, and other functions.

[0074] III. Automatic BIOS Recovery In some implementations of the subject matter of this disclosure, a computer system (e.g., a computer system in a base station (e.g., a gNodeB or gNB, an eNodeB or eNB, an ng-eNodeB or ng-eNB) such as those shown in and described above with respect to FIGS. 1a-5c, a commercial-off-the-shelf (COTS) server, etc.) may have multiple instances of an OS installed thereon. One of the OS instances may be up and running at a time. If a running OS instance fails to start successfully, another OS instance may provide redundancy that may be automatically loaded as a backup that one of the other OS instances may then start. Thus, a computer system can boot and have OS functionality despite experiencing an error, such as a corrupted BIOS, a corrupted BIOS image, a boot loader Secure Boot signature verification failure due to a mismatch of a Unified Extensible Firmware Interface (UEFI) Secure Boot key programmed as a default in the BIOS image (e.g., as a result of a BIOS upgrade or an OS upgrade), or other error. Furthermore, the OS can boot without requiring manual intervention, either local or remote, to address the error. Thus, human error can also be avoided. Device resiliency can be provided by automatic detection and recovery from failures, particularly when deployments are distributed and remote, such as in the case of communication devices in a wireless communication network.

[0075] The OS instances, also referred to herein as OS partitions, are partitioned (isolated) from each other within the computer system's memory. Thus, an error in one of the OS instances—for example, an error in installation, an error occurring during the boot process, an error occurring while the OS is running, or an error occurring during or as a result of an upgrade—is isolated from and does not affect any of the other OS instances. Only one of the OS instances is configured to boot and run at a time, with each OS instance configured to provide full OS functionality to the computer system. Thus, the OS instances can provide redundancy to reduce or avoid computer system downtime, since the computer system can function due to an automatically triggered BIOS recovery procedure. Reducing or avoiding downtime can reduce revenue loss and reduced key performance indicators (KPIs) (accessibility) for the computer system's operators. If the computer system is a device in a wireless communications network, avoiding downtime can enable the cell site where the computer system is located to remain fully functional and properly handle cell traffic as needed.

[0076] In some implementations of the subject matter of this disclosure, an OS may be attempted to be started (booted) from a first basic input / output system (BIOS) pre-stored in a first partition of memory of a computer system, e.g., a communication device in a wireless communication system, such as a long-term evolution communication system, a new wireless communication system, or other wireless communication system. The OS may be run on the communication device in response to the OS successfully booting from the first BIOS. In response to the OS not successfully booting from the first BIOS, a BIOS recovery procedure may be automatically triggered. The BIOS recovery procedure may load a backup BIOS image that successfully loads a compatible backup OS image available on either the same computer system or an additional computer system.

[0077] The BIOS recovery procedure can be triggered using a Baseboard Management Controller (BMC) Intelligent Platform Management Interface (IPMI) watchdog timer. The BMC IPMI watchdog timer is described in the IPMI Specification Second Generation 2.0, Document Revision 1.1, October 1, 2013 (IPMI Specification). As stated in the IPMI Specification (page 22, section 1.7.27), "IPMI provides a standardized interface for a system watchdog timer. This timer can be used by the BIOS, OS, and OEM applications. The timer can be configured to automatically generate a selected action when it expires." Thus, in some implementations of the subject matter of this disclosure, the action automatically generated when the watchdog timer expires can include BIOS recovery.

[0078] As stated in the IPMI specification (page 379, section 27), "The BMC implements a standardized 'Watchdog Timer' that can be used by system management software or by the BIOS for some system timeout functions. Setting the timeout value to '0' causes the selected timeout action to occur immediately. This provides a standardized means for devices on the IPMB, such as remote management cards, to take emergency action." The IPMI specification (page 379, section 27.2) also states, "The Watchdog Timer provides a 'Timer Usage' field that indicates the current usage assigned to the Watchdog Timer. The Watchdog Timer provides a corresponding set of 'Timer Usage Expiration' flags that are used to track the type of timeout that has occurred." Furthermore, as stated in the IPMI specification (pages 379-380, section 27.2), "The Timer Usage field indicates the following:" BIOS FRB2 Timeout An FRB-2 (Fault Tolerant Boot, Level 2) timeout occurred, indicating that the last system reset or power cycle was due to a system timeout during POST, presumably caused by a fault or hang related to the bootstrap processor (Footnote 6). BIOS POST Timeout In this mode, a timeout occurs while the watchdog timer is being used by the BIOS for some purpose other than the FRB-2 or OS load watchdog. OS load timeout The last reset or power cycle was caused by a timer being used to "watchdog" the interval from "boot" to when the OS is up and running. This mode requires system management software or OS support. The BIOS should clear this flag if it starts this timer during POST. SMS "OS watchdog" timeout This indicates that the timer was being used by the system management software. During operation, the system management software (SMS) starts the timer and then periodically resets it to prevent it from expiring. This periodic action acts as a "heartbeat" that indicates that the OS (or at least the SMS task) is still functioning. If the SMS hangs, the timer will expire and the BMC will generate a system reset. When the SMS enables the timer, it should ensure that the "SMS" bit is set to indicate that the timer is being used in its "OS watchdog" role. OEM Indicates that the timer was being used for an OEM-specific function. Footnote 6 states, "In a multiprocessor system, the bootstrap processor is defined as the processor that is enabled to operate and perform system initialization (BIOS POST) at system power-on or hard reset while the remaining processors are held idle awaiting activation by the multiprocessor OS."

[0079] As stated in the IPMI specification (page 380, section 27.4.1), "Applications wishing to use a specific pre-timeout interrupt can check its support by issuing a Set Watchdog Timer command with the desired pre-timeout interrupt selection." As further stated in the IPMI specification (page 381, section 27.6), "The Set Watchdog Timer command is used to initialize and configure the watchdog timer. This command is also used to stop the timer. If the timer is already running, the Set Watchdog Timer command stops the timer (unless the "don't stop" bit is set) and clears the watchdog pre-timeout interrupt flag (see the Get Message Flags command). The BMC hard reset, system hard reset, and cold reset commands also stop the timer and clear the flag. Byte 1 is used to select timer use and to configure whether an event is logged upon expiration. Byte 2 is used to select the timeout action and pre-timeout interrupt type. Byte 3 sets the pre-timeout interval. If the interval is set to 0, the pre-timeout action occurs simultaneously with the timeout action." Byte 4 is used to clear the timer use expiration flag. A bit set in byte 4 of this command clears the corresponding bit in byte 5 of the Get Watchdog Timer command. Bytes 5 and 6 hold the least significant and most significant bytes of the countdown value, respectively. The watchdog timer decrements by 1 count / 100ms. The counter expires when the count reaches 0. If the counter is loaded with 0 and a Reset Watchdog command is issued to start the timer, the associated timer event occurs immediately. Page 382, ​​section 27.6 of the IPMI specification provides more information about bytes 1-6 of the Set Watchdog Timer command.Page 383, section 27.7 of the IPMI specification provides more information about the Get Watchdog Timer command.

[0080] The IPMI specification also discusses Fault Resilient Booting (FRB). As stated in the IPMI specification (page 6, section 1.3), the term "Fault Resilient Booting" is "used to describe system features and algorithms that improve the likelihood of detecting and recovering from processor failure in multiprocessor systems." A BMC can implement FRB Levels 1, 2, and 3. If a bootstrap processor (BSP) fails to successfully complete the boot process, the FRB implemented by the BMC can attempt to boot using an alternative BSP. In general, FRB Level 1 (FRB-1 or FRB1) may enable recovery from Built-in Self Test (BIST) failures detected during Power On Self Test (POST), FRB Level 2 (FRB-2 or FRB2) may enable recovery from a watchdog timer timeout during POST, and FRB Level 3 (FRB-3 or FRB3) may enable recovery from a watchdog timer timeout at hard reset or power-on.

[0081] As mentioned above, the watchdog timer includes a BIOS FRB2 timeout timer usage field that indicates that an FRB-2 timeout occurred, indicating that the last system reset or power cycle was due to a system timeout during POST, presumably caused by a BSP-related failure or hang.

[0082] The BMC also contains an FRB-3 timer that can begin counting whenever the system comes out of hard reset. (See IPMI Specification, page 505, section 42.2 and page 556, section 44.1.) Once the BSP has successfully reset and started running, the BIOS disables the FRB-3 timer in the BMC.

[0083] In some implementations of the subject matter of this disclosure, a BMC including, for example, a watchdog timer stored in its memory, may include a base station (e.g., a gNodeB or gNB, an eNodeB or eNB, an ng-eNodeB or ng-eNB), such as those shown in and described above with respect to Figures 1a-5c, and in particular may include a DU of the base station (e.g., a DU such as DU 304 of Figure 3, DU 508 or 510 of Figures 5a-5c). Thus, BIOS recovery may be performed for a communication device in a wireless communication system, such as a base station or its DU.

[0084] 6 illustrates one implementation of a computer system 600 according to some implementations of the subject matter of this disclosure. The computer system 600 may be for a communications device (e.g., a base station (e.g., a gNodeB or gNB, an eNodeB or eNB, an ng-eNodeB or ng-eNB) such as those shown in and described above with respect to FIGS. 1a-5c or a DU of a base station (e.g., a DU such as DU 304 of FIG. 3 or DU 508 or 510 of FIGS. 5a-5c)) configured for use in a wireless communications network, a COTS server, or other device. The computer system 600 may be implemented as a BMC and, therefore, may include features of a BMC as described herein and set forth in the IPMI specification.

[0085] The computer system 600 includes a first memory 602 that includes multiple OS partitions 604 (a first partition 604a and a second partition 604b) and a second memory 606 that includes multiple OS partitions 608 (a first partition 608a and a second partition 608b). The first partitions 604a, 608a are each shown in FIG. 6 as the active partition that is the current or running OS. The second partitions 604b, 608b are each shown in FIG. 6 as golden partitions that are installed during manufacturing. The golden partitions cannot be upgraded, which can help ensure that the computer system 600 always has a bootable OS available. The golden partitions can be used in BIOS recovery procedures, as described further herein.

[0086] The first memory 602 and the second memory 606 may each include one or more types of memory or storage devices. Each of the first and second memories 602, 606 is a solid-state drive (SSD) in the illustrated implementation of Figure 6, but may also be or include at least one other type, such as a nonvolatile memory express (NVMe), a disk device, or other type.

[0087] Each of the first and second memories 602, 606 may be associated with a particular component of the computer system 600. In other implementations, the computer system 600 may include only one memory. In still other implementations, the computer system 600 may include one or more additional memories, each associated with one or more corresponding additional components of the computer system 600. For example, in some implementations of the subject matter of this disclosure, the computer system 600 may be associated with a base station, the first memory 602 may be associated with a first DU of the base station (e.g., a DU such as DU 304 in FIG. 3 or DU 508 or 510 in FIGS. 5a-5c), and the second memory 604 may be associated with a second DU of the base station (e.g., a DU such as DU 304 in FIG. 3 or DU 508 or 510 in FIGS. 5a-5c). Any additional DUs of the base station may each be associated with additional memories configured and used similarly to the memories 602, 606 described herein.

[0088] The computer system 600 may also include, as shown in the implementation of FIG. 6, a processor 610, a complex programmable logic device (CPLD) 612, a first multiplexer (MUX) 614 communicatively coupled to the processor 610 and the CPLD 612, a second MUX 616 communicatively coupled to the processor 610 and the CPLD 612, a first BIOS 618 communicatively coupled to the first MUX 614 (e.g., via a first serial peripheral interface (SPI) 620), a second BIOS 622 communicatively coupled to the second MUX 616 (e.g., via a second SPI 624), a first memory 602, and a second memory 606. The processor 610 is an Ice Lake Xeon D (ICX-D) (Intel® Xeon® D processor) in this illustrated implementation, but may be another type of processor.

[0089] As shown in the implementation of FIG. 6, the second BIOS 622 may include content stored in FLASH memory. The content may include a primary BIOS image 626 and an NVRAM 628. As also shown in the implementation of FIG. 6, the first BIOS 618 may include content stored in FLASH memory. The content may include a golden BIOS image 630 and an NVRAM 632. The NVRAM 632 of the first BIOS 618 may store a snapshot of the primary BIOS image 626 at the time of backup, which may help ensure version lock and ensure that the golden OS always remains bootable.

[0090] In some implementations of the subject matter of this disclosure, a BIOS recovery procedure, when automatically triggered, can be configured to copy the golden BIOS image 630 from the first BIOS 618 to the primary BIOS image 626 of the second BIOS 622. Thus, the active OS can be bootable as a “golden” version. Thus, if OS boot of the active OS cannot occur due to an error, such as a corrupted second BIOS 622, a corrupted primary BIOS image 626, a boot loader Secure Boot signature verification failure due to a mismatch of the UEFI Secure Boot key programmed as a default within the primary BIOS image 626 (e.g., as a result of a BIOS upgrade or OS upgrade), or other error, OS boot can still occur by automatically triggering a BIOS recovery procedure to provide a bootable active OS in the second BIOS 622.

[0091] In response to the automatically triggered BIOS recovery procedure, a notification may be automatically generated and sent to an operations facility and / or operations administrator responsible for maintaining the computer system to notify them of the boot failure. Accordingly, the BIOS that failed to boot successfully may be evaluated and repaired remotely and / or locally, as needed, such as by the operations administrator who receives the notification or another maintenance worker who receives the notification directly or is otherwise made aware of the need for evaluation and / or repair as a result of the notification being sent to the operations facility and / or operations administrator. Such evaluation and repair may not require downtime of the computer system, as another OS instance may be copied to become the active, bootable BIOS image to maintain the functionality of the computer system despite the OS instance failing to boot successfully.

[0092] 7 illustrates one implementation of a method 700 for performing automatic BIOS recovery according to some implementations of the subject matter of this disclosure. Method 700 may be performed by a BMC, which may be a base station (e.g., one or more base stations 106 of FIGS. 1b-2, base station 301 of FIG. 3, etc.) and / or one or more of its components (e.g., DUs such as DU 304 of FIG. 3, DUs 508 or 510 of FIGS. 5a-5c), which may incorporate one or more components of a computer system such as computer system 600 of FIG. 6, computer system 900 of FIG. 9, etc.

[0093] 7, BIOS recovery is automatically triggered by the BMC upon consecutive IPMI BIOS timeouts. In general, method 700 can track consecutive BIOS initialization failures and trigger a BIOS recovery procedure if a defined failure threshold is violated (exceeded).

[0094] 7, the method 700 may include powering on a device, such as a BMC, 702. The powering on 702 may automatically trigger a timer initialization 704.

[0095] The timer initialization 704 may include setting a consecutive BIOS failure counter to 0. The consecutive BIOS failure counter counts the number of consecutive BIOS failures. The consecutive BIOS failure counter may be stored in a memory of the BMC (e.g., NVRAM 628 of second BIOS 622 in FIG. 6, memory 920 in FIG. 9, etc.). A processor of the BMC may set the consecutive BIOS failure counter to 0.

[0096] The timer initialization 704 may also include setting a consecutive OS load failure counter to 0. The OS load failure counter counts the number of consecutive failures in loading the OS. The OS load failure counter may be stored in a memory of the BMC (e.g., NVRAM 628 of second BIOS 622 in FIG. 6, memory 920 in FIG. 9, etc.). The processor of the BMC may set the consecutive OS load counter to 0.

[0097] After timer initialization 704, method 700 may include running 706 a watchdog timer, including using the BIOS FRB2 timeout timer and BIOS POST timeout timer fields, as well as the FRB3 timer, which begins counting down each time the system comes out of a hard reset or power-on.

[0098] Method 700 may also include a BIOS initialization (Init) state 708 in which the BIOS initializes and attempts a BIOS POST. If a timeout occurs in either BIOS FRB2, BIOS FRB3, or BIOS POST during the BIOS POST attempt (710), the consecutive BIOS failure counter is incremented by one (712), e.g., the processor increases the stored counter value by one. In other words, in response to the occurrence of a BIOS failure (710), the consecutive BIOS failure counter is incremented by one (712). Increasing the consecutive BIOS failure counter indicates that a failure occurred in the BIOS POST process, preventing the BIOS POST process from completing.

[0099] If no BIOS failure occurs at 710, the BIOS POST occurred successfully and process 700 can end.

[0100] If a BIOS failure occurs (710) and the consecutive BIOS failure counter is incremented by one (712), method 700 may include determining (714) whether the consecutive BIOS failure counter is less than a BIOS threshold. This determination may be made, for example, by a processor. The threshold may reflect the maximum number of times the BIOS POST process can be attempted before the active BIOS is deemed corrupted or otherwise non-functional, such that BIOS recovery should be performed. The value of the BIOS threshold may be preset and stored in the BIOS, for example, in the BIOS's NVRAM, or another location accessible to the BIOS. The value of the BIOS threshold may be selected based on any of a variety of factors, such as the processing power of the processor, tolerance for downtime in the BIOS POST process, etc. In some implementations, the BIOS threshold may be 2, although other values ​​are possible.

[0101] In response to determining at 714 that the consecutive BIOS failure counter is less than the BIOS threshold, method 700 may include triggering 714 a reset. A consecutive BIOS failure counter less than the BIOS threshold indicates that an acceptable number of BIOS POST attempts have not yet occurred and should be retried. Accordingly, method 700 starts 706 a timer for another BIOS POST attempt and returns to BIOS Init state 708, where the consecutive BIOS failure counter is one greater than during the previous BIOS POST attempt.

[0102] In response to determining at 714 that the consecutive BIOS failure counter is greater than or equal to the BIOS threshold, method 700 may include setting each of the consecutive BIOS failure counter and the OS load failure counter to zero (718) and triggering a BIOS recovery procedure (720). Thus, the BIOS recovery procedure may be automatically triggered in the event of a BIOS failure (720). The consecutive BIOS failure counter being greater than or equal to the BIOS threshold indicates that enough BIOS POST attempts have occurred (or been made) that it is not worth performing another BIOS POST attempt because, for example, there may be an unrecoverable error that prevents successful BIOS POST completion regardless of the number of attempts made, or because further BIOS POST attempts would result in such a time delay that performing a BIOS recovery procedure would be more time-efficient.

[0103] As described above, the BIOS recovery procedure may be performed in accordance with typical BIOS recovery procedures, as will be understood by those skilled in the art. Generally, the BIOS recovery procedure may copy a backup BIOS image (such as, for example, golden BIOS image 630 in FIG. 6) to an active BIOS image (such as, for example, primary BIOS image 616 in FIG. 6) so that the next boot attempt will use the backup BIOS image (now the active BIOS image) to enable a successful BIOS POST process.

[0104] After performing the BIOS recovery procedure, the method 700 may start a timer for another BIOS POST attempt (706) and return to the BIOS Init state 708, where the consecutive BIOS failure counter is again at zero.

[0105] 8 illustrates another implementation of a method 800 for performing automatic BIOS recovery according to some implementations of the subject matter of this disclosure. Method 800 may be performed by a BMC, which may be a base station (e.g., one or more base stations 106 of FIGS. 1b-2, base station 301 of FIG. 3, etc.) and / or one or more of its components (e.g., DUs such as DU 304 of FIG. 3, DUs 508 or 510 of FIGS. 5a-5c), which may incorporate one or more components of a computer system such as computer system 600 of FIG. 6, computer system 900 of FIG. 9, etc.

[0106] 8, BIOS recovery is automatically triggered by the BMC upon consecutive OS load timeouts. Generally, method 800 can track consecutive OS initialization failures and trigger a BIOS recovery procedure if a defined failure threshold is violated.

[0107] 8 , method 800 may include powering on (702) a device, such as a BMC, that can automatically trigger timer initialization (704), as described above. As described above, timer initialization (704) may include setting each of a consecutive BIOS failure counter and a consecutive OS load failure counter to 0. Also as described above, method 800 may include running (706) a watchdog timer after timer initialization (804), including using the BIOS FRB2 timeout timer use field and the BIOS POST timeout timer use field, and the FRB3 timer, and method 800 may also include a BIOS Init state 708 in which the BIOS initializes and attempts to boot the OS.

[0108] For example, as described above with respect to method 700 of Figure 7, if the BIOS POST is successful (810), the OS load timer begins running (812). Thus, method 800 of Figure 8 may perform some overlapping with method 700 of Figure 7, with portions of the method of Figure 8 occurring after method 700 completes with a successful BIOS POST. Method 800 of Figure 8 may also include an OS initialization (Init) state 814 in which the OS attempts to initialize and start.

[0109] If a timeout occurs in the OS load counter during the boot attempt (816), the consecutive OS load failure counter is incremented by 1 (818), e.g., the processor increases the stored counter value by 1. In other words, in response to an OS load failure occurring (816) in which the OS cannot load, the consecutive OS load failure counter is incremented by 1 (818). Increasing the consecutive OS load failure counter indicates that a failure occurred in the OS boot process that prevented the OS boot process from completing.

[0110] If no OS load failure occurs at 816, then the OS startup occurred normally and process 800 can terminate.

[0111] If an OS load failure occurs (816) and the consecutive OS load failure counter is incremented by one (818), method 800 may include determining (820) whether the consecutive OS load failure counter is less than an OS load threshold. This determination may be made, for example, by a processor. The OS load threshold may reflect the maximum number of times an OS boot can be attempted before the active BIOS is considered unbootable, such that BIOS recovery should be performed. The value of the OS load threshold may be preset and stored in the BIOS, for example, in the BIOS's NVRAM, or another location accessible to the BIOS. The value of the OS load threshold may be selected based on any of a variety of factors, such as processor power, tolerance for downtime in booting the OS, etc. In some implementations, the OS load threshold may be 6, although other values ​​are possible.

[0112] In response to determining 820 that the consecutive OS load failure counter is less than the threshold, method 800 may include triggering 822 a reset. A consecutive OS load failure counter less than the OS load threshold indicates that an acceptable number of OS boot attempts have not yet occurred and should be retried. Accordingly, method 800 starts 806 a timer for another BIOS POST attempt and returns to BIOS Init state 808, where the consecutive OS load failure counter is one greater than during the previous boot attempt.

[0113] In response to determining 820 that the consecutive OS load failure counter is greater than or equal to a threshold, method 800 may include setting 824 each of the consecutive BIOS failure counter and the consecutive OS load failure counter to zero and triggering 826 a BIOS recovery procedure. Thus, the BIOS recovery procedure may be automatically triggered in the event of an OS load failure 826. The consecutive OS load failure counter being greater than or equal to the OS load threshold indicates that enough boot attempts have occurred that it is not worth performing another boot attempt because, for example, there may be an unrecoverable error that prevents booting regardless of the number of attempts made, or because further boot attempts would result in such a time delay that performing a BIOS recovery procedure would be more time-efficient.

[0114] As described above, the BIOS recovery procedure may be performed in accordance with typical BIOS recovery procedures, as will be understood by those skilled in the art. Generally, the BIOS recovery procedure may copy a backup BIOS image (such as, for example, golden BIOS image 630 in FIG. 6) to an active BIOS image (such as, for example, primary BIOS image 616 in FIG. 6) so that the next boot attempt will use the backup BIOS image (now the active BIOS image) to enable a successful boot.

[0115] In some implementations, the subject matter of this disclosure can be configured to be implemented in a system 900, as shown in FIG. 9 . The system 900 can include one or more of a processor 910, a memory 920, a storage device 930, and an input / output device 940. Each of the components 910, 920, 930, and 940 can be interconnected using a system bus 950. The processor 910 can be configured to process instructions for execution within the system 600. In some implementations, the processor 910 can be a single-threaded processor. In alternative implementations, the processor 910 can be a multi-threaded processor. The processor 910 can be further configured to process instructions stored in the memory 920 or the storage device 930, including receiving or sending information through the input / output device 940. The memory 920 can store information within the system 900. In some implementations, the memory 920 can be a computer-readable medium. In alternative implementations, the memory 920 can be a volatile memory unit. Further, in some implementations, memory 920 may be a non-volatile memory unit. Storage device 930 may be capable of providing mass storage for system 900. In some implementations, storage device 930 may be a computer-readable medium. In alternative implementations, storage device 930 may be a floppy disk device, a hard disk device, an optical disk device, a tape device, a non-volatile solid-state memory, or any other type of storage device. Input / output device 940 may be configured to provide input / output operations to system 900. In some implementations, input / output device 940 may include a keyboard and / or a pointing device. In alternative implementations, input / output device 940 may include a display unit for displaying a graphical user interface.

[0116] 10 illustrates an example method 1000 for automatic BIOS recovery according to some implementations of the presently disclosed subject matter. Method 1000 can be performed, for example, using the implementations shown in and described with respect to FIGS.

[0117] The method 1000 includes attempting to boot an OS from a BIOS (e.g., the second BIOS 622 of FIG. 6 ) while running an IPMI watchdog timer. The BIOS is stored in a first partition (e.g., the bootable partition 604a or the bootable partition 608a of FIG. 6 ) of a memory (e.g., the first memory 602 or the second memory 606 of FIG. 6 , the memory 920 of FIG. 9 , etc.) of a communication device (e.g., a base station (e.g., a gNodeB or gNB, an eNodeB or eNB, an ng-eNodeB or ng-eNB) such as those shown in and described above with respect to FIGS. 1a-5c ) in a wireless communication system, such as a DU of a base station (e.g., the DU 304 of FIG. 3 or the DU 508 or 510 of FIGS. 5a-5c ). The method also includes automatically triggering execution of a BIOS recovery procedure after timeout of the watchdog timer. The method also includes automatically retrying to boot the OS from the BIOS after execution of the BIOS recovery procedure.

[0118] In some implementations, the subject matter of this disclosure can include one or more of the following optional features.

[0119] In some implementations, the method may further include incrementing a fault counter after timeout of the watchdog timer and before triggering execution of a BIOS recovery procedure, and may further include determining whether the fault counter is less than a threshold, and execution of a BIOS recovery procedure may be triggered in response to determining that the fault counter is equal to or greater than the threshold. Additionally, the method may further include retrying to boot the OS from the BIOS without triggering execution of a BIOS recovery procedure in response to determining that the fault counter is less than the threshold, and the fault counter may be 0 when the OS is attempted to be booted from the first BIOS, and the method may further include resetting the fault counter to 0 in response to determining that the fault counter is equal to or greater than the threshold, and / or the fault counter may be 0 when the OS is attempted to be booted from the first BIOS, and the method may further include incrementing the fault counter by 1 in response to timeout of the watchdog timer.

[0120] In some implementations, attempting to boot the OS may include a BIOS POST attempt, during which a watchdog timer timeout may occur.

[0121] In some implementations, attempting to boot the OS may include attempting to load the OS, and a watchdog timer timeout may occur during the OS load attempt.

[0122] In some implementations, the watchdog timer timeout may include at least one of a BIOS FRB2 timeout, a BIOS FRB3 timeout, and a BIOS POST timeout.

[0123] In some implementations, performing the BIOS recovery procedure can include copying a golden BIOS image stored in a second partition of the memory of the communications device to the BIOS. Further, the golden BIOS image can be pre-stored in the second partition of the memory during manufacturing of the communications device.

[0124] In some implementations, the communication device may be a DU.

[0125] In some implementations, the attempting and / or automatically attempting may be performed by a base station in the wireless communication system. Further, the base station may include at least one of an eNodeB base station, a gNodeB base station, a wireless base station, and any combination thereof.

[0126] In some implementations, the wireless communication system may be at least one of a Long Term Evolution communication system, a New Radio Communication System, and any combination thereof.

[0127] The systems and methods disclosed herein may be embodied in various forms, including, for example, a data processor such as a computer, including a database, digital electronic circuitry, firmware, software, or any combination thereof. Furthermore, the above-described features and other aspects and principles of the implementations of the present disclosure may be implemented in a variety of environments. Such environments and associated applications may be specially constructed to perform the various processes and operations in accordance with the disclosed implementations, or they may comprise general-purpose computers or computing platforms selectively activated or reconfigured by code to provide the required functionality. The processes disclosed herein are not inherently related to any particular computer, network, architecture, environment, or other apparatus, but may be implemented by any suitable combination of hardware, software, and / or firmware. For example, various general-purpose machines may be used with programs written in accordance with the teachings of the disclosed implementations, or it may be more convenient to construct specialized apparatus or systems to perform the required methods and techniques.

[0128] The systems and methods disclosed herein can be implemented as a computer program product, i.e., a computer program tangibly embodied in an information carrier, e.g., a machine-readable storage device or a propagated signal, for execution by or to control the operation of a data processing apparatus, e.g., a programmable processor, a computer, or multiple computers. The computer program can be written in any type of programming language, including compiled or interpreted languages. Also, the computer program can be deployed in any form. For example, the computer program can be deployed as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. The computer program can be deployed to be executed on one computer or on multiple computers at one site or distributed across multiple sites and interconnected by a communications network.

[0129] As used herein, the term "user" can refer to any entity, including a person or a computer.

[0130] Although ordinal numbers such as first, second, etc. may relate to order in some circumstances, as used in this document, ordinal numbers do not necessarily imply order. For example, ordinal numbers may be used simply to distinguish one item from another. For example, distinguishing a first event from a second event need not imply any chronological order or fixed frame of reference (just as a first event in one paragraph of description may differ from a first event in another paragraph of description).

[0131] The foregoing description is intended to illustrate, but not to limit, the scope of the invention, which is defined by the appended claims. Other implementations are within the scope of the following claims.

[0132] These computer programs, which may also be referred to as programs, software, software applications, applications, components, or code, include machine instructions for a programmable processor and may be implemented in a high-level procedural and / or object-oriented programming language and / or in assembly / machine language. As used herein, the term “machine-readable medium” refers to any computer program product, apparatus, and / or device used to provide machine instructions and / or data to a programmable processor, including a machine-readable medium that receives machine instructions as a machine-readable signal, such as, for example, a magnetic disk, an optical disk, a memory, and a programmable logic device (PLD). The term “machine-readable signal” refers to any signal used to provide machine instructions and / or data to a programmable processor. A machine-readable medium may non-transitory store such machine instructions, such as, for example, a non-transitory solid-state memory or a magnetic hard drive or any equivalent storage medium. Alternatively or additionally, a machine-readable medium may temporarily store such machine instructions, such as, for example, a processor cache or other random access memory associated with one or more physical processor cores.

[0133] To provide for user interaction, the subject matter of the present disclosure described herein can be implemented on a computer having a display device, such as, for example, a cathode ray tube (CRT) or liquid crystal display (LCD) monitor, for displaying information to the user, and a keyboard and pointing device, such as, for example, a mouse or trackball, by which the user can provide input to the computer. Other types of devices can also be used to provide for user interaction. For example, feedback provided to the user can be any form of sensory feedback, such as, for example, visual feedback, auditory feedback, or tactile feedback, and input from the user can be received in any form, including, but not limited to, acoustic, speech, or tactile input.

[0134] The subject matter of the present disclosure described herein may be implemented in a computing system that includes back-end components, such as, for example, one or more data servers, or that includes middleware components, such as, for example, one or more application servers, or that includes front-end components, such as, for example, one or more client computers having a graphical user interface or web browser through which a user can interact with an implementation of the subject matter of the present disclosure described herein, or any combination of such back-end, middleware, or front-end components. The components of the system may be interconnected by any form or medium of digital data communication, such as, for example, a communication network. Examples of communication networks include, but are not limited to, a local area network (LAN), a wide area network (WAN), and the Internet.

[0135] A computing system may include clients and servers. Clients and servers are generally, but not exclusively, remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other.

[0136] The implementations described in the foregoing description do not represent all implementations consistent with the subject matter of the present disclosure described herein. Rather, they are merely some examples consistent with aspects related to the described subject matter. While several variations have been described in detail above, other modifications, alterations, or additions are possible. In particular, additional features and / or variations may be provided in addition to those described herein. For example, the implementations described above may be directed to various combinations and subcombinations of the disclosed features and / or combinations and subcombinations of certain additional features disclosed above. In addition, the logic flow illustrated in the accompanying drawings and / or described herein does not necessarily require the particular order shown, or sequential order, to achieve desirable results. Other implementations may be within the scope of the following claims.

Claims

1. 1. A computer-implemented method comprising: attempting to boot an operating system (OS) from a basic input / output system (BIOS) while running an Intelligent Platform Management Interface (IPMI) watchdog timer, the BIOS being stored in a first partition of a memory of a communication device within the wireless communication system; The computer-implemented method further comprises: automatically triggering execution of a BIOS recovery procedure after a timeout of the watchdog timer, wherein executing the BIOS recovery procedure includes copying a golden BIOS image stored in a second partition of the memory of the communication device to the BIOS; The computer-implemented method further comprises: automatically retrying to boot the OS from the BIOS after the execution of the BIOS recovery procedure; 10. A computer-implemented method comprising:

2. The computer-implemented method comprises: incrementing a failure counter after the timeout of the watchdog timer and before triggering the execution of the BIOS recovery procedure; determining whether the hazard counter is less than a threshold; further comprising 2. The computer-implemented method of claim 1, wherein the execution of the BIOS recovery procedure is triggered in response to determining that the failure counter is greater than or equal to the threshold value.

3. 3. The computer-implemented method of claim 2, further comprising, in response to determining that the failure counter is less than the threshold, retrying to boot the OS from the BIOS without triggering the execution of the BIOS recovery procedure.

4. the failure counter is 0 when the OS is attempted to boot from the BIOS; The computer-implemented method of claim 2 , further comprising resetting the hazard counter to zero in response to determining that the hazard counter is greater than or equal to the threshold.

5. the failure counter is 0 when the OS is attempted to boot from the BIOS; 3. The computer-implemented method of claim 2, further comprising incrementing the hazard counter by one in response to the timeout of the watchdog timer.

6. Attempting to boot the OS includes a BIOS Power-On Self-Test (POST) attempt; 2. The computer-implemented method of claim 1, wherein the timeout of the watchdog timer occurs during the BIOS POST attempt.

7. Attempting to boot the OS includes attempting to load the OS; The computer-implemented method of claim 1 , wherein the timeout of the watchdog timer occurs during the OS load attempt.

8. 2. The computer-implemented method of claim 1, wherein the timeout of the watchdog timer comprises at least one of a BIOS Fault Tolerant Boot Level 2 (FRB2) timeout, a BIOS FRB Level 3 (FRB3) timeout, and a BIOS Power-On Self-Test (POST) timeout.

9. 2. The computer-implemented method of claim 1, wherein the golden BIOS image is pre-stored in the second partition of the memory during manufacture of the communications device.

10. The computer-implemented method of claim 1 , wherein the communication device is a distributed unit (DU).

11. 10. The computer-implemented method of claim 1, wherein at least one of the attempting and the automatically attempting is performed by a base station in the wireless communication system.

12. 12. The computer-implemented method of claim 11, wherein the base station comprises at least one of an eNodeB base station, a gNodeB base station, a wireless base station, and any combination thereof.

13. 10. The computer-implemented method of claim 1, wherein the wireless communication system is at least one of a Long Term Evolution communication system, an Advanced Radio Communication System, and any combination thereof.

14. at least one processor; at least one non-transitory storage medium that stores instructions, The instructions, when executed by the at least one processor, cause the at least one processor to perform an operation; The operations include attempting to boot an operating system (OS) from a basic input / output system (BIOS) while running an Intelligent Platform Management Interface (IPMI) watchdog timer, the BIOS being stored in a first partition of a memory of a communication device within the wireless communication system; The operation may further include: automatically triggering execution of a BIOS recovery procedure after a timeout of the watchdog timer, wherein executing the BIOS recovery procedure includes copying a golden BIOS image stored in a second partition of the memory of the communication device to the BIOS; The operation may further include: automatically retrying to boot the OS from the BIOS after the execution of the BIOS recovery procedure; An apparatus comprising:

15. the operation includes incrementing a failure counter after the timeout of the watchdog timer and before triggering the execution of the BIOS recovery procedure; determining whether the hazard counter is less than a threshold; further comprising 15. The apparatus of claim 14, wherein the execution of the BIOS recovery procedure is triggered in response to determining that the failure counter is greater than or equal to the threshold value.

16. 16. The apparatus of claim 15, wherein the actions further include, in response to determining that the failure counter is less than the threshold, retrying to boot the OS from the BIOS without triggering the execution of the BIOS recovery procedure.

17. the failure counter is 0 when the OS is attempted to boot from the BIOS; 16. The apparatus of claim 15, wherein the actions further comprise resetting the failure counter to zero in response to determining that the failure counter is greater than or equal to the threshold.

18. the failure counter is 0 when the OS is attempted to boot from the BIOS; 16. The apparatus of claim 15, wherein the actions further include incrementing the failure counter by one in response to the timeout of the watchdog timer.

19. Attempting to boot the OS includes a BIOS Power-On Self-Test (POST) attempt; 15. The apparatus of claim 14, wherein the timeout of the watchdog timer occurs during the BIOS POST attempt.

20. Attempting to boot the OS includes attempting to load the OS; 15. The apparatus of claim 14, wherein the timeout of the watchdog timer occurs during the OS load attempt.

21. 15. The apparatus of claim 14, wherein the timeout of the watchdog timer comprises at least one of a BIOS Fault Tolerant Boot Level 2 (FRB2) timeout, a BIOS FRB Level 3 (FRB3) timeout, and a BIOS Power-On Self-Test (POST) timeout.

22. 15. The apparatus of claim 14, wherein the golden BIOS image is pre-stored in the second partition of the memory during manufacture of the communications device.

23. The apparatus of claim 14, wherein the communication device is a distributed unit (DU).

24. 15. The apparatus of claim 14, wherein at least one of the attempting and the automatically attempting is performed by a base station in the wireless communication system.

25. 25. The apparatus of claim 24, wherein the base station comprises at least one of an eNodeB base station, a gNodeB base station, a wireless base station, and any combination thereof.

26. 15. The apparatus of claim 14, wherein the wireless communication system is at least one of a Long Term Evolution communication system, a New Radio Communication System, and any combination thereof.

27. at least one non-transitory storage medium storing instructions that, when executed by at least one processor, cause the at least one processor to perform operations, the operations including: attempting to boot an operating system (OS) from a basic input / output system (BIOS) while running an Intelligent Platform Management Interface (IPMI) watchdog timer, the BIOS being stored in a first partition of a memory of a communication device in a wireless communication system; The operation may further include: automatically triggering execution of a BIOS recovery procedure after a timeout of the watchdog timer, wherein executing the BIOS recovery procedure includes copying a golden BIOS image stored in a second partition of the memory of the communication device to the BIOS; The operation may further include: automatically retrying to boot the OS from the BIOS after the execution of the BIOS recovery procedure; At least one non-transitory storage medium including:

28. the operation includes incrementing a failure counter after the timeout of the watchdog timer and before triggering the execution of the BIOS recovery procedure; determining whether the hazard counter is less than a threshold; further comprising 28. The non-transitory storage medium of claim 27, wherein the execution of the BIOS recovery procedure is triggered in response to determining that the failure counter is greater than or equal to the threshold value.

29. 30. The non-transitory storage medium of claim 28, wherein the operations further include, in response to determining that the failure counter is less than the threshold, retrying to boot the OS from the BIOS without triggering the execution of the BIOS recovery procedure.

30. the failure counter is 0 when the OS is attempted to boot from the BIOS; 30. The non-transitory storage medium of claim 28, wherein the actions further include resetting the hazard counter to zero in response to determining that the hazard counter is greater than or equal to the threshold.

31. the failure counter is 0 when the OS is attempted to boot from the BIOS; 30. The non-transitory storage medium of claim 28, wherein the actions further include incrementing the failure counter by one in response to the timeout of the watchdog timer.

32. Attempting to boot the OS includes a BIOS Power-On Self-Test (POST) attempt; 28. The non-transitory storage medium of claim 27, wherein the timeout of the watchdog timer occurs during the BIOS POST attempt.

33. Attempting to boot the OS includes attempting to load the OS; 28. The non-transitory storage medium of claim 27, wherein the timeout of the watchdog timer occurs during the attempt to load the OS.

34. 28. The non-transitory storage medium of claim 27, wherein the timeout of the watchdog timer comprises at least one of a BIOS Fault Tolerant Boot Level 2 (FRB2) timeout, a BIOS FRB Level 3 (FRB3) timeout, and a BIOS Power-On Self-Test (POST) timeout.

35. 28. The non-transitory storage medium of claim 27, wherein the golden BIOS image is pre-stored in the second partition of the memory during manufacture of the communications device.

36. 28. The non-transitory storage medium of claim 27, wherein the communication device is a distributed unit (DU).

37. 28. The non-transitory storage medium of claim 27, wherein at least one of the attempting and the automatically attempting is performed by a base station in the wireless communication system.

38. 38. The non-transitory storage medium of claim 37, wherein the base station comprises at least one of an eNodeB base station, a gNodeB base station, a wireless base station, and any combination thereof.

39. 28. The non-transitory storage medium of claim 27, wherein the wireless communication system is at least one of a Long Term Evolution Communication System, a New Radio Communication System, and any combination thereof.

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