Outphasing Amplifier

Abstract

This outphasing amplifier is equipped with: a first amplifier 10 for amplifying a first signal Sia; a second amplifier 11 for amplifying a second signal Sib; a synthesizer 16 for outputting the first signal Soa which was amplified by the first amplifier and the second signal Sob which was amplified by the second amplifier, and outputting the synthesized signal as an output signal So; and a signal processing device 20 for setting the amplitude Ab of the second signal to the amplitude Aa of the first signal or higher when setting the output power of the output signal to the maximum, setting the amplitude of the second signal to less than the amplitude of the first signal when setting the output power to the minimum, setting the outphasing angle θ of the first and second signals when setting the output power to the maximum so as to be higher than the outphasing angle when setting the output power to the minimum, and outputting the first and second signals.　

Description

[Technical Field]

[0001] This disclosure relates to an outphasing amplifier. This application claims priority to Japanese Application No. 2022-093858, filed on June 9, 2022, and incorporates by reference all of the contents of said Japanese application. [Background technology]

[0002] An outphasing amplifier is known as an amplifier that amplifies high-frequency signals such as microwaves. The outphasing amplifier includes a signal processor, two amplifiers, and a combiner. The signal processor outputs two signals with outphasing angles changed based on the amplitude of the input signal. The two amplifiers respectively amplify the two signals output from the signal processor. The combiner includes a combiner that combines the two output signals amplified by the two amplifiers into a single output signal. It is known to use a Chireix combiner as the combiner (for example, see Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2020-156023 Summary of the Invention

[0004] One embodiment of the present disclosure is an outphasing amplifier comprising: a first amplifier that amplifies a first signal; a second amplifier that amplifies a second signal; a combiner that combines the first signal amplified by the first amplifier and the second signal amplified by the second amplifier and outputs the combined signal as an output signal; and a signal processor that sets the amplitude of the second signal to be equal to or greater than the amplitude of the first signal when the output power of the output signal is set to the maximum, sets the amplitude of the second signal to be smaller than the amplitude of the first signal when the output power is set to the minimum, sets the outphasing angle of the first signal and the second signal when the output power is set to the maximum to be larger than the outphasing angle when the output power is set to the minimum, and outputs the first signal and the second signal.

[0005] One embodiment of the present disclosure is an outphasing amplifier comprising a first amplifier that amplifies a first signal, a second amplifier that amplifies a second signal, and a combiner that combines the first signal amplified by the first amplifier and the second signal amplified by the second amplifier and outputs the combined signal as an output signal, wherein when the output power of the output signal is maximum, the amplitude of the second signal is greater than or equal to the amplitude of the first signal, and when the output power is minimum, the amplitude of the second signal is smaller than the amplitude of the first signal, and the outphasing angles of the first signal and the second signal when the output power is maximum are greater than the outphasing angles when the output power is minimum. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 is a block diagram of an outphasing amplifier according to a first embodiment. [Figure 2] FIG. 2 is a block diagram of the outphasing amplifier according to the first embodiment. [Figure 3] FIG. 3 is a block diagram of an outphasing amplifier according to a first comparative example. [Figure 4] FIG. 4 is a Smith chart of impedance in Comparative Example 1. [Figure 5] FIG. 5 is a Smith chart of impedance in the first embodiment. [Figure 6] FIG. 6 is a diagram showing the outphasing angle θ versus the output power Po in the second comparative example. [Figure 7] FIG. 7 is a diagram showing amplitudes Aa and Ab relative to output power Po in Comparative Example 2. In FIG. [Figure 8A] FIG. 8A is a schematic diagram of vectors of output power in Comparative Example 2. FIG. [Figure 8B] FIG. 8B is a schematic diagram of vectors of output power in Comparative Example 2. As shown in FIG. [Figure 9] FIG. 9 is a diagram showing the outphasing angle θ of the input signal relative to the output power Po in the first embodiment. [Figure 10] FIG. 10 is a diagram showing amplitudes Aa and Ab relative to output power Po in the first embodiment. [Figure 11A] FIG. 11A is a schematic diagram of vectors of output power in the first embodiment. [Figure 11B] FIG. 11B is a schematic diagram of vectors of output power in the first embodiment. [Figure 11C] FIG. 11C is a schematic diagram of vectors of output power in the first embodiment. [Figure 12] FIG. 12 is a diagram showing the outphasing angle θ versus the output power Po in the first modification of the first embodiment. [Figure 13] FIG. 13 is a diagram illustrating amplitudes Aa and Ab relative to output power Po in the second modification of the first embodiment. [Figure 14] FIG. 14 is a diagram illustrating amplitudes Aa and Ab relative to output power Po in the third modification of the first embodiment. [Figure 15] FIG. 15 is a block diagram of an outphasing amplifier according to the second embodiment. [Figure 16] FIG. 16 is a diagram showing the drain efficiency versus the output voltage in Example 1 and Comparative Example 2. In FIG. DETAILED DESCRIPTION OF THE INVENTION

[0007] [Problem to be solved by this disclosure] By using a Sherley combiner, the impedance seen from the amplifiers can be set to improve characteristics. However, if the outphasing angles of the two signals deviate from a predetermined range, the high-frequency characteristics of the two amplifiers, such as the drain efficiency, deteriorate. Therefore, if the range of the outphasing angles of the two signals is set narrow, the dynamic range becomes smaller.

[0008] The present disclosure has been made in consideration of the above-mentioned problems, and aims to increase the dynamic range of an outphasing amplifier.

[0009] [Effects of this disclosure] According to the present disclosure, the dynamic range of an outphasing amplifier can be increased.

[0010] [Description of the embodiments of the present disclosure] First, the contents of the embodiments of the present disclosure will be listed and described. (1) One embodiment of the present disclosure is an outphasing amplifier including a first amplifier that amplifies a first signal, a second amplifier that amplifies a second signal, a combiner that combines the first signal amplified by the first amplifier and the second signal amplified by the second amplifier and outputs the combined signal as an output signal, and a signal processor that sets the amplitude of the second signal to be equal to or greater than the amplitude of the first signal when the output power of the output signal is set to the maximum, sets the amplitude of the second signal to be smaller than the amplitude of the first signal when the output power is set to the minimum, sets the outphasing angles of the first signal and the second signal when the output power is set to the maximum to be larger than the outphasing angles when the output power is set to the minimum, and outputs the first signal and the second signal. This allows for an increased dynamic range. (2) In the above (1), the saturation power of the first amplifier can be made smaller than the saturation power of the second amplifier. (3) In the above (2), the signal processor can set the amplitude of the second signal to be larger than the amplitude of the first signal when the output power is set to the maximum. (4) In any of (1) to (3) above, when the signal processor sets the output power within a first range, it can set the amplitude of the second signal to be larger than the amplitude of the first signal, and when the output power is set within a second range smaller than the first range, it can set the amplitude of the second signal so that the amplitude of the second signal becomes smaller as the output power becomes smaller. (5) In any one of the above (1) to (4), the signal processor can set the amplitude of the first signal to a constant value regardless of the output power. (6) In (5) above, when the output power is set within a first range, the signal processor can set the amplitude of the second signal to a constant value regardless of the output power, and when the output power is set within a second range smaller than the first range, the signal processor can set the amplitude of the second signal so that the amplitude of the second signal decreases as the output power decreases. (7) In any one of the above (1) to (6), the signal processor can set the outphasing angle so that the outphasing angle decreases as the output power decreases. (8) In any of the above (1) to (7), the combiner may be a Shirei combiner. (9) In any of (1) to (8) above, the outphasing angle when the output power is set to the maximum can be smaller than 90°, and the outphasing angle when the output power is set to the minimum can be larger than 0°. (10) One embodiment of the present disclosure is an outphasing amplifier including a first amplifier that amplifies a first signal, a second amplifier that amplifies a second signal, and a combiner that combines the first signal amplified by the first amplifier and the second signal amplified by the second amplifier and outputs the combined signal as an output signal, wherein when the output power of the output signal is maximum, the amplitude of the second signal is equal to or greater than the amplitude of the first signal, and when the output power is minimum, the amplitude of the second signal is smaller than the amplitude of the first signal, and the outphasing angles of the first signal and the second signal when the output power is maximum are larger than the outphasing angles when the output power is minimum. This allows for an increased dynamic range.

[0011] [Details of the embodiments of the present disclosure] Specific examples of outphasing amplifiers according to embodiments of the present disclosure will be described below with reference to the drawings. Note that the present disclosure is not limited to these examples, but is defined by the claims, and is intended to include all modifications within the meaning and scope of the claims.

[0012] FIG. 1 is a block diagram of an outphasing amplifier according to a first embodiment. As shown in FIG. 1, in an outphasing amplifier 100, an amplifier 10 (first amplifier) ​​and an amplifier 11 (second amplifier) ​​are connected in parallel between an input terminal Tin and an output terminal Tout. A high-frequency signal is input to the input terminal Tin as an input signal Si. When the outphasing amplifier 100 is used in a mobile communication base station, the frequency of the high-frequency signal is, for example, 0.5 GHz or more and 10 GHz or less. A signal processor 20 processes the input signal Si and outputs two signals Sia (first signal) and Sib (second signal).

[0013] The signal Sia is input to the amplifier 10 via the matching circuit 30. The matching circuit 30 matches the output impedance of the signal processor 20 with the input impedance of the amplifier 10. The amplifier 10 amplifies the signal Sia input via the matching circuit 30 and outputs the amplified signal Soa via the matching circuit 32. The signal Soa that has passed through the matching circuit 32 is input to the combiner 16. The matching circuit 32 matches the output impedance of the amplifier 10 with the input impedance of the combiner 16. The signal Sib is input to the amplifier 11 via the matching circuit 31. The matching circuit 31 matches the output impedance of the signal processor 20 with the input impedance of the amplifier 11. The amplifier 11 amplifies the signal Sib that has been input via the matching circuit 31 and outputs the amplified signal Sob via the matching circuit 33. The signal Sob that has passed through the matching circuit 33 is input to the combiner 16. The matching circuit 33 matches the output impedance of the amplifier 11 with the input impedance of the combiner 16. The combiner 16 combines the signals Soa and Sob, and the combined signal is output as an output signal So from an output terminal Tout.

[0014] The bias circuit 34 supplies a bias voltage Vg1 to the gate G of the amplifier 10 and prevents the signal Sia from leaking to the bias terminal. The bias circuit 36 ​​supplies a bias voltage Vd1 to the drain D of the amplifier 10 and prevents the signal Soa amplified by the amplifier 10 from leaking to the bias terminal. The bias circuit 35 supplies a bias voltage Vg2 to the gate G of the amplifier 11 and prevents the signal Sib from leaking to the bias terminal. The bias circuit 37 supplies a bias voltage Vd2 to the drain D of the amplifier 11 and prevents the signal Sob amplified by the amplifier 11 from leaking to the bias terminal.

[0015] The amplifiers 10 and 11 include, for example, FETs (Field Effect Transistors) 18 and 19, respectively. The sources S of the FETs 18 and 19 are grounded, and signals Sia and Sib are input to gates G via matching circuits 30 and 31, respectively. The drains D of the FETs 18 and 19 output amplified signals ofThe FETs 18 and 19 are, for example, GaN HEMTs (Gallium Nitride High Electron Mobility Transistors) or LDMOSs (Laterally Diffused Metal Oxide Semiconductors). Each of the amplifiers 10 and 11 may be provided with multi-stage FETs. The size (e.g., gate width) of the FET 18 of the amplifier 10 is smaller than the size (e.g., gate width of the FET 19) of the amplifier 11. The matching circuits 30, 31, 32, and 33 are designed to optimize high-frequency characteristics such as drain efficiency when the amplifiers 10 and 11 output saturated power. This improves high-frequency characteristics such as drain efficiency when the amplifiers 10 and 11 amplify the signals Sia and Sib.

[0016] The signal processor 20 is, for example, S ig The outphasing amplifier 100 is a digital processing unit that digitally processes an input signal Si and outputs signals Sia and Sib. The outphasing amplifier 100 outputs an output signal So having an output power amplitude corresponding to the input power amplitude of the input signal Si. The signal processor 20 outputs the output signal So that depends on the amplitude of the input signal Si, and therefore sets the outphasing angles of the signals Sia and Sib that depend on the amplitude of the input signal Si.

[0017] FIG. 2 is a block diagram of an outphasing amplifier according to a first embodiment. In FIG. 2, the matching circuits 30 and 31 and the bias circuits 34, 35, 36, and 37 are omitted from FIG. 1, and the internal configuration of the combiner 16 is illustrated. As shown in FIG. 2, in the outphasing amplifier 100 of the first embodiment, the combiner 16 is, for example, a Shirey combiner. The combiner 16 includes an inductor L1, a capacitor C1, and impedance converters 14 and 15. The capacitor C1 is shunt-connected to a node N1 through which the signal Soa passes. The inductor L1 is shunt-connected to a node N2 through which the signal Sob passes.

[0018] The first terminals of the impedance converters 14 and 15 are connected to nodes N1 and N2, respectively, and the second terminals are commonly connected to a node N3. The signals Soa and Sob are combined at node N3. The impedance converters 14 and 15 convert the output impedances of the matching circuits 32 and 33, respectively, to twice the standard impedance (e.g., 50 Ω) (100 Ω). As a result, the impedance seen from the output terminal Tout at node N3 becomes the standard impedance (50 Ω). The impedance converters 14 and 15 are, for example, transmission lines with an electrical length of λ / 4. λ is the wavelength at the center frequency of the operating frequency band of the outphasing amplifier 100. The electrical length of the impedance converters 14 and 15 is, for example, 3λ / 16 or more and 5λ / 16 or less.

[0019] The outphasing angle of signals Sia and Sib output by signal processor 20 is θ, and the power amplitudes of signals Sia and Sib are Aa and Ab, respectively. When the phase difference between signals Sia and Sib is 180°, the outphasing angle θ is 0°, and when the phase difference between signals Sia and Sib is 0°, the outphasing angle θ is 90°. When amplifiers 10 and 11 amplify signals Sia and Sib, respectively, and output signals Soa and Sob, the phase difference between signals Sia and Sib is the same as the phase difference between the amplified signals Soa and Sob. Therefore, the outphasing angle of signals Soa and Sob is also θ. The powers of signals Soa and Sob input from matching circuits 32 and 33 to combiner 16 are Pa and Pb, respectively. The impedances seen from matching circuits 32 and 33 at nodes N1 and N2 are Za and Zb, respectively.

[0020] [Comparative Example 1] FIG. 3 is a block diagram of an outphasing amplifier according to Comparative Example 1. As shown in FIG. 3, in the outphasing amplifier 110 of Comparative Example 1, the combiner 16a does not include the inductor L1 and the capacitor C1. Thus, the combiner 16a is not a Shirei combiner. The other configurations are the same as those of Example 1 shown in FIG. 2.

[0021] FIG. 4 is a Smith chart of impedances in Comparative Example 1, showing impedances Za and Zb when combiner 16a is viewed from matching circuits 32 and 33. As shown in FIG. 4, point 50 indicates the case when outphasing angle θ is 0°, and point 51 indicates the case when outphasing angle θ is 90°. As outphasing angle θ changes from 0° to 90°, impedance Za moves along the locus of the lower half of an arc from point 50 to point 51, as indicated by arrow 52. Impedance Zb moves along the locus of the upper half of an arc from point 50 to point 51, as indicated by arrow 53.

[0022] When the impedances Za and Zb are real numbers (e.g., twice the standard impedance), the matching circuits 32 and 33 convert the output impedance of the amplifiers 10 and 11 so that the high-frequency characteristics of the amplifiers 10 and 11 are optimized (e.g., maximum drain efficiency). As a result, in FIG. 4, the characteristics of the amplifiers 10 and 11 are maximized when the impedances Za and Zb are real numbers. At points 50 and 51, the impedances Za and Zb are real numbers. The range of the outphasing angle θ actually used is, for example, between 20° and 70°. In this range, the reactance components (imaginary components) of the impedances Za and Zb are large, and the load impedances of the amplifiers 10 and 11 deviate from their optimal values.

[0023] If a combiner 16a other than a Sherei combiner is used as in Comparative Example 1, the load impedance of amplifiers 10 and 11 deviates from the optimum value within the range of outphasing angles actually used, resulting in degradation of characteristics such as efficiency.

[0024] [Shiray Synthesis Device] Fig. 5 is an impedance Smith chart in Example 1, showing impedances Za and Zb when the combiner 16 is viewed from the matching circuits 32 and 33. As shown in Fig. 5, by providing the capacitor C1, the reactance component of the impedance Za shifts in the positive direction and rotates counterclockwise compared to Fig. 4 of Comparative Example 1 while maintaining the overall arc shape on the impedance Smith chart. By providing the inductor L1, the reactance component of the impedance Zb shifts in the negative direction and rotates clockwise compared to Comparative Example 1 while maintaining the overall arc shape on the impedance Smith chart.

[0025] Outphasing angle θ is 0° When The reactance component of the impedance Za at point 50a and at point 51a when the outphasing angle θ is 90° is positive. In the range of the outphasing angle θ that is actually used (for example, 20° or more and 70° or less), the impedance Za approaches the real axis and the reactance component becomes small. Therefore, the load impedance of the amplifier 10 approaches the optimum value. When the outphasing angle θ is 0°, When The reactance component of the impedance Zb at point 50b and at point 51b when the outphasing angle θ is 90° is negative. Within the range of the outphasing angle θ actually used (e.g., between 20° and 70°), the impedance Zb approaches the real axis and the reactance component becomes small. Therefore, the load impedance of the amplifier 11 approaches its optimum value. This improves high-frequency characteristics such as drain efficiency.

[0026] [Operation of Comparative Example 2] The operation of the outphasing amplifier in Comparative Example 2 will be described. In Comparative Example 2, the sizes of amplifiers 10 and 11 (e.g., the gate width of the FET) are approximately the same. As a result, the saturation powers of amplifiers 10 and 11 are approximately the same. FIG. 6 is a diagram showing the outphasing angle θ with respect to the output power Po in Comparative Example 2. The horizontal axis of FIG. 6 is the output power Po, and the vertical axis is the outphasing angle θ. FIG. 7 is a diagram showing the amplitudes Aa and Ab with respect to the output power Po in Comparative Example 2. The horizontal axis of FIG. 7 is the output power Po of signal So output from output terminal Tout, and the vertical axis is the amplitude Aa of signal Sia and the amplitude Ab of signal Sib output by signal processor 20.

[0027] As shown in FIG. 6, in Comparative Example 2, the range Rθ for changing the outphasing angle θ is the range between the maximum angle θ1 and the minimum angle θ2. 6 The range Rθ is determined within a range in which the reactance components of the impedances Za and Zb do not become large. Within the range Rθ, the load impedance of the amplifiers 10 and 11 is close to the optimal value, preventing degradation of high-frequency characteristics such as drain efficiency. The range RP for changing the output power Po is between the maximum power P4 and the minimum power P5. The range RP is determined by the range Rθ of the outphasing angle θ. That is, the maximum power P4 is the output power Po when the outphasing angle θ is the maximum angle θ1. The minimum power P5 is the output power Po when the outphasing angle θ is the minimum angle θ2. When the output power Po is the maximum power P4, the signal processor 20 sets the outphasing angle θ to the maximum angle θ1, and when the output power Po is the minimum power P5, the signal processor 20 sets the outphasing angle θ to the minimum angle θ2, which is smaller than angle θ1. The signal processor 20 gradually decreases the outphasing angle θ as the output power Po changes from power P4 to power P5.

[0028] 7, in a range RP between the maximum power P4 and the minimum power P5, the signal processor 20 sets the amplitude Aa of the signal Sia and the amplitude Ab of the signal Sib to the amplitude A@sat. The amplitude A@sat is the amplitude of the signals Sia and Sib at which the output powers Pa and Pb of the amplifiers 10 and 11 become saturated powers. Since the saturated powers of the amplifiers 10 and 11 are approximately the same, the amplitudes Aa and Ab are approximately the same.

[0029] 8A and 8B are schematic diagrams of output power vectors in Comparative Example 2. First, the outphasing angle will be described. When the phase of signal Soa is rotated by +θ and the phase of signal Sob is rotated by −θ from the state of signals Soa and Sob, which are out of phase with each other by 180°, the angle θ is called the outphasing angle. When the outphasing angle θ is 0°, the phase difference between signals Soa and Sob is 180°, and when the outphasing angle θ is 90°, the phase difference between signals Soa and Sob is 0°.

[0030] As shown in FIG. 8A, when the output power Po is the maximum power P4, the power P4 is a composite vector of the powers Pa and Pb. The amplitude Aa of the signal Sia and the amplitude Ab of the signal Sib are amplitude A@sat. Therefore, the powers Pa and Pb are the saturated powers P@sat of the amplifiers 10 and 11. As shown in FIG. 8B, when the output power Po is the minimum power P5, the outphasing angle θ is angle θ2, which is smaller than angle θ1. The power P5 is a composite vector of the powers Pa and Pb. Because the angle θ2 in FIG. 8B is smaller than the angle θ1 in FIG. 8A, the power P5 is smaller than the power P4. The amplifiers 10 and 11 are matched to improve characteristics such as drain efficiency at the saturated power P@sat. This allows the output power Po to be changed from the maximum power P4 to the minimum power P5 while maintaining characteristics such as drain efficiency.

[0031] For example, the maximum power P4 is 48 dBm and the minimum power P5 is 38 dBm. Thus, the minimum power P5 is 10 dB lower than the maximum power P4. m Low dynamic range of 10dB mThe dynamic range is the amplitude of the output power Po. For example, in amplifiers for base stations, the dynamic range can be further increased depending on the modulation method. Make it bigger In Comparative Example 2, in order to increase the dynamic range, the range Rθ of the outphasing angle θ is widened. However, when the range Rθ is widened, 6 In this case, there will be a portion within the range Rθ where the reactance components of the impedances Za and Zb become large.

[0032] For example, when the capacitance of capacitor C1 and the inductance of inductor L1 are reduced, the counterclockwise rotation of impedance Za from FIG. 4 in FIG. 5 is reduced, and the clockwise rotation of impedance Zb from FIG. 4 is reduced. As a result, in the center of range Rθ, the reactance components of impedances Za and Zb increase, and the load impedances of amplifiers 10 and 11 deviate from their optimal values. For example, when the capacitance of capacitor C1 and the inductance of inductor L1 are increased, the counterclockwise rotation of impedance Za from FIG. 4 in FIG. 5 is reduced, and the clockwise rotation of impedance Zb from FIG. 4 is reduced. As a result, at the ends of range Rθ, the reactance components of impedances Za and Zb increase, and the load impedances of amplifiers 10 and 11 deviate from their optimal values. As such, in Comparative Example 2, when the dynamic range is increased, high-frequency characteristics such as drain efficiency deteriorate in some part of the range RP of output power Po.

[0033] [Operation of Example 1] The operation of the outphasing amplifier in the first embodiment will be described. In the first embodiment, amplifier 10 is smaller than amplifier 11. For example, the gate width of FET 18 is smaller than the gate width of FET 19. As a result, the saturation power of amplifier 10 is smaller than the saturation power of amplifier 11. FIG. 9 is a diagram showing the outphasing angle θ of the input signal relative to the output power Po in the first embodiment. The horizontal axis of FIG. 9 is the output power Po, and the vertical axis is the outphasing angle θ. FIG. 10 is a diagram showing the amplitudes Aa and Ab relative to the output power Po in the first embodiment. The horizontal axis of FIG. 10 is the output power Po of the signal So output from the outphasing amplifier 100, and the vertical axis is the amplitude Aa of the signal Sia and the amplitude Ab of the signal Sib output by the signal processor 20.

[0034] As shown in Fig. 9, the range Rθ of the outphasing angle θ is the same as the range Rθ of Comparative Example 2 shown in Fig. 6. of The maximum angle θ1 and the minimum angle θ2 are the same as the maximum angle θ1 and the minimum angle θ2 in Comparative Example 2. This makes it possible to suppress degradation of high-frequency characteristics such as drain efficiency, since the load impedance of amplifiers 10 and 11 is close to the optimum value. The range RP of output power Po is wider than the range RP in FIG. 7 in Comparative Example 2. The maximum power of output power Po is P1, and the minimum power is P2.

[0035] The maximum power P1 and minimum power P2 in Example 1 are not necessarily the same as the maximum power P4 and minimum power P5 in FIG. 6 for Comparative Example 2. For example, the maximum power P1 is similar to the maximum power P4 in Comparative Example 2, but the minimum power P2 is smaller than the minimum power P5 in Comparative Example 2. When the output power Po is the maximum power P1, the signal processor 20 sets the outphasing angle θ to the maximum angle θ1, and when the output power Po is the minimum power P2, the signal processor 20 sets the outphasing angle θ to the minimum angle θ2, which is smaller than the maximum angle θ1. As the output power Po changes from the maximum power P1 to the minimum power P2, the signal processor 20 gradually decreases the outphasing angle θ. When the output power Po is the intermediate power P3, the outphasing angle θ is the intermediate angle θ3. In FIG. 9, the outphasing angle θ changes linearly with respect to the output power Po, but it may also change in a curved manner.

[0036] 10 , in the first embodiment, the range RP is divided into a range RP1 and a range RP2. The range RP1 is a range in which the output power Po is between the maximum power P1 and the intermediate power P3, and the range RP2 is a range in which the output power Po is between the intermediate power P3 and the minimum power P2. In the range RP1, the signal processor 20 sets the amplitude Aa of the signal Sia to the amplitude Aa@sat and sets the amplitude Ab of the signal Sib to the amplitude Ab@sat. The amplitude Aa@sat is the amplitude Aa at which the output power Pa of the amplifier 10 becomes the saturated power, and the amplitude Ab@sat is the amplitude Ab at which the output power Pb of the amplifier 11 becomes the saturated power.

[0037] Because the saturation power of amplifier 10 is smaller than the saturation power of amplifier 11, the amplitude Aa@sat is smaller than the amplitude Ab@sat. In range RP2, the signal processor 20 sets the amplitude Aa of signal Sia to amplitude Aa@sat. When the output power Po is reduced from intermediate power P3 to minimum power P2, the signal processor 20 gradually reduces the amplitude Ab of signal Sib from amplitude Ab@sat to amplitude Ab2. When the output power Po is at minimum power P2, the amplitude Ab is smaller than the amplitude Aa. In FIG. 10, the amplitude Ab changes linearly with respect to the output power Po in range RP2, but it may also change in a curved manner.

[0038] 11A to 11C are schematic diagrams of output power vectors in Example 1. As shown in FIG. 11A, when the output power Po is the maximum power P1, the outphasing angle θ is the maximum angle θ1. The maximum power P1 is a composite vector of the powers Pa and Pb. The power Pa is the saturated power Pa@sat of the amplifier 10, and the power Pb is the saturated power Pb@sat of the amplifier 11. As shown in FIG. 11B, when the output power Po is the intermediate power P3, the outphasing angle θ is an intermediate angle θ3 that is smaller than the maximum angle θ1. The intermediate power P3 is a composite vector of the powers Pa and Pb. The power Pa is the saturated power Pa@sat of the amplifier 10, and the power Pb is the saturated power Pb@sat of the amplifier 11. Because the angle θ3 in FIG. 11B is smaller than the angle θ1 in FIG. 11A, the intermediate power P3 is smaller than the maximum power P1. In the range RP1 of the output power Po, the power Pa and the power Pb are saturated power Pa@sat and saturated power Pb@sat, respectively. Therefore, the amplifiers 10 and 11 can operate under matching conditions that maximize high-frequency characteristics such as drain efficiency. Furthermore, in the range Rθ of the outphasing angle θ, the reactance components of the impedances Za and Zb are small, improving high-frequency characteristics such as drain efficiency.

[0039] As shown in FIG. 11C, when the output power Po is the minimum power P2, the outphasing angle θ is the minimum angle θ2, which is smaller than the intermediate angle θ3. The minimum power P2 is a composite vector of the power Pa and the power Pb. The power Pa is the saturated power Pa@sat, and the power Pb is the power Pb2, which is smaller than the saturated power Pb@sat. In addition to the minimum angle θ2 being smaller than the intermediate angle θ3, the power Pb in FIG. 11C is smaller than the power Pb in FIG. 11B. Therefore, the minimum power P2 is smaller than the intermediate power P3. In FIG. 11C, the output power Po is mainly the power Pa amplified by the amplifier 10. Because the power Pa is the saturated power Pa@sat, the amplifier 10 can operate under matching conditions that maximize high-frequency characteristics such as drain efficiency. In the amplifier 11, the power Pb is smaller than the saturated power Pb@sat. Therefore, the high-frequency characteristics of the amplifier 11, such as drain efficiency, are reduced. However, since the power Pb output by the amplifier 11 is smaller than the power Pa output by the amplifier 10, the degradation of high frequency characteristics such as drain efficiency can be suppressed throughout the outphasing amplifier 100.

[0040] [Operation of Modification 1 of Example 1] 12 is a diagram showing the outphasing angle θ relative to the output power Po in the first modification of the first embodiment. The relationship between the amplitude Aa and the amplitude Ab relative to the output power Po is the same as that shown in FIG. 10 As shown in FIG. 12, when the output power Po is at the maximum power P1 and the intermediate power P3, the signal processor 20 sets the outphasing angle θ to the maximum angle θ1 and the minimum angle θ2, respectively. When the output power Po is in the range RP1, the signal processor 20 sets the outphasing angle θ so that the outphasing angle θ decreases as the output power Po decreases. As shown in FIG. 10, in the range RP1, the signal processor 20 sets the amplitude Aa and the amplitude Ab to the amplitude Aa@sat and the amplitude Ab@sat, respectively. As a result, in the range RP1, the output power Po can be reduced from the maximum power P1 to the intermediate power P3, as in the first embodiment.

[0041] In range RP2 、The signal processor 20 sets the outphasing angle θ to a constant minimum angle θ2. As shown in FIG. 10, in the range RP2, the signal processor 20 changes the amplitude Ab to the amplitude A as the output power Po goes from the intermediate power P3 to the minimum power P2. b The amplitude is reduced from @sat to Ab2. Therefore, even if the outphasing angle θ is constant in the range RP2, the output power Po can be reduced from the intermediate power P3 to the minimum power P2. In FIG. 12, the outphasing angle θ changes linearly with respect to the output power Po in the range RP1, but it may also change in a curved manner.

[0042] [Operation of Modification 2 of Example 1] FIG. 13 is a diagram illustrating amplitudes Aa and Ab relative to output power Po in Modification 2 of Example 1. The relationship between output power Po and outphasing angle θ is the same as FIG. 9 of Example 1 or FIG. 12 of Modification 1 of Example 1. As shown in FIG. 13, the signal processor 20 may gradually decrease amplitude Ab from amplitude Ab@sat to amplitude Ab2 as output power Po changes from maximum power P1 to minimum power P2. In Modification 2 of Example 1, except when output power Po is maximum power P1, the amplitude Ab of signal Sib deviates from amplitude Ab@sat. This results in poorer high-frequency characteristics, such as drain efficiency, of the amplifier 11 than in Example 1 and Modification 1. However, when outphasing angle θ is minimum angle θ2, output power Po can be set to minimum power P2, which is smaller than minimum power P5 in Comparative Example 2. This allows for a wider dynamic range.

[0043] [Operation of Modification 3 of Example 1] FIG. 14 is a diagram illustrating amplitudes Aa and Ab relative to output power Po in Modification 3 of Example 1. The relationship between output power Po and outphasing angle θ is the same as FIG. 9 of Example 1 or FIG. 12 of Modification 1 of Example 1. As shown in FIG. 14, the signal processor 20 may gradually decrease the amplitude Aa from amplitude Aa@sat to amplitude Aa2 as the output power Po changes from maximum power P1 to minimum power P2. In Modification 3 of Example 1, the amplitude Aa of the signal Sia deviates from the amplitude Aa@sat except when the output power Po is maximum power P1. This results in a deterioration in high-frequency characteristics such as drain efficiency of the amplifier 10 compared to Modification 2 of Example 1. However, when the outphasing angle θ is minimum angle θ2, the output power Po can be set to minimum power P2, which is smaller than the minimum power P5 in Comparative Example 2. This increases the dynamic range.

[0044] [Example 2] FIG. 15 is a block diagram of an outphasing amplifier according to a second embodiment. As shown in FIG. 15, in an outphasing amplifier 102 according to the second embodiment, an inductor L1 is shunt-connected to a node N1 in a combiner 16, and a capacitor C1 is shunt-connected to a node N2. A signal processor 20 reverses the phase of the signal Sia relative to the phase of the signal Sia in the first embodiment and its modifications, and reverses the phase of the signal Sib relative to the phase of the signal Sib in the first embodiment and its modifications. This allows the outphasing amplifier according to the second embodiment to operate in the same manner as the first embodiment and its modifications. The other configurations are the same as those in the first embodiment and its modifications, and therefore a description thereof will be omitted.

[0045] According to the first embodiment and its modified example, the signal processor 20 sets the output power Po of the output signal So within a range RP between the maximum power P1 and the minimum power P2. When the output power Po is set to the maximum power P1, the amplitude Ab is set to be equal to or greater than the amplitude Aa. When the output power Po is set to the minimum power P2, the amplitude Ab is set to be smaller than the amplitude Aa. For example, the amplitude Ab is set to be smaller than the amplitude Aa by 0.1 dB or more or 0.5 dB or more. When the output power Po is set to the maximum power P1, the outphasing angle θ1 is set to be larger than the outphasing angle θ2 when the output power Po is set to the minimum power P2. For example, the angle θ1 is set to be larger than the angle θ2 by 10° or more or 20° or more. This allows the minimum power P2 to be smaller than the minimum power P5 in the second comparative example at the outphasing angle θ2 where the reactance components of the impedances Za and Zb are small and the load impedances of the amplifiers 10 and 11 do not deviate significantly from their optimal values. Therefore, the dynamic range can be increased without deteriorating high frequency characteristics such as drain efficiency.

[0046] The drain efficiency DE will be described as an example. electric power 16 is a diagram showing the drain efficiency versus the output power Po. The horizontal axis of FIG. 16 represents the output power Po, and the vertical axis represents the drain efficiency DE. The dashed line represents Comparative Example 2, and the solid line represents Example 1. As shown in FIG. 16, the maximum powers P1 and P4 of the output power Po are similar in Example 1 and Comparative Example 2. In Comparative Example 2, the drain efficiency decreases when the output power Po becomes equal to or less than the minimum power P5. This is because the outphasing angle θ becomes smaller than the minimum angle θ2, increasing the reactance components of the impedances Za and Zb, and causing the load impedance of the amplifiers 10 and 11 to deviate from the optimal value. In Example 1, the drain efficiency DE hardly decreases until the output power Po reaches the minimum power P2, which is smaller than the minimum power P5 in Comparative Example 2. This is because the output power Po can be set to the minimum power P2, which is smaller than the minimum power P5 in Comparative Example 2, even when the outphasing angle θ is set to the minimum angle θ2.

[0047] The saturated power Pa@sat of amplifier 10 and the saturated power Pb@sat of amplifier 11 may be substantially the same. In this case, too, when the outphasing angle θ is set to the minimum angle θ2, the amplitude Ab is set to be smaller than the amplitude Aa. This allows the output power Po to be smaller than the minimum power P5 in Comparative Example 2. Therefore, the dynamic range can be made larger than in Comparative Example 2.

[0048] As shown in Figure 10, the saturated power Pa@sat of amplifier 10 is smaller than the saturated power Pb@sat of amplifier 11. For example, the saturated power Pa@sat is smaller than the saturated power Pb@sat by 1 dB or more. This allows the output power Po to be smaller when the outphasing angle θ is set to the minimum angle θ2. This allows the dynamic range to be increased.

[0049] At this time, when the output power Po is set to the maximum power P1, the signal Sib The amplitude Ab of the signal Sia This allows the output power Po to be smaller when the outphasing angle θ is set to the minimum angle θ2, thereby increasing the dynamic range.

[0050] 10 and 13, the signal processor 20 sets the amplitude Aa to a constant value regardless of the output power Po. This allows the amplifier 10 to set the load impedance so that the high-frequency characteristics are optimized when the amplitude Aa is a constant value, thereby improving the high-frequency characteristics of the amplifier 10. Note that the amplitude Aa being constant (or substantially constant) means that the amplitude Aa is constant within a controllable range, and for example, a fluctuation of about ±1 dB in the amplitude Aa is allowed. The constant value of the amplitude Aa can be set to a value at which the output power Po becomes saturated power. This allows the output power Po to be increased.

[0051] As shown in FIG. 10, when the signal processor 20 sets the output power Po within a range RP1 (first range), it sets the amplitude Ab to a constant value regardless of the output power Po. When the signal processor 20 sets the output power Po within a range RP2 (second range) smaller than the range RP1, it sets the amplitude Ab so that the amplitude Ab decreases as the output power Po decreases. This allows the amplifier 11 to set the load impedance so that the high-frequency characteristics are optimized when the amplitude Ab is a constant value, thereby improving the high-frequency characteristics of the amplifier 11 in the range RP2. Note that a constant (or substantially constant) amplitude Ab means that the amplitude Ab is constant within a controllable range, and for example, a fluctuation of about ±1 dB in the amplitude Ab is allowed. The constant value of the amplitude Ab can be set to a value at which the output power Po becomes saturated power. This allows the output power Po to be increased.

[0052] Furthermore, when setting the output power Po within range RP1, the signal processor 20 sets the amplitude Ab greater than the amplitude Aa. When setting the output power Po within range RP2, the signal processor 20 sets the amplitude Ab so that the amplitude Ab decreases as the output power Po decreases. This allows the amplifiers 10 and 11 to operate under conditions close to their optimal operating conditions in range RP1. In range RP2, although the operating conditions of amplifier 11 are less optimal than those of amplifier 10, the output power Pb of amplifier 11 is smaller than the output power Pa of amplifier 10, and therefore degradation of high-frequency characteristics can be suppressed.

[0053] As shown in Figures 9 and 12, signal processor 20 sets the outphasing angle θ so that the outphasing angle θ decreases as the output power Po decreases. This allows the output power Po to be controlled by the outphasing angle θ. As shown in Figure 9, the outphasing angle θ may gradually decrease as the output power Po decreases. As shown in Figure 12, the outphasing angle θ may be constant within a portion of the range RP (for example, range RP2).

[0054] The maximum angle θ1 when the output power Po is set to the maximum power P1 is smaller than 90°, and the minimum angle θ2 when the output power Po is set to the minimum power P2 is larger than 0°. This allows the reactance components of the impedances Za and Zb to be small in the range between the maximum angle θ1 and the minimum angle θ2. The maximum angle θ1 can be 80° or less, and can be 70° or less. The minimum angle θ2 can be 10° or more, and can be 20° or more.

[0055] The combiner 16 is a Shirei combiner, although it need not be a Shirei combiner. Figures 4 and 5 As explained in the above, characteristics such as drain efficiency can be improved.

[0056] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present disclosure is defined by the scope of the claims, not by the meaning described above, and is intended to include all modifications within the meaning and scope equivalent to the scope of the claims. [Explanation of symbols]

[0057] Sia, Sib signal (1st signal, 2nd signal) Si input signal Soa, Sob signal So output signal Po Output Power P1, P2, P3, P4, P5 Power Tin Input terminal Tout output terminal θ Outphasing angle θ1, θ2, θ3 angles Aa, Ab amplitude 10, 11 Amplifier (1st Amplifier, 2nd Amplifier) 14, 15 Impedance converter 16, 16a Synthesizer 18, 19 FET 20 Signal processor 30, 31, 32, 33 matching circuit 34, 36 Bias circuit 50, 50a, 50b, 51, 51a, 51b points 52, 53 Arrows 100 Outphasing Amplifier

Claims

1. a first amplifier that amplifies the first signal; a second amplifier that amplifies the second signal; a combiner that combines the first signal amplified by the first amplifier and the second signal amplified by the second amplifier and outputs the combined signal as an output signal; a signal processor that sets the amplitude of the second signal larger than the amplitude of the first signal when an output power of the output signal is set to a maximum in operation, sets the amplitude of the second signal smaller than the amplitude of the first signal when the output power is set to a minimum in operation, and sets outphasing angles of the first signal and the second signal larger than the outphasing angles of the first signal and the second signal when the output power is set to a maximum in operation, and outputs the first signal and the second signal; Equipped with The signal processor when the output power is set within a first range including a maximum output power in operation, the outphasing angle is set so that the outphasing angle decreases as the output power decreases; An outphasing amplifier in which the output power of the first amplifier and the second amplifier is saturated power when the output power is maximum in operation.

2. 2. The outphasing amplifier of claim 1, wherein the saturation power of the first amplifier is less than the saturation power of the second amplifier.

3. 3. The outphasing amplifier according to claim 2, wherein said signal processor sets the amplitude of said second signal to be greater than the amplitude of said first signal when said output power is set to the maximum in operation.

4. 4. The outphasing amplifier according to claim 1, wherein when the output power is set within the first range, the signal processor sets the amplitude of the second signal to be larger than the amplitude of the first signal, and when the output power is set within a second range smaller than the first range, the signal processor sets the amplitude of the second signal so that the amplitude of the second signal decreases as the output power decreases, and sets the outphasing angle so that the outphasing angle decreases as the output power decreases, or so that the outphasing angle is constant regardless of the output power.

5. 3. The outphasing amplifier of claim 1, wherein the signal processor sets the amplitude of the first signal to a constant value regardless of the output power between the maximum and minimum operating values ​​of the output power.

6. when the output power is set to within the first range, the signal processor sets the amplitude of the second signal to a constant value regardless of the output power; 6. The outphasing amplifier according to claim 5, wherein when the output power is set within a second range smaller than the first range, the amplitude of the second signal is set so that the amplitude of the second signal decreases as the output power decreases, and the outphasing angle is set so that the outphasing angle decreases as the output power decreases, or so that the outphasing angle is constant regardless of the output power.

7. 3. The outphasing amplifier according to claim 1, wherein the signal processor sets the outphasing angle so that the outphasing angle decreases as the output power decreases between a maximum operating point and a minimum operating point.

8. 3. An outphasing amplifier according to claim 1 or claim 2, wherein the combiner is a Shirei combiner.

9. 3. The outphasing amplifier according to claim 1, wherein the outphasing angle is smaller than 90° when the output power is set to the maximum, and the outphasing angle is larger than 0° when the output power is set to the minimum.

10. a first amplifier that amplifies the first signal; a second amplifier that amplifies the second signal; a combiner that combines the first signal amplified by the first amplifier and the second signal amplified by the second amplifier and outputs the combined signal as an output signal; Equipped with when the output power of the output signal is at an operational maximum, the amplitude of the second signal is greater than the amplitude of the first signal, and when the output power is at an operational minimum, the amplitude of the second signal is less than the amplitude of the first signal; when the output power is at an operational maximum, the outphasing angle of the first signal and the second signal is greater than the outphasing angle of the first signal and the second signal when the output power is at an operational minimum; when the output power is within a first range that includes the time when the output power is at an operational maximum, the outphasing angle decreases as the output power decreases; An outphasing amplifier in which the output power of the first amplifier and the second amplifier is saturated power when the output power is maximum in operation.

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