Power amplifier circuitry with temperature based biasing

Abstract

The present disclosure relates to power amplifier circuitry with temperature-controlled biasing and protective shutdown based on die temperature. A first amplifier die and second amplifier die each have their own power amplifiers and temperature-sensing elements. An amplifier controller die controls both power amplifier dice, generating a bias current that can be coupled to either power amplifier die to activate the power amplifier of one or the other die. The bias current magnitude is updated in response to decreased temperature-dependent voltage from the inactive die which is at an average temperature of both dice. A switch control logic also selects the temperature-dependent voltage of the temperature-sensing element of the active die to input to a comparator that outputs a thermal shutdown signal if the temperature of the active die approaches a damaging level, and the switch control logic controls opening of switches connected to the bias output terminal to prevent damage.

Description

POWER AMPLIFIER CIRCUITRY WITH TEMPERATURE BASED BIASINGRelated

[0001] This application claims the benefit of provisional patent application serial number 63 / 685,848, filed August 22, 2024, the disclosure of which is hereby incorporated herein by reference in its entirety.Field of the Disclosure

[0002] The present disclosure relates to an apparatus and method for generating a temperature-dependent bias current for a power amplifier in radio frequency front-end solutions for smartphones, without requiring additional hardware at the module level.

[0003] The power amplifier usually consists of a driver stage and a final stage. To bias the driver stage with a current that is proportional to absolute temperature (PTAT) has been found to be beneficial (to get overall gain constant with temperature). However, the power amplifier is realized in a highly optimized process with very few components such as a bipolar transistor, resistor, and capacitor, thereby requiring a complementary metal oxide semiconductor (CMOS) or silicon-on-insulator controller chip to be used to generate this bias and provide programmability through a digital interface.

[0004] To date, the CMOS controller chip has been generating the power amplifier bias PTAT current using its own temperature, which is always different (usually lower) from that of the power amplifier.

[0005] Hence, it would be advantageous if a scheme existed which could provide a PTAT bias based on the power amplifier temperature without requiring additional hardware in the module, which contains the various die, and which hardware requires additional devices / pins on the power amplifier die and additional traces in the module printed circuit board.

[0006] It would be possible to sense the power amplifier die temperature by having a connection between the controller and the power amplifier that is used to provide a bias current into a diode, simultaneously conveying the diode voltage back to the controller. This is done for the purpose of providinga thermal shutdown function: as power amplifier die temperature rises, diode voltage falls, and this can be detected by the controller to shut off bias to the power amplifier and protect it. However, this same voltage cannot be used for generating a bias function because this sensor diode is located close to the hottest part of the power amplifier, and the temperature of that part of the power amplifier changes during operation with the power level of the radio frequency signal. Having an additional diode on the power amplifier that can sense an “average” die temperature and conveying this voltage to the controller is an example of additional cost in hardware. Thus, there is a need for amplifier circuitry that generates a PTAT-based bias current for power amplifiers without the cost of additional hardware.

[0007] In Nielsen and Ubbesen, POWER AMPLIFIER APPARATUS, published August 12, 2025, as U.S. Publication No. 2021 / 0249995 A1 , a power amplifier apparatus is provided. The power amplifier apparatus includes a number of multi-stage power amplifiers and a bias circuit configured to generate a number of bias signals (e.g., bias current or bias voltage) to control (e.g., activate or deactivate) the multi-stage power amplifiers. In examples disclosed therein, only one of the multi-stage power amplifiers is activated at a given time. In this regard, the bias circuit can generate the bias signals to collectively activate one of the multi-stage power amplifiers, while deactivating the rest of the multi-stage power amplifiers. As such, it may be possible to control a larger number of power amplifier stages based on a smaller number of bias signals. As a result, it may be possible to eliminate a biasing bump pad(s) from the power amplifier apparatus, thus helping to reduce the footprint and cost of the power amplifier apparatus.

[0008] In Rabjohn et al., TEMPERATURE COMPENSATED POWER AMPLIFIER GAIN, published November 26, 2020, as U.S. Publication No. 2020 / 0373887 A1 , a temperature compensation circuit comprises a temperature coefficient circuit that generates a temperature coefficient that is temperature dependent and a compensation circuit that generates a compensation signal based on an indication of temperature of an amplifier and the temperature coefficient, and based on the compensation signal, a gain of the amplifier is adjusted to improve amplifier linearity during data bursts.

[0009] In Jeon and Kim, TEMPERATURE-COMPENSATED CIRCUIT FOR POWER AMPLIFIER USING DIODE VOLTAGE CONTROL, published March 16, 2006, as U.S. Publication No. 2006 / 0055447 A1 , is described a temperature-compensated circuit for a power amplifier through diode voltage control, in which a first resistor (Rref), a first diode (D1 ), and a second diode (D2) are connected to a reference voltage in series. The temperature- compensated circuit includes a second resistor (R1 ) connected to the reference voltage, a third resistor (R2) connected to the second resistor in series, a fourth resistor (Rc) having one terminal connected to the reference voltage, a fifth resistor (Re) having one terminal connected to ground, a bias transistor having a base terminal connected to a contact point (VS) between the second resistor and the third resistor, a collector terminal connected to the other terminal of the fourth resistor, and an emitter terminal connected to the other terminal of the fifth resistor, and a sixth resistor (Rf) connected between a series connection terminal between the first diode and the second diode, and the collector terminal of the bias transistor. The voltage of the collector terminal changes for compensation of a temperature.

[0010] The present disclosure relates to power amplifier circuitry with temperature-controlled biasing and protective shutdown based on die temperature. A first amplifier die and second amplifier die each have their own power amplifiers and temperature-sensing elements. An amplifier controller die controls both power amplifier dice, generating a bias current that can be coupled to either power amplifier die to activate the power amplifier of one or the other die. The bias current magnitude is updated in response to decreased temperature-dependent voltage from the inactive die, which is at an average temperature of both dice. A switch control logic also selects the temperature-dependent voltage of the temperature-sensing element of the active die to input to a comparator that outputs a thermal shutdown signal if the temperature of the active die approaches a damaging level, and the switch control logic controls opening of switches connected to the bias output terminal to prevent damage. The circuitry is also configured to receive one or more external control signals from an external controller to control which ofthe dice is active. In an embodiment, at least two amplifiers are integrated onto a single die, reducing potential temperature differences between them compared with each of the two amplifiers on separate dies. This integration maintains consistent operation and advantages similar to other disclosed embodiments.

[0011] In another aspect, any of the foregoing aspects individually or together, and / or various separate aspects and features as described herein, may be combined for additional advantage. Any of the various features and elements as disclosed herein may be combined with one or more other disclosed features and elements unless indicated to the contrary herein.

[0012] Those skilled in the art will appreciate the scope of the present disclosure and realize additional aspects thereof after reading the following detailed description of the preferred embodiments in association with the accompanying drawing figures.Brief Description of the Drawing Figures

[0013] The accompanying drawing figures incorporated in and forming a part of this specification illustrate several aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure.

[0014] FIG. 1 is a schematic diagram showing an embodiment of amplifier circuitry that is structured in accordance with the present disclosure with switch settings for a first amplifier die that is inactive and a second amplifier die that is actively amplifying a signal.

[0015] FIG. 2 is a schematic diagram showing the embodiment of amplifier circuitry with switch settings for the first amplifier to be actively amplifying a signal and for the second amplifier die to be inactive.

[0016] FIG. 3 is a schematic diagram showing another embodiment of amplifier circuitry that in accordance with the present disclosure the amplifiers integrated onto a single die.

[0017] FIG. 4 is a block diagram showing the embodiment of the amplifier circuitry employed in a wireless device.Detailed Description

[0018] The embodiments set forth below represent the necessary information to enable those skilled in the art to practice the embodiments and illustrate the best mode of practicing the embodiments. Upon reading the following description in light of the accompanying drawing figures, those skilled in the art will understand the concepts of the disclosure and will recognize applications of these concepts not particularly addressed herein. It should be understood that these concepts and applications fall within the scope of the disclosure and the accompanying claims.

[0019] It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items.

[0020] It will be understood that when an element such as a layer, region, or substrate is referred to as being “on” or extending “onto” another element, it can be directly on or extend directly onto the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” or extending “directly onto” another element, there are no intervening elements present. Likewise, it will be understood that when an element such as a layer, region, or substrate is referred to as being “over” or extending “over” another element, it can be directly over or extend directly over the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly over” or extending “directly over” another element, there are no intervening elements present. It will also be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements present.

[0021] Relative terms such as “below” or “above” or “upper” or “lower” or “horizontal” or “vertical” may be used herein to describe a relationship of one element, layer, or region to another element, layer, or region as illustrated in the Figures. It will be understood that these terms and those discussed above are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures.

[0022] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises,” “comprising,” “includes,” and / or “including” when used herein specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0023] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0024] Embodiments are described herein with reference to schematic illustrations of embodiments of the disclosure. As such, the actual dimensions of the layers and elements can be different, and variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances, are expected. For example, a region illustrated or described as square or rectangular can have rounded or curved features, and regions shown as straight lines may have some irregularity. Thus, the regions illustrated in the figures are schematic and their shapes are not intended to illustrate the precise shape of a region of a device and are not intended to limit the scope of the disclosure. Additionally, sizes of structures or regions may be exaggerated relative to other structures or regions for illustrativepurposes and, thus, are provided to illustrate the general structures of the present subject matter and may or may not be drawn to scale. Common elements between figures may be shown herein with common element numbers and may not be subsequently re-described.

[0025] Existing modules for a typical customer have two power amplifier dice, one for the mid-band range and one for the high-band range. These two power amplifiers are in proximity, as close as possible to each other. Thermal scan shows that the temperature at the inactive power amplifier is substantially close to the average temperature of the active power amplifier.

[0026] Since both power amplifiers already need to convey a diode voltage for the thermal shutdown (TSD) function, and given that the diode voltage thus conveyed by the active die cannot be used for the bias generation function, and that the inactive power amplifier’s TSD diode is a good representation of the average temperature of the active power amplifier, the diode voltage of the inactive power amplifier can be used to generate the bias current of the active power amplifier. Therefore, a more optimal power amplifier bias current is obtained at no additional cost.

[0027] Certain embodiments according to the present disclosure may include, but are not limited to, the following:• A modular radio frequency front-end solution for smartphones in which there are two amplifier dice and a controller die.• The amplifier dice each include a temperature-sensing element such as a sense diode that generates a voltage that represents the temperature of the hottest portion of the die, which temperature changes during operation and which cannot be used to generate a PTAT-based bias current for the power amplifier.• Power amplifiers that are in proximity so that the temperature of the sense diode of the inactive power amplifier is a good representation of the active power amplifier and can be used to generate the bias current for the active power amplifier.• A connection scheme that needs to exist for an unrelated reason — that of providing thermal shutdown based on the temperature of the sense diode of the active power amplifier.• Electronic circuits on the controller die that convert the voltage of the sense diode of the inactive power amplifier (also providing that diode with a bias current) into a bias current for the active power amplifier.

[0028] FIG. 1 is a schematic of an exemplary embodiment of power amplifier circuitry 10 that is structured in accordance with the present disclosure. The power amplifier circuitry 10 has a first amplifier die 12, a second amplifier die 14, and an amplifier controller die 16 that is configured to control the operation of the first amplifier die 12 and the second amplifier die 14. The first amplifier die 12 and the second amplifier die 14 are thermally coupled by substantially near co-location or by a thermal conductor or a combination of both. An active one of the first amplifier die 12 and the second amplifier die 14 will have a more dynamic thermal profile than the inactive one of the dice. However, due to deliberate thermal coupling, the inactive one of the first amplifier die 12 and the second amplifier die 14 will have an average temperature of both dice. As such, the more dynamic temperature of the active die will be used to determine whether or not the active die should be shut down while the more thermally filtered average temperature of the inactive die will be used for temperature-responsive biasing. In some embodiments, the amplifier controller die 16 is complementary metal oxide semiconductor (CMOS) based. In other embodiments, the amplifier controller die 16 is silicon-on-insulator (SOI) based.

[0029] In the exemplary embodiment of FIG. 1 , the first amplifier die 12 is configured as a mid-band amplifier die that has a first power amplifier 18 labeled PA1 . In FIG. 1 , thicker path lines relative to thinner path lines represent active paths. The first power amplifier 18 has a first radio frequency (RF) input 20 that is configured to receive a first input RF signal labeled RFIN1. The first power amplifier 18 has a first output terminal 22 that is configured to output a first output RF signal RFOUT1 , which is an amplified version of the first input RF signal RFIN1. The first power amplifier 18 further has a first bias terminal 24 that is configured to receive a first bias current that establishes the operating point of the first power amplifier 18. The first amplifier die 12 also has a first temperature-sensing element 26 that isconfigured to output a first temperature-dependent voltage that is dependent on the temperature of the first amplifier die 12.

[0030] In the exemplary embodiment of FIG. 1 , the second amplifier die 14 is configured as a high-band amplifier die that has a second power amplifier 28 labeled PA2. The second power amplifier 28 has a second RF input 30 that is configured to receive a second input RF signal labeled RFIN2. The second power amplifier 28 has a second output terminal 32 that is configured to output a second output RF signal RFOUT2, which is an amplified version of the second input RF signal RFIN2. The second power amplifier 28 further has a second bias terminal 34 that is configured to receive a second bias current that establishes the operating point of the second power amplifier 28. The second amplifier die 14 also has a second temperature-sensing element 36 that is configured to output a second temperature-dependent voltage that is dependent on the temperature of the second amplifier die 14.

[0031] In the exemplary embodiment of FIG. 1 , the first temperaturesensing element 26 and the second temperature-sensing element 36 are semiconductor diodes; however, in other embodiments, the first temperaturesensing element 26 and the second temperature-sensing element 36 may be but are not limited to CMOS-based PTAT sensors, bipolar junction transistors, and silicon carbide Schottky diodes.

[0032] Furthermore, in the exemplary embodiment of FIG. 1 , the amplifier controller die 16 includes a bias generator 38 that is configured to generate a bias current that passes through a bias output terminal 40. A first switch SW1 is configured to controllably couple the bias output terminal 40 to the first bias terminal 24 of the first power amplifier 18, and a second switch SW2 is configured to controllably couple the bias output terminal 40 to the second bias terminal 34 of the second power amplifier 28. The bias current generated by the bias generator 38 is the first bias current for the first power amplifier 18 while the first switch SW1 is closed. Alternately, the bias current generated by the bias generator 38 is the second bias current for the second power amplifier 28 while the second switch SW2 is closed.

[0033] In this exemplary embodiment, the bias generator 38 has a band gap reference terminal 42 that is configured to receive an externally generated band gap voltage that is used as a reference while generating thebias current. The bias generator 38 further includes a temperature-dependent voltage feedback terminal 44. A third switch SW3 is configured to controllably couple the temperature-dependent voltage feedback terminal 44 to the second temperature-sensing element 36 to receive the second temperaturedependent voltage that is dependent on the temperature of the second amplifier die 14. A fourth switch SW4 is configured to controllably couple the temperature-dependent voltage feedback terminal 44 to the first temperaturesensing element 26 to receive the first temperature-dependent voltage that is dependent on the temperature of the first amplifier die 12. The bias generator 38 is configured to adjust the magnitude of the bias current in response to changing magnitude of either of the first temperature-dependent voltage or the second temperature-dependent voltage, wherein the first temperaturedependent voltage and the second temperature-dependent voltage decrease with increasing temperature sensed by the first temperature-sensing element 26 and the second temperature-sensing 36.

[0034] A first current source 46 is coupled between a fixed voltage node GND and the first temperature-sensing element 26. In the exemplary embodiment of FIG. 1 , the fixed voltage node GND is at ground potential. The first current source 46 is configured to energize the first temperaturesensing element 26 with a current that is insensitive to environmental conditions. A second current source 48 is coupled between the fixed voltage node GND and the second temperature-sensing element 36. The second current source 48 is configured to energize the second temperature-sensing element 36 with a current that is insensitive to environmental conditions.

[0035] The amplifier controller die 16 further includes a comparator 50, which has a temperature-dependent voltage input terminal 52 that is controllably coupled to either the first temperature-sensing element 26 or the second temperature-sensing element 36 by way of a fifth switch SW5 and a sixth switch SW6, respectively. The comparator 50 is configured to compare the first temperature-dependent voltage or alternatively the second temperature-dependent voltage to a reference voltage VREF that is applied to a reference terminal 54. The comparator 50 has a comparator output terminal 56 at which a thermal shutdown signal is output in response to the comparison that the comparator 50 is configured to make between a selectedone the first temperature-dependent voltage and the second temperaturedependent voltage and the reference voltage VREF. In the exemplary embodiment of FIG. 1 , the thermal shutdown signal is generated as a logic high when the selected one of the first temperature-dependent voltage and the second temperature-dependent voltage is at a voltage level generated by the first temperature-sensing element 26 or the second temperature-sensing element 36 indicates that the first power amplifier 18 or the second power amplifier 28, respectively, is approaching a damaging temperature.

[0036] A switch control logic 58 has a comparator input terminal 60 that is coupled to the comparator output terminal 56 and configured to receive the thermal shutdown signal. The switch control logic 58 is configured to control the opening of the first switch SW1 and the second switch SW2 to cut off the bias current to whichever one of the first power amplifier 18 and the second power amplifier 28 is producing a potentially damaging rise in temperature that is approaching a specified maximum operating temperature. Removing the bias current from the first power amplifier 18 and the second power amplifier 28 effectively shuts them down, thereby avoiding damage. The switch control logic 58 controls the opening and closing of the first switch SW1 and the second switch SW2 by generating a first control signal CTL1 and a second control signal CTL2, respectively.

[0037] The switch control logic 58 also includes a control interface 62 that is configured to receive external control signals that are generated by an external controller (not shown). The external controller may be a digital processor such as a baseband processor of a wireless device. In some embodiments, the switch control logic 58 may be a control register coupled to a control interface as opposed to the control interface 62. In some embodiments, the control interface 62 is a radio frequency front-end (RFFE) type interface. A switch control bus 64 carries the control signals CTL1 through CTL6 to the switches SW1 through SW6.

[0038] In FIG. 1 , the switch control logic 58 of the exemplary power amplifier circuitry 10 has received switch settings for switches SW1 through SW6 via the control interface 62 in order to select the second amplifier die 14 to be the active die, which is the high-band amplifier die. The switch control logic 58 sets the first switch SW1 through sixth switch SW6 to opened andclosed states, respectively, for the second amplifier 28 to amplify signal RFIN2 and for the first amplifier 18 to remain inactive. As shown in FIG. 1 , the switch control logic 58 outputs the first control signal CTL1 at a logic level L that opens the first switch SW1 to shut off the bias current from the first power amplifier 18. The switch control logic 58 outputs the second control signal CTL2 at a logic level H that closes the second switch SW2 to apply the bias current I B IAS to the second power amplifier 28 to activate the second power amplifier 28 to amplify the second input RF signal RFIN2. The switch control logic 58 outputs the third control signal CTL3 at a logic level L that opens the third switch SW3 to prevent the temperature-dependent voltage generated by the second temperature-sensing element 36 from being fed back to the bias generator 38.

[0039] The fourth switch SW4 is closed by the fourth control signal CTL4 at a logic level H generated by the switch control logic 58 so that the temperature-dependent voltage generated by the first temperature-sensing element 26 is fed back to the bias generator 38. The bias generator 38 controls the bias current to the second power amplifier 28 based on the temperature of the first amplifier die 12 according to a relationship deemed most optimal for performance of the second power amplifier 28. This typically includes a higher higher bias current at higher temperature.

[0040] The switch control logic 58 outputs a logic level L for the fifth control signal CTL5 to prevent the temperature-dependent voltage generated by the first temperature-sensing element 26 from being fed into the temperaturedependent voltage input terminal 52 of the comparator 50. The switch control logic 58 also outputs the sixth control signal CTL6 that is a logic level H that closes the sixth switch SW6 to apply the second temperature-dependent voltage generated by the second temperature-sensing element 36 to the temperature-dependent voltage input terminal 52 of the comparator 50. In response the comparator 50 will generate the thermal shutdown signal at a logic state that indicates a shutdown is necessary if the temperaturedependent voltage compared with the reference voltage VREF indicates that the second power amplifier 28 is approaching a potentially damaging temperature. Once the switch control logic 58 receives the thermal shutdown signal indicating that the second power amplifier 28 is approaching thepotentially damaging temperature, the switch control logic 58 will immediately open the second switch SW2 by transitioning the logic level H of the control signal CTL2 to a logic level L to shut off the bias current I B IAS to the second power amplifier 28 to deactivate the second power amplifier 28.

[0041] In FIG. 2, the switch control logic 58 of the exemplary power amplifier circuitry 10 receives switch settings for switches SW1 through SW6 via the control interface 62 in order to select the first amplifier die 12 to be the active die, which is the mid-band amplifier die. As shown in FIG. 2, the switch control logic 58 outputs the first control signal CTL1 at a logic level H that closes the first switch SW1 to apply the bias current I BIAS to the first power amplifier 18 to activate the first power amplifier 18 to amplify the first input RF signal RFIN1 . The switch control logic 58 outputs the second control signal CTL2 at a logic level L that opens the second switch SW2 to shut off bias current to the second power amplifier 28. The third switch SW3 is closed by the third control signal CTL3 at a logic level H generated by the switch control logic 58 so that the temperature-dependent voltage generated by the second temperature-sensing element 36 is fed back to the bias generator 38. The bias generator 38 controls the bias current to the first power amplifier 18 based on the temperature of the second amplifier die 14 according to a relationship deemed most optimal for performance of the first power amplifier 18. This typically includes a higher bias current at higher temperature.

[0042] The switch control logic 58 outputs a logic level L for both the fourth control signal CTL4 and the sixth control signal CTL6 that opens the fourth switch SW4 and the sixth switch SW6. The switch control logic 58 also outputs fifth control signal CTL5 that is a logic level H that closes the fifth switch SW5 to apply the first temperature-dependent voltage generated by the first temperature-sensing element 26 to the temperature-dependent voltage input terminal 52 of the comparator 50. The comparator 50 generates the thermal shutdown signal at a logic state that indicates a shutdown is necessary if the temperature-dependent voltage compared with the reference voltage VREF indicates that the first power amplifier 18 is approaching a potentially damaging temperature. Once the switch control logic 58 receives the thermal shutdown signal indicating that the first power amplifier 18 is approaching the potentially damaging temperature, the switch control logic 58will immediately open the first switch SW1 by transitioning the logic level H of the control signal CTL1 to a logic level L to deactivate the first power amplifier 28.

[0043] The goal of the scheme is to implement the most optimal bias current for the active power amplifier while using only existing hardware. This is realized as follows:• The sensor diodes on both power amplifier dice are provided a bias current so that they generate a voltage that represents their respective temperatures.• The diode voltage of the active power amplifier is compared with a reference voltage to implement a thermal shutdown function. The diode voltage of the inactive power amplifier represents (due to physical proximity) the average temperature of the active power amplifier and is fed to the bias generator.• The bias generator uses the provided diode voltage to generate a bias current with the required temperature coefficient.• This bias current is fed to the active power amplifier.

[0044] FIG. 3 is a schematic diagram showing another embodiment of amplifier circuitry in accordance with the present disclosure, wherein amplifiers PA1 and PA2 are integrated onto a single die 66. While in some applications temperature differences between the amplifiers PA1 and PA2 may not be as great due to their integration on the same die 66, the operation and advantages provided will remain the same as those of the embodiment shown in FIGS. 1 and 2.

[0045] FIG. 4 is a schematic diagram of an exemplary communication device 68 wherein the power amplifier circuitry 10 may be employed. Herein, the communication device 68 can be a communication device, such as a mobile terminal, a smart watch, a tablet, a computer, a navigation device, an access point, a basestation (e.g., eNB or gNB), and any other type of wireless communication device that supports wireless communications, such as cellular, wireless local area network (WLAN), Bluetooth, ultra-wideband (UWB), and near-field communications. The communication device 68 generally includes a control system 70, a baseband processor 72, transmit circuitry 74, receive circuitry 76, antenna switching circuitry 78, multipleantennas 80, and user interface circuitry 82. In a non-limiting example, the control system 70 can be a field-programmable gate array (FPGA). In this regard, the control system 70 can include one or more of at least a microprocessor, an embedded memory circuit, and a communication bus interface. The receive circuitry 76 receives radio frequency signals via the multiple antennas 80 and through the antenna switching circuitry 78 from one or more basestations. A low-noise amplifier and a filter cooperate to amplify and remove broadband interference from the received signal for processing. Downconversion and digitization circuitry (not shown) will then downconvert the filtered, received signal to an intermediate or baseband frequency signal, which is then digitized into one or more digital streams using one or more analog-to-digital converters (ADCs).

[0046] The baseband processor 72 processes the digitized received signal to extract the information or data bits conveyed in the received signal. This processing typically comprises demodulation, decoding, and error correction operations, as will be discussed in greater detail below. The baseband processor 72 is generally implemented in one or more digital signal processors (DSPs) and application-specific integrated circuits (ASICs).

[0047] For transmission, the baseband processor 72 receives digitized data, which may represent voice, data, or control information, from the control system 70, which it encodes for transmission. The encoded data is output to the transmit circuitry 74, where a digital-to-analog converter (DAC) converts the digitally encoded data into an analog signal and a modulator modulates the analog signal onto a carrier signal that is at a desired transmit frequency or frequencies. A power amplifier such as the first power amplifier 18 or the second power amplifier 28 (FIG. 1 ) amplifies the modulated carrier signal to a level appropriate for transmission and delivers the modulated carrier signal to the multiple antennas 80 through the antenna switching circuitry 78. The multiple antennas 80 and the replicated transmit circuitry 74 and receive circuitry 76 may provide spatial diversity. Modulation and processing details will be understood by those skilled in the art. In an embodiment, the power amplifier circuitry 10 may be provided in any one or more of the circuitries in the communication device 68, such as the transmit circuitry 74.

[0048] It is contemplated that any of the foregoing aspects, and / or various separate aspects and features as described herein, may be combined for additional advantage. Any of the various embodiments as disclosed herein may be combined with one or more other disclosed embodiments unless indicated to the contrary herein.

[0049] Those skilled in the art will recognize improvements and modifications to the preferred embodiments of the present disclosure. All such improvements and modifications are considered within the scope of the concepts disclosed herein and the claims that follow.

Claims

ClaimsWhat is claimed is:1 . Amplifier circuitry (10) comprising:• a plurality of amplifier dice that are thermally coupled, each amplifier die (12, 14) comprising a power amplifier having an input terminal (20, 30), an output terminal (22, 32), and a bias input terminal (24, 34), and one of a temperature-sensing element (26, 36) configured to output a temperature-dependent voltage that is dependent on the temperature of the power amplifier die (12, 14);• an amplifier controller die comprising:• a bias generator (38) having a bias output terminal (40) and a temperature-dependent voltage feedback terminal (44);• a plurality of switches (SW1-SW6), each switch of the plurality of switches being controllably coupled between the bias output terminal (40) and the bias input terminal (24, 34) of one of the plurality of power amplifiers or between the temperature-dependent voltage feedback terminal (44) and one of the temperature-sensing elements (26, 36);• a switch control logic (58) having a control interface (62) configured to receive amplifier control settings from an external processor and a switch control bus (64) configured to open switches of the plurality of switches (SW1-SW6) to shut off bias current to the amplifier of deselected ones of the plurality of amplifier dice, and to close a corresponding one of the plurality of switches between the bias output terminal (40) and the bias input terminal (24, 34) of the power amplifier of a selected power amplifier die (12, 14), and to close a selected one the plurality of switches between the temperature-dependent feedback terminal (44) and the temperature-sensing element (26, 36) of one of the plurality of amplifier dice that is deselected in response to the amplifier activation settings.

2. The amplifier circuitry of claim 1 further comprises a comparator having a comparator output terminal coupled to a comparator input terminal of the switch control logic and a temperature-dependent voltage input terminal that is controllably coupled to each temperature-sensing element through corresponding ones of the plurality of switches, wherein the switch controller closes one switch of the plurality of switches that couples the temperaturedependent voltage input terminal to the temperature-sensing element of a deselected one of the plurality of amplifier dice.

3. The amplifier circuitry of claim 2 wherein the comparator is configured to compare temperature-dependent voltage of the temperature-sensing element of a deselected one of the plurality of amplifier dice with a voltage reference and in response output a thermal shutdown signal to the switch control logic if the temperature-dependent voltage indicates that the power amplifier of the selected amplifier die is approaching a maximum operating temperature, wherein the switch control logic is further configured to open the one switch of the plurality of switches coupled between the bias output terminal and the bias input terminal of the power amplifier of the selected power amplifier die.

4. The amplifier circuitry of claim 1 wherein the temperature-sensing element of each of the plurality of the power amplifier dice is a diode.

5. The amplifier circuitry of claim 1 wherein the temperature-sensing element of each of the plurality of the power amplifier dice is a bipolar junction transistor.

6. The amplifier circuitry of claim 1 wherein the amplifier controller die is complementary metal oxide semiconductor (CMOS) based.

7. The amplifier circuitry of claim 1 wherein the amplifier controller die is silicon-on-insulator (SOI) based.

8. A method for generating a proportional-to-absolute-temperature (PTAT) adjusted bias current in amplifier circuitry (10) having a first amplifier die (12)having a first power amplifier and a first temperature-sensing element (26) and a second amplifier die (14) having a second power amplifier and a second temperature-sensing element (36), the method comprising:• deactivating the first power amplifier;• activating the second power amplifier;• adjusting the bias current to the second power amplifier in response to a first temperature-dependent voltage generated by the first temperature-sensing element (26); and• deactivating the second power amplifier if a second temperaturedependent voltage generated by the second temperature-sensing element (36) indicates that the temperature of the second power amplifier is approaching a predetermined maximum operating temperature.

9. The method of claim 8 further comprising:• deactivating the second power amplifier;• activating the first power amplifier;• adjusting the bias current to the first power amplifier in response to the second temperature-dependent voltage generated by the second temperature-sensing element; and• deactivating the first power amplifier if the first temperature-sensing element indicates that the temperature of the first power amplifier is approaching a predetermined maximum operating temperature.

10. A wireless communication device (66) comprising:• a baseband processor (70);• transmit circuitry (72) configured to receive encoded data from the baseband processor and to modulate a carrier signal with the encoded data, wherein the transmit circuitry comprises:• amplifier circuitry (10) comprising:• a plurality of amplifier dice that are thermally coupled, each amplifier die (12, 14) comprising a power amplifier having an input terminal (20, 30), an output terminal (22, 32), and a bias inputterminal (24, 34) and one of a temperature-sensing element (26, 36) configured to output a temperature-dependent voltage that is dependent on the temperature of the power amplifier die;• an amplifier controller die comprising:• a bias generator (38) having a bias output terminal (40) and a temperature-dependent voltage feedback terminal (44);• a plurality of switches (SW1-SW6), each switch of the plurality of switches being controllably coupled between the bias output terminal (40) and the bias input terminal (24, 34) of one of the plurality of power amplifiers or between the temperaturedependent voltage feedback terminal (44) and one of the temperature-sensing elements (26, 36);• a switch control logic (58) having a control interface (62) configured to receive amplifier control settings from an external processor and a switch control bus (64) configured to open switches (SW1-SW6) to shut off bias current to the amplifier of deselected ones of the plurality of amplifier dice, and to close a corresponding one of the plurality of switches between the bias output terminal (40) and the bias input terminal (24, 34) of the power amplifier of a selected power amplifier die, and to close a selected one the plurality of switches between the temperaturedependent voltage feedback terminal (44) and the temperaturesensing element (26, 36) of one of the plurality of amplifier dice that is deselected in response to the amplifier activation settings.11 . The wireless device of claim 10 wherein the amplifier circuitry further comprises a comparator having a comparator output terminal coupled to a comparator input terminal of the switch control logic and a temperaturedependent voltage input terminal that is controllably coupled to each temperature-sensing element through corresponding ones of the plurality of switches, wherein the switch controller closes one switch of the plurality of switches that couples the temperature-dependent voltage input terminal to thetemperature-sensing element of a deselected one of the plurality of amplifier dice.

12. The wireless device of claim 10 wherein the comparator is configured to compare temperature-dependent voltage of the temperature-sensing element of a deselected one of the plurality of amplifier dice with a voltage reference and in response output a thermal shutdown signal to the switch control logic if the temperature-dependent voltage indicates that the power amplifier of the selected amplifier die is approaching a maximum operating temperature, wherein the switch control logic is further configured to open the one switch of the plurality of switches coupled between the bias output terminal and the bias input terminal of the power amplifier of the selected power amplifier die.

13. The wireless device of claim 10 wherein the temperature-sensing element of each of the plurality of the power amplifier dice is a diode.

14. The wireless device of claim 10 wherein the temperature-sensing element of each of the plurality of the power amplifier dice is a bipolar junction transistor.

15. The wireless device of claim 10 wherein the amplifier controller die is complementary metal oxide semiconductor (CMOS) based.

16. The wireless device of claim 10 wherein the amplifier controller die is silicon-on-insulator (SOI) based.

17. An amplifier controller die comprising:• a bias generator (38) having a bias output terminal (40) and a temperature-dependent feedback terminal (44);• a first switch (SW1 ) configured to be controllably coupled between the bias output terminal and a first bias input terminal (24) of a first power amplifier;• a second switch (SW2) configured to be control lably coupled between the bias output terminal and a second bias input terminal (34) of a second power amplifier;• a third switch (SW3) configured to be controllably coupled between the temperature-dependent voltage feedback terminal (44) and a second temperature-sensing element (36) associated with the second power amplifier;• a fourth switch (SW4) configured to be controllably coupled between the temperature-dependent voltage feedback terminal (44) and a first temperature-sensing element (26) associated with the first power amplifier; and• a switch control logic (58) having a control interface (62) configured to receive amplifier control settings from an external processor and a control bus (64) configured to open both the first switch (SW1 ) and the third switch (SW3) and close both the second switch (SW2) and the fourth switch (SW4) in response to the amplifier activation settings that select the first amplifier for deactivation and the second amplifier for activation and close both the first switch and the third switch and open both the second switch and the fourth switch in response to the amplifier activation settings that select the first amplifier for activation and the second amplifier for deactivation.

18. The amplifier controller die of claim 17 further comprises a comparator having a comparator output terminal coupled to a comparator input terminal of the switch control logic and a temperature-dependent voltage input terminal that is controllably coupled to each temperature-sensing element through a corresponding fifth switch (SW5) and a corresponding sixth switch (SW6), respectively, wherein the switch controller closes one of the fifth switch (SW5) or the sixth switch (SW6) that couples the temperature-dependent voltage input terminal to the temperature-sensing element of a deselected one of the plurality of amplifier dice.

19. The amplifier circuitry of claim 17 wherein the amplifier controller die is complementary metal oxide semiconductor (CMOS) based.

20. The amplifier circuitry of claim 17 wherein the amplifier controller die is silicon-on-insulator (SOI) based.21 . Amplifier circuitry (10) comprising:• a single amplifier die (66) having a plurality of power amplifiers (12, 14) that are thermally coupled on the amplifier die, each power amplifier having an input terminal (20, 30), an output terminal (22, 32), and a bias input terminal (24, 34), and one of a temperature-sensing element (26, 36) configured to output a temperature-dependent voltage that is dependent on the temperature of the power amplifier;• an amplifier controller die comprising:• a bias generator (38) having a bias output terminal (40) and a temperature dependent voltage feedback terminal (44);• a plurality of switches (SW1-SW6), each switch of the plurality of switches being controllably coupled between the bias output terminal and the bias input terminal of one of the plurality of power amplifiers or between the temperature-dependent voltage feedback terminal and one of the temperature-sensing elements;• a switch control logic (58) having a control interface (62) configured to receive amplifier control settings from an external processor and configured to open switches of the plurality of switches to shut off bias current to the amplifier of deselected ones of the plurality of power amplifiers, and to close a corresponding one of the plurality of switches between the bias output terminal and the bias input terminal of the power amplifier of a selected power amplifier die, and to close a selected one of the plurality of switches between the temperature-dependent feedback terminal and the temperature-sensing element of theone of the plurality of power amplifiers that is deselected in response to the amplifier activation settings.

22. The amplifier circuitry of claim 21 further comprises a comparator having a comparator output terminal coupled to a comparator input terminal of the switch control logic and a temperature-dependent voltage input terminal that is controllably coupled to each temperature-sensing element through corresponding ones of the plurality of switches, wherein the switch controller closes one switch of the plurality of switches that couples the temperaturedependent voltage input terminal to the temperature-sensing element of a deselected one of the plurality of amplifiers.

23. The amplifier circuitry of claim 22 wherein the comparator is configured to compare temperature-dependent voltage of the temperature-sensing element of a the deselected one of the plurality of amplifiers with a voltage reference and in response output a thermal shutdown signal to the switch control logic if the temperature-dependent voltage indicates that the selected amplifier is approaching a maximum operating temperature, wherein the switch control logic is further configured to open the one switch of the plurality of switches coupled between the bias output terminal and the bias input terminal of the selected power amplifier.

24. The amplifier circuitry of claim 21 wherein the temperature-sensing element of each of the plurality of the power amplifiers is a diode.

25. The amplifier circuitry of claim 21 wherein the temperature-sensing element of each of the plurality of the power amplifiers is a bipolar junction transistor.

26. The amplifier circuitry of claim 21 wherein the amplifier controller die is complementary metal oxide semiconductor (CMOS) based.

27. The amplifier circuitry of claim 21 wherein the amplifier controller die is silicon-on-insulator (SOI) based.

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