Method and apparatus for quantification and inverse quantification design in video encoding and decoding

Abstract

To provide methods and devices for quantization and de-quantization design in video encoding / decoding.SOLUTION: A method includes: determining a quantization parameter for residual data of a coding unit (CU); deriving a scale value by scaling the quantization parameter by a scale factor; determining a plurality of coefficients associated with the CU; determining a plurality of parameters associated with the CU; obtaining a plurality of bit-shifts by bit-shifting the plurality of parameters; and obtaining a quantized level based on the scale value, the plurality of coefficients and the plurality of bit-shifts.SELECTED DRAWING: Figure 11

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application is a sequel to U.S. Provisional Application No. 62 / 904,668, filed September 22, 2019. No. 60 / 699,999, filed on Oct. 1, 2003, the disclosure of which is hereby incorporated by reference in its entirety. To assist. [Technical Field]

[0002] This application relates generally to video encoding, decoding and compression, and in particular, but not exclusively, to video coding, decoding and compression. The present invention relates to a method and apparatus for quantification and inverse quantification design in encoding / decoding. [Background technology]

[0003] A variety of video encoding and decoding techniques can be used to compress video data. Video encoding and decoding is performed according to one or more video encoding and decoding standards. Video coding and decoding standards include Versatile Video Coding (VVC). ding), Joint Exploration Test Model (JEM), High Efficiency Video Encoding and decoding (H.265 / HEVC: High Efficiency Video Coding), advanced video Coding / Decoding (H.264 / AVC: Advanced Video Coding) and Video Experts Group (MPEG: Moving Picture Experts Group) video coding and decoding. In coding, prediction methods (e.g., For example, inter-prediction and intra-prediction are used. The goal is to stream video data at lower video resolutions while avoiding or minimizing video quality degradation. The goal is to compress the data into a bitrate format. Summary of the Invention

[0004] This disclosure generally relates to techniques related to quantification and inverse quantification design in video encoding and decoding. Here are some examples of techniques.

[0005] According to a first aspect of the present disclosure, a quantification parameter for residual data of a coding unit (CU) is provided. determining a metric and scaling the quantification parameter by a scale factor; deriving a scale value by: determining a plurality of parameters associated with the CU; and bit-coding the plurality of parameters. a plurality of bit shifts are obtained by shifting the scale value, the obtaining a quantification level based on a plurality of coefficients and the plurality of bit shifts; The present invention provides a video encoding method to be applied to an encoder including:

[0006] According to a second aspect of the present disclosure, a video bitstream including quantification parameters and quantification levels is receiving the stream and scaling the quantification parameter by a scaling factor. This allows for deriving a scale value and for multiple parameters associated with a coding unit (CU). determining a plurality of parameters; and bit-shifting the plurality of parameters to obtain a plurality of and obtaining a bit shift of the quantization level, the scale value and the plurality of bits. and obtaining a plurality of coefficients associated with the CU based on the bit shift. The present invention provides a video encoding method applicable to a video decoder.

[0007] According to a third aspect of the present disclosure, there is provided a method for detecting a signal from one or more processors, the method comprising: a non-transitory memory connected to the processor; a plurality of programs, the plurality of programs being executed by the one or more processors; When executed by the processor, the one or more processors and scaling the quantification parameter by a scale factor. a scale value is derived by determining a plurality of coefficients associated with the CU; determining a plurality of related parameters and bit-shifting the plurality of parameters; and obtaining a plurality of bit shifts, and then calculating the scale value, the plurality of coefficients, and the plurality of To obtain a quantification level based on bit shifting, A coating device is provided.

[0008] According to a fourth aspect of the present disclosure, there is provided a method for controlling a computer system, comprising: a non-transitory memory connected to the processor; a plurality of programs, the plurality of programs being executed by the one or more processors; When executed by the processor, the one or more processors are receiving a video bitstream including quantification levels and scaling said quantification parameters; By scaling with the scaling factor, the scale value is derived and multiple parameters related to the CU are calculated. and bit-shifting the plurality of parameters to obtain a plurality of bit-shifted parameters. and obtaining a value based on the quantification level, the scale value, and the plurality of bit shifts. , and obtaining a plurality of coefficients associated with the CU. A feeding device is provided.

[0009] In accordance with a fifth aspect of the present disclosure, a computing device having one or more processors A non-transitory computer-readable medium storing a plurality of programs executed by the device. a storage medium, wherein the plurality of programs are executed by the one or more processors; and when executed, causing the one or more processors to perform a quantification for residual data of a CU. determining a quantification parameter and scaling the quantification parameter by a scale factor; A scale value is derived from the CU, a plurality of coefficients associated with the CU are determined, and a plurality of coefficients associated with the CU are determined. A plurality of parameters are determined, and the plurality of parameters are bit-shifted to obtain a plurality of a bit shift of a number, the scale value, the coefficients, and the bit To obtain a quantification level based on the shift, we perform operations such as A computer-readable storage medium is provided.

[0010] In accordance with a sixth aspect of the present disclosure, a computing device having one or more processors A non-transitory computer-readable medium storing a plurality of programs executed by the device. a storage medium, wherein the plurality of programs are executed by the one or more processors; When executed by the one or more processors, the one or more processors may be configured to provide quantification parameters and quantification levels. receiving a video bitstream including a signal, and scaling the quantification parameter by a scaling factor; By scaling, we derive the scale value and set multiple parameters related to the CU. and bit-shifting the plurality of parameters to obtain a plurality of bit shifts. and obtaining, based on the quantization level, the scale value, and the plurality of bit shifts, Retrieving multiple coefficients associated with a CU A data-readable storage medium is provided. [Brief explanation of the drawings]

[0011] A more particular description of examples of the present disclosure will be rendered with reference to specific examples that are illustrated in the accompanying drawings. These drawings are merely illustrative of some examples and are therefore not to be considered limiting in scope. These examples may be illustrated with additional specificity and detail through the use of the accompanying drawings. will be done.

[0012] [Figure 1] FIG. 1 is a block diagram illustrating an example video encoder according to an embodiment of this disclosure. [Figure 2] FIG. 2 is a block diagram illustrating an example video decoder according to an embodiment of this disclosure. [Figure 3] FIG. 3 illustrates an image divided into coding tree units (CTUs) according to one embodiment of the present disclosure. [Figure 4] FIG. 4 is a schematic diagram illustrating a multi-type tree splitting mode according to an embodiment of the present disclosure. [Figure 5] FIG. 5 illustrates a signaling mechanism for partition division information in a quadtree with a nested multi-type tree coding tree structure according to an embodiment of the present disclosure. [Figure 6] FIG. 6 illustrates a CTU divided into multiple CUs in a quadtree with a nested multi-type tree coding block structure according to an embodiment of the present disclosure. [Figure 7] FIG. 7 illustrates an example of a block encoded and decoded with palette mod according to an embodiment of the present disclosure. [Figure 8] 8A and 8B illustrate horizontal and vertical traverse scans according to an embodiment of the present disclosure. [Figure 9] FIG. 9 illustrates encoding of a palette index according to an embodiment of the present disclosure. [Figure 10] FIG. 10 is a block diagram illustrating an example apparatus for video encoding and decoding, according to an embodiment of this disclosure. [Figure 11] FIG. 11 is a flowchart illustrating an example process of quantification design in video encoding and decoding, according to an embodiment of the present disclosure. [Figure 12] FIG. 12 is a flowchart illustrating an example process of inverse quantification design in video encoding and decoding, according to an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0013] Reference will now be made in detail to specific embodiments, examples of which are illustrated in the accompanying drawings. In the detailed description, a number of specific, non-limiting examples are used to facilitate understanding of the concepts described herein. However, it will be apparent to those skilled in the art that various modifications can be made. For example, the subject matter discussed here applies to many types of electronic devices with digital video capabilities. It will be clear to those skilled in the art that this can be achieved with the device.

[0014] As used herein, "one embodiment," "embodiment," "example," "an embodiment," " Reference to "an example" or similar expression means that the particular feature, structure or characteristic being described has at least Means included in one embodiment or example. Any feature, structure, element, or characteristic described herein may be used interchangeably with other embodiments unless expressly indicated otherwise. It is also applicable to

[0015] Throughout this disclosure, terms such as "first," "second," "third," etc., all refer to the associated element, For example, it is used only to refer to devices, parts, components, steps, etc. Unless the context clearly indicates otherwise, no spatial or temporal order is implied. For example, a "first device" and a "second device" refer to two separately formed devices, or two parts, components, or states of operation of the same device, can be given a name.

[0016] "Module", "Submodule", "Circuit", "Subcircuit", "Circuit system", The terms "sub-circuit system," "unit," or "subunit" mean one or Memory (shared, dedicated, or A module contains or stores code or instructions. A module or circuit may contain one or more circuits that are not directly It is possible for the circuit to include one or more components that are indirectly connected to one another. The items may or may not be physically connected to each other, located next to each other, is possible.

[0017] As used here, "if..." or "if..." or "if..." The term "and" shall be understood to mean "when" or "according to," depending on the context. When these terms appear in the claims, they should be used with the understanding that they are relevant and limiting. or may not imply that a feature is conditional or optional. For example, One method includes the steps of: i) if condition X exists, then function or action X' is performed; ii) if condition Y exists, then function or action Y' is performed. A law is both the ability to perform function or action X' and the ability to perform function or action Y'. Therefore, functions X' and Y' are both implemented at different times. It is possible that this can be achieved by performing the method multiple times.

[0018] A unit or module may be implemented entirely in software, It may be implemented by hardware or a combination of hardware and software. A fully software implementation may be implemented by combining, for example, the units or modules linked together, directly or indirectly, to perform a specific function It may contain functionally related code blocks or software parts that are be.

[0019] FIG. 1 is a block diagram illustrating an example video encoder according to an embodiment of the present disclosure. The encoder 100 includes a video frame partitioning unit 104 for dividing a video frame into multiple video blocks for processing. For each particular video block, prediction can be performed using either an inter-prediction approach or an intra-prediction approach. Inter prediction is based on a previously reconstructed frame. forming one or more predictors by motion estimation and motion compensation based on pixels from the image; Intra prediction involves forming a predictor based on the reconstructed pixels in the current frame. The mode decision selects the best predictor to predict the current block. It is possible.

[0020] Transform circuit 102 is fed with a prediction residual that represents the difference between the current video block and its predictor. The quantification circuit 104 then calculates the transformation coefficients in order to reduce the entropy. The quantized coefficients are then provided to an entropy coding circuit 106. As shown in Figure 1, Video block partition information from the prediction circuit and / or intra-prediction circuit 112, motion vectors, Prediction-related information 110, such as the frame rate, reference image index, and intra-prediction mode, is also stored. A compressed video bitstream 1 is fed through an entropy coding circuit 106. It will be saved in 14.

[0021] In the encoder 100, for the purpose of prediction, the decoder related A related circuit is also required. First, the inverse quantification 116 and inverse transformation circuit 118 calculates the prediction residual This reconstructed prediction residual is combined with the block predictor 120 to obtain , unfiltered reconstructed pixels for the current video block are generated.

[0022] To further improve coding efficiency and display quality, an in-loop filter is used. For example, current versions of AVC, HEVC, and VVC use deblocking filters. In HEVC, SAO (Sequential Audio Optimization) is used to further improve coding efficiency. An additional in-loop filter called sample adaptive offset is defined. In the current version of the VC standard, there is yet another filter called ALF (Adaptive Loop Filter). In-loop filters that utilize this technology are being actively researched and may be included in the final standard. expensive.

[0023] FIG. 2 shows an example block diagram that can be used in conjunction with many video encoding and decoding standards. 1 is a block diagram showing a video decoder 200 based on the decoder of FIG. The decoder 200 is similar to the reconstruction-related part in the decoder 100. The bitstream 201 is first decoded by entropy decoding 202 to obtain a defined The quantified coefficient levels and prediction related information are derived. Then, the quantified coefficient levels are are processed by inverse quantification 204 and inverse transformation 206 to obtain the reconstructed prediction residuals. The block predictor memory implemented in the intra / inter mode selector 212 is The algorithm performs intra prediction 208 or motion compensation 21 based on the decoded prediction information. 0. The reconstructed prediction residual from the inverse transform 206 and the block The prediction output generated by the clock predictor mechanism is added by the adder 214. By doing this, we obtain a set of pixels of the unfiltered reconstruction. When filter 209 is turned on, a filtering operation is performed on these reconstructed pixels. operations are performed to derive the final reconstructed video output 222.

[0024] Video codes such as VVC, JEM, HEVC, MPEG-4, and Part10 mentioned above The encoding / decoding standards are conceptually similar; for example, they are all block-based. Joint Video Experts Team (JVET) presented the first draft of Versatile Video Coding (VVC) and V Defined the VVC Test Model 1 (VTM1) coding method. A quadtree with nested multitype trees using value-split coding block structure is the first step in VVC. It was decided to include it as a new coding feature. In a quadtree, the parent node has four It can be split into child nodes, and each child node can be attached to another parent node that splits into four new child nodes. There is a possibility that this will happen.

[0025] In VVC, the input video is divided into coding tree units (CTUs) according to the image partition structure. The CTU is a nested multi-type tree structure. The quadtree is divided into coding units (CUs), where leaf CUs are the same predictor. The present disclosure defines regions that share a mode (e.g., intra or inter). The term "unit" defines the region of the image that covers all components. The term "lock" is used to define the area that covers a particular component (e.g., luminance). When considering chroma sampling formats such as 4:2:0, spatial They may differ in location. Partitioning of the image into CTU

[0026] An image is divided into a series of coding tree units (CTUs). The concept of CTUs is introduced in HEVC. This is the same as the concept of CTU. In the case of an image with three sample arrays, the CTU is N× It consists of N luma sample blocks and two corresponding chroma sample blocks. 1 illustrates an image segmented into CTUs, according to an embodiment of the present disclosure. The maximum allowed size of a block is specified as 128x128. The size is 64x64. CTU compartmentalization using a tree structure

[0027] In HEVC, CTUs are represented as coding trees to adapt to various local characteristics. At the leaf CU level, inter-picture (temporal) prediction is performed. It is decided whether to encode an image region using intra-image or intra-image (spatial) prediction. A CU can further split into one, two, or four Prediction Units (PUs), depending on the PU split type. Within one PU, the same prediction process is applied and the related information is Transmitted to the decoder in PU units. Prediction processing is applied based on the PU division type. After obtaining the residual block, the leaf CU is divided into another four similar coding trees for this CU. It can be divided into transform units (TUs) according to the 2-tree structure. One of the key features is that there are multiple compartment concepts, including CU, PU, ​​and TU.

[0028] In VVC, nested multi-type trees with binary and ternary segmentation structures are used. replaces the concept of multiple partition unit types. For example, this means that The distinction between the concepts of CU, PU, ​​and TU is taken into account except for the case of CU, where the size of the transform length is too large. This removes the need for a CU partition, and supports more flexibility in the shape of the CU partition. The CTU can be rectangular or rectangular in shape. The CTU is first partitioned using a quadtree structure. The leaf nodes of this quadtree are then further partitioned by a multitype tree structure. It is possible.

[0029] FIG. 4 is a schematic diagram illustrating a multi-type tree splitting mode according to an embodiment of the present disclosure. As shown in Figure 4, in the multi-type tree structure, vertical binary split (SPLIT_BT_VER), horizontal binary split (SPLIT_BT_VER), Split ternary (SPLIT_BT_HOR), vertical ternary split (SPLIT_TT_VER), and horizontal ternary split (SPLIT_ There are four split types: TT_HOR, ... (CU), and CU is the maximum transform length, so long as this segmentation is not too large. , are used for prediction and transformation without further partitioning. In a quadtree with a coding block structure, CU, PU, ​​and TU have the same block size. The exception is that the maximum supported transform length is the width of the color components of the CU. Or it is smaller than the height.

[0030] FIG. 5 illustrates a quadrant with nested multi-type tree encoding tree structure according to an embodiment of the present disclosure. This shows the mechanism by which partitioning information in a tree is signaled. is treated as a tree, and is first split into quadtrees. Then, each leaf node of the quadtree is , which can be further divided by a multi-type tree structure as long as it is large enough to allow In a multitype tree, a first flag indicates whether the node is further divided. If the node is further split, a second flag (mtt_split_cu_flag) is set. The flag (mtt_split_cu_vertical_flag) is signaled to indicate the split direction, and then the third flag ( mtt_split_cu_binary_flag) is signaled to indicate whether the split is binary or ternary. CU multiplication is performed based on the values ​​of _split_cu_vertical_flag and mtt_split_cu_binary_flag. The type tree split mode (MttSplitMode) is derived as shown in Table 1. [Table 1]

[0031] FIG. 6 illustrates a block diagram of a multi-type tree coding block having a nested multi-type tree coding structure according to an embodiment of the present disclosure. As shown in Figure 6, the thick block edges are The edges represent quadtree partitions, and the remaining edges represent multitype tree partitions. A quadtree with tree partitions provides a content-adaptive coding tree structure consisting of CUs. The size can be as large as a CTU or as small as 4x4 in units of luma samples. For 4:2:0 chroma format, the maximum chroma coding block (CB) size is 64x64 and minimum saturation CB size is 2x2.

[0032] In VVC, the maximum supported luminance transform size is 64x64. The maximum saturation conversion size is 32x32. The width or height of the CB is the maximum conversion width or maximum change. If the CB is greater than the conversion height, the conversion in that direction is performed horizontally and / or vertically. It will be automatically split to fit the size limit.

[0033] The following parameters are for a quadtree with nested multitype tree coding scheme: Defined by the Sequence Parameter Set (SPS) syntax element and is specified.

[0034] CTU size: the root node size of the quadtree;

[0035] MinQTSize: The minimum allowed quadtree leaf node size;

[0036] MaxBtSize: The maximum allowed binary tree root node size;

[0037] MaxTtSize: The maximum allowed ternary tree root node size;

[0038] MaxMttDepth: Quadtree leaves of multitype tree partitions node is the maximum allowed hierarchy depth from

[0039] MinBTSize: The minimum allowed binary tree leaf node size;

[0040] MinTtSize: The minimum allowed ternary tree leaf node size.

[0041] In an example of a quadtree with nested multi-type tree coding tree structure, the CTU size is two pairs. 128x128 luma samples with corresponding 64x64 blocks of 4:2:0 chroma samples MinQTSize is set to 16x16, MaxBtSize is set to 128x128, and MaxTtSize is set to The width and height of MinBtSize and MinTtSize are both set to 4x4, Ma xMttDepth is set to 4. The quadtree partition is first applied to the CTU, and the quadtree leaf A quadtree leaf node is generated from 16x16 (i.e. MinQTSize) to 1 It can have a size up to 28x128 (i.e. CTU size). If the code is 128x128, this size is the sum of MaxBtSize and MaxTtSize (i.e. 64x 64), the leaf QT node cannot be further split by the binary tree. Otherwise, the leaf QT node is further partitioned by the multitype tree. Therefore, the quadtree leaf node is the root node of the multitype tree. This multitype tree has a depth of 0, i.e., MttDepth. Once the depth reaches MaxMttDepth (i.e., 4), no further splitting is considered. If a tree node has width equal to MinBtSize and less than or equal to 2*MinTtSize, further horizontal division Similarly, if the multitype tree node is equal to MinBtSize and 2 × Min If the height is less than or equal to TtSize, no further vertical divisions are considered.

[0042] FIG. 7 illustrates a block encoded and decoded with palette mod according to an embodiment of the present disclosure. Here is an example of a hardware VVC decoder: To enable a ×32 chroma pipeline design, the luma coding block is If the width or height of a block is greater than 64, TT division is prohibited. TT splitting is prohibited even if the width or height is greater than 32.

[0043] In VVC, the coding tree scheme allows luma and chroma to have separate block tree structures. This CU partitioning structure is called a dual-tree structure or a dual-encoded tree structure. A CU partition structure that is shared by both intensity and chroma is called a single tree structure or a single coding tree structure. For P slices and B slices, the luma and chroma coding trees in one CTU are The locks (CTBs) must share the same coding tree structure. In this case, luma and chroma can have separate block tree structures. When applied, the luma CTB is divided into CUs by one coding tree structure, and the chroma The CTB is divided into chroma CUs by a different coding structure. U consists of one luma coding block or two chroma coding blocks. CUs in P or B slices always have three colors unless the video is monochrome. It consists of coded blocks of all components. Multi-Transfer Selection (MTS) of core transforms

[0044] In addition to the DCT-II used in HEVC, the MTS scheme is also used for inter-coded It is used for residual coding of both intra-coded and intra-coded blocks. uses multiple transformations selected from DCT8 / DST7. The newly introduced transformation line The columns are DST-VII and DCT-VIII. Table 2 shows the selected DST / DCT The basic functions of [Table 2]

[0045] To maintain the orthogonality of the transformation matrices, the transformation matrices are more accurate than those in HEVC. To keep the intermediate values ​​of the transformed coefficients within the 16-bit range, horizontal After the horizontal and vertical transform, all coefficients will have 10 bits.

[0046] Separate enable flags for intra and inter to control the MTS scheme are specified at the SPS level. When MTS is enabled in the SPS, A CU level flag is signaled indicating whether MTS is applied to luma only. The MTS CU level flag is signaled when the following conditions are met: That is, first, both width and height are less than or equal to 32, and second, the CBF flag is equal to 1.

[0047] If the MTS CU flag is equal to 0, the DCT2 is applied in both directions. If the SCU flag is equal to 1, other values ​​indicate the horizontal and vertical transformation types, respectively. The following two flags are additionally notified. The conversion and signal notification mapping table is shown in Table 3. The integrated transformation selection for ISP and implicit MTS is shown in It is used to remove dependencies on the code and block shape. In P mode, or if the current block is an intra block, - When explicit MTS is on, only DST7 is used for both horizontal and vertical conversion cores. For the precision of the transformation matrix, an 8-bit linear transformation core is used. The 4-point DCT2 and DST7, 8-point, 16-point and 32-point DCTs used in HEVC All conversion cores remain the same, including the CT2, 64-point DCT2, and 4-point DCT8. Other conversion cores include 8-point, 16-point, and 32-point DST7 and DCT8. Use a conversion core. [Table 3]

[0048] To reduce the complexity of the large size of DST7 and DCT8, the high frequency transform coefficients are , DST7 and DCT whose size (width or height, or both width and height) is equal to 32 8 blocks are zeroed out. Only the coefficients in the 16x16 low frequency region are retained.

[0049] The residual of the block is coded in transform skip mode, as in HEVC. To avoid redundancy in syntax encoding, the CU level MTS_CU_flag is set to zero. If not, the transform skip flag is signaled. The size restrictions are the same as for MTS in JEM4, and are based on block width and This indicates that the transform skip can be applied to the CU when both heights are less than or equal to 32. If LFNST or MIP is activated for the CU, then the implicit M The TS transform is set to DCT2 and MTS is set to 0 for inter-coded blocks. Even if it is enabled, you can enable implicit MTS. Quantification Parameter Control

[0050] In one example, the maximum QP is increased from 51 to 63, and the initial quantification parameters are increased accordingly. The signaling of the QP may change. A non-zero value of slice_qp_delta indicates When encoded, the initial value of SliceQpY is changed in the slice segment layer. Specifically, You can change the value of init_qp_minus26 to be in the range of (-26+QpBdOffsetY) to +37. If the size of the transform block is not a power of four, implicit scaling by the transform process To compensate for this, the conversion factor is multiplied by 181 / 256 (or 181 / 128). Instead of being processed separately, it is processed along with any changes to the QP or QP levelScale table. For kip blocks, a QP equal to 4 results in a quantization step size of 1. , the minimum allowed QP is defined as 4.

[0051] In one example, a fixed lookup table is used to calculate the luminance quantification parameter QPY. VVC provides a more flexible luma-chroma QP mapping. A flexible piecewise linear model is used, where the only constraint on the linear model is the The slope is non-negative. Instead of using a fixed table, SPS uses a luminance-chrominance The luminance QP mapping relationship is signaled, i.e., as the luma QP increases, the saturation QP decreases. QP must remain flat or increase, but cannot decrease. A linear model is defined as: 1) the number of partitions in the model; 2) the input (intensity) and output (output) values ​​for that partition. (saturation) Delta QP. The input range of this piecewise linear model is [-QpBdOffset Y, 63], and the output range of this piecewise linear model is [-QpBdOffsetC, 63]. The coding relationship is signaled separately for Cb, Cr, and joint Cb / Cr coding. It can be signaled jointly for all three types of residual coding. Cut.

[0052] As in HEVC, CU-level QP adaptation is allowed in VVC. The delta QP values ​​for the chroma and saturation components can be signaled separately. The allowed chroma QP offset values ​​are specified in the picture parameter set in the same way as in HEVC. The list is signaled in the form of an offset list in PPS. Cb, Cr, and joint Cb / Cr coding are defined separately. For each joint Cb / Cr list, up to six offset values ​​are allowed. At the CU level, which offset value in the offset list adjusts the chroma QP for that CU? An index indicating which part of the data is to be used is signaled. Quantification and inverse quantification of conversion coefficients

[0053] The transformation process involves multiplying the resulting coefficients by a specific factor during the quantification and dequantification processes. Now that we have scaled, we need to do a shift operation. The scaling factor is defined as do.

number

[0054] In one example, the block dimension is a power of two, and M=2 m and N=2 n This is This means that if M is equal to N, or indeed if M·N is a power of four, the scaling factor This means that the block can be applied by right shifting. Usually called a "block". If M·N is not a power of 4, different scale and shift values The scale values ​​are defined as in Table 4. The block that does this is called a "compensation block." [Table 4]

[0055] For blocks coded in transform skip mode, the The specified scale and shift operations are performed.

[0056] The derivation of the scaled conversion factors is shown in Table 5. Definitions of all variables in Table 5 is described in version 6 of the VVC draft specification. [Table 5]

[0057] If the QP value is used, the quantification and dequantification process of the transform coefficients can be written as follows: The quantification can be expressed by equation (2).

number

[0058] The inverse quantification can be expressed by equation (3).

number

number

[0059] The variable rectNonTsFlag indicates whether the current block is a "normal block" or a "compensation block." If this has a value of false or 0, the current block is A lock is classified as normal blocking. If this has a value of true or 1, The current block is classified as a compensation block.

[0060] The variable transformShift is

number

[0061] In transform skip mode, the prediction residual is directly quantified and coded without performing a transform operation. More specifically, the quantification and non-quantification processes are described as follows: This can be done.

[0062] The quantification can be expressed by equation (6).

number

number

[0063] VTM6 is a palette mode for encoding screen content in 4:4:4 color format. Palette mode is enabled and the CU size is 64x64. If the following is true, a flag indicating whether the palette mode is used for this CU is set to CU_LEVEL_MODE. The palette mode is transmitted in the following ways: intra prediction, inter prediction, and intra-prediction. It is signaled as a prediction mode other than locked copy (IBC) mode.

[0064] When palette mode is used for a CU, the sample values ​​in the CU can be represented by a small set of representative color values. This set is called the "palette." For pixels with values ​​close to the palette colors, a palette index may be signaled to convey those values ​​to the decoder. escape Following the symbol index escape By signaling a value, it is also possible to specify samples whose values ​​are not close to any palette color. escape The values ​​are the quantified component values ​​of the sample, which are shown in Figure 7.

[0065] escape For quantified and non-quantified values, the following equations show the corresponding processing applied at the encoder and decoder, respectively:

[0066] The quantification can be expressed by equation (8).

number

[0067] The non-quantification can be expressed by equation (9).

number

[0068] Palette encoding maintains a palette predictor containing a list of colors. This predictor is initialized to 0 (i.e., an empty list) at the beginning of each slice for non-wavefronts and at the beginning of each CTU row for wavefronts. For each entry in the palette predictor, a reuse flag is signaled to indicate whether it is part of the current palette for this CU. This reuse flag is transmitted by a run-length code of zeros. After this, the number of new palette entries and the component values ​​of the new palette entries are signaled. After encoding a CU in palette mode, the palette predictor is updated with the current palette, and entries from the palette predictor that are not reused in the current palette are added to the end to form a new palette predictor, up to the maximum allowed palette size. For the current CU escape One for each CU to indicate whether a symbol is present escape The flag is signaled. escape If the symbol exists, the palette table is extended by one and the last index is escape are assigned to represent symbols.

[0069] 8A and 8B illustrate horizontal and vertical traverse scans according to an embodiment of the present disclosure. The palette indices of the samples in a CU form a palette index map. The index map can be horizontally and / or vertically aligned as shown in Figures 8A and 8B. The scanning order is determined by the palette_transpose_flag bit order. This is explicitly signaled to the host stream.

[0070] FIG. 9 illustrates encoding of palette index according to an embodiment of the present disclosure. The palette index is determined by two main palette sample modes: INDEX and COPY_ABOVE. This mode is used for the first row where only horizontal scanning is used, and for the second row where only vertical scanning is used. excluding the first row to be copied, or the palette sample position where the previous mode was COPY_ABOVE. In COPY_ABOVE mode, the sample in the line above is The palette index of the pull is copied. In INDEX mode, the palette index is explicitly signaled. In both INDEX and COPY_ABOVE modes, the same correspondence A run value is signaled that specifies the number of pixels that are coded by the mode.

[0071] The coding order for the index map is as follows: First, the number of index values ​​associated with an INDEX run is signaled. Following this, the actual index values ​​for the entire CU are signaled using a truncated binary encoding. Next, the palette mode (INDEX or COPY_ABOVE) and run length for each run are signaled in an interleaved manner. Finally, the quantized values ​​for the entire CU are signaled. escape The modal colors are grouped and coded using exponential-Golomb coding.

[0072] For slices with a dual luma / chroma tree, the palette consists of luma (Y component) and chroma (Cb and For a single tree slice, the palette is applied to Y, Cb, Cr components together, i.e. each entry in this palette contains Y, Cb, and Cr values In the case of deblocking, the block boundaries of palette-coded blocks are Not blocked.

[0073] Three different designs of quantification schemes are available: normal conversion, conversion skip, and and palette modes, respectively. Each different quantification design results in a different shift. For blocks with normal transformations applied, the shift and scale operations are The size and scale operations depend on the block shape. For blocks where transformation skip is applied, When coded in palette mode, the shift and scale operations are independent of the block shape. For blocks that are scaled, only the scale operation is performed, and this operation is independent of the block shape. Such non-uniform designs may not be optimal from a standardization perspective.

[0074] In one example, a method is provided for simplifying and further improving the transform and quantification. Quantification and Inverse Quantification Used in Transform Skip Mode Calculation Applying to the palette mode transforms the quantification and inverse quantification used in the skip and palette modes. Calculation It is possible to integrate

[0075] In one example, current quantification and reverse quantification in palette mode Calculation Applying to the transform skip mode allows the quantification and inverse quantification used in the transform skip mode and the palette mode. Calculation It is possible to integrate

[0076] In some cases, quantification and inverse quantification for normal transformation modes Calculation applies to all modes, including transform skip mode and palette mode, allowing for quantification and dequantification of normal transform mode, transform skip mode, and palette mode. Calculation It is possible to integrate all of these. Coordination of quantification and inverse quantification for transform skip and palette modes.

[0077] JPEG0007823100000016.jpg32167

[0078] JPEG0007823100000017.jpg41167

[0079] JPEG0007823100000018.jpg43167

[0080] JPEG0007823100000019.jpg28167

[0081] JPEG0007823100000020.jpg32164

[0082] JPEG0007823100000021.jpg34167 Coordination of quantification and inverse quantification for normal transform mode, transform skip mode, and palette mode

[0083] In some cases, quantification and inverse quantification for normal transformation modes Calculation Applying to all modes, including transform skip mode and palette mode, quantification and inverse quantification of normal transform mode, transform skip mode, and palette mode Calculation It is possible to integrate all of these.

[0084] In one example, the quantification and inverse quantification processes for the normal transform mode are performed in the transform skip mode. It is also used for the mode and palette modes. For example, equations (2), (3), (4), and (5) is also used for quantification / dequantification processing in transform skip mode and palette mode. will be done.

[0085] JPEG0007823100000022.jpg33165

[0086] JPEG0007823100000023.jpg55167

[0087] JPEG0007823100000024.jpg56168

[0088] JPEG0007823100000025.jpg31166

[0089] JPEG0007823100000026.jpg51166

[0090] JPEG0007823100000027.jpg18164

[0091] In one example, the above method is used to unify the quantification and dequantification processes of different sample values. If the CU is coded in lossless coding mode, the lossless coding mode is used. A separate flag, e.g., trans_quant_bypass_flag, can be added to the bitstream to indicate Such a flag can signal to the system that a particular block is in a loss state. If the quantification mode indicates that the data is encoded in the quantification mode, the corresponding quantification and dequantification processes are It is bypassed for the coding of the block.

[0092] FIG. 10 is a block diagram illustrating an apparatus for video encoding and decoding according to an embodiment of the present disclosure. The device 1100 may be a mobile phone, a tablet computer, a digital broadcast terminal, or the like. , a tablet device, or a terminal such as a personal digital assistant.

[0093] As shown in FIG. 10, the device 1100 includes a processing unit 1002, a memory 1004, a power supply unit 1006, multimedia section 1008, audio section 1010, input / output (I / O) One or more of the interface 1012, the sensor unit 1014, and the communication unit 1016 It may include.

[0094] The processing unit 1002 normally handles display, telephone calls, data communications, camera operations, and recording operations. The processing unit 1002 controls the overall operation of the device 1000, including operations related to the above. One or more instructions for carrying out instructions for implementing all or part of the steps of the method It is possible for the processing unit 1002 to include multiple processors 1020. Including one or more modules that contribute to the interaction between 1002 and other components For example, the processing unit 1002 may include a multimedia unit 1008 and a processing unit 1002. It may also include a multimedia module for contributing to the interaction between the

[0095] The memory 1004 stores different types of data to support the operation of the device 1100. Examples of such data include any data stored in the device 1100. instructions for applications or methods, contact data, phone book data, messages , images, videos, etc. The memory 1004 may be any type of volatile or non-volatile memory. The memory 1004 may be implemented by a statically-running memory device or a combination thereof. Static Random Access Memory (SRAM), electrically erasable Programmable Read-Only Memory (EEPROM) Erasable Read-Only Memory (EPROM), Erasable Programmable Read-Only Memory (EPROM) sable Programmable Read-Only Memory (PRO M: Programmable Read-Only Memory, ROM: Read-Only Memory y), magnetic memory, flash memory, magnetic disk, or compact disk. That's fine.

[0096] The power supply unit 1006 supplies power to each component of the device 1000. generating and managing power for the management system, one or more power sources, and the device 1000; and other components related to dispensing.

[0097] The multimedia section 1008 provides an output interface between the device 1000 and the user. In one example, the screen includes a liquid crystal display (LCD). It may include a touch panel (TP: Touch Panel). If the screen includes a touch panel, the screen may be a touch panel that receives input signals from a user. The touch panel may be realized as a touch screen. , slides, and gestures. The touch sensor not only detects the boundary of the touch or slide operation, but also The duration and pressure associated with the touch or slide action can also be detected. In an example, the multimedia section 1008 includes a front camera and / or a rear camera. When the device 1000 is in an operational mode, such as an imaging mode or a video mode, The front and / or rear camera can receive external multimedia data. can be done.

[0098] The audio unit 1010 is configured to output and / or input audio signals. For example, the audio unit 1010 includes a microphone (MIC). The phone controls whether the device 1000 is in a certain operating mode, such as a call mode, a recording mode, or a voice recognition mode. When in the audio mode, the device is configured to receive an external audio signal. The signal may be further stored in memory 1004 or transmitted via communication unit 1016. In one example, the audio unit 1010 may be a switch for outputting an audio signal. It further includes a peaker.

[0099] The I / O interface 1012 connects the processing unit 1002 to the peripheral interface module. The peripheral interface module provides an interface between the It may be a keyboard, a click wheel, a button, etc. These buttons may include This includes, but is not limited to, the power button, volume buttons, start button, and lock button. Not determined.

[0100] The sensor unit 1014 may include one or more sensors for providing status assessments of different aspects of the device 1000. For example, the sensor unit 1014 may detect the on / off state of the device 1000 and For example, these components can be used to detect the relative positions of the components in the device. The sensor section 1014 is also the display and keypad of the device 1000. or a change in the position of a component of the device 1000, or whether or not a user is touching the device 1000. , detecting the orientation or acceleration / deceleration of the device 1000, and temperature changes of the device 1000; The sensor unit 1014 can also be configured to detect the presence of a nearby object without physical contact. The sensor unit 1014 may include a proximity sensor configured to It may also include an optical sensor such as a CMOS or CCD image sensor. In this example, the sensor unit 1014 includes an acceleration sensor, a gyro sensor, a magnetic sensor, It may further include a pressure sensor or a temperature sensor.

[0101] The communication unit 1016 is configured to facilitate wired or wireless communication between the device 1000 and other devices. The device 1000 may be configured to use a communication technology such as WiFi, 4G, or a combination thereof. In one example, the communication unit 101 can access a wireless network based on a standard. 6 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In one example, the communication unit 1016 may be a near field communication (NFC) unit to facilitate short-range communication. For example, the NFC module may further include a radio frequency identification (NFC) module. (RFID) technology, Infrared Data Association (IrDA) technology, Ultra-Wideband (UWB) technology, It may be implemented based on Bluetooth (BT) technology and other technologies.

[0102] In one example, the device 1000 may include an application specific integrated circuit (AS) for performing the above method. IC), Digital Signal Processor (DSP), Digital Signal Processing Device (DSPD), Programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controller, microcontroller, microprocessor, or other electronic This may be achieved by one or more of the elements.

[0103] The non-transitory computer-readable storage medium may be, for example, a hard disk drive (H DD), solid state drives (SSD), flash memory, hybrid drives and solid state high Hybrid Drive (SSHD), Read-Only Memory (ROM), Compact Disc Reader It may be a dedicated memory (CD-ROM), magnetic tape, floppy disk, etc. stomach.

[0104] FIG. 11 illustrates an example of a quantification design in video encoding and decoding, according to an embodiment of the present disclosure. 1 is a flow chart illustrating an exemplary process that can be applied in an encoder.

[0105] In step 1101, the processor 1020 performs a quantification for the residual data of the CU. Determine the parameters.

[0106] In step 1102, the processor 1020 scales the quantification parameters. The scale value is derived by scaling by a factor.

[0107] In step 1103, the processor 1020 determines a number of coefficients associated with the CU. do.

[0108] In one example, these coefficients may be transform coefficients, CU's escape It may include color values, and prediction residual sample values.

[0109] In step 1104, the processor 1020 determines a plurality of parameters associated with the CU. Determine.

[0110] In one example, these parameters include the coding bit depth, and the width and The scaling factor includes a bit shift that is determined based on the width and height of the CU. is determined based on the

[0111] In step 1105, the processor 1020 divides these multiple parameters into bits. By shifting the bits, we obtain multiple bit shifts.

[0112] In step 1106, the processor 1020 calculates the scale values, their coefficients, and , and obtain a quantification level based on a plurality of bit shifts thereof.

[0113] In one example, the processor 1020, when determining the coefficients associated with the CU, further escape Determine the color value. escape The color value may be a value of a pixel in a CU having a color other than the predetermined plurality of colors selected from the CU. Then, when the processor 1020 obtains the quantification level based on the scale value, the plurality of coefficients, and the plurality of bit shifts, the scale value, escape A quantification level is obtained based on the color values ​​and a number of bit shifts thereof.

[0114] In one example, the processor 1020 further determines a prediction residual sample associated with the CU. The processor 1020 determines a plurality of coefficients associated with the CU. and, The processor 1020 further determines a prediction residual sample value corresponding to the prediction residual sample. The processor 1020 obtains a quantification level based on the scale value, the coefficients, and the bit shifts. death , and further obtains a quantification level based on the scale value, the prediction residual sample value, and multiple bit shifts.

[0115] FIG. 12 illustrates an inverse quantization design for video encoding and decoding according to an embodiment of the present disclosure. 1 is a flow chart illustrating an exemplary process that can be applied in a decoder.

[0116] In step 1201, the processor 1020 determines the quantification parameters and the quantification level. The video bitstream includes a video bitstream containing a video signal.

[0117] In step 1202, the processor 1020 scales the quantification parameters. The scale value is derived by scaling by a factor.

[0118] In step 1203, the processor 1020 calculates a plurality of parameters associated with the CU. Determine.

[0119] In one example, these parameters include the coding bit depth, and the width and The scaling factor includes a bit shift that is determined based on the width and height of the CU. is determined based on the

[0120] In step 1204, the processor 1020 bit-codes these multiple parameters. By shifting the bits, we obtain multiple bit shifts.

[0121] In step 1205, the processor 1020 determines the quantification level, the scale value, and Based on these multiple bit shifts, multiple coefficients associated with the CU are obtained.

[0122] In one example, these coefficients are reconstructed transform coefficients, escape It may include color values, and reconstructed prediction residual sample values.

[0123] In one example, when the processor 1020 obtains the plurality of coefficients associated with the CU based on the quantization level, the scale value, and the plurality of bit shifts thereof, the processor 1020 further obtains the reconstructed coefficients of the CU based on the quantization level, the scale value, and the plurality of bit shifts thereof. escape Determine the color value of this reconstructed escape The color value may be the value of a pixel in a CU that has a color other than the predetermined plurality of colors selected from this CU.

[0124] In one example, the processor 1020 further determines a prediction residual sample associated with the CU. The processor 1020 calculates the value based on the quantification level, the scale value, and the number of bit shifts. When obtaining multiple coefficients related to the CU based on the quantification level, scale value, and Based on these multiple bit shifts, we get the reconstructed prediction residual sample values ​​of this CU. This reconstructed prediction residual sample value may correspond to the prediction residual sample. It is Noh.

[0125] In one example, a computing device for video encoding is provided. The device includes a processor. and a memory 1020 configured to store instructions executable by the processor. 004, wherein the processor, upon execution of the instructions, performs the method as shown in FIG. is configured to execute

[0126] In one example, a computing device for video encoding is provided. The device includes a processor. and a memory 1020 configured to store instructions executable by the processor. 004, wherein the processor, upon execution of the instructions, performs the method as shown in FIG. is configured to execute

[0127] In another example, a non-transitory computer-readable storage medium 10 having instructions stored thereon is 04. These instructions, when executed by the processor 1020, The processor executes the method shown in FIG.

[0128] In another example, a non-transitory computer-readable storage medium 10 having instructions stored thereon is 04. These instructions, when executed by the processor 1020, The processor executes the method shown in FIG.

[0129] The description of the present disclosure has been presented for convenience of illustration and is not intended to be exhaustive or limiting of the present disclosure. Many modifications, variations, and alternative implementations are possible in the above. These and other features will be apparent to one skilled in the art having the benefit of the teachings presented in the specification and associated drawings.

[0130] The embodiments illustrate the principles of the present disclosure, and allow those skilled in the art to understand and base on the disclosure for various implementations. The principles and various modifications are best utilized in various implementations to suit the particular use anticipated. The invention has been chosen and described to facilitate its use. The scope is not limited to the specific examples of the disclosed embodiments, and modifications and other implementations are also encompassed by the scope of the present disclosure. It should be understood that the scope of the present invention is

Claims

1. obtaining a bitstream including a plurality of video blocks in a video frame; deriving a quantification parameter and a quantification level for a first coded block in the plurality of video blocks from the bitstream; deriving a scale value by looking up a scale level table based on the quantification parameter; In response to determining that the first coding block is coded in transform skip mode, obtaining residual samples for samples in the first coding block by applying a first inverse quantization operation arranged to obtain reconstruction samples for escape samples in a second coding block coded in palette mode in the plurality of video blocks based on the quantization level, the scale value, and a plurality of bit shifts; reconstructing the first coded block based on the residual samples; Including, a block size of the first coding block or the second coding block is not used in determining parameters of the first inverse quantification operation; A method for video decoding.

2. and, in response to determining that a third coding block in the plurality of video blocks was coded in a normal transform mode, obtaining residual samples for samples in the third coding block by applying a second inverse quantification operation different from the first inverse quantification operation. The method of claim 1 , wherein the block size of the first coded block is used to determine parameters of the second inverse quantization operation.

3. The method of claim 1 , wherein the scale level table is levelScale[k] = { 40, 45, 51, 57, 64, 72}, where k = 0...

5.

4. receiving, in the bitstream, an escape flag indicating whether escape samples are present in the second coded block; The method of claim 1 further comprising:

5. The method of claim 1 , wherein the plurality of bit shifts comprises a left shift of QP / 6 bits and a right shift of 6 bits, where QP is the quantification parameter.

6. the first inverse quantification operation is: [Equation 1] The method of claim 1.

7. Dividing a video frame into a plurality of video blocks; determining a quantification parameter and a quantification level for a first coding block in the plurality of video blocks; deriving a scale value by looking up a scale level table based on the quantification parameter; In response to determining that the first coding block is coded in transform skip mode, obtaining residual samples for samples in the first coding block by applying a first inverse quantization operation arranged to obtain reconstruction samples for escape samples in a second coding block coded in palette mode in the plurality of video blocks based on the quantization level, the scale value, and a plurality of bit shifts; Including, 10. A method for video encoding, wherein a block size of the first coding block or the second coding block is not used in determining parameters of the first inverse quantification operation.

8. and, in response to determining that a third coding block in the plurality of video blocks was coded in a normal transform mode, obtaining residual samples for samples in the third coding block by applying a second inverse quantification operation different from the first inverse quantification operation. The method of claim 7 , wherein the block size of the first coded block is used to determine parameters of the second inverse quantization operation.

9. 8. The method of claim 7, wherein the scale level table is levelScale[k] = { 40, 45, 51, 57, 64, 72}, where k = 0...

5.

10. generating an escape flag indicating whether escape samples are present in the second coded block; The method of claim 7 further comprising:

11. The method of claim 7 , wherein the plurality of bit shifts comprises a left shift of QP / 6 bits and a right shift of 6 bits, where QP is the quantification parameter.

12. the first inverse quantification operation is: [Equation 2] The method according to claim 7

13. one or more processors; a non-transitory memory coupled to the one or more processors; a plurality of programs stored in the non-transitory memory; Including, The plurality of programs, when executed by the one or more processors, cause the one or more processors to: A computing device configured to perform the method of any one of claims 7 to 12.

14. 13. A non-transitory computer-readable storage medium storing computer-executable instructions that, when executed by one or more computer processors, cause the one or more computer processors to perform the method of any one of claims 7 to 12.

15. 1. A method for storing a bitstream, comprising: Executing a method according to any one of claims 7 to 12 to generate the bitstream; storing the bitstream on a computer readable storage medium; A method comprising:

16. A computer program storing instructions which, when executed by a processor, cause the processor to carry out the method of any one of claims 7 to 12.

17. One or more processors; a non-transitory memory coupled to the one or more processors; a plurality of programs stored in the non-transitory memory; Including, The plurality of programs, when executed by the one or more processors, cause the one or more processors to: A computing device configured to carry out the method of any one of claims 1 to 6.

18. A non-transitory computer-readable storage medium that stores computer-executable instructions that, when executed by one or more computer processors, cause the one or more computer processors to perform a method according to any one of claims 1 to 6.

19. A computer program storing instructions that, when executed by a processor, cause the processor to perform a method according to any one of claims 1 to 6.

Images