Stacked structure, stage, semiconductor manufacturing apparatus, and method for manufacturing stacked structure

A laminated structure with an intermediate aluminum oxide layer and voids enhances adhesion in semiconductor manufacturing, improving adhesion strength and voltage resistance without physical roughening, addressing the adhesion issues in existing technologies.

JP7825415B2Active Publication Date: 2026-03-06NHK SPRING CO LTD
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-12-21
Publication Date
2026-03-06

AI Technical Summary

Technical Problem

The adhesion between anodized aluminum layers and alumina coating layers in semiconductor manufacturing is poor, requiring physical roughening processes like blasting, which increases manufacturing time and can affect voltage resistance.

Method used

A laminated structure for semiconductor manufacturing equipment is developed, featuring a substrate with an intermediate aluminum oxide layer containing voids and partition walls, onto which a coating layer is thermally sprayed, enhancing adhesion without physical roughening.

Benefits of technology

The adhesion strength between the coating and intermediate layers is improved to 20 MPa or higher, with a withstand voltage of 28 kVDC/mm, surpassing traditional methods by maintaining a thin intermediate layer structure.

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Abstract

To improve adhesion of a coating layer without physical roughening treatment such as blasting treatment.SOLUTION: There is provided a laminated structure for a semiconductor manufacturing device, which contains aluminum and comprises an intermediate layer containing a substrate having a first surface and aluminum oxide disposed on the first surface of the substrate and a coating layer containing metal atoms disposed on the intermediate layer. The intermediate layer has a partition wall which forms a plurality of voids in a cross-sectional shape parallel to the first surface. The intermediate layer has a boundary layer covering the first surface of the substrate. The coating layer is disposed in a portion of the plurality of voids in the intermediate layer. The plurality of voids include voids which are adjacent to the boundary layer and separated from the coating layer.SELECTED DRAWING: Figure 9
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Description

[Technical Field]

[0001] The present invention relates to a laminated structure. [Background technology]

[0002] A stage in a semiconductor manufacturing device includes an aluminum substrate and an insulating layer formed on its surface. For example, according to the configuration disclosed in Patent Document 1, the insulating layer includes, for example, an aluminum oxide layer (anodized aluminum layer) formed on the substrate by anodizing and an aluminum oxide (alumina coating layer) formed by thermal spraying. The anodized aluminum layer and the alumina coating layer do not have good adhesion to each other. Therefore, it is necessary to roughen the surface of the anodized aluminum layer by blasting to improve the adhesion of the alumina coating layer. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2000-114189 Summary of the Invention [Problem to be solved by the invention]

[0004] According to the configuration of Patent Document 1, the adhesion between the anodized aluminum layer and the alumina sprayed layer is improved by removing approximately 10 μm of an anodized aluminum layer of approximately 30 μm using a physical roughening process such as blasting. Forming an anodized aluminum layer thick enough to withstand roughening such as blasting requires a long manufacturing time. Furthermore, the need to remove the anodized aluminum layer by blasting further increases the manufacturing time. Furthermore, if the substrate is exposed by the roughening process, the exposed portion may adversely affect the voltage resistance. Therefore, to reduce manufacturing defects, the anodized aluminum layer may need to be made thicker.

[0005] One of the objects of the present invention is to improve the adhesion of a coating layer without the need for physical surface roughening treatment such as blasting. [Means for solving the problem]

[0006] According to one embodiment, a laminated structure for semiconductor manufacturing equipment is provided, comprising: a substrate containing aluminum and having a first surface; an intermediate layer containing aluminum oxide disposed on the first surface of the substrate; and a coating layer containing metal atoms disposed on the intermediate layer, wherein the intermediate layer has partition walls that form multiple voids in a cross-sectional shape parallel to the first surface, the intermediate layer has a boundary layer that covers the first surface of the substrate, the coating layer is disposed in some of the multiple voids in the intermediate layer, and the multiple voids include voids adjacent to the boundary layer and spaced apart from the coating layer.

[0007] The plurality of voids may include a first void and a second void adjacent to the first void, a first diameter of the first void being 10 nm or more and 100 nm or less, and a second diameter of the second void being 1.5 times or more the first diameter.

[0008] The first diameter may be 10 nm or more and 30 nm or less.

[0009] The thickness of a partition wall between the first gap and the second gap may be smaller than the length of a first diameter of the first gap.

[0010] The partition may include a mesh structure.

[0011] The thickness of the intermediate layer may be 2 μm or less, the adhesion strength between the coating layer and the intermediate layer may be greater than the breaking strength of the coating layer, and the withstand voltage of the intermediate layer and the coating layer may be 28 kVDC / mm or more.

[0012] According to one embodiment, there is provided a laminated structure for semiconductor manufacturing equipment, the laminated structure comprising: a substrate containing aluminum and having a first surface; an intermediate layer containing aluminum oxide disposed on the first surface of the substrate; and a coating layer containing metal atoms disposed on the intermediate layer, wherein the intermediate layer has partition walls that form a plurality of voids in a cross-sectional shape parallel to the first surface, the plurality of voids including a first void having a first diameter and a second void adjacent to the first void and having a second diameter, the first diameter being 10 nm or more and 30 nm or less, and the second diameter being 1.5 times or more of the first diameter.

[0013] According to one embodiment, a laminated structure for semiconductor manufacturing equipment is provided, comprising: a substrate containing aluminum and having a first surface; an intermediate layer containing aluminum oxide disposed on the first surface of the substrate; and a coating layer containing metal atoms disposed on the intermediate layer, wherein the intermediate layer has partition walls that form multiple voids in a cross-sectional shape parallel to the first surface, the multiple voids including a first void having a first diameter and a second void adjacent to the first void, and the thickness of the partition wall between the first void and the second void is smaller than the length of the first diameter.

[0014] According to one embodiment, there is provided a laminated structure for semiconductor manufacturing equipment, comprising: a substrate containing aluminum and having a first surface; an intermediate layer containing aluminum oxide disposed on the first surface of the substrate; and a coating layer containing metal atoms disposed on the intermediate layer, wherein the intermediate layer has mesh-like partition walls that form a plurality of voids in a cross-sectional shape parallel to the first surface.

[0015] According to one embodiment, there is provided a laminated structure for semiconductor manufacturing equipment, comprising: a substrate containing aluminum and having a first surface; an intermediate layer containing aluminum oxide arranged on the first surface of the substrate; and a coating layer containing metal atoms arranged on the intermediate layer, wherein the intermediate layer has partition walls that form multiple voids in a cross-sectional shape parallel to the first surface, the thickness of the intermediate layer is 2 μm or less, the adhesion strength between the coating layer and the intermediate layer is greater than the breaking strength of the coating layer, and the withstand voltage of the intermediate layer and the coating layer is 28 kVDC / mm or more.

[0016] The adhesive strength between the substrate and the coating layer may be 20 MPa or more.

[0017] The partition wall may have a portion extending perpendicular to the first surface, and the gap may have a portion extending perpendicular to the first surface.

[0018] The metal atom may be aluminum.

[0019] The coating layer may comprise aluminum oxide.

[0020] The coating layer may be a thermally sprayed film layer.

[0021] According to one embodiment, a stage is provided that includes the laminated structure described above, wherein the coating layer is an insulator, and the second surface opposite the first surface has an area where the coating layer is not formed on at least a portion of the base.

[0022] According to one embodiment, there is provided a semiconductor manufacturing apparatus including the above-described stage and a chamber in which the stage is disposed.

[0023] The chamber may further include an electrode for generating a plasma.

[0024] According to one embodiment, there is provided a method for manufacturing a laminated structure for semiconductor manufacturing equipment, the method including: subjecting a substrate containing aluminum to an oxidation treatment to form an intermediate layer of aluminum oxide having a plurality of voids on a first surface of the substrate; and forming a coating layer containing metal atoms by thermal spraying on the intermediate layer so as to penetrate some of the plurality of voids.

[0025] The intermediate layer may have a thickness of 2 μm or less. [Effects of the Invention]

[0026] According to the present invention, the adhesion of the coating layer can be improved without physical surface roughening treatment such as blasting. [Brief explanation of the drawings]

[0027] [Figure 1] FIG. 1 is a diagram illustrating a semiconductor manufacturing apparatus according to an embodiment. [Figure 2] FIG. 2 is a diagram schematically illustrating a cross-sectional structure near the surface of a stage according to an embodiment. [Figure 3] 10 is a flowchart illustrating a method for manufacturing a stage according to an embodiment. [Figure 4] 10A to 10C are diagrams for explaining a method of manufacturing a stage according to an embodiment. [Figure 5] 10A to 10C are diagrams for explaining a method of manufacturing a stage according to an embodiment. [Figure 6] 1 is a SEM photograph showing the surface structure of an intermediate layer in one embodiment. [Figure 7] 3A and 3B are diagrams for explaining features of the surface structure of an intermediate layer in one embodiment. [Figure 8] 1 is a SEM photograph showing a cross-sectional structure after an intermediate layer is formed in one embodiment. [Figure 9] 4 is a SEM photograph showing a cross-sectional structure after a coating layer is formed in one embodiment. [Figure 10]FIG. 10 is a diagram illustrating the results of a tensile test performed on a sample in which a coating layer is formed on the surface of a substrate that has been subjected to a surface roughening treatment. [Figure 11] FIG. 10 is a diagram illustrating the results of a tensile test performed on a sample in which a coating layer is formed on an intermediate layer formed on a substrate. [Figure 12] 10 is a SEM photograph showing the surface structure of an intermediate layer in a modified example. DETAILED DESCRIPTION OF THE INVENTION

[0028] An embodiment of the present invention will be described in detail below with reference to the drawings. The embodiments described below are merely examples, and the present invention should not be construed as being limited to these embodiments. In the drawings referred to in this embodiment, identical parts or parts having similar functions are designated with the same or similar symbols (symbols consisting of a number followed by A, B, etc.), and repeated explanations may be omitted. For clarity of explanation, the drawings may be illustrated schematically, with dimensional ratios different from actual ratios and parts of the configuration omitted from the drawings.

[0029] FIG. 1 is a diagram illustrating a semiconductor manufacturing apparatus according to one embodiment. The semiconductor manufacturing apparatus 100 illustrated in FIG. 1 is, for example, a sputtering apparatus. The semiconductor manufacturing apparatus may be a PVD (Physical Vapor Deposition) apparatus other than a sputtering apparatus, or may be a CVD (Chemical Vapor Deposition) apparatus. Furthermore, the semiconductor manufacturing apparatus 100 is not limited to an apparatus having an electrode for generating plasma, and may be an apparatus that does not generate plasma.

[0030] The semiconductor manufacturing apparatus 100 includes a stage 1, an electrode EC, and a chamber CH that houses these. The chamber CH includes an inlet FC for introducing gas into the chamber CH and an outlet EB for discharging the gas. The stage 1 has a first surface S1 on which a semiconductor wafer WF is placed. The electrode EC has a magnet MG therein. A target TG is attached to the electrode EC.

[0031] The stage 1 includes a substrate 10 and an insulating layer CT that covers a portion of the surface of the substrate 10, thereby exposing a portion of the substrate 10. The substrate 10 is a conductor, and in this example, is aluminum. The insulating layer CT covers, for example, the first surface S1 of the substrate 10 and also covers portions of the first surface S1 to the second surface S2, thereby exposing a portion of the second surface S2 of the substrate 10. In other words, the insulating layer CT is not formed on a portion of the second surface S2 of the substrate 10. The second surface S2 is located on the opposite side of the first surface S1. A power source PG is connected to the substrate 10 and the electrode EC, thereby generating plasma inside the chamber CH using the electrode EC and the substrate 10.

[0032] The stage 1 may have a heating function or a cooling function. If the stage 1 has a heating function, a heating element may be disposed inside the base 10, and if the stage 1 has a cooling function, a pipe for passing a coolant may be disposed inside the base 10.

[0033] Next, the relationship between the base body 10 and the insulating layer CT on the stage 1 will be described.

[0034] 2 is a diagram schematically illustrating a cross-sectional structure near the surface of a stage in one embodiment. As shown in FIG. 2, an insulating layer CT is disposed on a first surface S1 of the base 10. The insulating layer CT is an example of a laminated structure including an intermediate layer 50 on the base 10 and a covering layer 20 disposed on the intermediate layer 50.

[0035] As described above, the substrate 10 is a conductor, which is aluminum in this example. The intermediate layer 50 is an aluminum oxide layer formed by oxidizing the surface of the substrate 10. The coating layer 20 is a thermally sprayed film layer containing metal atoms formed on the intermediate layer 50 by thermal spraying, which is an aluminum oxide layer that is an insulator in this example.

[0036] FIG. 3 is a flowchart illustrating a method for manufacturing a stage according to an embodiment. FIGS. 4 and 5 are diagrams illustrating a method for manufacturing a stage according to an embodiment. First, as shown in FIG. 4, a base 10 is prepared (step S100). In this example, the base 10 is made of aluminum. Next, as shown in FIG. 5, an oxidation treatment is performed on the surface of the base 10 to form an intermediate layer 50 (step S200). Here, aluminum oxide is formed on the surface of the base 10 (first surface S1 in the example of FIG. 5) by anodic oxidation. The aluminum oxide layer thus formed corresponds to the intermediate layer 50. The thickness of the intermediate layer 50 is, for example, from 0.1 μm to 2 μm, preferably from 0.3 μm to 1.5 μm, and more preferably from 0.5 μm to 1.2 μm.

[0037] Various known methods can be used for anodization, and the conditions are set appropriately so as to form an intermediate layer 50 that satisfies at least some of the conditions described below. For example, the oxidation treatment is achieved by immersing the exposed portion of the substrate 10 where the intermediate layer 50 is to be formed in an electrolyte, applying a predetermined voltage to the substrate 10 as an anode, and passing a current from the substrate 10 to a counter electrode. An AC voltage may also be applied to the substrate 10.

[0038] The electrolyte is, for example, phosphoric acid, but an acidic electrolyte such as sulfuric acid, nitric acid, or oxalic acid may also be used, or an alkaline electrolyte may also be used. A solution or surfactant that has the effect of dissolving aluminum oxide may be added to the electrolyte. The temperature of the electrolyte may be set appropriately, for example, to about 20°C. If the temperature is set too low, the partition walls will become thick, resulting in so-called hard anodized aluminum. However, as will be described later, it is preferable that the partition walls in the intermediate layer 50 are thin, so the temperature may be set to 20°C or higher, for example, 25°C to 40°C.

[0039] Before the oxidation treatment, pretreatment for cleaning the surface of the base 10 may be performed, such as degreasing, immersion in a mixed acid containing phosphoric acid, sulfuric acid, and nitric acid, or immersion in a sodium hydroxide aqueous solution to remove oxides. After the oxidation treatment, thinning of the partition walls with a sodium hydroxide aqueous solution may be performed.

[0040] The coating layer 20 is formed on the intermediate layer 50 thus formed (step S300), thereby forming the layered structure of stage 1 shown in Fig. 2. The coating layer 20 is formed by thermally spraying aluminum oxide.

[0041] The structure of the intermediate layer 50 will be described with reference to Figures 6, 7, and 8. First, the surface structure of the intermediate layer 50 when it is formed will be described with reference to Figures 6 and 7. The characteristics of this surface structure are not only apparent on the surface of the intermediate layer 50, but also have similar characteristics in a portion of the cross section of the intermediate layer 50 parallel to the first surface S1.

[0042] Figure 6 is an SEM photograph showing the surface structure of an intermediate layer in one embodiment. SEM photograph (b) in Figure 6 is an enlarged photograph of a portion (the area surrounded by the solid line) of SEM photograph (a). As shown in Figure 6, the intermediate layer 50 includes partition walls that form multiple voids in a cross section parallel to the first surface S1. The partition walls form a three-dimensional network structure.

[0043] Fig. 7 is a diagram illustrating the characteristics of the surface structure of the intermediate layer in one embodiment. Fig. 7 is an enlarged photograph of the area surrounded by the dashed line in the SEM photograph (b) of Fig. 6. Void 521 (first void) and void 522 (second void) are adjacent to each other via partition wall 550. When void 521 and void 522 are not to be distinguished from each other, they may be referred to as void 520.

[0044] The diameter of a void is the length connecting two points on the outer edge of the void in a cross section parallel to the first surface S1, and is the value when this length is greatest. In this example, the diameter d1 of the void 521 is approximately 50 nm in the example shown in FIG. 7, but may be 5 nm or more and 200 nm or less. The diameter d1 (first diameter) of the void 521 is preferably 10 nm or more and 100 nm or less. The diameter d1 of the void 521 may be 10 nm or more and 30 nm or less. The diameter d2 (second diameter) of the void 522 is approximately 110 nm in the example shown in FIG. 7, but is 1.5 times or more the diameter d1 of the void 521. In this way, in the intermediate layer 50, at least some of the voids 520 (for example, the above-mentioned void 521) have a relationship in which the diameters of the voids adjacent to the voids (for example, the above-mentioned void 522) are significantly different.

[0045] 7, the thickness d3 of the thinnest portion of the partition wall 550 in the region sandwiched between the voids 521 and 522 is approximately 30 nm, which is smaller than the length of the smaller diameter (here, diameter d1) of the voids 521 and 522 separated by the partition wall 550. In this manner, in the intermediate layer 50, a plurality of voids are formed by the thin partition wall 550.

[0046] 8 is an SEM photograph showing the cross-sectional structure after forming an intermediate layer in one embodiment. The intermediate layer 50 includes a boundary layer 551 at the boundary with the base 10. The boundary layer 551 is also generally referred to as a barrier layer. The partition wall 550 includes a portion extending from the boundary layer 551 and a portion extending perpendicular to the first surface S1 of the base 10. The void 520 includes a portion extending perpendicular to the first surface S1 of the base. The perpendicular does not necessarily have to be 90 degrees, but may have a range of several degrees.

[0047] Next, the relationship between the intermediate layer 50 and the covering layer 20 after the covering layer 20 has been formed will be described with reference to FIG.

[0048] Figure 9 is an SEM photograph showing the cross-sectional structure after forming a coating layer in one embodiment. SEM photograph (b) in Figure 9 is an enlarged photograph of a portion (the area surrounded by a line) of SEM photograph (a). A region MA is formed at the boundary between the intermediate layer 50 and the coating layer 20, where they are bonded to each other. The region MA is formed when the sprayed aluminum oxide penetrates into some of the voids when the coating layer 20 is formed. The depth to which the coating layer 20 penetrates is approximately 50 nm to 80 nm even in the deepest part. Therefore, the coating layer 20 penetrates only into the voids 520 that exist in a small portion on the surface side (coating layer 20 side) of the intermediate layer 50.

[0049] In other words, the thickness of the region MA is much thinner than that of the intermediate layer 50, and voids 520 that have not been penetrated by the coating layer 20 remain in most of the intermediate layer 50. That is, even after the coating layer 20 is formed, the intermediate layer 50 is adjacent to the boundary layer 551, and voids 520 that are separated from the coating layer 20 exist. The presence of these voids 520 provides a stress relaxation effect. If the intermediate layer 50 is 0.1 μm or thicker, voids 520 that have not been penetrated by the coating layer 20 can exist. In particular, because the thermal spraying during the formation of the coating layer 20 is exposed to high temperatures, even if significant stress is generated due to such temperature changes, the presence of the voids 520 relieves the stress.

[0050] Next, the adhesion of the substrate 10, intermediate layer 50, and coating layer 20 thus formed, and the withstand voltage between the surfaces of the substrate 10 and coating layer 20 were evaluated. As a comparative example, a sample in which the substrate 10 was subjected to a surface roughening treatment to improve adhesion instead of using the intermediate layer 50 was used. The adhesion was confirmed by a tensile test. The tensile test was performed in accordance with ASTM C633. The withstand voltage test was performed with reference to JIS C2110.

[0051] FIG. 10 illustrates the results of tensile tests performed on samples in which a coating layer was formed on a roughened substrate surface. In this comparative example, a substrate 10 was roughened (forming irregularities of approximately 100 μm), and a coating layer 20 was formed by thermal spraying. That is, the prior art differs from the example of the above-described embodiment in that the intermediate layer 50 is not present, and the substrate 10 has a surface roughened by blasting. A support rod 90 was attached to the coating layer 20 using adhesive 80, and the support rod 90 and substrate 10 were fixed to a tensile tester. Ten samples (five of which are illustrated in the photograph in FIG. 10 ) of the comparative example were fractured at the interface between the substrate 10 and the coating layer 20. The strength at fracture, i.e., the adhesion strength, was less than 20 MPa in all cases, with an average of 17 MPa for the ten samples.

[0052] As a result of the voltage resistance test on the comparative samples, the voltage resistance of the coating layer 20 was all less than 28 kVDC / mm. It is believed that the presence of protrusions on the surface of the substrate 10 causes the peaks of the protrusions to reduce the voltage resistance.

[0053] FIG. 11 illustrates the results of a tensile test performed on samples in which a coating layer was formed on an intermediate layer formed on a substrate. In this example, an intermediate layer 50 was formed on a substrate 10, and then a coating layer 20 was formed by thermal spraying, as in the configuration of the embodiment described above. A support rod 90 was attached to the coating layer 20 using adhesive 80, and the support rod 90 and the substrate 10 were fixed to a tensile tester. The tensile test results for the samples in this embodiment showed that all samples (10 samples, five of which are illustrated in the photograph in FIG. 11 ) fractured at the boundary between the coating layer 20 and the intermediate layer 50 and inside the coating layer 20. The strength at fracture, i.e., the adhesion strength, was 17 MPa or higher for all samples, and the average for the 10 samples was 22 MPa. The adhesion strength of most samples was 20 MPa or higher, which is higher than the maximum adhesion strength obtained for the comparative sample. In other words, by providing an intermediate layer 50 as in the embodiment described above, an adhesion strength of 20 MPa or higher can be easily achieved. It is even more preferable that this adhesion strength be 22 MPa or higher. Since the fracture inside the coating layer 20 is included, it can also be said that the adhesion strength between the coating layer 20 and the intermediate layer 50 is greater than the fracture strength of the coating layer 20 .

[0054] As a result of a voltage resistance test on the sample of this embodiment, the voltage resistance of the laminate of the intermediate layer 50 and the covering layer 20 was 28 kVDC / mm or more.

[0055] The sample with the intermediate layer 50 formed in this manner had higher adhesion strength and voltage resistance than the sample that had undergone surface roughening. The intermediate layer 50 has a structure that satisfies at least some of the above-mentioned conditions, which allows for improved adhesion strength compared to the case where surface roughening was performed. In particular, if the coating layer 20 is formed by thermal spraying with the voids 520 of the intermediate layer 50 exposed on the surface, the coating layer 20 can slightly penetrate into the voids 520, thereby increasing adhesion strength compared to the case where surface roughening was performed, even if the layer is much thinner than the depth of the irregularities that are effective in surface roughening.

[0056] In this case, the intermediate layer 50 only needs to satisfy at least one of the following conditions: that it has voids 520 formed by partition walls 550 thinner than the diameter of the voids 520; that it contains voids 520 that satisfy the condition that the diameters of adjacent voids 520 differ by 1.5 times or more; and that the partition walls 550 have a mesh structure. Satisfying multiple conditions can also improve adhesion.

[0057] A technique for improving adhesion when forming an organic resin on an aluminum substrate by first forming an oxide film with voids by oxidizing the substrate surface has been known for some time. Such organic resin is first applied to the substrate surface in liquid form. The applied material penetrates the oxide film, filling all of the voids. Therefore, no voids remain in the oxide film, and the entire film is filled with the organic resin. It has been recognized that if the amount of organic resin that penetrates into the voids is small, adhesion will decrease. Furthermore, when using an organic resin, a process is also included in which the applied liquid material is cured by heat treatment.

[0058] On the other hand, when forming coating layer 20 by thermal spraying, the sprayed particles solidify immediately upon contact with intermediate layer 50, and therefore penetrate only part of the surface of voids 520 in intermediate layer 50. In this way, the manufacturing conditions for organic resins and inorganic materials formed by thermal spraying or the like are completely different.

[0059] Furthermore, when forming a coating layer by thermal spraying, as shown in the above-mentioned Patent Document 1, the material formed by thermal spraying has poor adhesion even when an oxide film is formed, so a surface roughening treatment has been a common technique. Therefore, even when forming an oxide film as in Patent Document 1, it is necessary to form a film thick enough to withstand surface roughening.

[0060] In this way, a typical engineer would never have imagined that a thin oxide film, which is used to improve adhesion between an organic resin and a substrate, could also be used to improve adhesion between a thermally sprayed material and a substrate. The present inventors have found, from a new perspective, that even such a thin oxide film can improve the adhesion of a layer formed by thermal spraying. However, as mentioned above, while organic resins improve adhesion by penetrating into the voids in the oxide film, layers formed by thermal spraying only slightly penetrate into the voids, so the principles by which they improve adhesion may be different.

[0061] <Modification> The present disclosure is not limited to the above-described embodiments, and includes various other modified examples. For example, the above-described embodiments have been described in detail to clearly explain the present disclosure, and are not necessarily limited to those including all of the described configurations. Furthermore, it is possible to add, delete, or replace part of the configuration of each embodiment with other configurations. Some modified examples are described below.

[0062] (1) The structure of the intermediate layer 50 can be varied in various ways by adjusting the manufacturing conditions.

[0063] FIG. 12 is an SEM photograph showing the surface structure of an intermediate layer in a modified example. When the substrate 10 is subjected to an oxidation treatment under conditions different from those of the above-described embodiment, the intermediate layer 50A of the modified example shown in FIG. 12 has a surface structure having partition walls with a three-dimensional mesh structure, similar to the intermediate layer 50. On the other hand, compared to the intermediate layer 50 shown in FIG. 6 of the embodiment, the intermediate layer 50A has small void diameters overall, with many voids having diameters of 10 nm or more and 30 nm or less. Even with the intermediate layer 50A having such a surface structure, the coating layer 20 formed by thermal spraying can slightly penetrate into the voids exposed on the surface, thereby achieving the same effect as the intermediate layer 50 of the embodiment.

[0064] (2) In the embodiment described above, the laminated structure including the substrate 10, intermediate layer 50, and coating layer 20 was applied to stage 1 of the semiconductor manufacturing apparatus 100, but it may also be used for purposes other than stage 1. In particular, it can be applied as a method for increasing adhesion strength when coating a substrate by thermal spraying. Depending on the application, the coating layer 20 may be an insulating material other than aluminum oxide, or a conductive material, as long as it is a layer containing metal atoms that can be coated by thermal spraying. The coating layer 20 may be, for example, yttrium oxide, yttrium oxyfluoride, nickel chromium, or nickel aluminum. [Explanation of symbols]

[0065] 1: stage, 10: substrate, 20: coating layer, 50, 50A: intermediate layer, 80: adhesive, 90: support rod, 100: semiconductor manufacturing equipment, 520, 521, 522: gap, 550: partition wall, 551: boundary layer

Claims

1. A laminated structure for semiconductor manufacturing equipment, a substrate comprising aluminum and having a first surface; an intermediate layer comprising aluminum oxide disposed on the first surface of the substrate; a coating layer containing metal atoms disposed on the intermediate layer; Including, the intermediate layer has partition walls that form a plurality of voids in a cross section parallel to the first surface, the intermediate layer has a boundary layer covering the first surface of the substrate; the coating layer is disposed in some of the voids in the intermediate layer; the plurality of voids includes a void adjacent to the boundary layer and spaced apart from the coating layer; the plurality of voids include a first void and a second void adjacent to the first void, a second diameter of the second gap is 1.5 times or more the first diameter of the first gap; the partition wall has a portion extending perpendicular to the first surface, the gap has a portion extending perpendicular to the first surface, the void includes a first portion into which the coating layer has penetrated and a second portion in which the coating layer is not present, The depth of the first portion is less than the depth of the second portion. Laminated structure.

2. The laminated structure according to claim 1 , wherein the first diameter is equal to or greater than 10 nm and equal to or less than 30 nm.

3. The laminated structure according to claim 2 , wherein a thickness of a partition wall between the first void and the second void is smaller than a length of a first diameter of the first void.

4. The laminated structure according to claim 1 , wherein the partition wall includes a mesh structure.

5. The thickness of the intermediate layer is 2 μm or less, the adhesive strength between the coating layer and the intermediate layer is greater than the breaking strength of the coating layer; The withstand voltage of the intermediate layer and the coating layer is 28 kVDC / mm or more. The laminated structure according to any one of claims 1 to 4.

6. A laminated structure for semiconductor manufacturing equipment, a substrate comprising aluminum and having a first surface; an intermediate layer comprising aluminum oxide disposed on the first surface of the substrate; a coating layer containing metal atoms disposed on the intermediate layer; Including, the intermediate layer has partition walls that form a plurality of voids in a cross section parallel to the first surface, the plurality of voids include a first void having a first diameter and a second void adjacent to the first void; a thickness of a partition wall between the first gap and the second gap is smaller than a length of the first diameter; a second diameter of the second void is 1.5 times or more the first diameter; the partition wall has a portion extending perpendicular to the first surface, the gap has a portion extending perpendicular to the first surface, the void includes a first portion into which the coating layer has penetrated and a second portion in which the coating layer is not present, The depth of the first portion is less than the depth of the second portion. Laminated structure.

7. A laminated structure for semiconductor manufacturing equipment, a substrate comprising aluminum and having a first surface; an intermediate layer comprising aluminum oxide disposed on the first surface of the substrate; a coating layer containing metal atoms disposed on the intermediate layer; Including, the intermediate layer has a mesh-like partition wall that forms a plurality of voids in a cross section parallel to the first surface, the plurality of voids include a first void and a second void adjacent to the first void, a second diameter of the second gap is 1.5 times or more the first diameter of the first gap; the partition wall has a portion extending perpendicular to the first surface, the gap has a portion extending perpendicular to the first surface, the void includes a first portion into which the coating layer has penetrated and a second portion in which the coating layer is not present, The depth of the first portion is less than the depth of the second portion. Laminated structure.

8. A laminated structure for semiconductor manufacturing equipment, a substrate comprising aluminum and having a first surface; an intermediate layer comprising aluminum oxide disposed on the first surface of the substrate; a coating layer containing metal atoms disposed on the intermediate layer; Including, the intermediate layer has partition walls that form a plurality of voids in a cross section parallel to the first surface, The thickness of the intermediate layer is 2 μm or less, the plurality of voids include a first void and a second void adjacent to the first void, a second diameter of the second gap is 1.5 times or more the first diameter of the first gap; the partition wall has a portion extending perpendicular to the first surface, the gap has a portion extending perpendicular to the first surface, the void includes a first portion into which the coating layer has penetrated and a second portion in which the coating layer is not present, The depth of the first portion is less than the depth of the second portion; the adhesive strength between the coating layer and the intermediate layer is greater than the breaking strength of the coating layer; The withstand voltage of the intermediate layer and the coating layer is 28 kVDC / mm or more. Laminated structure.

9. 7. The laminate structure according to claim 1, wherein the adhesive strength between the substrate and the coating layer is 20 MPa or more.

10. The laminated structure according to claim 1 , wherein the metal atoms are aluminum atoms.

11. The laminate structure of claim 10 , wherein the coating layer comprises aluminum oxide.

12. The laminated structure according to any one of claims 1 to 11, wherein the coating layer is a thermal sprayed film layer.

13. The laminate structure according to any one of claims 1 to 12, the coating layer is an insulator, a second surface opposite to the first surface, the second surface having a region where the coating layer is not formed in at least a part of the substrate; stage.

14. a stage according to claim 13; a chamber in which the stage is disposed; Semiconductor manufacturing equipment including

15. The semiconductor manufacturing apparatus of claim 14 , further comprising an electrode for generating a plasma in the chamber.

16. A method for manufacturing a laminated structure for semiconductor manufacturing equipment, comprising: an oxidation treatment of an aluminum-containing substrate to form an intermediate layer of aluminum oxide having a plurality of voids on a first surface of the substrate; forming a coating layer containing metal atoms by thermal spraying on the intermediate layer so as to penetrate into some of the voids; Including, the intermediate layer has partition walls that form a plurality of voids in a cross section parallel to the first surface, the plurality of voids include a first void and a second void adjacent to the first void, a second diameter of the second gap is 1.5 times or more the first diameter of the first gap; the partition wall has a portion extending perpendicular to the first surface, the gap has a portion extending perpendicular to the first surface, the void includes a first portion into which the coating layer has penetrated and a second portion in which the coating layer is not present, The depth of the first portion is less than the depth of the second portion. A method for manufacturing a laminated structure.

17. The method for producing a laminated structure according to claim 16, wherein the thickness of the intermediate layer is 2 μm or less.

Citation Information

Patent Citations

  • Sealing treatment of anodized film of aluminum or aluminum alloy and dielectric member for carrying electrostatic charge image

    JP1993210245A

  • Evacuation chamber

    JP2000114189A

  • Corrosion-resistant aluminum component having multi-layer coating

    JP2006241589A

  • Plasma etching apparatus and method of forming inner wall in plasma processing chamber

    JP2007227443A

  • Aluminum molding and production method thereof

    JP2017115193A